74 HCT 245

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SN54HCT245, SN74HCT245

OCTAL BUS TRANSCEIVERS


WITH 3-STATE OUTPUTS
SCLS020C – MARCH 1984 – REVISED MAY 1997

D Inputs Are TTL-Voltage Compatible SN54HCT245 . . . J OR W PACKAGE

D High-Current 3-State Outputs Drive Bus


SN74HCT245 . . . DB, DW, N, OR PW PACKAGE
(TOP VIEW)
Lines Directly or up to 15 LSTTL Loads
D Package Options Include Plastic DIR 1 20 VCC
Small-Outline (DW), Shrink Small-Outline A1 2 19 OE
(DB), Thin Shrink Small-Outline (PW), and A2 3 18 B1
Ceramic Flat (W) Packages, Ceramic Chip A3 4 17 B2
Carriers (FK), and Standard Plastic (N) and A4 5 16 B3
Ceramic (J) 300-mil DIPs A5 6 15 B4
A6 7 14 B5
description A7 8 13 B6
A8 9 12 B7
These octal bus transceivers are designed for
GND 10 11 B8
asynchronous two-way communication between
data buses. The control-function implementation
minimizes external timing requirements. SN54HCT245 . . . FK PACKAGE
(TOP VIEW)
The devices allow data transmission from the

VCC
DIR
A bus to the B bus or from the B bus to the A bus,

OE
A2
A1
depending upon the logic level at the
direction-control (DIR) input. The output-enable 3 2 1 20 19
(OE) input can be used to disable the device so A3 4 18 B1
that the buses are effectively isolated. A4 5 17 B2
A5 6 16 B3
The SN54HCT245 is characterized for operation A6 7 15 B4
over the full military temperature range of –55°C A7 8 14 B5
to 125°C. The SN74HCT245 is characterized for 9 10 11 12 13
operation from –40°C to 85°C.

A8

B8
B7
B6
GND
FUNCTION TABLE
INPUTS
OPERATION
OE DIR
L L B data to A bus
L H A data to B bus
H X Isolation

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Copyright  1997, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1


SN54HCT245, SN74HCT245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS020C – MARCH 1984 – REVISED MAY 1997

logic symbol†

19
OE G3
1
DIR 3 EN1 [BA]
3 EN2 [AB]

2 18
A1 1 B1
2
3 17
A2 B2
4 16
A3 B3
5 15
A4 B4
6 14
A5 B5
7 13
A6 B6
8 12
A7 B7
9 11
A8 B8

† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

logic diagram (positive logic)

1
DIR

19
OE

2
A1

18
B1

To Seven Other Channels

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


SN54HCT245, SN74HCT245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS020C – MARCH 1984 – REVISED MAY 1997

absolute maximum ratings over operating free-air temperature range†


Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA
Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.

recommended operating conditions


SN54HCT245 SN74HCT245
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage VCC = 4.5 V to 5.5 V 2 2 V
VIL Low-level input voltage VCC = 4.5 V to 5.5 V 0 0.8 0 0.8 V
VI Input voltage 0 VCC 0 VCC V
VO Output voltage 0 VCC 0 VCC V
tt Input transition (rise and fall) time 0 500 0 500 ns
TA Operating free-air temperature –55 125 –40 85 °C

electrical characteristics over recommended operating free-air temperature range (unless


otherwise noted)
TA = 25°C SN54HCT245 SN74HCT245
PARAMETER TEST CONDITIONS VCC UNIT
MIN TYP MAX MIN MAX MIN MAX
IOH = –20 µA 4.4 4.499 4.4 4.4
VOH VI = VIH or VIL 45V
4.5 V
IOH = –6 mA 3.98 4.3 3.7 3.84
IOL = 20 µA 0.001 0.1 0.1 0.1
VOL VI = VIH or VIL 45V
4.5 V
IOL = 6 mA 0.17 0.26 0.4 0.33
II DIR or OE VI = VCC or 0 5.5 V ±0.1 ±100 ±1000 ±1000 nA
IOZ A or B VO = VCC or 0 5.5 V ±0.01 ±0.5 ±10 ±5 µA
ICC VI = VCC or 0, IO = 0 5.5 V 8 160 80 µA
One input at 0.5 V or 2.4 V,
∆ICC‡ 5.5 V 1.4 2.4 3 2.9 mA
Other inputs at 0 or VCC
4.5 V
Ci§ DIR or OE 3 10 10 10 pF
to 5.5 V
‡ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
§ Parameter Ci does not apply to transceiver I/O ports.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3


SN54HCT245, SN74HCT245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS020C – MARCH 1984 – REVISED MAY 1997

switching characteristics over recommended operating free-air temperature range, CL = 50 pF


(unless otherwise noted) (see Figure 1)
FROM TO TA = 25°C SN54HCT245 SN74HCT245
PARAMETER VCC UNIT
(INPUT) (OUTPUT) MIN TYP MAX MIN MAX MIN MAX
4.5 V 16 22 33 28
tpd
d A or B B or A ns
5.5 V 14 20 30 25
4.5 V 25 46 69 58
ten OE A or B ns
5.5 V 22 41 62 52
4.5 V 26 40 60 50
tdi
dis OE A or B ns
5.5 V 23 36 54 45
4.5 V 9 12 18 15
tt A or B ns
5.5 V 8 11 16 14

switching characteristics over recommended operating free-air temperature range, CL = 150 pF


(unless otherwise noted) (see Figure 1)
FROM TO TA = 25°C SN54HCT245 SN74HCT245
PARAMETER VCC UNIT
(INPUT) (OUTPUT) MIN TYP MAX MIN MAX MIN MAX
4.5 V 20 30 45 38
tpd
d A or B B or A ns
5.5 V 18 27 41 34
4.5 V 36 59 89 74
ten OE A or B ns
5.5 V 30 53 80 67
4.5 V 17 42 63 53
tt A or B ns
5.5 V 14 38 57 48

operating characteristics, TA = 25°C


PARAMETER TEST CONDITIONS TYP UNIT
Cpd Power dissipation capacitance per transceiver No load 40 pF

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


SN54HCT245, SN74HCT245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS020C – MARCH 1984 – REVISED MAY 1997

PARAMETER MEASUREMENT INFORMATION


VCC
PARAMETER RL CL S1 S2

S1 tPZH 50 pF Open Closed


Test ten 1 kΩ or
Point RL tPZL 150 pF Closed Open
From Output
Under Test tPHZ Open Closed
CL tdis 1 kΩ 50 pF
(see Note A) S2 tPLZ Closed Open

50 pF
tpd or tt –– or Open Open
150 pF
LOAD CIRCUIT

3V
Input 1.3 V 2.7 V 2.7 V
1.3 V
0.3 V 0.3 V 0 V
tr tf

VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES

3V Output 3V
Input 1.3 V 1.3 V Control
1.3 V 1.3 V
0V (Low-Level
Enabling) 0V
tPLH tPHL
tPZL tPLZ
In-Phase VOH ≈ VCC
90% 90% Output
Output 1.3 V 1.3 V Waveform 1 1.3 V
10% 10% V
OL (See Note B) 10% VOL
tr tf
tPHL tPLH tPZH
Out-of- VOH
90% 90% Output VOH
Phase 1.3 V 1.3 V 90%
Output 10% 10% Waveform 2 1.3 V
VOL (See Note B) ≈0V
tf tr tPHZ

VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS


PROPAGATION DELAY AND OUTPUT RISE AND FALL TIMES ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS

NOTES: A. CL includes probe and test-fixture capacitance.


B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.

Figure 1. Load Circuit and Voltage Waveforms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5


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product or service without notice, and advises its customers to obtain the latest version of relevant information
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the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are
utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each
device is not necessarily performed, except those mandated by government requirements.

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severe property or environmental damage (“Critical Applications”).

TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED


TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER
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Copyright  1996, Texas Instruments Incorporated

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