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    Lecture 4

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    J.V.'S CLASS
    The document discusses VLSI technology and the silicon wafer growth process. It describes how silicon wafers are created using the Czochralski process which involves melting polysilicon in a crucible, adding a seed crystal, pulling the crystal as it grows, and slicing the solidified silicon ingot into wafers. The wafers can be sliced along the (100), (110), or (111) crystal planes and are pre-doped with p-type or n-type dopants.

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    Lecture 4

    Uploaded by

    J.V.'S CLASS
    21 views14 pages
    The document discusses VLSI technology and the silicon wafer growth process. It describes how silicon wafers are created using the Czochralski process which involves melting polysilicon in a crucible, adding a seed crystal, pulling the crystal as it grows, and slicing the solidified silicon ingot into wafers. The wafers can be sliced along the (100), (110), or (111) crystal planes and are pre-doped with p-type or n-type dopants.

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    VLSI Lecture 4

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    The document discusses VLSI technology and the silicon wafer growth process. It describes how silicon wafers are created using the Czochralski process which involves melting polysilicon in a crucible, adding a seed crystal, pulling the crystal as it grows, and slicing the solidified silicon ingot into wafers. The wafers can be sliced along the (100), (110), or (111) crystal planes and are pre-doped with p-type or n-type dopants.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as pdf or txt
    21 views14 pages

    Lecture 4

    Uploaded by

    J.V.'S CLASS
    The document discusses VLSI technology and the silicon wafer growth process. It describes how silicon wafers are created using the Czochralski process which involves melting polysilicon in a crucible, adding a seed crystal, pulling the crystal as it grows, and slicing the solidified silicon ingot into wafers. The wafers can be sliced along the (100), (110), or (111) crystal planes and are pre-doped with p-type or n-type dopants.

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    VLSI Technology

    Lecture 5

    Dr. Brajendra Singh Sengar (PhD, IIT Indore)


    Assistant Professor
    Department of Electronics and Communication Engineering
    National Institute of Technology Srinagar
    Email id: brajendra.singh@nitsri.ac.in
    Simple Cubic F C Cubic
    Silicon Wafer Growth

    Polysilicon Seed Crystal Crystal Silicon


    melt Crystal Growth pulling Ingot

    The Czochralski Growth Process


    Silicon Wafer

    •Wafer are pre-doped to a certain level (p-type or n-type: we’ll explain what that
    means later)
    •Wafers are sliced along different crystallographic planes: (100), (110), and
    (111) wafers are used

    Miller indices
    The unit cell can be constructed
    by starting with an FCC cell and adding four
    additional atoms. If the length of each side is a, the
    four additional atoms are located at (a/4, a/4, a/4),
    (3a/4, 3a/4, a/4), (3a/4, a/4, 3a/4), and (a/4, 3a/4,
    3a/4). This crystal structure can also be thought of as
    two interlocking FCC lattices.

    http://hyperphysics.phy-astr.gsu.edu/hbase/Solids/sili2.html
    Thanks

    14

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