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Panel IVO P236MWF1 R0 0
Panel IVO P236MWF1 R0 0
SIGNATURE SIGNATURE
REVIEWED BY
QA
PREPARED BY
FAE
FQ-7-30-0-009-03D
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NO.1 Long Teng Road, KunShan City, JiangSu, China Tel:0512-57278888
InfoVision Optoelectronics (Kunshan) Co., LTD Fax:0512-57278900
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InfoVision Optoelectronics (Kunshan) Co.,LTD.
Document Title P236MWF1 product information Page No. 2/27
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NO.1 Long Teng Road, KunShan City, JiangSu, China Tel:0512-57278888
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Document Title P236MWF1 product information Page No. 3/27
Contents
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1.2 Features
■ 23.6”FHD TFT LCD Panel
■ Supported FHD(V:1,920 lines, H:1,080pixels) resolution
■ Compatible with RoHS Standard
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RXinO2+/-
Connector
RXinO3+/-
Y-Driver
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NO.1 Long Teng Road, KunShan City, JiangSu, China Tel:0512-57278888
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Figure 2 shows the relationship of the input signals and LCD pixel format image.
1919 1920
1079
1080
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Specification
Item Conditions
Min Typ Max Note
Viewing Angle [degrees] Horizontal (Right + Left) 150 170 --
A, B
K=Contrast Ratio>10 Vertical (Up + Down) 140 160 --
Contrast ratio L255 / L0 700 1,000 -- A, C
Rising -- 3.5 5
Response Time [ms]
Falling -- 1.5 3
Color Chromaticity Red x 0.642 A,
(CIE1931) Red y 0.334 A,
Green x 0.281 A,
Green y 0.600 A,
Blue x -0.03 0.144 +0.03 A,
Blue y 0.071 A,
White x 0.313 A,
White y 0.329 A,
Panel Transmittance %( ) 5.07 5.45 --- A, E
Note: All the characteristics are measured under the condition using the IVO test inverter and
the IVO black light set.
A. Measurement Setup:
The LCD module should stabilized at given temperature for 30 minutes to avoid
abrupt temperature change during measuring. In order to stabilize the luminance, the
measurement should be executed after lighting backlight for 30 minutes in a windless
room.
Figure 3 Measurement Setup
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Normal
θx = θy = 0°
θy- θy+
12 o'clock direction
θx- = 90°
x- y+ θy+ = 90°
θx-
θx+
6 o'clock y-
θy- = 90° x+
θx+ = 90°
TR TF
100%
90%
Optical
Response 10%
0%
time
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0.60
0.50
0.40
0.30
0.20
0.10
0.00
380 430 480 530 580 630 680 730 780
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Document Title P236MWF1 product information Page No. 12/27
27 NC NO CONTACT
28 VDD Power Supply
29 VDD Power Supply
30 VDD Power Supply
All input signals shall be low or Hi-Z state when VDD is off.
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Common Mode Voltage Offset ∆Vcm -50 -- +50 mV Vth - Vtl = 200mV
Note:
A. Input signals shall be low or Hi-Z state when VDD is off.
B. All electrical characteristics for LVDS signal are defined and shall be measured at
the interface connector of LCD.
Clock -- --
Fc 63.5 73.3 96.7 MHz
Frequency
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RX(O/E)C
Current cycle
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Note: Tsu and Thd is internal data sampling window of receiver. Trskm is the system skew
margin; i.e., the sum of cable skew, source clock jitter, and other inter-symbol interference,
shall be less than Trskm.
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RXOC+
RXEC+
100
PLL DTCLK
RXOC-
RXEC-
Sampling clocks
RXinO0-
RXinE0-
OG0, OR5, OR4, OR3, OR2, OR1, OR0
100
RXinO1-
RXinE1-
OB1, OB0, OG5, OG4, OG3, OG2, OG1
100
RXinO3-
RXinE3-
100
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Figure .Signals shall be Hi-Z state or low level when VDD is off.
T1 T6
VDD 90%
10%
0V
T2 T5 T7
Valid
LVDS signals
0V
T3 T4
90%
Backlight power
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11.8 Disposal
When disposing LCD module, obey the local environmental regulations.
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