DSD Till 18.01.23 PDF

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HandaNOne Dlseca domquogUs Do

VLSI Veny dange Acale nt


VHDL
hian- Aplo AMIAatid ouit
hondw
dsouptm lmguage

m d oluigms
VLSI AhoqAomMNAMG ome
gn o n uug
haichwaHL
dlsoiptne Jomguags OMCh ds e i
H e r i l o g , VHDL

VHDL HOMAwane 00anihli


ual0um OU VHSL
VHDL m VHSIC Atomds {OV MUuy high LpLaol
uwhu
Lamguage,
udmugsoleacinciit

hoE cam e
AlAuptieonguage

o hanowane
VMDL
A s t n _o mody lmels
INLOLOmdel a ugital algoitnnriie
mel
m e l to dh
to thz
QUstnocton omgma o m

usium rigog
AIGNMENT-I

Diesmtiatu vununeim VHDL{VIniLog omd

nanontuauns df VHDL
c o m u e Usid s 0N change medum
his Lomguage us
Detutn w p emdins_0md CAD LAL
COnmputet did
besugns
VHDL ddeiptione
Dwnt onip uemdns wom phude
utA ALYAtiMm alsugmers.
o1 thin Ompommti
D tOO MAUNL Co MMnthUL MAe IU t captuhl cthe

DDuio 04 diaigm it a nghn el of abit0cten


matnal Atimulatien
up i mud.
hodt
his lomguage suppotts {llAihlu diuugn mithod
gL rat a Top DOUN, Bottom
aspnthnomu
Bt auuppDTEs DEN aynthnonDus omd
umurg models
modiillMA vchNaMU AUcn as
Vavuous digutal
mmachime dhuniphens (FS
siniti ataBl
lgouibmic tdlsLnpuons, UOILam 0apuohDNA
con u modelled ung this longuage

0aLlabls huMO
Lomuage is publialy
MOOohl o c h i e nindakbe
ond abui oll
ibnot pOpUuey
he mgunge upports 3 bo udwnt olbsuptu,
stuus
Dota tOUD
A Bchcuiowal

ythse 3dloo-iiptien atytu.

oAgn maduing L0aiD


S deo mchiA won uhin Uimg thi som
Lwnguoe D0 tist otDL VHDL mo MBdils
cl4SSMALC

oote

(auane bbstnaction
HDI d 19 disoihe a m0dil yor diugtal hadmho
USed

This modil apicis thi trvno w t th


md eme 0 mpi intynal wus
dniceomd
Y t n a y Meu f i dnic aperijis th maienliy
hu t b m A

Auotuw t i n i thi dtmal iuw spiyis


l U C the dimice rnough which
mmiA L S Wth 0hu modils im its enuOnMUNL
Nicat

s HCUirlt denicv moold.rnabpung


h i geuLA i a l y emito
L i c d hardunre denieo may none meny
Ovnyie

Uuuic m0oLll

an VHDOAhUNAL Mede u notid adisunet


pnLUntaAN ya untou dem olld nty
utuma DoLwLe
Mocuul MOdul

DLLML V Deuice odie

Enuia Deuice hOdl 1)


ntib 2 wi modl2)

ntity N AiCCnmeoul N
VMDL
csSAte
pete

nu VHDL uLO a
X OCCOLAimg tw the dnagh0my
houunr dwice hat has mulbbe dlupL mgd, l,
wtth tach douc mpalll NLpALSLMtumg ommtitu
* mough ntuty 1 thno0ug N nutnts N
disHud intitis ioVm a VHDL pOinto wo,n
Meolity tiuy pmutt thu NDMNL handwanL du,

n i eMtiby is thus a handuwane obstDctuen tyan


Dcuol hõnduwanL dums. ach ntity is dstrihed
wing 1 madd umch coiaums 1 ttAMaL ud ond
1 m w imtma s .

by 1 MAL Ontiutls.
BASIC LEMeNTS OF VHDL_
BRi modls VHDL
Untty
2 anchitecture
onyignotien

hu intity il uAld te vpocily tho Upomd olp ports o

thut upm uputs gutputs, Yp-p 01 b u t

that onu weo se dicLane phopUtis t h e ut,


chiwcunt
dMehisectunnjs thu ostunl dtuvition ja dulga
Ucn isUALd te dldnibe hon Hhe ëneuit opuAatis.

tomab
w n g u r a e n

APguAatuen deyvms how the diaign hiorachuy


tinRla 0gctw d used to aocitte auchicetine

sqa Aloits
VHDL AS AhaNdunhu dlsciptiyn taiguag that uan e
ALd 10 modll 0 ugutal austom. honouwanl ausnacuenq
wlk digital Aystm Mlod Lntity y entity 2 uhUn wtd
h ndtw ntuy AUCemUS a wmponunt untiky 4,Thvw

10 dlou L n entiuf, VHOL p'0uidis 5.dysownt ypes of


Umay C itscalllol diugn mits.thuuy one
enuity DtLaratuon
hoectunu bady
3:0vmyiguwatuen iclmotion
Pockagt DIclwaon
S Pockoge 60dy

on ontb4 madud uMma m UMtty dlelohatiey, Umod


atluast pviL anchutCwe ocy. entity diclanatien dimkll thu

wtpmal durupien y the euity 4eryiuatlen


iclorvntuenmÄ ULid vte thioti a lniQuhatuevM m ntiby

wy Onchtectu ALstnod may e osOCiLd uth n


ontibm vtiuy mas nowe omy umbtn q ryaunabens
a packoge Dectonotien copsyulokss a Alt opoloud
dielahoijev Juh as- uypt oluclouaieY, 4ublypt duclonmuvs
wnd oubpro9sam dueloogtiers whuch be nones
QMOSS ue or motL disugm writs.
A pockage J0dy contnims hi dsyind tuen AuboprogsDn
Ovnu
dleloned m d pockagc.dcluahen

HQndun ntity Dlbhahiov


Qstoonin

AnchiDctuutu bodLs
w om t i y hoas bun mLdilid tneuo te e uQlidate

uy a VHDL syssm, a typucal VHDL Mtum m s t s f orn

Dmalud_d atinniulote

Aolun mUadsumni e1 MD dtan umy tMtaimidin


a Amgll4ll wnd pmpils thln via a dligm ubou
aj ualalting ni mi syntaa ond pryeunñng aprm
statu smontis Chicks

DElam.Libnawy is a plce in thi n0t vnuionAnUn_ wheu.


ompilldopn wmts ane seud

dnulaser stmulatis 0m Untity nprusinad y om


etity wmehitucbuh paln ouy à wrigunatien, y ngpo
i wmpilLd diseuptugra {ueVn thi ollugm ibhany
6muuloto pUYOUnm 3umchens.
aooAtug

Lomguag, ons Case yuinsitine theLornguage


Omwmints w Apeciuiod m u Lomquage buy puLdig
11tuth o cosauuwwe doLhis -) mol all
4tixt utwm thL UUO doshis onmd the end of that int
i mlatia os comment
exploim NueHy the dougm wmits ty VH DL
:

HO Add Input
SuO0:0up
0
0 O

SUM= A:B + BA AB
CARRY AB

FuL AdoN
A8Cn Sum Cnt
SuT

D-Coyou
HaLy adduU
ntity MALEADDERb
DOLE (A,B inBIT; SUM, tARRY:ut BIT)
o HALEADDER
S AECintABCn + ABuint
TLL gmwmunt ABCin
SA DB&
ut btin tAB t ACin
elASSMAt
afe

HALFADDER
has AO NpUt ROtA, A.
L ovtity talludhaLt edtttr
Hh input pgt)ana thi tue
BT mud IN spuikS
pArts cuM ard CARRY CnL mgd OUT Specit
utput
the Outpu port) m
BITS apHLdined hypt f a longuage. t u
hahattinlitorols
wwwmyatuen hyp wntainiung
t o bt 0 typ BIT,
1yhus y0 iis apueijiud
wtity hos biunwwicn 'wlomb, mipotl M ton
Full addw 01
ANtity FULL-ADDER ÄS
pot A,B,Cin in BIT SUM,CARRYu
:O BII);
Und FULLADDER

- Thls_ full aoldi

2:4 Decodun
entiy DELODER AX4is
Bi7 Z:Dut B1T VECT1OR COE03)),;
potA,B,:in
enc DEUDER

4:2tncedvv
nti ENCODER 4.X2.
pot unabu:inBlI;A:ineIT_VELTOR{Oto 3)Y,2i out8U}
d ENCDDER 4 X2

ASSIlyNMENT
: 10 aikyouraiatt vetuv dpta yuow, aUuctral y
AhauiuNa 6 DuKUMCs )
Hac 6utLacto Input 0uthut

D4khentmo A D
0

BOow

A@E
D AB t BA

FullSubtLactor

Fin7L

ABBin Bput
0 0 D 0

borno) AB + B+AC
0

LO 0 0
LD 0
LLL
Mutt ipltAUL
tnput SSoY
Ao-
00 1o
0
A
Dutpu
0 1
Inputs A

An-9
An
An
T11
n sclucbe
A BS)
npubs

DChmltipld

Hauk ubthacter

tiny HALF-SUBTRACTOR

pot CA,8:n BIT D, 6:0m BIT);


nc HALE ASUBTRACTOR

FUU AANatactev-
Lnttu FULL-SVBTRACTOR is
pot A, B, Bin i in BIT; DBout utBIT
n d FVLL-SUBTRACTOR

Tnis (s FUll Aubthac


HW MU
ASSM
Enod
3x8-Ptt0eER

eMtuy aluo DECOD ER 2X4


has 3 input
pVtA hsanol 4-
uutputs pos ThL BIT-VECTOR U a phedylmd meonstroim o

t b Un wich thi wn y OOy M not apecLud h u ramg


0 03 or pot z pLYs ML anhay iga

3x8 DECODER

tity D3x&Ab
pOe ApB,C,E un BIT2: 0tBIT VECTDR (0161);
nd D-3xg

Tus Ab x8 DELODER.

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