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Infineon IR2112 DS v01 - 00 EN
Infineon IR2112 DS v01 - 00 EN
Infineon IR2112 DS v01 - 00 EN
PD60026 revS
IR2112(-1-2)(S)PbF
HIGH AND LOW SIDE DRIVER
Features Product Summary
• Floating channel designed for bootstrap operation
• Fully operational to +600V VOFFSET 600V max.
• Tolerant to negative transient voltage
dV/dt immune IO+/- 200 mA / 420 mA
• Gate drive supply range from 10 to 20V
• Undervoltage lockout for both channels VOUT 10 - 20V
• 3.3V logic compatible
Separate logic supply range from 3.3V to 20V ton/off (typ.) 125 & 105 ns
Logic and power ground ±5V offset
• CMOS Schmitt-triggered inputs with pull-down Delay Matching 30 ns
• Cycle by cycle edge-triggered shutdown logic
• Matched propagation delay for both channels
Packages
• Outputs in phase with inputs
Description
The IR2112(S) is a high voltage, high speed power
MOSFET and IGBT driver with independent high and 16-Lead SOIC (wide body)
low side referenced output channels. Proprietary HVIC
and latch immune CMOS technologies enable rugge- 14-Lead PDIP
dized monolithic construction. Logic inputs are com-
patible with standard CMOS or LSTTL outputs, down to 3.3V logic.
The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction.
Propagation delays are matched to simplify use in high frequency applications. The floating channel can be
used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600
volts.
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only.
Please refer to our Application Notes and DesignTips for proper circuit board layout.
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IR2112(-1-2)(S)PbF
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
Note 2: When VDD < 5V, the minimum VSS offset is limited to -VDD.
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IR2112(-1-2)(S)PbF
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IR2112(-1-2)(S)PbF
VCC
LO
COM
Lead Definitions
Symbol Description
VDD Logic supply
HIN Logic input for high side gate driver output (HO), in phase
SD Logic input for shutdown
LIN Logic input for low side gate driver output (LO), in phase
VSS Logic ground
VB High side floating supply
HO High side gate drive output
VS High side floating supply return
VCC Low side supply
LO Low side gate drive output
COM Low side return
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IR2112(-1-2)(S)PbF
Lead Assignments
Part Number
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IR2112(-1-2)(S)PbF
<50 V/ns
Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test
Circuit
"
# "
#
!! !
$
# $
#
%
# %
#
Figure 3. Switching Time Test Circuit Figure 4. Switching Time Waveform Definition
"
# "
#
"
#
'*
%
#
$
#
$
#
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IR2112(-1-2)(S)PbF
250 250
Turn-On Delay Time (ns)
100 100
Typ. Typ.
50 50
0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature VCC /VBS Supply Voltage (V)
Figure 7A. Turn-On Time vs. Temperature Figure 7B. Turn-On Time vs. VCC/VBS Supply Voltage
400 250
Turn-On Delay Time (ns)
200
300
Max.
Max. 150
200
100
0 0
0 2 4 6 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125
VDD Supply Voltage (V) Temperature (°C)
Figure 7C. Turn-On Time vs. VDD Supply Voltage Figure 8A. Turn-Off Time vs. Temperature
250 400
200
Turn-Off Delay Time (ns)
Max. 300
150 Max.
200
100
Typ.
100
50
Typ.
0 0
10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20
Figure 8B. Turn-Off Time vs. VCC/VBS Supply Voltage Figure 8C. Turn-Off Time vs. VDD Supply Voltage
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IR2112(-1-2)(S)PbF
250 250
Shutdown Delay Time (ns)
100 100
Typ.
Typ. 50
50
0
0
10 12 14 16 18 20
-50 -25 0 25 50 75 100 125
Figure 9A. Shutdow n Time vs. Temperature Figure 9B. Shutdown Delay Time
vs. VCC/VBS Supply Voltage
400 250
Turn-On rise Time (ns)
S hutdow n D elay Tim e (ns)
200
300
Max. 150
200 Max.
100
100
Typ. 50
Typ.
0 0
0 2 4 6 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125
V D D S upply V oltage (V ) Temperature (°C)
Figure 9C. Shutdown Time vs. VDD Supply Voltage Figure 10A. Turn-On Rise Time vs. Temperature
250 125
Turn-On Rise Time (ns)
200 100
Max.
150 75
Max.
100 50
Typ.
50 25
Typ.
0 0
10 12 14 16 18 20 -50 -25 0 25 50 75 100 125
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IR2112(-1-2)(S)PbF
125 15
100
Min.
Max.
75 9
6
50
Typ. 3
25
0
0 -50 -25 0 25 50 75 100 125
10 12 14 16 18 20
V B IA S S u p p ly V o lta g e (V ) Temperature (°C)
Figure 11B. Turn-Off Fall Time vs. Voltage Figure 12A. Logic “I” Input Threshold
vs. Temperature
15
15
12
12
9
9
Min. Max.
6
6
3
3
0
0
2 .5 5 7 .5 10 1 2 .5 15 1 7 .5 20 -5 0 -2 5 0 25 50 75 100 125
V D D L o g ic S u p p ly V o lta g e (V ) Te m p e ra t u re (°C )
Figure 12B. Logic “I” Input Threshold Figure 13A. Logic “0” Input Threshold
vs. Voltage vs. Temperature
15
1
Logic " 0 " Input Treshold (V)
0.8
0.6
9
0.4
6
Max. M ax.
0.2
3
0
0
Figure 13B. Logic “0” Input Threshold Figure 14A. High Level Output vs. Temperature
vs. Voltage
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IR2112(-1-2)(S)PbF
1 1
0.8 0.8
0.6 0.6
0.4 0.4
M a x.
Max.
0.2 0.2
0 0
10 12 14 16 18 20 -50 -25 0 25 50 75 100 125
V B A IS S upply V otage (V ) Temperature (°C)
Figure 14B. High Level Output vs. Voltage Figure 15A. Low Level Output vs. Temperature
1
Offset Supply Leakage Current (uA)
500
Low Level Output Voltage (V)
0.8 400
0.6 300
0.4 200
Max.
Max.
100
0.2
0
0
-50 -25 0 25 50 75 100 125
10 12 14 16 18 20
500 100
Offset Supply Leakage Current (uA)
400 80
300 60
Max.
200 40
M ax .
100 20
0 Typ.
0
0 100 200 300 400 500 600 -50 -25 0 25 50 75 100 125
V B B oos t V oltage (v) Tem perature (°C )
Figure 16B. Offset Supply Current vs. Voltage Figure 17A. VBS Supply Current vs. Temperature
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IR2112(-1-2)(S)PbF
100 300
VBS Supply Current (uA)
250
80
20
50
Typ.
0 0
10 12 14 16 18 20 -5 0 -2 5 0 25 50 75 100 125
T e m p e ra t u re (° C )
V B S Floating S upply V oltage (V )
Figure 17B. VBS Supply Current vs. Voltage Figure 18A. VCC Supply Current vs. Temperature
300 12
VDD Supply Current (uA)
250 10
Vcc Supply Current (uA)
Max.
200 8
Max.
150 6
Typ.
100 4
Typ.
50 2
0 0
10 12 14 16 18 20 -50 -25 0 25 50 75 100 125
Temperature (°C)
Vcc Fixed Supply Voltage (V)
Figure 18B. VCC Supply Current vs. Voltage Figure 19A. VDD Supply Current vs. Temperature
12 100
Logic "1 " Input Bias Current (uA)
VDD Supply Current (uA)
10 80
8
60
Max.
6 Max.
40
4
2 20
Typ. Typ.
0 0
0 2 4 6 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125
VDD Logic Supply Voltage (V) Temperature (°C)
Figure 19B. VDD Supply Current vs. VDD Voltage Figure 20A. Logic “I” Input Current vs. Temperature
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IR2112(-1-2)(S)PbF
100 5
Logic " 1" Input Bias Current (uA)
60 3
Max.
40 2
Max.
20 1
Typ.
0 0
0 2 4 6 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125
V D D L o g ic S u p p ly V o lta g e (V )
Temperature (°C)
Figure 20B. Logic “1” Input Current vs. VDD Voltage Figure 21A. Logic “0” Input Current vs. Tempera-
ture
5 11
VBS Undervoltage Lockout +(V)
Logic "0" Input Bias Current (uA)
4 10
Max.
3 9
Typ.
2 8
Min.
Max.
1 7
6
0
-50 -25 0 25 50 75 100 125
0 2 4 6 8 10 12 14 16 18 20
VDD Supply Voltage (V) Temperature (°C)
Figure 21B. Logic “0” Input Current vs. VDD Voltage Figure 22. VBS Undervoltage (+) vs. Temperature
11 11
VBS Undervoltage Lockout -(V)
10 10
Max.
Max.
9 9
Typ.
Typ.
8 8
Min.
Min.
7 7
6 6
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature (°C) Temperature
(°C)
Figure 23. VBS Undervoltage (-) vs. Temperature Figure 24. VCC Undervoltage (-) vs. Temperature
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IR2112(-1-2)(S)PbF
11 500
VCC Undervoltage Lockout - (V)
Min. Min.
7 100
6 0
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Tem perature (°C) Tem perature (°C )
Figure 25. VCC Undervoltage (-) vs. Temperature Figure 26A. Output Source Current vs. Temperature
500 750
Output source Current (mA)
200 Min.
300
Min.
100
150
0
10 12 14 16 18 20 0
-50 -25 0 25 50 75 100 125
VBIAS Supply Voltage (V) Temperature (°C)
Figure 26B. Output Source Current vs. Voltage Figure 27A. Output Sink Current vs. Temperature
750
Output Sink Current (mA)
600
Typ.
450
300
Min.
150
0
10 12 14 16 18 20
VBIAS Supply Voltage (V)
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IR2112(-1-2)(S)PbF
150 150
320V
75 75
140V
50 10V 50 10V
25 25
0 0
1E+2 1E+3 1E+4 1E+5 1E+6 1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz) Frequency (Hz)
Figure 28. IR2112 TJ vs. Frequency (IRFBC20) Figure 29. IR2112 TJ vs. Frequency (IRFBC30)
Ω, VCC = 15V
RGATE = 33Ω Ω, VCC = 15V
RGATE = 22Ω
320V 320V 140V 10V
150 150
125 125
140V
Junction Temperature (°C)
100 100
10V
75 75
50 50
25 25
0 0
1E+2 1E+3 1E+4 1E+5 1E+6 1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz) Frequency (Hz)
Figure 30. IR2112 TJ vs. Frequency (IRFBC40) Figure 31. IR2112 TJ vs. Frequency (IRFPE50)
Ω, VCC = 15V
RGATE = 15Ω Ω, VCC = 15V
RGATE = 10Ω
320V 140V
150 320V 150
125 125
Junction Temperature (°C)
100 100
140V
75 10V 75
10V
50 50
25 25
0 0
1E+2 1E+3 1E+4 1E+5 1E+6 1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz) Frequency (Hz)
Figure 32. IR2112S TJ vs. Frequency (IRFBC20) Figure 33. IR2112S TJ vs. Frequency (IRFBC30)
Ω, VCC = 15V
RGATE = 33Ω Ω, VCC = 15V
RGATE = 22Ω
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IR2112(-1-2)(S)PbF
75 75
50 50
25 25
0 0
1E+2 1E+3 1E+4 1E+5 1E+6 1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz) Frequency (Hz)
Figure 34. IR2112S TJ vs. Frequency (IRFBC40) Figure 35. IR2112S TJ vs. Frequency (IRFPE50)
Ω, VCC = 15V
RGATE = 15Ω Ω, VCC = 15V
RGATE = 10Ω
0.0 20.0
-3.0 16.0
VSS Logic Supply Offset Voltage (V)
VS Offset Supply Voltage (V)
Typ.
-6.0 12.0
-12.0 4.0
-15.0 0.0
10 12 14 16 18 20 10 12 14 16 18 20
VBS Floating Supply Voltage (V) VCC Fixed Supply Voltage (V)
Figure 36. Maximum VS Negative Offset vs. Figure 37. Maximum VSS Positive Offset vs.
VBS Supply Voltage VCC Supply Voltage
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IR2112(-1-2)(S)PbF
Case outline
01-6010
14-Lead PDIP 01-3002 03 (MS-001AC)
01-6010
14-Lead PDIP w/o Lead 4 01-3008 02 (MS-001AC)
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IR2112(-1-2)(S)PbF
01 6015
16-Lead SOIC (wide body) 01-3014 03 (MS-013AA)
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IR2112(-1-2)(S)PbF
Pin 1 ?XXXX
Identifier
Lot Code
? MARKING CODE (Prod mode - 4 digit SPN code)
P Lead Free Released
Non-Lead Free
Released
Assembly site code
ORDER INFORMATION
Part only available Leadfree
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
This product has been qualified per industrial level
Data and specifications subject to change without notice. 3/23/2005
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