VJ13-33-01

ANALOG ELECTRONIC

Basic Op-Amp Circuits

 Comparator(Pembanding)
Zero-Level Detection

Satu aplikasi op-amp menggunakan pembanding untuk

menentukan apabila voltan masukan melebihi tahap tertentu.
 Comparator
Nonzero-Level Detection
The zero-level detection can be modified to detect positive and negative
voltages by connecting a reference voltage, VREF, source to the inverting (-)
input as shown:
 Comparator

The input signal in figure below is applied to the comparator. Draw

the output showing its proper relationship to the input signal. Assume
the maximum output levels of the comparator are ±12V.
Comparator
 Comparator
Comparator with Hysteresis
Voltan keluaran yang tidak menentu yang disebabkan oleh bunyi pada input.
Hasilnya boleh menjadi output yang tidak stabil. Untuk menjadikan komparator
kurang sensitif terhadap bunyi bising, histerisis boleh digunakan.
Histeresis ialah teknik yang digabungkan dengan menambah maklum balas positif
(regeneratif), yang mewujudkan dua titik pensuisan: titik pencetus atas (UTP-
upper trigger point ) dan titik trgger bawah (LTP- lower trgger point ). Selepas
satu titik pencetus dicantas, ia menjadi tidak aktif dan satu lagi menjadi aktif.

VUTP

Vin 0 t

VLTP

+Vout (max)

–Vout(max)

a) Comparator with positive feedback b) Device trigger only once when

for hysteresis – The output voltage fed UTP or LTP is reached.
back to noninverting (+) input.
 Comparator
Comparator with Hysteresis

A comparator with built-in hysteresis is also called a Schmitt trigger.

The amount of hysteresis is defined by the difference of the two trigger
levels.
VHYS = VUTP – VLTP

Whereas the trigger points are found by applying the voltage-divider rule:

VUTP 
R2
R1  R2
 Vout ( max ) 
and
VLTP 
R2
R1  R2
 Vout ( max ) 
 Comparator
Comparator with Hysteresis

What are the trigger points for the circuit Vin –

if the maximum output is ±13 V? Vout

+ R1
47 k

R2
10 k
10 k
VUTP 
R2
R1  R2
 Vout ( max )  
47 k + 10 k
 +13 V 

= 2.28 V

= 2.28 V
 Comparator
Output Bounding

Some applications require a limit to the output of the

comparator (such as a digital circuit). The output can be
limited by using one or two zener diodes in the feedback
circuit.
The circuit shown here is bounded as a positive value equal to the
zener breakdown voltage.

Vin Ri
– +VZ
0V
0
–0.7 V
+
 Comparator
VREF
Comparator Applications
Op-amp
R comparators
Vin
+
Penukar Analog ke Digital atau (analog)
–
denyut menggunakan pembanding
R
2n-1 untuk menukar input analog +

kepada nilai digital untuk –

pemprosesan. Flash ADC ialah satu R

+
Priority
encoder
siri pembanding, masing-masing –
(7)
(6)
dengan voltan rujukan yang sedikit (5)
R D2
berbeza. + (4) D1 Binary
– (3) D0 output
(2)
R (1)
+
(0)
–

R
+
Enable
– input

R
+
–

R
 Summing Amplifiers(Penguat Penjumlahan)

Penguat penjumlahan ialah penggunaan konfigurasi op-amp penyongsangan (-).

Penguat purata dan penguat penskalaan adalah variasi daripada penguat
penjumlahan asas.

Penguat penjumlahan mempunyai dua atau lebih input. Voltan keluaran adalah
berkadar dengan negatif jumlah algebra bagi voltan masukan

Figure: A summing amplifier with n inputs.

A general expression for a unity-gain

summing amplifier with n inputs, where
all resistors are equal in value:

VOUT = - (VIN1 + VIN2 + VIN3 + …. + VINn )

 Summing Amplifiers(Penguat Penjumlahan)

What is VOUT if the input voltages are +5.0 V, 3.5 V and +4.2 V and all
resistors = 10 k?
Rf
R1
VIN1
R2
VIN2 –
R3 VOUT
VIN3
+

VOUT = (VIN1 + VIN2 + VIN3)

= (+5.0 V  3.5 V + 4.2 V)
= 5.7 V
 Summing Amplifiers(Penguat Penjumlahan)
When Rf is larger than the input resistors, the amplifier has gain of :
Rf / R , where R is the value of each equal-value input resistor.
Therefore the general expression for the output is:

Averaging Amplifier
An averaging amplifier can be made to produce the mathematical
average of the input voltages. This is done by the ratio:
Rf /R = 1/n (where n is the number of inputs)
The output is the negative average of the inputs.
 Summing Amplifiers(Penguat Penjumlahan)
Averaging Amplifier

What is VOUT if the input voltages are +5.0 V, 3.5 V and +4.2 V? Assume
R1 = R2 = R3 = 10 k and Rf = 3.3 k? Then show that the amplifier
produces an output whose magnitude is the mathematical average of the
input voltages, VIN(avg). Rf
R1
VIN1
R2
VIN2 –
R3 VOUT
VIN3
VOUT = ⅓(VIN1 + VIN2 + VIN3) +

= ⅓(+5.0 V  3.5 V + 4.2 V)

= 1.9 V

= 1.9 V
 Summing Amplifiers(Penguat Penjumlahan)

Scaling Adder

A different weight can be assigned to each input of a summing amplifier by

simply adjusting the values of the input resistors. Each input having a
different gain. The output represents the negative scaled sum of the inputs.
The output voltage can be expressed as:
 Summing Amplifiers(Penguat Penjumlahan)

Scaling Adder

Determine the weight of each input voltage for the scaling adder and find the
output voltage, VOUT.
The input voltages are VIN1=+3.0 V, VIN2=2.0V and VIN3=+8.0V. R1=47 k,
R2 = 100 k , R3 = 10 k and Rf = 10 k
Rf
R1
VIN1
R2
VIN2 –
R3 VOUT
VIN3
+
 Summing Amplifiers(Penguat Penjumlahan)

Scaling Adder
An application of a scaling adder is the D/A converter circuit shown
here. The resistors are inversely proportional to the binary column
weights. Because of the precision required of resistors, the method is
useful only for small DACs.

+V 8R

20 Rf
4R

21
–
2R
VOUT
2
2
+
R

23