/ Tahmia Mize meas Department of Electcal & Computer Engineering Eee 241L/ETEAIL Electrical Circuits I! Lab Lab 3: Series RLC circuits A. Objectives + Investigate series RC, RL, and RLC circuits. + Analyze the peak voltage, current and phase relationships between the circuit components B. Background B.A, Voltage and Current in an AC circuit: ‘The complex impedance in an AC circuit is represented by Z and expressed in Cartesian form by the formula: ZaR+jX where the real part of impedance is the resistance R and the imaginary partis the reactance X Impedance can also be expressed in magnitude and phase fom: |Z|20, where @ is the phase difference between the voltage and the current. The magnitude ofthe impedance can be expressed as: |Z| = VR? + X#and the phase can be expressed as: 8 = tan-*%, follows, then, that since Ohm's Law is true for AC circuits, the current flow caused by a voltage V can be given by: Consider the circuit in Figure B.1.1 Here, Vsis the source voltage, Isthe source current and Ve, Vi and Ve the voltages across the resistor, inductor and capacitor respectively. ‘The complex voltage across any of the components can be found using the voltage divider rule. The phase relations of the voltages mentioned ‘can be expressed by the phasor diagram in Figure B.1.2: Fig.B.1.1: Series RLC circuit We can see that Vi and Ve are both 90° out of phase with the circuit current Is, and 0° and @¢°out of phase with the source voltage respectively. We can also see that the voltage across the resistor is always in phase with the current through the resistor, which, in this case, is the source current. Fig.B.1.2: Phasor Diagram Experiment 1: Series RC, RL and RLC circuits A. Apparatus Components «Resistors: 11000 = Capacitors: 11pF # Inductor: 4330 pH Instruments ‘1x Bread Board 41x Function Generator 1x Digital Storage Oscilloscope(DSO) Connecting wires and probes2221462 Tahmida Mirza Department of Electrical & Computer Engineering B. EEE2SIUETEZAIL Electrical Circuits I Lab Procedure 4. Measure the practical value of the resistor (R) using DMM and note down the value in Tables 1.1, 1.3 and 4.5. Use the measured values in all your calculations. 2. Measure the practical value of the capacitor (C) using an LCR meter and note down and 1.5. Do the same for the inductor (L) and note down the values in Tables 1.3 and 1.5. the values in Tables 1.1, 3. Construct the circuit shown in Fig.B.1.1 on the bread board. Connect Channel 1 of the oscilloscope across the source VS (positive red port to node ‘a! and negative black port to node ‘0" Le. ground). Connect the channel 2 at node 'b' (positive red port to node ‘b’ and negative black port to node 0 ie. ground). 4, To set 3V peak (6V peak to peak) and 10 KHz in the function generator, observe the generated signal on the oscilloscope screen (channel 1) and fine tune the amplitude & frequency of the input signal generated from the function generator to match the nominal values. Always set the amplitude after setting the frequency because changing the frequency of a non-ideal source might alter the amplitude. a Rt LA Vs '330pH Fig.B. 5. Channel 2 of the Oscilloscope will show you the voltage drop across C1 and Channel 1 will show you the source voltage VS. To find out the Voltage drop across R1, use MATH function to get a signal CH1-CH2. 6. Use CURSOR (type should be: Voltage & source should be MATH) on the signal that was generated using ‘MATH function, to find out the peak voltage drop across R1 (Vr). From measurement, find out the peak voltage drop across C1 (Vc) and record them in table 1.2. 7. Use CURSOR (type should be: Time) to measure the time difference between a peak of the source wave shape (Vs — Channel 1) and the next peak of the voltage across C1 (Vc~ Channel 2). Note down the time (Delay) in table 1.2. 8 Use CURSOR (type should be: Time) to measure the time difference between @ peak of the source wave shape (Vs ~ Channel 1) and the next peak of the voltage across R1 (Vr—Math generated signal). Note down the time (Delay) in table 1.2. Series RC circuit Fig.B.1.2: Series RL circuit ©. Now, replace the capacitor (C1) with the inductor (L1) to construct the circuit shown in Fig.B.4.2, 10. Keep the source frequency to 10 kHz and the amplitude to 3V peak (6V peak to peak), 11. Repeat step 6 to find out Vr & Vi and record them in table 1.4 12, Repeat steps 7 & 8 to find out the time difference between Vs(peak) and Vi(peak) and Ve(peak) and Va (peak)J Tahmida Mirza 2221452 jj Department of Electrical & Computer Engineering EEE241LIETE241L Electrical Circuits Lab 13. Construct the circuit shown in Fig.B.1.3 on the bread board. Connect Channel 1 of the oscilloscope across the source VS (positive red port to node ‘a’ and negative black port to node ‘0’ i. ground). Connect the channel 2 at node ‘c’ (positive red port to node ‘c’ and negative black port to node ‘0' Le. ground). 414. To set 3V peak (6V peak to peak) and 10 KHz in the function generator, observe the generated signal on the oscilloscope screen (channel 1) and fine tune the amplitude & frequency of the input signal generated from the function generator to match the nominal values. Always set the amplitude after setting the frequency because changing the frequency of a non-ideal source might alter the amplitude. 18. Channel 2 of the Oscilloscope will show you the voltage drop across C1 and Channel 1 will show you the source voltage VS, 16. From measurement, find out the peak voltage drop across C1 (Vc) and record that in table 1.6. 17. Use CURSOR (type should be: Time) to measure the time difference between a peak of the source wave shape (Vs ~ Channel 1) and the next peak of the voltage across C1 (Vo~ Channel 2). Note down the time (Delay) in table 1.6. 18. Now connect the Channel-2 (ted port) to node ‘b’. And to find out the Voltage drop across R1, use MATH function to get a signal CH1-CH2. 19. Use CURSOR (type should be: Voltage) on the signal that was generated using MATH function, to find out the peak voltage drop across R1 (Vr) and record that in table 1.6. 20, Use CURSOR (type should be: Time) to measure the time difference between a peak of the source wave shape (Vs ~ Channel 1) and the next peak of the voltage across R1 (Ve— Math generated signal). Note down the time (Delay) in table 1.6. 21. Use REF function of the oscilloscope to save the output graph of Vs (Channel 1) 22. Now connect the Channel-1 (red port) to node ’b’ & the Channel-2 (red port) to node ‘c’. The current MATH function generated signal will give you the Voltage drop across the inductor L1 23. Use CURSOR (type should be: Voltage) on the signal that was generated using MATH function, to find out the peak voltage drop across L1 (Vi) and record that in table 1.6. 24, Use CURSOR (type should be: Time) to measure the time difference between a peak of the source wave shape (Vs— REF signal) and the next peak of the voltage across L1 (Vi. — Math generated signal), Note down the time (Delay) in table 1.6. Simulation 1. In MULTISIM, construct the circuit in figure B.1.1, 8.1.2 & B.1.3 and do TRANSIENT analysis for showing the time delays between different voltages across all the components. 2. Attach the output graphs in your report. D. Questions 41. In step 6, what would have happened if the required readings had been obtained by switching the positions of the resistor and the capacitor? Explain your answer, 2. Draw the phasor diagrams for the circuits in Fig B.1.1, Fig B.1.2 and Fig B.1.3. 3, How would each of the phasor diagrams change if the source frequency was raised! 4, In case of the series RLC circuit, do the practical readings confin f ti percentage differences are above 10%, suggest 3 possible reasonsDepartment of Electrical & Computer Engineering E. Data Sheet: Lab 3 2221452 EEE241L/ETE24IL Electrical Circuits Il Lab Date: Points: wrsn ie Remarks: Signéfure of the Instructor Student Information Section’ po, Group: a 7 Status: Et Table 1.1: Reactance and Impedance values (series RC circuit) Rimeasuredya) | C measured] XT) eum | Zee fean"*5)) 9-7 0 195% UF 15-91%) TN | DASA] GO. 69 ETF E.2 Table 1.2: Compan ing magnitudes and phases of Vc and Va Mesa ® [Vootl | Delay AT | 6 (Practical) y (Theory) | (Theory) | (Practical) | (Practica) | (AT xf x 360) | % Difference [| | % Difference @ Nef Ob 95-6 [ogy [aes | Fe 57-467 07% Me [2U] ihe Ta7avl das [144 SOD ot. E.3 Table 1.3: Reactance and Impedance values (series RL circult) Z LZ R(measured)(a) | L{meastred)H) | X. (Theory) 2xFL1(O) | aKa) WRF | ZO" tean=*(2 yy aad 242 ai 20-74 4] so I aap E.4 Table 1.4: Comparing magnitudes and phases of Vi and Vp Moeanl 8 [peak] | Delay AT | 6 (Practical) 7 , (Theory) | (Theory) (Practical) | (Practical) | [AT xx 360] | % Difference |v] | % Difference 6 Ve [ogi ano [ONY | POO ROE | 75-397 | OT va [Av | WA [2-Gov | Aus Pic 02-094, ot, ES Table 1.5: Reactance and Impedance values (series RLC circuit) Xe (Theory) | xX, (Theory) Re} em | LO | ry | eres | Rl vA 228° [tan-¥(2)) yo Teh [30716 >| 15 o1S-D0 GAL WONG] 3x50 —.6 Table 1.6: Comparing magnitudes and phases of Vc,Vi and Vp [Vpeat] 8 [Moen] | Delay AT | @ (Practical) (Theory) | (Theory) | (Practical) (Practical) [AT x fx 360) Ve S22? [22611 0-68 Vv 62-28 | zoel 7G | Zea anus Ve Ve 37 Bl NGG TOS qUl an Zi~ benies RLC eimeuits Dbjectives: . Tmvestigole series R@,LE ond RLC eimeuibs: ¢ Analyze jue peak Voltage, eumpene ond phose. relation sLiPs between the cinch components: List ot equipments '- + Bread Boand © Finction Genenalon © Oscilloscope @ wines « top-2. resictows - oe LUE eopacitors: | 2 990441 Inductor + | Theony.e A geries RLC cipeuit is one the Resistow ‘nduetor | end copocitor are. connected in series oe ross & voltege | | suppl The. impedonee is 7 Ae cineuit ig Represented gq and enpre eMpnessed in donm. by tonmulo "Yl 2 lake where te. ead port of impedonecfr pesictanee Rand the im aging Pome ip He Poctonee. is X. There impedence con ako eompresed in mog nitude ie Phosov opm [ZI where. © ig the ras “ditlenence between THe voltage. ond. the. curnent. The mognitude of the eon be expressed 08 [21 = [Re ond impedonee -tonwtt® . @ = ton! fz The phose. con be expressed Of Ohm low © true dom Ae eintuily. The eunrent ¥ can be ven by | How eoused vy % voltage 4 | | T=~ 2 Here» ip the. sounce voltege , Os the voltage, oe post : respective. due source ebrnent ond Ve,v ond Ve : ‘the, mesi¢ton » inductor ond eapocitorTable 44 and 4.01. Table 44 and 4.0: For Theory ;- Xe = 4 ate = 4 — RR B1416x 0000 x (XID) = Ws. o1g-n_ (R= RGR = \)looy’ 45-915) = (0295-0 i-%t%.3 = 0-0ng A 2 101225 Ve = Lx xe = 0'02Dx 15915 = o-4ty = 1D VR = Tx R = O1ORDx lo 2 Oe = av x4 %260° = (ett ©) ¥ 100 4360 = ¥5% = (qx) x po00 KBE” = 14-4 @e= 41 434860"idjerenee Iv]: . - on 4 Dijdenenee a «100 = sy4yr, Out 7, Didtenence Ve | 22-27 lyin = 69% 29 % Ditfenene 1@l 4, Diktenenee Be = | z aaa 754) x10 = OF | 75 | Weg = 144 | x10 ~ O41 t Didfenenee n= 1-4 Table. 4:3 and 4:4/- Fon theory ;- XL = Aas = 27 IO x(gg0x1o"6) = 20°FY ~n zo J heme = [wore ena => ood Wa 2 T= Z ~ Jot’ = 0:029 A= TXPL = 0029 WTY = O-boLv¥ | Mee O-0ng AID = UD OL = arxdr ooo" = (FerwY © (5000 * 260° = 206 6p = laxi0) 7 000 1 Bb" = ‘4. DeHenene Iwi + 4 beHenenee ou= | goer = ON eo = 43-34, “604 % Delfenence Ya = | 2% | two 2 903%, % Dedtenene |e! € O= 230. 8- 230% |eipo = - OF 4, Delferen e |2 Sane y, Dedlenene On = | a ml |x = 07 a| | | | | | ——___—..,, = 16. 915-0 *e Qn x love Ux 10 9) X= 2-74ar a Ze Joist (20-74) = 26:14 w 2 = = Ong A s 2614 q Ve = ovnggy 16.915 = 82% OV Vi = ONNGE K 20-44 = 97-85 u Qe = a loneier ® x lad #900" = O90 po Te One (aries) x wre ¥ BO 7 9, = tuorw'e) A wove xBo0 = 144 4, DidJenenee Ivl' WET =~ OOF Vergy = GFE Ve = | Wess \ Yee | 295 2b] x WO = 6: 076% VY; = | 37° 86-40 056% . BE ‘/ uestiong and Answeng ‘- “4. TH imposivle 4 find the, value Without eu Heling the positing of the nesistor ond dind value mut SiH peenton ond eopoeitor’ | @opo-eitor - So, For the positions od the Cine a . | 2. For alte Ad the. pet phown diogrom: ve ra? vy ‘s 756° | dig 42. phoson diog rem - Fon einuit 4% eep chequit £4 the. phasor diagrom; ME 72 \< 923112" YO dig 43 - in Ry eineulk, the time 2 I+ we meneore the frequency smaller which vil fr dakes Soe One cirele (7) will get peduee the eo eventually, inereose. The. frequency Re Circuit the TH we of cuppent would deerese « leading angle lTm Rie eincult whe Ke Xe Voltage. wi H log the. ond Jo mdf wo Yor voltage wil current tead tHe curnent by &: By peising the. frequency con deeresse, +e omgle. | oy @ WeYs he pasa! meings eandinen Ae e practical Readings condinm. the Aheoneticnl wate . Por flues» Sometimes ib dilens & itle bib The thnee near of the percentage ditlerenee. are above 10% iy meehonea] eno enners, Divine errors, persona | | ennrors - | Digewssion s- Al the, poecsution Were fauen. Oub is ih wos néelly | | dongenous to handle tose. circuit elements» Gut | theme wor 12 accident: “There On& Annee TYPE oF enoons! | There ore meebanieol errors, Divine ernrors, persone | ennors. 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