14307-1M SCHEMATIC Newgate - SLS MB GDDR5 Acer Aspire VN7-792G

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5 4 3 2 1

D D

Newgate
C C

Schematics Document

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Dr-Bios.com
Title

Cover Page
Size Document Number Rev
A
Newgate 1M
Date: Wednesday, August 12, 2015 Sheet 1 of 105
5 4 3 2 1
5 4 3 2 1

D Project code : 4PD06A010001 D

Newgate Board Block Diagram PCB P/N : 14307


Revision : 1M

LCD eDP x 4 eDP re-driver (8330B) eDP x 4


55 55
Intel CPU DDR4-RS 1867/2133 Channel A
SO-DIMM1
DDR4-RS
12
Nvidia N16P-GX PEG x 16(Gen3_8Gb/s) Skylake-H DDR4 / 1.2V
GDDR5*8 81~84 50W 76~80
BGA1440 SO-DIMM2
DDR4-RS 1867/2133 Channel B
45W GT2 DDR4-RS
13
DDI X 2

3~11
HDMI 2.0 DP Alpine Ridge
71~73
DMI Gen3 x4
DP 8 GT/s
C C
Thunderbolt(USB Type C) DP,TBL TPS65982 Wi-Fi
PCI-E2.0 X4 PCIe x 1 / USB2.0 x 1
71~73 WLAN + BT 61
Intel PCH
PCIe x 1
LAN
3D CAMERA x 1 USB3.0 x 1 USB3.0 re-driver USB3.0 x 1 RJ45 32
38 38 Realtek RTL8111H 31
PCH-H HM170
CardReader SATA x 1
SD USB2.0 x 1 ODD
DB RTS5170 DB(66) 60
USB 3.0 (8) / 2.0 ports (14)
USB Charger ETHERNET (10/100/1000Mb)
USB2.0x1 USB2.0x1 SATA x 1 HDD
G3703 36 High Definition Audio 60
SATA ports (6)
USB3.0 USB3.0x1 PCIe ports (16) PCIe x 4
35 mSATA
LPC I/F
(NGFF)
USB3.0 USB3.0 x 1 ACPI 4.0a SATA x 1 63
35

USB2.0 USB2.0 x 1
DB(66) SMBus G-SENSOR
69

HD Audio Codec HDA


2CH SPEAKER
B
ALC255 27 15~23
B

SPI Flash I2C


SPI
8MB 25 Touch PAD
(PTP) 65

TPM LPC BUS Debug port


91 68
AMP ALC1001 28

DMIC SPI
38 (DB) KBC
KB9038QA PS/2
Headphone 24
29

SMBus
MIC-IN 29
Thermal Charger Int.
THEM Resistor HPA02224 KB
26 44 65

FAN FAN
A A

Dr-Bios.com
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
<Core Design> application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Block Diagram
Size Document Number Rev
C
Newgate 1M
Date: Wednesday, August 12, 2015 Sheet 2 of 105
5 4 3 2 1
5 4 3 2 1

Royee 20150205 REVERSE PEG BUS for layout issue

SSID = CPU CPU1C SKYLAKE_HALO 3 OF 14

SKYLAKE_HALO BGA1440
CPU1D 4 OF 14
BGA1440
71 DDI1_TBT_DATA_CPU_P0 K36 D29 eDP_TX_CPU_P0 55 E25 B25 PEG_TX_CPU_P15 C339 1 2 SCD22U10V2KX-1GP Muxless
DDI1_TXP0 EDP_TXP0 76 PEG_RX_CPU_P15 PEG_RXP0 PEG_TXP0 PEG_TX_CON_P15 76
71 DDI1_TBT_DATA_CPU_N0 K37 E29 eDP_TX_CPU_N0 55 D25 A25 PEG_TX_CPU_N15 C340 1 2 SCD22U10V2KX-1GP Muxless
DDI1_TXN0 EDP_TXN0 76 PEG_RX_CPU_N15 PEG_RXN0 PEG_TXN0 PEG_TX_CON_N15 76
71 DDI1_TBT_DATA_CPU_P1 J35 F28 eDP_TX_CPU_P1 55
DDI1_TXP1 EDP_TXP1 PEG_TX_CPU_P14 C337 1
71 DDI1_TBT_DATA_CPU_N1 J34 E28 eDP_TX_CPU_N1 55 E24 B24 2 SCD22U10V2KX-1GP Muxless PEG_TX_CON_P14 76
DDI1_TXN1 EDP_TXN1 76 PEG_RX_CPU_P14 PEG_RXP1 PEG_TXP1 PEG_TX_CPU_N14 C338 1
71 DDI1_TBT_DATA_CPU_P2 H37 A29 eDP_TX_CPU_P2 55 F24 C24 2 SCD22U10V2KX-1GP Muxless PEG_TX_CON_N14 76
D DDI1_TXP2 EDP_TXP2 76 PEG_RX_CPU_N14 PEG_RXN1 PEG_TXN1 D
H36 B29
71 DDI1_TBT_DATA_CPU_N2
71 DDI1_TBT_DATA_CPU_P3 J37
DDI1_TXN2 EDP_TXN2
C28
eDP_TX_CPU_N2
eDP_TX_CPU_P3
55
55
Layout Note: E23 B23 PEG_TX_CPU_P13 C335 1 2 SCD22U10V2KX-1GP Muxless
DDI1_TXP3 EDP_TXP3 76 PEG_RX_CPU_P13 PEG_RXP2 PEG_TXP2 PEG_TX_CON_P13 76
PEG_TX_CPU_N13 C336 1 2 SCD22U10V2KX-1GP Muxless
71 DDI1_TBT_DATA_CPU_N3 J38
DDI1_TXN3 EDP_TXN3
B28 eDP_TX_CPU_N3 55 Trace Width:12 (mils) 76 PEG_RX_CPU_N13
D23
PEG_RXN2 PEG_TXN2
A23 PEG_TX_CON_N13 76
PEG_TX_CPU_P12 C333 1 2 SCD22U10V2KX-1GP
71 DDI1_TBT_AUX_CPU_P D27
E27
DDI1_AUXP EDP_AUXP
C26
B26
eDP_AUX_CPU_P 55 Spacing: 20 (mils) 76 PEG_RX_CPU_P12
E22
F22
PEG_RXP3 PEG_TXP3
B22
C22 PEG_TX_CPU_N12 C334 1 2 SCD22U10V2KX-1GP
Muxless
Muxless
PEG_TX_CON_P12 76
71 DDI1_TBT_AUX_CPU_N DDI1_AUXN EDP_AUXN eDP_AUX_CPU_N 55 76 PEG_RX_CPU_N12 PEG_RXN3 PEG_TXN3 PEG_TX_CON_N12 76
H34
Max Length: 100 (mils) E21 B21 PEG_TX_CPU_P11 C331 1 2 SCD22U10V2KX-1GP Muxless
71 DDI2_TBT_DATA_CPU_P0 DDI2_TXP0 76 PEG_RX_CPU_P11 PEG_RXP4 PEG_TXP4 PEG_TX_CON_P11 76
71 DDI2_TBT_DATA_CPU_N0 H33 D21 A21 PEG_TX_CPU_N11 C332 1 2 SCD22U10V2KX-1GP Muxless
DDI2_TXN0 76 PEG_RX_CPU_N11 PEG_RXN4 PEG_TXN4 PEG_TX_CON_N11 76
71 DDI2_TBT_DATA_CPU_P1 F37 A33 0D95V_VCCIO
DDI2_TXP1 EDP_DISP_UTIL PEG_TX_CPU_P10 C329 1
71 DDI2_TBT_DATA_CPU_N1 G38 E20 B20 2 SCD22U10V2KX-1GP Muxless PEG_TX_CON_P10 76
DDI2_TXN1 76 PEG_RX_CPU_P10 PEG_RXP5 PEG_TXP5 PEG_TX_CPU_N10 C330 1
71 DDI2_TBT_DATA_CPU_P2 F34 F20 C20 2 SCD22U10V2KX-1GP Muxless PEG_TX_CON_N10 76
DDI2_TXP2 EDP_RCOMP 76 PEG_RX_CPU_N10 PEG_RXN5 PEG_TXN5
71 DDI2_TBT_DATA_CPU_N2 F35 D37 2 R301 1 24D9R2F-L-GP
DDI2_TXN2 EDP_RCOMP PEG_TX_CPU_P9 C327 1
71 DDI2_TBT_DATA_CPU_P3 E37 E19 B19 2 SCD22U10V2KX-1GP Muxless PEG_TX_CON_P9 76
DDI2_TXP3 76 PEG_RX_CPU_P9 PEG_RXP6 PEG_TXP6 PEG_TX_CPU_N9 C328 1
71 DDI2_TBT_DATA_CPU_N3 E36 D19 A19 2 SCD22U10V2KX-1GP Muxless PEG_TX_CON_N9 76
DDI2_TXN3 76 PEG_RX_CPU_N9 PEG_RXN6 PEG_TXN6
71 DDI2_TBT_AUX_CPU_P F26 E18 B18 PEG_TX_CPU_P8 C325 1 2 SCD22U10V2KX-1GP Muxless
DDI2_AUXP 76 PEG_RX_CPU_P8 PEG_RXP7 PEG_TXP7 PEG_TX_CON_P8 76
71 DDI2_TBT_AUX_CPU_N E26 F18 C18 PEG_TX_CPU_N8 C326 1 2 SCD22U10V2KX-1GP Muxless
DDI2_AUXN 76 PEG_RX_CPU_N8 PEG_RXN7 PEG_TXN7 PEG_TX_CON_N8 76
C34 D17 A17 PEG_TX_CPU_P7 C323 1 2 SCD22U10V2KX-1GP Muxless
DDI3_TXP0 76 PEG_RX_CPU_P7 PEG_RXP8 PEG_TXP8 PEG_TX_CON_P7 76
D34 E17 B17 PEG_TX_CPU_N7 C324 1 2 SCD22U10V2KX-1GP Muxless
DDI3_TXN0 76 PEG_RX_CPU_N7 PEG_RXN8 PEG_TXN8 PEG_TX_CON_N7 76
B36
DDI3_TXP1 PEG_TX_CPU_P6 C321 1
B34 F16 C16 2 SCD22U10V2KX-1GP Muxless PEG_TX_CON_P6 76
DDI3_TXN1 76 PEG_RX_CPU_P6 PEG_RXP9 PEG_TXP9 PEG_TX_CPU_N6 C322 1
F33 E16 B16 2 SCD22U10V2KX-1GP Muxless PEG_TX_CON_N6 76
DDI3_TXP2 76 PEG_RX_CPU_N6 PEG_RXN9 PEG_TXN9
E33
DDI3_TXN2 PEG_TX_CPU_P5 C318 1
C33 PD change 0622 D15 A15 2 SCD22U10V2KX-1GP Muxless PEG_TX_CON_P5 76
DDI3_TXP3 76 PEG_RX_CPU_P5 PEG_RXP10 PEG_TXP10 PEG_TX_CPU_N5 C320 1
B33 E15 B15 2 SCD22U10V2KX-1GP Muxless PEG_TX_CON_N5 76
DDI3_TXN3 76 PEG_RX_CPU_N5 PEG_RXN10 PEG_TXN10
G27 AUD_AZACPU_SCLK AUD_AZACPU_SCLK 17
C PROC_AUDIO_CLK PEG_TX_CPU_P4 C307 1 C
A27 G25 AUD_AZACPU_SDO 17 F14 C14 2 SCD22U10V2KX-1GP Muxless PEG_TX_CON_P4 76
DDI3_AUXP PROC_AUDIO_SDI 76 PEG_RX_CPU_P4 PEG_RXP11 PEG_TXP11
B27 G29 AUD_AZACPU_SDI_R 1 R302 2 0R0402-PAD AUD_AZACPU_SDI 17 E14 B14 PEG_TX_CPU_N4 C316 1 2 SCD22U10V2KX-1GP Muxless PEG_TX_CON_N4 76
DDI3_AUXN PROC_AUDIO_SDO 76 PEG_RX_CPU_N4 PEG_RXN11 PEG_TXN11
D13 A13 PEG_TX_CPU_P3 C314 1 2 SCD22U10V2KX-1GP Muxless
76 PEG_RX_CPU_P3 PEG_RXP12 PEG_TXP12 PEG_TX_CON_P3 76
SKYLAKE-3-GP E13 B13 PEG_TX_CPU_N3 C304 1 2 SCD22U10V2KX-1GP Muxless
76 PEG_RX_CPU_N3 PEG_RXN12 PEG_TXN12 PEG_TX_CON_N3 76
Layout Note: F12 C12 PEG_TX_CPU_P2 C303 1 2 SCD22U10V2KX-1GP Muxless
76 PEG_RX_CPU_P2 PEG_RXP13 PEG_TXP13 PEG_TX_CON_P2 76
PEG_TX_CPU_N2 C313 1 2 SCD22U10V2KX-1GP Muxless
Trace Width:12 (mils) 76 PEG_RX_CPU_N2
E12
PEG_RXN13 PEG_TXN13
B12 PEG_TX_CON_N2 76
PEG_TX_CPU_P1 C312 1 2 SCD22U10V2KX-1GP
Spacing: 15 (mils) 76 PEG_RX_CPU_P1
D11
E11
PEG_RXP14 PEG_TXP14
A11
B11 PEG_TX_CPU_N1 C302 1 2 SCD22U10V2KX-1GP
Muxless
Muxless
PEG_TX_CON_P1 76
76 PEG_RX_CPU_N1 PEG_RXN14 PEG_TXN14 PEG_TX_CON_N1 76
Max Length: 400 (mils) F10 C10 PEG_TX_CPU_P0 C310 1 2 SCD22U10V2KX-1GP Muxless
76 PEG_RX_CPU_P0 PEG_RXP15 PEG_TXP15 PEG_TX_CON_P0 76
0D95V_VCCIO E10 B10 PEG_TX_CPU_N0 C311 1 2 SCD22U10V2KX-1GP Muxless
76 PEG_RX_CPU_N0 PEG_RXN15 PEG_TXN15 PEG_TX_CON_N0 76
R303
2 1 PEG_RCOMPO G2
24D9R2F-L-GP PEG_RCOMP

DMI_RX_CPU_P0 D8 B8 DMI_TX_CPU_P0
15 DMI_RX_CPU_P0 DMI_RXP0 DMI_TXP0 DMI_TX_CPU_P0 15
DMI_RX_CPU_N0 E8 A8 DMI_TX_CPU_N0
15 DMI_RX_CPU_N0 DMI_RXN0 DMI_TXN0 DMI_TX_CPU_N0 15
DMI_RX_CPU_P1 E6 C6 DMI_TX_CPU_P1
15 DMI_RX_CPU_P1 DMI_RXP1 DMI_TXP1 DMI_TX_CPU_P1 15
DMI_RX_CPU_N1 F6 B6 DMI_TX_CPU_N1
15 DMI_RX_CPU_N1 DMI_RXN1 DMI_TXN1 DMI_TX_CPU_N1 15
DMI_RX_CPU_P2 D5 B5 DMI_TX_CPU_P2
15 DMI_RX_CPU_P2 DMI_RXP2 DMI_TXP2 DMI_TX_CPU_P2 15
B DMI_RX_CPU_N2 E5 A5 DMI_TX_CPU_N2 B
15 DMI_RX_CPU_N2 DMI_RXN2 DMI_TXN2 DMI_TX_CPU_N2 15
DMI_RX_CPU_P3 J8 D4 DMI_TX_CPU_P3
15 DMI_RX_CPU_P3 DMI_RXP3 DMI_TXP3 DMI_TX_CPU_P3 15
DMI_RX_CPU_N3 J9 B4 DMI_TX_CPU_N3
15 DMI_RX_CPU_N3 DMI_RXN3 DMI_TXN3 DMI_TX_CPU_N3 15

SKYLAKE-3-GP

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (PCIE/DMI/FDI)
Size Document Number Rev
Custom Newgate SA
Date: Tuesday, August 18, 2015 Sheet 3 of 105
5 4 3 2 1

Dr-Bios.com Wistron Confidential documen


Duplicate, Modify, Forward o
application without get Wist
5 4 3 2 1

SKYLAKE_HALO 1 OF 14
CPU1A
BGA1440
D 12 M_A_DQ0 BR6 DDR0_DQ0 DDR0_CKP0 AG1 M_A_CLK0 12 D
12 M_A_DQ1 BT6 DDR0_DQ1 DDR0_CKN0 AG2 M_A_CLK#0 12
12 M_A_DQ2 BP3 DDR0_DQ2 DDR0_CKP1 AK2 M_A_CLK1 12
12 M_A_DQ3 BR3 DDR0_DQ3 DDR0_CKN1 AK1 M_A_CLK#1 12
12 M_A_DQ4 BN5 DDR0_DQ4 DDR0_CLKP2 AL3
12 M_A_DQ5 BP6 DDR0_DQ5 DDR0_CLKN2 AK3
12 M_A_DQ6 BP2 DDR0_DQ6 DDR0_CLKP3 AL2
12 M_A_DQ7 BN3 DDR0_DQ7 DDR0_CLKN3 AL1
12 M_A_DQ8 BL4 DDR0_DQ8
12 M_A_DQ9 BL5 DDR0_DQ9 DDR0_CKE0 AT1 M_A_CKE0 12
12 M_A_DQ10 BL2 DDR0_DQ10 DDR0_CKE1 AT2 M_A_CKE1 12
12 M_A_DQ11 BM1 DDR0_DQ11 DDR0_CKE2 AT3
12 M_A_DQ12 BK4 DDR0_DQ12 DDR0_CKE3 AT5
12 M_A_DQ13 BK5 DDR0_DQ13
12 M_A_DQ14 BK1 DDR0_DQ14 DDR0_CS0# AD5 M_A_CS#0 12
12 M_A_DQ15 BK2 DDR0_DQ15 DDR0_CS1# AE2 M_A_CS#1 12
12 M_A_DQ16 BG4 DDR0_DQ16/DDR0_DQ32 DDR0_CS2# AD2
12 M_A_DQ17 BG5 DDR0_DQ17/DDR0_DQ33 DDR0_CS3# AE5
12 M_A_DQ18 BF4 DDR0_DQ18/DDR0_DQ34
12 M_A_DQ19 BF5 DDR0_DQ19/DDR0_DQ35 DDR0_ODT0 AD3 M_A_ODT0 12
12 M_A_DQ20 BG2 DDR0_DQ20/DDR0_DQ36 DDR0_ODT1 AE4 M_A_ODT1 12
12 M_A_DQ21 BG1 DDR0_DQ21/DDR0_DQ37 DDR0_ODT2 AE1
12 M_A_DQ22 BF1 DDR0_DQ22/DDR0_DQ38 DDR0_ODT3 AD4
12 M_A_DQ23 BF2 DDR0_DQ23/DDR0_DQ39
12 M_A_DQ24 BD2 DDR0_DQ24/DDR0_DQ40 DDR0_BA0/DDR0_CAB4/DDR0_BA0 AH5 M_A_BA0 12
12 M_A_DQ25 BD1 DDR0_DQ25/DDR0_DQ41 DDR0_BA1/DDR0_CAB6/DDR0_BA1 AH1 M_A_BA1 12
12 M_A_DQ26 BC4 DDR0_DQ26/DDR0_DQ42 DDR0_BA2/DDR0_CAA5/DDR0_BG0 AU1 M_A_BG0 12
12 M_A_DQ27 BC5 DDR0_DQ27/DDR0_DQ43
12 M_A_DQ28 BD5 DDR0_DQ28/DDR0_DQ44 DDR0_RAS#/DDR0_CAB3/DDR0_MA16 AH4 M_A_A16 12
C BD4 AG4 C
12 M_A_DQ29 DDR0_DQ29/DDR0_DQ45 DDR0_WE#/DDR0_CAB2/DDR0_MA14 M_A_A14 12
12 M_A_DQ30 BC1 DDR0_DQ30/DDR0_DQ46 DDR0_CAS#/DDR0_CAB1/DDR0_MA15 AD1 M_A_A15 12
12 M_A_DQ31 BC2 DDR0_DQ31/DDR0_DQ47
AB1 AH3 M_A_A0
12 M_A_DQ32 DDR0_DQ32/DDR1_DQ0 DDR0_MA0/DDR0_CAB9/DDR0_MA0 M_A_A0 12
AB2 AP4 M_A_A1
12 M_A_DQ33 DDR0_DQ33/DDR1_DQ1 DDR0_MA1/DDR0_CAB8/DDR0_MA1 M_A_A1 12
AA4 AN4 M_A_A2
12 M_A_DQ34 DDR0_DQ34/DDR1_DQ2 DDR0_MA2/DDR0_CAB5/DDR0_MA2 M_A_A2 12
AA5 AP5 M_A_A3
12 M_A_DQ35 DDR0_DQ35/DDR1_DQ3 DDR0_MA3 M_A_A3 12
AB5 AP2 M_A_A4
12 M_A_DQ36 DDR0_DQ36/DDR1_DQ4 DDR0_MA4 M_A_A4 12
AB4 AP1 M_A_A5
12 M_A_DQ37 DDR0_DQ37/DDR1_DQ5 DDR0_MA5/DDR0_CAA0/DDR0_MA5 M_A_A5 12
AA2 AP3 M_A_A6
12 M_A_DQ38 DDR0_DQ38/DDR1_DQ6 DDR0_MA6/DDR0_CAA2/DDR0_MA6 M_A_A6 12
AA1 AN1 M_A_A7
12 M_A_DQ39 DDR0_DQ39/DDR1_DQ7 DDR0_MA7/DDR0_CAA4/DDR0_MA7 M_A_A7 12
V5 AN3 M_A_A8
12 M_A_DQ40 DDR0_DQ40/DDR1_DQ8 DDR0_MA8/DDR0_CAA3/DDR0_MA8 M_A_A8 12
V2 AT4 M_A_A9
12 M_A_DQ41 DDR0_DQ41/DDR1_DQ9 DDR0_MA9/DDR0_CAA1/DDR0_MA9 M_A_A9 12
U1 AH2 M_A_A10
12 M_A_DQ42 DDR0_DQ42/DDR1_DQ10 DDR0_MA10/DDR0_CAB7/DDR0_MA10 M_A_A10 12
U2 AN2 M_A_A11
12 M_A_DQ43 DDR0_DQ43/DDR1_DQ11 DDR0_MA11/DDR0_CAA7/DDR0_MA11 M_A_A11 12
V1 AU4 M_A_A12
12 M_A_DQ44 DDR0_DQ44/DDR1_DQ12 DDR0_MA12/DDR0_CAA6/DDR0_MA12 M_A_A12 12
V4 AE3 M_A_A13
12 M_A_DQ45 DDR0_DQ45/DDR1_DQ13 DDR0_MA13/DDR0_CAB0/DDR0_MA13 M_A_A13 12
12 M_A_DQ46 U5 DDR0_DQ46/DDR1_DQ14 DDR0_MA14/DDR0_CAA9/DDR0_BG1 AU2 M_A_BG1 12
U4 AU3 M_A_ACT_N
12 M_A_DQ47 DDR0_DQ47/DDR1_DQ15 DDR0_MA15/DDR0_CAA8/DDR0_ACT# M_A_ACT_N 12
12 M_A_DQ48 R2 DDR0_DQ48/DDR1_DQ32
12 M_A_DQ49 P5 DDR0_DQ49/DDR1_DQ33 DDR0_PAR AG3 M_A_PARITY 12
12 M_A_DQ50 R4 DDR0_DQ50/DDR1_DQ34 DDR0_ALERT# AU5 M_A_ALERT_N 12
12 M_A_DQ51 P4 DDR0_DQ51/DDR1_DQ35
R5 JJ 20150127
12 M_A_DQ52 DDR0_DQ52/DDR1_DQ36
P2 BR5 M_A_DQS_DN0
12 M_A_DQ53 DDR0_DQ53/DDR1_DQ37 DDR0_DQSN0 M_A_DQS_DN0 12
R1 BL3 M_A_DQS_DN1
12 M_A_DQ54 DDR0_DQ54/DDR1_DQ38 DDR0_DQSN1 M_A_DQS_DN1 12
P1 BG3 M_A_DQS_DN2
12 M_A_DQ55 DDR0_DQ55/DDR1_DQ39 DDR0_DQSN2/DDR0_DQSN4 M_A_DQS_DN2 12
M4 BD3 M_A_DQS_DN3
12 M_A_DQ56 DDR0_DQ56/DDR1_DQ40 DDR0_DQSN3/DDR0_DQSN5 M_A_DQS_DN3 12
M1 AB3 M_A_DQS_DP4
B 12 M_A_DQ57 DDR0_DQ57/DDR1_DQ41 DDR0_DQSP4/DDR1_DQSP0 M_A_DQS_DP4 12 B
L4 V3 M_A_DQS_DP5
12 M_A_DQ58 DDR0_DQ58/DDR1_DQ42 DDR0_DQSP5/DDR1_DQSP1 M_A_DQS_DP5 12
L2 R3 M_A_DQS_DP6
12 M_A_DQ59 DDR0_DQ59/DDR1_DQ43 DDR0_DQSP6/DDR1_DQSP4 M_A_DQS_DP6 12
M5 M3 M_A_DQS_DP7
12 M_A_DQ60 DDR0_DQ60/DDR1_DQ44 DDR0_DQSP7/DDR1_DQSP5 M_A_DQS_DP7 12
12 M_A_DQ61 M2 DDR0_DQ61/DDR1_DQ45
L5 BP5 M_A_DQS_DP0
12 M_A_DQ62 DDR0_DQ62/DDR1_DQ46 DDR0_DQSP0 M_A_DQS_DP0 12
L1 BK3 M_A_DQS_DP1
12 M_A_DQ63 DDR0_DQ63/DDR1_DQ47 DDR0_DQSP1 M_A_DQS_DP1 12
BF3 M_A_DQS_DP2
DDR0_DQSP2/DDR0_DQSP4 M_A_DQS_DP2 12
BA2 BC3 M_A_DQS_DP3
DDR0_ECC0 DDR0_DQSP3/DDR0_DQSP5 M_A_DQS_DP3 12
BA1 AA3 M_A_DQS_DN4
DDR0_ECC1 DDR0_DQSN4/DDR1_DQSN0 M_A_DQS_DN4 12
AY4 U3 M_A_DQS_DN5
DDR0_ECC2 DDR0_DQSN5/DDR1_DQSN1 M_A_DQS_DN5 12
AY5 P3 M_A_DQS_DN6
DDR0_ECC3 DDR0_DQSN6/DDR1_DQSN4 M_A_DQS_DN6 12
BA5 L3 M_A_DQS_DN7
DDR0_ECC4 DDR0_DQSN7/DDR1_DQSN5 M_A_DQS_DN7 12
BA4 DDR0_ECC5
AY1 DDR0_ECC6 DDR0_DQSP8 AY3
AY2 DDR0_ECC7 DDR0_DQSN8 BA3

DDR CHANNEL A

SKYLAKE-3-GP

A <Core Design> A

Dr-Bios.com
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU_DDR_CHA
Size Document Number Rev
A3 Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 4 of 105
5 4 3 2 1
5 4 3 2 1

SSID = CPU

SKYLAKE_HALO 2 OF 14
CPU1B
BGA1440

13 M_B_DQ0 BT11 DDR1_DQ0/DDR0_DQ16 DDR1_CKP0 AM9 M_B_CLK0 13


13 M_B_DQ1 BR11 DDR1_DQ1/DDR0_DQ17 DDR1_CKN0 AN9 M_B_CLK#0 13
D 13 M_B_DQ2 BT8 DDR1_DQ2/DDR0_DQ18 DDR1_CKP1 AM7 M_B_CLK1 13 D
13 M_B_DQ3 BR8 DDR1_DQ3/DDR0_DQ19 DDR1_CKN1 AM8 M_B_CLK#1 13
13 M_B_DQ4 BP11 DDR1_DQ4/DDR0_DQ20 DDR1_CLKP2 AM11
13 M_B_DQ5 BN11 DDR1_DQ5/DDR0_DQ21 DDR1_CLKN2 AM10
13 M_B_DQ6 BP8 DDR1_DQ6/DDR0_DQ22 DDR1_CLKP3 AJ10
13 M_B_DQ7 BN8 DDR1_DQ7/DDR0_DQ23 DDR1_CLKN3 AJ11
13 M_B_DQ8 BL12 DDR1_DQ8/DDR0_DQ24
13 M_B_DQ9 BL11 DDR1_DQ9/DDR0_DQ25 DDR1_CKE0 AT8 M_B_CKE0 13
13 M_B_DQ10 BL8 DDR1_DQ10/DDR0_DQ26 DDR1_CKE1 AT10 M_B_CKE1 13
13 M_B_DQ11 BJ8 DDR1_DQ11/DDR0_DQ27 DDR1_CKE2 AT7
13 M_B_DQ12 BJ11 DDR1_DQ12/DDR0_DQ28 DDR1_CKE3 AT11
13 M_B_DQ13 BJ10 DDR1_DQ13/DDR0_DQ29
13 M_B_DQ14 BL7 DDR1_DQ14/DDR0_DQ30 DDR1_CS0# AF11 M_B_CS#0 13
13 M_B_DQ15 BJ7 DDR1_DQ15/DDR0_DQ31 DDR1_CS1# AE7 M_B_CS#1 13
13 M_B_DQ16 BG11 DDR1_DQ16/DDR0_DQ48 DDR1_CS2# AF10
13 M_B_DQ17 BG10 DDR1_DQ17/DDR0_DQ49 DDR1_CS3# AE10
13 M_B_DQ18 BG8 DDR1_DQ18/DDR0_DQ50
13 M_B_DQ19 BF8 DDR1_DQ19/DDR0_DQ51 DDR1_ODT0 AF7 M_B_ODT0 13
13 M_B_DQ20 BF11 DDR1_DQ20/DDR0_DQ52 DDR1_ODT1 AE8 M_B_ODT1 13
13 M_B_DQ21 BF10 DDR1_DQ21/DDR0_DQ53 DDR1_ODT2 AE9
13 M_B_DQ22 BG7 DDR1_DQ22/DDR0_DQ54 DDR1_ODT3 AE11
13 M_B_DQ23 BF7 DDR1_DQ23/DDR0_DQ55
13 M_B_DQ24 BB11 DDR1_DQ24/DDR0_DQ56 DDR1_RAS#/DDR1_CAB3/DDR1_MA16 AH10 M_B_A16 13
13 M_B_DQ25 BC11 DDR1_DQ25/DDR0_DQ57 DDR1_WE#/DDR1_CAB2/DDR1_MA14 AH11 M_B_A14 13
13 M_B_DQ26 BB8 DDR1_DQ26/DDR0_DQ58 DDR1_CAS#/DDR1_CAB1/DDR1_MA15 AF8 M_B_A15 13
13 M_B_DQ27 BC8 DDR1_DQ27/DDR0_DQ59
13 M_B_DQ28 BC10 DDR1_DQ28/DDR0_DQ60 DDR1_BA0/DDR1_CAB4/DDR1_BA0 AH8 M_B_BA0 13
13 M_B_DQ29 BB10 DDR1_DQ29/DDR0_DQ61 DDR1_BA1/DDR1_CAB6/DDR1_BA1 AH9 M_B_BA1 13
13 M_B_DQ30 BC7 DDR1_DQ30/DDR0_DQ62 DDR1_BA2/DDR1_CAA5/DDR1_BG0 AR9 M_B_BG0 13
C BB7 C
13 M_B_DQ31 DDR1_DQ31/DDR0_DQ63
AA11 AJ9 M_B_A0
13 M_B_DQ32 DDR1_DQ32/DDR1_DQ16 DDR1_MA0/DDR1_CAB9/DDR1_MA0 M_B_A0 13
AA10 AK6 M_B_A1
13 M_B_DQ33 DDR1_DQ33/DDR1_DQ17 DDR1_MA1/DDR1_CAB8/DDR1_MA1 M_B_A1 13
AC11 AK5 M_B_A2
13 M_B_DQ34 DDR1_DQ34/DDR1_DQ18 DDR1_MA2/DDR1_CAB5/DDR1_MA2 M_B_A2 13
AC10 AL5 M_B_A3
13 M_B_DQ35 DDR1_DQ35/DDR1_DQ19 DDR1_MA3 M_B_A3 13
AA7 AL6 M_B_A4
13 M_B_DQ36 DDR1_DQ36/DDR1_DQ20 DDR1_MA4 M_B_A4 13
AA8 AM6 M_B_A5
13 M_B_DQ37 DDR1_DQ37/DDR1_DQ21 DDR1_MA5/DDR1_CAA0/DDR1_MA5 M_B_A5 13
AC8 AN7 M_B_A6
13 M_B_DQ38 DDR1_DQ38/DDR1_DQ22 DDR1_MA6/DDR1_CAA2/DDR1_MA6 M_B_A6 13
AC7 AN10 M_B_A7
13 M_B_DQ39 DDR1_DQ39/DDR1_DQ23 DDR1_MA7/DDR1_CAA4/DDR1_MA7 M_B_A7 13
W8 AN8 M_B_A8
13 M_B_DQ40 DDR1_DQ40/DDR1_DQ24 DDR1_MA8/DDR1_CAA3/DDR1_MA8 M_B_A8 13
W7 AR11 M_B_A9
13 M_B_DQ41 DDR1_DQ41/DDR1_DQ25 DDR1_MA9/DDR1_CAA1/DDR1_MA9 M_B_A9 13
V10 AH7 M_B_A10
13 M_B_DQ42 DDR1_DQ42/DDR1_DQ26 DDR1_MA10/DDR1_CAB7/DDR1_MA10 M_B_A10 13
V11 AN11 M_B_A11
13 M_B_DQ43 DDR1_DQ43/DDR1_DQ27 DDR1_MA11/DDR1_CAA7/DDR1_MA11 M_B_A11 13
W11 AR10 M_B_A12
13 M_B_DQ44 DDR1_DQ44/DDR1_DQ28 DDR1_MA12/DDR1_CAA6/DDR1_MA12 M_B_A12 13
W10 AF9 M_B_A13
13 M_B_DQ45 DDR1_DQ45/DDR1_DQ29 DDR1_MA13/DDR1_CAB0/DDR1_MA13 M_B_A13 13
V7 AR7 M_B_BG1
13 M_B_DQ46 DDR1_DQ46/DDR1_DQ30 DDR1_MA14/DDR1_CAA9/DDR1_BG1 M_B_BG1 13
V8 AT9 M_B_ACT_N
13 M_B_DQ47 DDR1_DQ47/DDR1_DQ31 DDR1_MA15/DDR1_CAA8/DDR1_ACT# M_B_ACT_N 13
13 M_B_DQ48 R11 DDR1_DQ48
13 M_B_DQ49 P11 DDR1_DQ49 DDR1_PAR AJ7 M_B_PARITY 13
13 M_B_DQ50 P7 DDR1_DQ50 DDR1_ALERT# AR8 M_B_ALERT_N 13
13 M_B_DQ51 R8 DDR1_DQ51
13 M_B_DQ52 R10 DDR1_DQ52
P10 BP9 M_B_DQS_DN0
13 M_B_DQ53 DDR1_DQ53 DDR1_DQSN0/DDR0_DQSN2 M_B_DQS_DN0 13
R7 BL9 M_B_DQS_DN1
13 M_B_DQ54 DDR1_DQ54 DDR1_DQSN1/DDR0_DQSN3 M_B_DQS_DN1 13
P8 BG9 M_B_DQS_DN2
13 M_B_DQ55 DDR1_DQ55 DDR1_DQSN2/DDR0_DQSN6 M_B_DQS_DN2 13
L11 BC9 M_B_DQS_DN3
13 M_B_DQ56 DDR1_DQ56 DDR1_DQSN3/DDR0_DQSN7 M_B_DQS_DN3 13
M11 AC9 M_B_DQS_DN4
13 M_B_DQ57 DDR1_DQ57 DDR1_DQSN4/DDR1_DQSN2 M_B_DQS_DN4 13
L7 W9 M_B_DQS_DN5
13 M_B_DQ58 DDR1_DQ58 DDR1_DQSN5/DDR1_DQSN3 M_B_DQS_DN5 13
M8 R9 M_B_DQS_DN6
B 13 M_B_DQ59 DDR1_DQ59 DDR1_DQSN6 M_B_DQS_DN6 13 B
L10 M9 M_B_DQS_DN7
13 M_B_DQ60 DDR1_DQ60 DDR1_DQSN7 M_B_DQS_DN7 13
13 M_B_DQ61 M10 DDR1_DQ61
M7 BR9 M_B_DQS_DP0
13 M_B_DQ62 DDR1_DQ62 DDR1_DQSP0/DDR0_DQSP2 M_B_DQS_DP0 13
L8 BJ9 M_B_DQS_DP1
13 M_B_DQ63 DDR1_DQ63 DDR1_DQSP1/DDR0_DQSP3 M_B_DQS_DP1 13
BF9 M_B_DQS_DP2
DDR1_DQSP2/DDR0_DQSP6 M_B_DQS_DP2 13
AW11 BB9 M_B_DQS_DP3
DDR1_ECC0 DDR1_DQSP3/DDR0_DQSP7 M_B_DQS_DP3 13
AY11 AA9 M_B_DQS_DP4
DDR1_ECC1 DDR1_DQSP4/DDR1_DQSP2 M_B_DQS_DP4 13
AY8 V9 M_B_DQS_DP5
DDR1_ECC2 DDR1_DQSP5/DDR1_DQSP3 M_B_DQS_DP5 13
AW8 P9 M_B_DQS_DP6
DDR1_ECC3 DDR1_DQSP6 M_B_DQS_DP6 13
AY10 L9 M_B_DQS_DP7
DDR1_ECC4 DDR1_DQSP7 M_B_DQS_DP7 13
AW10 DDR1_ECC5
AY7 DDR1_ECC6 DDR1_DQSP8 AW9
AW7 DDR1_ECC7 DDR1_DQSN8 AY9

DDR CHANNEL B

121R2F-GP 2 R501 1 SM_RCOMP_0 G1 BN13


DDR_RCOMP0 DDR_VREF_CA V_SM_VREF_CNTA 12
75R2F-L1-GP 1 R502 2 SM_RCOMP_1 H1 BP13
100R2F-L3-GP 2 R503 SM_RCOMP_2 DDR_RCOMP1 DDR0_VREF_DQ
1 J2 DDR_RCOMP2 DDR1_VREF_DQ BR13 V_SM_VREF_CNTB 13
SKYLAKE-3-GP

<Core Design>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU_DDR_CHB
Size Document Number Rev
A3
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 5 of 105

5 4 3 2 1
5 4 3 2 1

AROUND_CPU
SSID = CPU
1V_VCCST
SKYLAKE_HALO 5 OF 14
CPU1E
1 R601 2 100R2F-L3-GP VIDSOUT_CPU
BGA1440
18 PCH_CPU_BCLK_DP B31 BN25
VIDALERT#_CPU BCLKP CFG0
1 R602 2 56D2R2F-GP 18 PCH_CPU_BCLK_DN A32 BN27
BCLKN CFG1 CFG2
BN26
CFG2 CFG3
18 PCH_CPU_PCIBCLK_R_DP D35 BN28 CFG3 99
PCI_BCLKP CFG3 CFG4
18 PCH_CPU_PCIBCLK_R_DN C36 BR20
1V_VCCST PCI_BCLKN CFG4 CFG5
BM20
CFG5 CFG6
18 PCH_CPU_NSSC_CLK_DP E31 BT20
PROCHOT#_CPU CLK24P CFG6 CFG7
1 R603 2 1KR2F-L1-GP 18 PCH_CPU_NSSC_CLK_DN D31 BP20
CLK24N CFG7
BR23
CFG8
BR22
CFG9
BT23
CFG10
BT22
CFG11
D BM19 D
CFG12
BR19
CFG13
BP19
VIDALERT#_CPU CPU_VIDALERT_N CFG14
46 VIDALERT#_CPU 1 R604 2 220R3F-1-GP BH31 BT19
VIDSCK_CPU VIDALERT# CFG15
46 VIDSCK_CPU BH32
VIDSOUT_CPU VIDSCK
46 VIDSOUT_CPU BH29 BP23
PROCHOT#_CPU_R VIDSOUT CFG16
24,44,46 PROCHOT#_CPU 1 R605 2 499R2F-2-GP BR30 BN23
PROCHOT# CFG17
BN22
SM_PGCNTL CFG18
BT13 BP22
DDR_VTT_CNTL CFG19
BR27
BPM0#
BT27
BPM1#
BM31
VCCST_PWRGD BPM2#
H13 BT30
VCCST_PWRGD BPM3#

17,89 H_PWRGD BT31


PROCPWRGD
16 PLTRST# BP35 BT28 PROC_JTAG_TDO 17,99
RESET# PROC_TDO
16 H_PM_SYNC BM34 BL32 PROC_JTAG_TDI 17,99
H_PM_DOWN_R PM_SYNC PROC_TDI
16 H_PM_DOWN 1 R607 2 20R2F-GP BP31 BP28 PROC_JTAG_TMS 17,99
H_PECI PM_DOWN PROC_TMS
16 PCH_PECI 2 R608DY 1 13R2F-GP BT34 BR28 PROC_JTAGX_TCK 17
PECI PROC_TCK
16 H_THERMTRIP# J31
THERMTRIP#
BP30 PROC_TRST# 23,99
PROC_TRST#
24 H_PECI BR33 BL30 XDP_PREQ# 23,99
SKTOCC# PROC_PREQ#
BN1 BP27 XDP_PRDY# 23,99
PROC_SELECT# PROC_PRDY#
1D2V_S3 3D3V_S0 BM30 R609
CATERR# CFG_RCOMP1 49D9R2F-L1-GP
BT25 2
CFG_RCOMP
1

R610
220KR2F-GP
G

SKYLAKE-3-GP
2

PROC_JTAGX_TCK
SM_PGCNTL S D DDR_PG_OUT 51

2
R611
Q602
DMN5L06K-7-GP UN 0225 DY 51R2J-L1-GP
84.05067.031

1
C C

1V_VCCST

3D3V_S0
1

RN601
R612 1 8
Q601 DY 1KR2F-L1-GP 2 7
G 3 6
ALL_SYS_PWRGD 4 5 VCCST_PWRGD
2

D
24,40 ALL_SYS_PWRGD R613 SRN10KJ-6-GP
S VCCST_PWRGD_S 2 VCCST_PWRGD
1 0R2J-L-GP DY

1
DY DY C601

SCD1U16V2KX-L-GP
2N7002K-2-GP
84.2N702.J31

2
2ND = 84.2N702.031
3rd = 84.2N702.W31

ENG add cap 0427

B B

PEG Static Lane Reversal eDP Enable PEG Training


1: Normal Operation; Lane # 1:Disable 1:(default) PEG Train immediately following RESET# de assertion.
CFG2 definition matches socket pin map definition CFG4 CFG7
0:Enable 0 = PEG Wait for BIOS for training.
0:Lane Reversed

CFG2 CFG4
CFG7
1

1
R614 R615
1KR2J-L2-GP 1KR2J-L2-GP R616
DY 1KR2J-L2-GP
2

2
PCIE Port Bifurcation Straps

CFG[6:5] 11: x16 - Device 1 functions 1 and 2 disabled


10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

A A
CFG5 CFG6
1

Dr-Bios.com
R617 R618
DY 1KR2J-L2-GP DY 1KR2J-L2-GP <Core Design>

Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU_CFG_CFG STRAP
Size Document Number Rev
A2
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 6 of 105
5 4 3 2 1
5 4 3 2 1

SKYLAKE_HALO 10 OF 14
CPU1J

1V_CPU_CORE SKYLAKE_HALO 1V_CPU_CORE BGA1440


CPU1G 7 OF 14
BJ17 VCCOPC
BGA1440
BJ19 VCCOPC
AA13 VCC VCC V32 BJ20 VCCOPC
AA31 VCC VCC V33 BK17 VCCOPC
AA32 VCC VCC V34 BK19 VCCOPC
D AA33 V35 BK20 D
VCC VCC VCCOPC
AA34 VCC VCC V36 BL16 VCCOPC
AA35 VCC VCC V37 BL17 VCCOPC
AA36 VCC VCC V38 BL18 VCCOPC
AA37 VCC VCC W13 BL19 VCCOPC
AA38 VCC VCC W14 BL20 VCCOPC
AB29 VCC VCC W29 BL21 VCCOPC
AB30 VCC VCC W30 BM17 VCCOPC
AB31 VCC VCC W31 BN17 VCCOPC
AB32 VCC VCC W32
AB35 VCC VCC W35 BJ23 RSVD#BJ23
AB36 VCC VCC W36 BJ26 RSVD#BJ26
AB37 VCC VCC W37 BJ27 RSVD#BJ27
AB38 VCC VCC W38 BK23 RSVD#BK23
AC13 VCC VCC Y29 BK26 RSVD#BK26
AC14 VCC VCC Y30 BK27 RSVD#BK27
AC29 VCC VCC Y31 BL23 RSVD#BL23
AC30 VCC VCC Y32 BL24 RSVD#BL24
AC31 VCC VCC Y33 BL25 RSVD#BL25
AC32 VCC VCC Y34 BL26 RSVD#BL26
C AC33 Y35 BL27 C
VCC VCC RSVD#BL27
AC34 VCC VCC Y36 BL28 RSVD#BL28
AC35 VCC VCC L14 BM24 RSVD#BM24
AC36 VCC VCC P29
AD13 VCC VCC P30
AD14 VCC VCC P31 BL15 VCCOPC_SENSE
AD31 VCC VCC P32 BM16 VSSOPC_SENSE
AD32 VCC VCC P33
AD33 VCC VCC P34 BL22 RSVD#BL22
AD34 VCC VCC P35 BM22 RSVD#BM22
AD35 VCC VCC P36
AD36 VCC VCC R13
AD37 VCC VCC R31 BP15 VCCEOPIO
AD38 VCC VCC R32 BR15 VCCEOPIO
AE13 VCC VCC R33 BT15 VCCEOPIO
AE14 VCC VCC R34
AE30 VCC VCC R35 BP16 RSVD#BP16
AE31 VCC VCC R36 BR16 RSVD#BR16
AE32 VCC VCC R37 BT16 RSVD#BT16
AE35 VCC VCC R38
B AE36 VCC VCC T29 B
AE37 VCC VCC T30 BN15 VCCEOPIO_SENSE
AE38 VCC VCC T31 BM15 VSSEOPIO_SENSE
AF35 VCC VCC T32
AF36 VCC VCC T35 BP17 RSVD#BP17
AF37 VCC VCC T36 BN16 RSVD#BN16
AF38 VCC VCC T37
K13 VCC VCC T38
K14 VCC VCC U29 BM14 VCC_OPC_1P8
L13 VCC VCC U30 BL14 VCC_OPC_1P8
N13 VCC VCC U31
N14 VCC VCC U32 BJ35 RSVD#BJ35
N30 VCC VCC U33 BJ36 RSVD#BJ36
N31 VCC VCC U34
N32 VCC VCC U35
N35 VCC VCC U36 AT13 ZVM#
N36 V13 AW13 <Core Design>
VCC VCC MSM#
N37 VCC VCC V14
N38 VCC VCC V31 AU13 ZVM2#
A
P13 VCC VCC P14 AY13 MSM2# Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
BT29 OPC_RCOMP Taipei Hsien 221, Taiwan, R.O.C.
BR25 OPCE_RCOMP
VCC_SENSE AG37 VCCCORE_SENSE 46 BP25 OPCE_RCOMP2 Title
AG38 JJ 20150130
VSS_SENSE VSSCORE_SENSE 46 CPU_POWER1 (ASIC Power Bolck)
SKYLAKE-3-GP Size Document Number Rev
Custom Newgate 1M
SKYLAKE-3-GP
Date: Tuesday, August 18, 2015 Sheet 7 of 105
5 4 3 2 1

Dr-Bios.com
5 4 3 2 1

SSID = CPU

1V_VCCSA

SKYLAKE_HALO 9 OF 14 1D2V_S3 SKYLAKE_HALO 11 OF 14


CPU1I CPU1K
BGA1440
Imax :12(A) BGA1440
J30 VCCSA VDDQ AA6
D K29 VCCSA VDDQ AE12 D1 RSVD_TP#D1 RSVD_TP#BM33 BM33 D
K30 VCCSA VDDQ AF5 E1 RSVD_TP#E1 RSVD_TP#BL33 BL33
K31 VCCSA VDDQ AF6 E3 RSVD_TP#E3
K32 VCCSA VDDQ AG5 E2 RSVD_TP#E2 RSVD_TP#BJ14 BJ14
K33 VCCSA VDDQ AG9 RSVD_TP#BJ13 BJ13
K34 VCCSA VDDQ AJ12 BR1 RSVD_TP#BR1
K35 VCCSA VDDQ AL11 BT2 RSVD_TP#BT2 RSVD#BK28 BK28
L31 VCCSA VDDQ AP6 RSVD#BJ28 BJ28
L32 VCCSA VDDQ AP7 BN35 RSVD#BN35
L35 VCCSA VDDQ AR12 VSS BJ18
L36 VCCSA VDDQ AR6 J24 RSVD#J24
L37 VCCSA VDDQ AT12 H24 RSVD#H24 RSVD_TP#BJ16 BJ16
L38 VCCSA VDDQ AW6 BN33 RSVD#BN33 RSVD_TP#BK16 BK16
M29 VCCSA VDDQ AY6 BL34 RSVD#BL34
M30 VCCSA VDDQ J5
M31 VCCSA VDDQ J6 N29 RSVD#N29 RSVD_TP#BK24 BK24
M32 VCCSA VDDQ K12 R14 RSVD#R14 RSVD_TP#BJ24 BJ24
M33 VCCSA VDDQ K6 AE29 RSVD#AE29
M34 VCCSA VDDQ L12 AA14 RSVD#AA14 RSVD#BK21 BK21
M35 VCCSA VDDQ L6 RSVD#BJ21 BJ21
M36 R6 A36
0D95V_VCCIO VCCSA VDDQ
VDDQ T6 1D2V_VDDQ_CPUCLK SA做驗 A37
RSVD#A36
RSVD#A37 RSVD#BT17 BT17
Imax :5.35(A) W6 1D2V_VCCSFR_OC BR17
VDDQ RSVD#BR17
AG12 VCCIO 23 PCH_2_CPU_TRIGGER H23 PROC_TRIGIN
G15 VCCIO VDDQC Y12 23 CPU_2_PCH_TRIGGER 1 R802 2 CPU_2_PCH_TRIGGER_R J23 PROC_TRIGOUT VSS BK18
G17 30R2J-1-GP
VCCIO
G19 VCCIO VCCPLL_OC BH13 Imax :0.26(A) JJ 20150130 F30 RSVD#F30 RSVD_TP#BJ34 BJ34
G21 VCCIO VCCPLL_OC G11 E30 RSVD#E30 RSVD_TP#BJ33 BJ33
H15 1V_VCCST
C VCCIO C
H16 VCCIO B30 RSVD#B30
H17 H30 Imax :0.06(A) 1V_VCCSTG C30
VCCIO VCCST RSVD#C30
H19 VCCIO RSVD#G13 G13
H20 VCCIO VCCSTG H29 Imax :0.06(A) G3 RSVD#G3 RSVD#AJ8 AJ8
H21 VCCIO J3 RSVD#J3 RSVD#BL31 BL31
H26 G30 1V_VCCST
VCCIO VCCSTG
H27 VCCIO NCTF#B2 B2
J15 VCCIO VCCPLL H28 Imax :0.12(A) NCTF#B38 B38
J16 VCCIO VCCPLL J28 NCTF#BP1 BP1
J17 VCCIO BR35 RSVD#BR35 NCTF#BR2 BR2
J19 VCCIO BR31 RSVD#BR31 NCTF#C1 C1
J20 VCCIO VCCSA_SENSE M38 VCCSA_SENSE 46 BH30 RSVD#BH30 NCTF#C38 C38
J21 VCCIO VSSSA_SENSE M37 VSSSA_SENSE 46
J26 VCCIO
J27 H14 SKYLAKE-3-GP
VCCIO VCCIO_SENSE
VSSIO_SENSE J14

1D2V_S3 1D2V_VCCSFR_OC

R808
1 0R2J-L-GP
2
DY JJ 20150130

SKYLAKE-3-GP 1V_VCCSTG PD change 0622 1V_VCCST

1 R809 2
0R0402-PAD
B 1D2V_S3 1D2V_VDDQ_CPUCLK B

1 R801 2

0R0603-PAD

PD change 0622
ENG change 0412

<Core Design>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU_POWER2(ASIC Power Bolck)


Size Document Number Rev
A3 Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 8 of 105

5 4 3 2 1
5 4 3 2 1

SSID = CPU
SKYLAKE_HALO SKYLAKE_HALO
CPU1M SKYLAKE_HALO 13 OF 14 CPU1L 12 OF 14 CPU1F 6 OF 14 1V_VCCGT 1V_VCCGT
SKYLAKE_HALO 8 OF 14
BGA1440 BGA1440 CPU1H
BGA1440 1V_VCCGT
BB4 AK30 C17 C25 Y38 K1 SKYLAKE_HALO
VSS VSS VSS VSS VSS VSS BGA1440 CPU1N 14 OF 14
BB3 AK29 C13 C23 Y37 J36 BG34 AV29
VSS VSS VSS VSS VSS VSS VCCGT VCCGT
BB2 AK4 C9 C21 Y14 J33 BG35 AV30 BGA1440
VSS VSS VSS VSS VSS VSS VCCGT VCCGT
BB1 AJ38 BT32 C19 Y13 J32 BG36 AV31 AJ29
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
BA38 AJ37 BT26 C15 Y11 J25 BH33 AV32 AJ30
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
BA37 AJ6 BT24 C11 Y10 J22 BH34 AV33 AJ31 AF29
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
BA12 AJ5 BT21 C8 Y9 J18 BH35 AV34 AJ32 AF30
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
BA11 AJ4 BT18 C5 Y8 J10 BH36 AV35 AJ33 AF31
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
BA10 AJ3 BT14 BM29 Y7 J7 BH37 AV36 AJ34 AF32
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
BA9 AJ2 BT12 BM25 W34 J4 BH38 AW14 AJ35 AF33
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
BA8 AJ1 BT9 BM18 W33 H35 BJ37 AW31 AJ36 AF34
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
D BA7 AH34 BT5 BM11 W12 H32 BJ38 AW32 AK31 AG13 D
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
BA6 AH33 BR36 BM8 W5 H25 BL36 AW33 AK32 AG14
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
B9 AH12 BR34 BM7 W4 H22 BL37 AW34 AK33 AG31
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
AY34 AH6 BR29 BM5 W3 H18 BM36 AW35 AK34 AG32
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
AY33 AG30 BR26 BM3 W2 H12 BM37 AW36 AK35 AG33
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
AY14 AG29 BR24 BL38 W1 H11 BN36 AW37 AK36 AG34
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
AY12 AG11 BR21 BL35 V30 G28 BN37 AW38 AK37 AG35
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
AW30 AG10 BR18 BL13 V29 G26 BN38 AY29 AK38 AG36
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
AW29 AG8 BR14 BL6 V12 G24 BP37 AY30 AL13 AH13
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
AW12 AG7 BR12 BK25 V6 G23 BP38 AY31 AL29 AH14
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
AW5 AG6 BR7 BK22 U38 G22 BR37 AY32 AL30 AH29
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
AW4 AF14 BP34 BK13 U37 G20 BT37 AY35 AL31 AH30
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
AW3 AF13 BP33 BK6 U6 G18 BE38 AY36 AL32 AH31
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
AW2 AF12 BP29 BJ30 T34 G16 BF13 AY37 AL35 AH32
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
AW1 AF4 BP26 BJ29 T33 G14 BF14 AY38 AL36 AJ13
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
AV38 AF3 BP24 BJ15 T14 G12 BF29 BA13 AL37 AJ14
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT VCCGTX
AV37 AF2 BP21 BJ12 T13 G10 BF30 BA14 AL38
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AU34 AF1 BP18 BH11 T12 G9 BF31 BA29 AM13
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AU33 AE34 BP14 BH10 T11 G8 BF32 BA30 AM14
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AU12 AE33 BP12 BH7 T10 G6 BF35 BA31 AM29
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AU11 AE6 BP7 BH6 T9 G5 BF36 BA32 AM30
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AU10 AD30 BN34 BH3 T8 G4 BF37 BA33 AM31
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AU9 AD29 BN31 BH2 T7 F36 BF38 BA34 AM32
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AU8 AD12 BN30 BG37 T5 F31 BG29 BA35 AM33
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AU7 AD11 BN29 BG14 T4 F29 BG30 BA36 AM34
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AU6 AD10 BN24 BG6 T3 F27 BG31 BB13 AM35
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AT30 AD9 BN21 BF34 T2 F25 BG32 BB14 AM36
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AT29 AD8 BN20 BF6 T1 F23 BG33 BB31 AN13
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AT6 AD7 BN19 BE30 R30 F21 BC36 BB32 AN14
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AR38 AD6 BN18 BE5 R29 F19 BC37 BB33 AN31
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AR37 AC38 BN14 BE4 R12 F17 BC38 BB34 AN32
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AR14 AC37 BN12 BE3 P38 F15 BD13 BB35 AN33
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AR13 AC12 BN9 BE2 P37 F13 BD14 BB36 AN34
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AR5 AC6 BN7 BE1 P12 F11 BD29 BB37 AN35
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AR4 AC5 BN4 BD38 P6 F9 BD30 BB38 AN36
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AR3 AC4 BN2 BD37 N34 F8 BD31 BC29 AN37
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AR2 AC3 BM38 BD12 N33 F5 BD32 BC30 AN38
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AR1 AC2 BM35 BD11 N12 F4 BD33 BC31 AP13
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AP34 AC1 BM28 BD10 N11 F3 BD34 BC32 AP14
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AP33 AB34 BM27 BD8 N10 F2 BD35 BC35 AP29
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AP12 AB33 BM26 BD7 N9 E38 BD36 BE33 AP30
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
C AP11 AB6 BM23 BD6 N8 E35 BE31 BE34 AP31 C
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AP10 AA30 BM21 BC33 N7 E34 BE32 BE35 AP32
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AP9 AA29 BM13 BC14 N6 E9 BE37 BE36 AP35
VSS VSS VSS VSS VSS VSS VCCGT VCCGT VCCGT
AP8 AA12 BM12 BC13 N5 E4 AP36
VSS VSS VSS VSS VSS VSS VCCGT
AN30 A30 BM9 BC6 N4 D33 AP37
VSS VSS VSS VSS VSS VSS VCCGT
AN29 A28 BM6 BB30 N3 D30 AP38
VSS VSS VSS VSS VSS VSS SKYLAKE-3-GP VCCGT
AN12 A26 BM2 BB29 N2 D28 AR29
VSS VSS VSS VSS VSS VSS VCCGT
AN6 A24 BL29 BB6 N1 D26 AR30
VSS VSS VSS VSS VSS VSS VCCGT
AN5 A22 BK29 BB5 M14 D24 AR31
VSS VSS VSS VSS VSS VSS VCCGT
AM38 A20 BK15 M13 D22 AR32
VSS VSS VSS VSS VSS VCCGT
AM37 A18 BK14 M12 D20 AR33 AH38 VCCGT_SENSE 46
VSS VSS VSS VSS VSS VCCGT VCCGT_SENSE
AM12 A16 BJ32 M6 D18 AR34 AH37 VSSGT_SENSE 46
VSS VSS VSS VSS VSS VCCGT VSSGT_SENSE
AM5 A14 BJ31 L34 D16 AR35
VSS VSS VSS VSS VSS VCCGT
AM4 A12 BJ25 L33 D14 AR36 AH36
VSS VSS VSS VSS VSS VCCGT VCCGTX_SENSE
AM3 A10 BJ22 L30 D12 AT14 AH35
VSS VSS VSS VSS VSS VCCGT VSSGTX_SENSE
AM2 A9 BH14 L29 D10 AT31
VSS VSS VSS VSS VSS VCCGT
AM1 A6 BH12 C2 K38 D9 AT32
VSS VSS VSS NCTFVSS VSS VSS VCCGT
AL34 BH9 BT36 K11 D6 AT33
VSS VSS NCTFVSS VSS VSS VCCGT
AL33 BH8 BT35 K10 D3 AT34
VSS VSS NCTFVSS VSS VSS VCCGT
AL14 B37 BH5 BT4 K9 C37 AT35
VSS NCTFVSS VSS NCTFVSS VSS VSS VCCGT
AL12 B3 BH4 BT3 K8 C31 AT36
VSS NCTFVSS VSS NCTFVSS VSS VSS VCCGT
AL10 A34 BH1 BR38 K7 C29 AT37
VSS NCTFVSS VSS NCTFVSS VSS VSS VCCGT
AL9 A4 BG38 K5 C27 AT38
VSS NCTFVSS VSS VSS VSS VCCGT
AL8 A3 BG13 K4 AU14
VSS NCTFVSS VSS VSS VCCGT
AL7 BG12 K3 D38 AU29
VSS VSS VSS NCTFVSS VCCGT
AL4 BF33 K2 AU30
VSS VSS VSS VCCGT
BF12 AU31
VSS VCCGT
BE29 AU32
VSS SKYLAKE-3-GP VCCGT
BE6 AU35
SKYLAKE-3-GP VSS VCCGT
BD9 AU36
VSS VCCGT
BC34 AU37
VSS VCCGT
BC12 AU38
VSS VCCGT
BB12
VSS
SKYLAKE-3-GP
SKYLAKE-3-GP

B B

A A

Dr-Bios.com
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU_POWER3(ASIC Power Bolck)
Size Document Number Rev
A2 Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 9 of 105

5 4 3 2 1
5 4 3 2 1

VDDQ 4x 22uF 0603 10x 10uF 0402


1D2V_S3 1D2V_S3

1
C1014 C1015 C1016 C1017 C1018 C1019 C1020 C1021 C1022 C1023 C1024 C1025 C1026 C1027
1V_CPU_CORE

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
2

2
D D

PC1001 PC1002 PC1003 PC1004 PC1005 PC1006 PC1007 PC1008 PC1009 PC1010 PC1011 PC1012
1

1
SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
2

2
VccIO 3x 10uF 0402 VccIO 2x 47uF 0805
VDDQC 1x 10uF 0402 VccST 1x 1uF 0201
0D95V_VCCIO
0D95V_VCCIO 1D2V_VDDQ_CPUCLK 1V_VCCST

1
C1005 C1006 C1007 C1001 C1002 C1003 C1004 C1008 C1013
PD change 0622 PD change 0622

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC10U6D3V3MX-GP

SC1U10V2KX-1GP
2

2
PC1013 PC1014 PC1015 PC1016 PC1017 PC1018 PC1019 PC1020 PC1021 PC1022 PC1023 PC1024
1

1
SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
2

2
DY DY DY near CPU H30
C VR: +/-5% or +/-50mV C

Place close to VR output


VccPLL 1x 1uF 0201 VccPLL_OC 2x 1uF 0201 VccSTG 1x 1uF 0201
1V_VCCST 1D2V_VCCSFR_OC 1V_VCCSTG
JJ 20150130

1
C1011 C1012

1
PC1028 PC1029 PC1025 PC1027 PC1030 PC1026 C1010 C1009
1

SC1U10V2KX-1GP

SC1U10V2KX-1GP
2

2
SC1U10V2KX-1GP

SC1U10V2KX-1GP
SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

2
2

DY DY

near CPU H28 , J28 near CPU H29 , G30

PD change 0622 PD change 0622

B B

<Core Design>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

010_CPU (Power CAP1)


Size Document Number Rev
A3
Newgate 1M
Date: W ednesday, August 12, 2015 Sheet 10 of 105

5 4 3 2 1
A

1V_VCCGT
DY
2 1 2 1 2 1 2 1

PC1127

PC1121

PC1111

PC1101
SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP
5

5
PD change 0622
DY

DY
2 1 2 1 2 1 2 1

PC1128

PC1122

PC1112

PC1102
SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP

DY
2 1 2 1 2 1 2 1

PC1129

PC1123

PC1113

PC1103
SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP
DY

2 1 2 1 2 1 2 1

PD change 0622
PC1130

PC1124

PC1114

PC1104
SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP
DY

DY
2 1 2 1 2 1 2 1
PC1131

PC1125

PC1115

PC1105
SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP
DY

2 1 2 1 2 1 2 1
4

4
PC1132

PC1126

PC1116

PC1106
SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP

2 1 2 1

PC1117

PC1107
SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP

2 1 2 1

PC1118

PC1108
SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP
PD change 0622

DY
2 1 2 1

PC1119

PC1109
SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP

PD change 0622
DY
2 1 2 1
PC1120

PC1110
SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP
3

3
1V_VCCSA
PD change 0622

PD change 0622
DY

2 1 2 1
PC1157

PC1148

SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP
DY

2 1 2 1
PC1153

PC1149

SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP
Date: Wednesday, August 12, 2015

A4
Size

Title

<Core Design>

DY

2 1 2 1
PC1154

PC1150

SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP
2

2
Document Number

PD change 0622

DY

2 1 2 1
PC1155

PC1151

SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP

2 1 2 1
CPU (Power CAP2)

PC1156

PC1152

SC22U6D3V5MX-L3-GP SC22U6D3V5MX-L3-GP
Newgate

application without get Wistron permission


Duplicate, Modify, Forward or any other purpose
Wistron Confidential document, Anyone can not
Taipei Hsien 221, Taiwan, R.O.C.
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Wistron Corporation
Sheet
11
1

1
of

Dr-Bios.com
105

Rev
1M

D
5 4 3 2 1

DM1A 1 OF 4
DM1D 4 OF 4
4 M_A_A16 152 RAS#/A16 DQ63 246 M_A_DQ62 4
156 245 DM1B 2 OF 4 1 99
4 M_A_A15 CAS#/A15 DQ62 M_A_DQ60 4 VSS VSS
4 M_A_A14 151 WE#/A14 DQ61 233 M_A_DQ61 4 2 VSS VSS 102
4 M_A_A13 158 A13 DQ60 232 M_A_DQ63 4 DQS8_T 97 5 VSS VSS 103
4 M_A_A12 119 A12 DQ59 250 M_A_DQ58 4 DQS8_C 95 6 VSS VSS 106
4 M_A_A11 120 A11 DQ58 249 M_A_DQ56 4 DQS7_T 242 M_A_DQS_DP7 4 9 VSS VSS 107
4 M_A_A10 146 A10/AP DQ57 236 M_A_DQ57 4 DQS7_C 240 M_A_DQS_DN7 4 10 VSS VSS 167
4 M_A_A9 121 A9 DQ56 237 M_A_DQ59 4 DQS6_T 221 M_A_DQS_DP6 4 14 VSS VSS 168
4 M_A_A8 125 A8 DQ55 225 M_A_DQ54 4 DQS6_C 219 M_A_DQS_DN6 4 15 VSS VSS 171
4 M_A_A7 122 A7 DQ54 224 M_A_DQ49 4 DQS5_T 200 M_A_DQS_DP5 4 18 VSS VSS 172
4 M_A_A6 127 A6 DQ53 212 M_A_DQ52 4 DQS5_C 198 M_A_DQS_DN5 4 19 VSS VSS 175
D 4 M_A_A5 126 A5 DQ52 211 M_A_DQ48 4 DQS4_T 179 M_A_DQS_DP4 4 22 VSS VSS 176 D
4 M_A_A4 128 A4 DQ51 229 M_A_DQ53 4 DQS4_C 177 M_A_DQS_DN4 4 23 VSS VSS 180
4 M_A_A3 131 A3 DQ50 228 M_A_DQ51 4 DQS3_T 76 M_A_DQS_DP3 4 26 VSS VSS 181
4 M_A_A2 132 A2 DQ49 215 M_A_DQ55 4 DQS3_C 74 M_A_DQS_DN3 4 27 VSS VSS 184
4 M_A_A1 133 A1 DQ48 216 M_A_DQ50 4 DQS2_T 55 M_A_DQS_DP2 4 30 VSS VSS 185
4 M_A_A0 144 A0 DQ47 204 M_A_DQ42 4 DQS2_C 53 M_A_DQS_DN2 4 31 VSS VSS 188
DQ46 203 M_A_DQ41 4 DQS1_T 34 M_A_DQS_DP1 4 35 VSS VSS 189
4 M_A_BA1 145 BA1 DQ45 190 M_A_DQ45 4 DQS1_C 32 M_A_DQS_DN1 4 36 VSS VSS 192
150 191 13 1D2V_S3 39 193
4 M_A_BA0 BA0 DQ44 M_A_DQ47 4 DQS0_T M_A_DQS_DP0 4 VSS VSS
4 M_A_BG1 113 BG1 DQ43 208 M_A_DQ43 4 DQS0_C 11 M_A_DQS_DN0 4 40 VSS VSS 196
4 M_A_BG0 115 BG0 DQ42 207 M_A_DQ44 4 43 VSS VSS 197
DQ41 194 M_A_DQ40 4 DM8#/DBI#/NC#96 96 44 VSS VSS 201
4 M_A_CLK1 138 CK1_T/NF DQ40 195 M_A_DQ46 4 DM7#/DBI7# 241 47 VSS VSS 202
4 M_A_CLK#1 140 CK1_C/NF DQ39 182 M_A_DQ35 4 DM6#/DBI6# 220 48 VSS VSS 205
4 M_A_CLK0 137 CK0_T DQ38 183 M_A_DQ36 4 DM5#/DBI5# 199 51 VSS VSS 206
4 M_A_CLK#0 139 CK0_C DQ37 169 M_A_DQ38 4 DM4#/DBI4# 178 52 VSS VSS 209
DQ36 170 M_A_DQ33 4 DM3#/DBI3# 75 56 VSS VSS 210
4 M_A_CS#1 157 CS1# DQ35 186 M_A_DQ34 4 DM2#/DBI2# 54 57 VSS VSS 213
4 M_A_CS#0 149 CS0# DQ34 187 M_A_DQ37 4 DM1#/DBI# 33 60 VSS VSS 214
DQ33 173 M_A_DQ39 4 DM0#/DBI0# 12 61 VSS VSS 217
4 M_A_CKE1 110 CKE1 DQ32 174 M_A_DQ32 4 64 VSS VSS 218
4 M_A_CKE0 109 CKE0 DQ31 80 M_A_DQ25 4 65 VSS VSS 222
79 DDR4-260P-10-GP 68 223
DQ30 M_A_DQ30 4 VSS VSS
4 M_A_ODT1 161 ODT1 DQ29 67 M_A_DQ27 4 69 VSS VSS 226
155 66 1D2V_S3 72 227
4 M_A_ODT0 ODT0 DQ28 M_A_DQ28 4 VSS VSS
84 DM1C 3 OF 4 73 230
DQ27 M_A_DQ24 4 VSS VSS
165 C1/CS3#/NC#165 DQ26 83 M_A_DQ31 4 77 VSS VSS 231
162 C0/CS2#/NC#162 DQ25 71 M_A_DQ26 4 111 VDD 78 VSS VSS 234
DQ24 70 M_A_DQ29 4 117 VDD 81 VSS VSS 235
C 104 59 123 82 238 C
CB7/NC#104 DQ23 M_A_DQ20 4 VDD VSS VSS
100 CB6/NC#100 DQ22 58 M_A_DQ23 4 129 VDD 85 VSS VSS 239
87 CB5/NC#87 DQ21 45 M_A_DQ16 4 135 VDD 86 VSS VSS 243
88 CB4/NC#88 DQ20 46 M_A_DQ18 4 141 VDD 89 VSS VSS 244
105 CB3/NC#105 DQ19 63 M_A_DQ22 4 147 VDD 90 VSS VSS 247
101 CB2/NC#101 DQ18 62 M_A_DQ21 4 153 VDD 93 VSS VSS 248
91 CB1/NC#91 DQ17 49 M_A_DQ17 4 159 VDD 94 VSS VSS 251
92 CB0/NC#92 DQ16 50 M_A_DQ19 4 112 VDD 98 VSS VSS 252
DQ15 37 M_A_DQ10 4 118 VDD
4 M_A_PARITY 143 PARITY DQ14 38 M_A_DQ14 4 124 VDD
3D3V_S0 1D2V_S3 108 25 130 DDR4-260P-10-GP
13,17 DDR4_DRAMRST# RESET# DQ13 M_A_DQ11 4 VDD
DQ12 24 M_A_DQ12 4 136 VDD
1 R1215 2 240R2F-1-GP TS#_DIMM0_1 134 EVENT#/NF DQ11 42 M_A_DQ8 4 142 VDD
DY 4 M_A_ALERT_N 116 ALERT# DQ10 41 M_A_DQ15 4 148 VDD
4 M_A_ACT_N 114 ACT# DQ9 29 M_A_DQ9 4 154 VDD
255 VDDSPD DQ8 28 M_A_DQ13 4 160 VDD
DQ7 17 M_A_DQ2 4 163 VDD
SA2_CHA_DIM0 166 16 261 UN 0225
SA2 DQ6 M_A_DQ7 4 2D5V_S3 261
SA1_CHA_DIM0 260 3 262
SA1 DQ5 M_A_DQ5 4 262
1

C1228 R1216 SA0_CHA_DIM0 256 4 257


SA0 DQ4 M_A_DQ4 4 0D6V_S0 VPP 0D6V_S0 0D6V_S0
SCD1U16V2KX-L-GP

SC2D2U10V3KX-L-GP

DQ3 21 M_A_DQ3 4 259 VPP 0D6V_S0


DY DY 13,17,69 PCH_SMBDATA 254 20 M_A_DQ6 4 NP1
2

SDA DQ2 NP1


13,17,69 PCH_SMBCLK 253 SCL DQ1 7 M_A_DQ1 4 258 VTT NP2 NP2
M_VREF_CA_DIMMA 164 8
VREFCA DQ0 M_A_DQ0 4
DDR4-260P-10-GP

1
DDR4-260P-10-GP C1225 C1226 C1223 C1224
1

C1229 1D2V_S3
062.10011.00I1

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
DDR4 SWAP 0212

2
B B
2 SCD1U16V2KX-3GP

跟sw確確

1
3D3V_S0 C1208 C1202 C1209 C1203 C1204 C1205 C1206 C1210
1D2V_S3

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
2

2
2 R1204 1 10KR2F-L1-GP SA0_CHA_DIM0 2D5V_S3
DY
RN1201 R1206
1 4 2 R1205 1 0R0402-PAD
2 3 M_VREF_CA_DIMMA 1 2 V_SM_VREF_CNTA 5
PD change 0622

1
SRN1KJ-7-GP 2R2F-GP C1211 C1212 C1207 C1213
1

SC10U6D3V3MX-L-GP
C1222 DY DY

SC10U6D3V3MX-GP

SC1U10V2KX-1GP

SC1U10V2KX-L1-GP
SCD022U16V2KX-3GP

2
3D3V_S0
2

1
+V_VREF_PATH1 C1214 C1215 C1216 C1217 C1218 C1219 C1220 C1221
1

R1209 2 R1208 1 10KR2F-L1-GP


DY SA1_CHA_DIM0

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
24D9R2F-L-GP

2
2 R1210 1 0R0402-PAD

PD change 0622
2

3D3V_S0
A <Core Design> A

2 R1211 1 10KR2F-L1-GP
DY SA2_CHA_DIM0

Dr-Bios.com
2 R1212 1 0R0402-PAD Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
PD change 0622 Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3-SODIMM1
Size Document Number Rev
A3 Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 12 of 105
5 4 3 2 1
5 4 3 2 1

DM2A DDR4-260P-9-GP 1 OF 4 3D3V_S0

144 8 1D2V_S3
5 M_B_A0 A0 DQ0 M_B_DQ0 5
5 M_B_A1 133 7 M_B_DQ1 5 DM2C 3 OF 4 DM2D 4 OF 4
A1 DQ1
5 M_B_A2 132 A2 DQ2 20 M_B_DQ2 5
5 M_B_A3 131 A3 DQ3 21 M_B_DQ3 5 111 VDD VDDSPD 255 1 VSS VSS 99
5 M_B_A4 128 A4 DQ4 4 M_B_DQ4 5 112 VDD 2 VSS VSS 102
126 3 117 2D5V_S3 5 103
5 M_B_A5 A5 DQ5 M_B_DQ5 5 VDD VSS VSS
5 M_B_A6 127 A6 DQ6 16 M_B_DQ6 5 118 VDD VPP 257 6 VSS VSS 106

1
5 M_B_A7 122 17 M_B_DQ7 5 123 259 C1329 C1328 DY 9 107
A7 DQ7 VDD VPP 0D6V_S0 DY VSS VSS

SC2D2U10V3KX-L-GP

SCD1U16V2KX-L-GP
5 M_B_A8 125 A8 DQ8 28 M_B_DQ8 5 124 VDD 10 VSS VSS 167
5 M_B_A9 121 29 M_B_DQ9 5 129 258 14 168

2
A9 DQ9 VDD VTT VSS VSS
D 5 M_B_A10 146 A10/AP DQ10 41 M_B_DQ15 5 130 VDD 15 VSS VSS 171 D
5 M_B_A11 120 A11 DQ11 42 M_B_DQ14 5 135 VDD 18 VSS VSS 172
5 M_B_A12 119 A12 DQ12 24 M_B_DQ12 5 136 VDD 19 VSS VSS 175
5 M_B_A13 158 A13 DQ13 25 M_B_DQ13 5 141 VDD 22 VSS VSS 176
5 M_B_A14 151 WE#/A14 DQ14 38 M_B_DQ10 5 142 VDD 23 VSS VSS 180
5 M_B_A15 156 CAS#/A15 DQ15 37 M_B_DQ11 5 147 VDD 261 261 26 VSS VSS 181
5 M_B_A16 152 RAS#/A16 DQ16 50 M_B_DQ22 5 148 VDD 262 262 27 VSS VSS 184
DQ17 49 M_B_DQ17 5 153 VDD 30 VSS VSS 185
5 M_B_BA0 150 BA0 DQ18 62 M_B_DQ21 5 154 VDD 31 VSS VSS 188
5 M_B_BA1 145 BA1 DQ19 63 M_B_DQ19 5 159 VDD NP1 NP1 35 VSS VSS 189
5 M_B_BG0 115 BG0 DQ20 46 M_B_DQ18 5 160 VDD NP2 NP2 36 VSS VSS 192
5 M_B_BG1 113 BG1 DQ21 45 M_B_DQ16 5 163 VDD 39 VSS VSS 193
DQ22 58 M_B_DQ20 5 40 VSS VSS 196
92 CB0/NC DQ23 59 M_B_DQ23 5 43 VSS VSS 197
91 70 M_B_DQ30 5 DDR4-260P-9-GP 44 201
CB1/NC DQ24 VSS VSS
101 CB2/NC DQ25 71 M_B_DQ27 5 47 VSS VSS 202
105 CB3/NC DQ26 83 M_B_DQ29 5 48 VSS VSS 205
88 CB4/NC DQ27 84 M_B_DQ31 5 51 VSS VSS 206
87 CB5/NC DQ28 66 M_B_DQ25 5 52 VSS VSS 209
100 CB6/NC DQ29 67 M_B_DQ28 5 56 VSS VSS 210
104 CB7/NC DQ30 79 M_B_DQ24 5 57 VSS VSS 213
80 M_B_DQ26 5 DM2B 2 OF 4 60 214
DQ31 VSS VSS
5 M_B_CLK0 137 CK0_T DQ32 174 M_B_DQ35 5 61 VSS VSS 217
5 M_B_CLK#0 139 CK0_C DQ33 173 M_B_DQ38 5 DQS0_C 11 M_B_DQS_DN0 5 64 VSS VSS 218
5 M_B_CLK1 138 CK1_T/NF DQ34 187 M_B_DQ36 5 DQS0_T 13 M_B_DQS_DP0 5 65 VSS VSS 222
5 M_B_CLK#1 140 CK1_C/NF DQ35 186 M_B_DQ37 5 DQS1_C 32 M_B_DQS_DN1 5 68 VSS VSS 223
DQ36 170 M_B_DQ34 5 DQS1_T 34 M_B_DQS_DP1 5 69 VSS VSS 226
5 M_B_CKE0 109 CKE0 DQ37 169 M_B_DQ39 5 DQS2_C 53 M_B_DQS_DN2 5 72 VSS VSS 227
5 M_B_CKE1 110 CKE1 DQ38 183 M_B_DQ32 5 DQS2_T 55 M_B_DQS_DP2 5 73 VSS VSS 230
C 182 74 77 231 C
DQ39 M_B_DQ33 5 DQS3_C M_B_DQS_DN3 5 VSS VSS
5 M_B_CS#0 149 CS0# DQ40 195 M_B_DQ40 5 DQS3_T 76 M_B_DQS_DP3 5 78 VSS VSS 234
5 M_B_CS#1 157 CS1# DQ41 194 M_B_DQ41 5 DQS4_C 177 M_B_DQS_DN4 5 81 VSS VSS 235
162 C0/CS2#/NC DQ42 207 M_B_DQ42 5 DQS4_T 179 M_B_DQS_DP4 5 82 VSS VSS 238
165 C1/CS3#/NC DQ43 208 M_B_DQ43 5 DQS5_C 198 M_B_DQS_DN5 5 85 VSS VSS 239
DQ44 191 M_B_DQ44 5 DQS5_T 200 M_B_DQS_DP5 5 86 VSS VSS 243
5 M_B_ODT0 155 ODT0 DQ45 190 M_B_DQ45 5 DQS6_C 219 M_B_DQS_DN6 5 89 VSS VSS 244
5 M_B_ODT1 161 ODT1 DQ46 203 M_B_DQ47 5 DQS6_T 221 M_B_DQS_DP6 5 90 VSS VSS 247
DQ47 204 M_B_DQ46 5 DQS7_C 240 M_B_DQS_DN7 5 93 VSS VSS 248
SA0_CHB_DIM0 256 216 M_B_DQ48 5 242 M_B_DQS_DP7 5 94 251
SA1_CHB_DIM0 SA0 DQ48 DQS7_T VSS VSS
260 SA1 DQ49 215 M_B_DQ51 5 DQS8_C 95 98 VSS VSS 252
SA2_CHB_DIM0 166 228 97 1D2V_S3
SA2 DQ50 M_B_DQ55 5 DQS8_T
DQ51 229 M_B_DQ49 5
254 211 M_B_DQ52 5 12 DDR4-260P-9-GP
12,17,69 PCH_SMBDATA SDA DQ52 DM0#/DBI0#
12,17,69 PCH_SMBCLK 253 SCL DQ53 212 M_B_DQ54 5 DM1#/DBI# 33
DQ54 224 M_B_DQ50 5 DM2#/DBI2# 54
DQ55 225 M_B_DQ53 5 DM3#/DBI3# 75
12,17 DDR4_DRAMRST# 108 RESET# DQ56 237 M_B_DQ63 5 DM4#/DBI4# 178
1D2V_S3 114 236 199
5 M_B_ACT_N ACT# DQ57 M_B_DQ62 5 DM5#/DBI5#
5 M_B_ALERT_N 116 ALERT# DQ58 249 M_B_DQ56 5 DM6#/DBI6# 220 UN 0225
1 R1312 2 TS#_DIMM1_1 134
EVENT#/NF DQ59 250 M_B_DQ60 5 DM7#/DBI7# 241
DY 240R2F-1-GP 232 M_B_DQ58 5 96
DQ60 DM8#/DBI#/NC
5 M_B_PARITY 143 PARITY DQ61 233 M_B_DQ59 5
245 0D6V_S0 0D6V_S0 0D6V_S0 2D5V_S3
DQ62 M_B_DQ57 5
M_VREF_CA_DIMMB 164 246 M_B_DQ61 5 DDR4-260P-9-GP
VREFCA DQ63

062.10011.00J1 DDR4 SWAP 0212


1

1
C1301 1D2V_S3 C1311 C1312 C1313 C1314

1
B B

SC10U6D3V3MX-L-GP
跟sw確確 C1324 C1325 DY DY

1
SCD1U16V2KX-3GP

SC10U6D3V3MX-GP

SC1U10V2KX-1GP

SC1U10V2KX-L1-GP
C1326 C1327
2

2
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
2

2
3D3V_S0

SC1U10V2KX-1GP

SC1U10V2KX-1GP
2

2
DY

1
2 R1302 110KR2F-L1-GP SA0_CHB_DIM0 C1303 C1304 C1305 C1306 C1307 C1308 C1309 C1310

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
2 R1303 1 0R0402-PAD

2
1D2V_S3
PD change 0622
RN1301 R1305
1 4 3D3V_S0
2 3 M_VREF_CA_DIMMB 1 2 V_SM_VREF_CNTB 5
SRN1KJ-7-GP 2R2F-GP 2 R1306 110KR2F-L1-GP SA1_CHB_DIM0
1

1
C1323 C1315 C1316 C1317 C1318 C1319 C1320 C1321 C1322
SCD022U16V2KX-3GP 2 R1307DY
1 0R2J-L-GP
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
2

2
+V_VREF_PATH2
1

R1309 3D3V_S0
24D9R2F-L-GP

DY
2 R1310 110KR2F-L1-GP SA2_CHB_DIM0
2

A 2 R1311 1 0R0402-PAD <Core Design> A

PD change 0622

Dr-Bios.com
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3-SODIMM2
Size Document Number Rev
A3 Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 13 of 105
5 4 3 2 1
5 4 3 2 1
Royee 20150204
PCH1A 1 OF 12

BD17 GPP_A11/PME# GPP_B13/PLTRST# BB27 PLT_RST# 24,31,61,63,68,71,89,91


SPL PCH-H
22 SPI_SI_CPU
AG15 RSVD_AG15
22 SPI_SO_CPU AG14 RSVD_AG14 GPP_G16/GSXCLK P43 TBT_FORCE_PWR 71
Royee 20150204 AF17 RSVD_AF17 GPP_G12/GSXDOUT R39 TBT_PLUG_EVENT# 71 0217
AE17 R36
PD change 0622 RSVD_AE17 GPP_G13/GSXSLOAD
R42
D GPP_G14/GSXDIN D
AR19 TP5 GPP_G15/GSXSRESET# R41
24,25 SPI_SI_ROM 1 R1401 2 0R0402-PAD SPI_SI_CPU AN17 change 0227
TP4
24,25 SPI_SO_ROM 1 R1402 2 0R0402-PAD
BB29 SPI0_MOSI
Strap GPP_E3/CPU_GP0 AF41 EC_SMI# 24
SPI_SO_CPU BE30 AE44
SPI0_MISO GPP_E7/CPU_GP1
24,25 SPI_CS_CPU_N0 BD31 SPI0_CS0# GPP_B3/CPU_GP2 BC23 TP_IN# 65
R1403 1 2 15R2F-2-GP SPI_CLK_CPU BC31 BD24
24,25 SPI_CLK_ROM SPI0_CLK GPP_B4/CPU_GP3 DGPU_HOLD_RST# 76,79
AW31 SPI0_CS1#
GPP_H18/SML4ALERT# BC36
22,25 SPI_IO2_ROM 1 R1404 2 0R0402-PAD SPI_IO2_CPU BC29 SPI0_IO2
Strap GPP_H17/SML4DATA BE34
22,25 SPI_IO3_ROM 1 R1405 2 0R0402-PAD SPI_IO3_CPU BD30 SPI0_IO3 GPP_H16/SML4CLK BD39
AT31 SPI0_CS2# GPP_H15/SML3ALERT# BB36
AN36 GPP_D1/SPI1_CLK GPP_H14/SML3DATA BA35
Royee 20150204 AL39 GPP_D0/SPI1_CS# GPP_H13/SML3CLK BC35
AN41 Strap BD35
PD change 0622 AN38
GPP_D3/SPI1_MOSI GPP_H12/SML2ALERT#
AW35
GPP_D2/SPI1_MISO GPP_H11/SML2DATA
AH43 GPP_D22/SPI1_IO3 GPP_H10/SML2CLK BD34
AG44 GPP_D21/SPI1_IO2
BE11 SM_INTRUDER#
INTRUDER#
C C
SUNRISE-1-GP

R1408
10KR2F-L1-GP
2 1 DGPU_HOLD_RST#

3D3V_RTC_AUX

delete 0225 R1406


SM_INTRUDER# 2 1MR2F-L-GP
1

3D3V_S0

R1407
TP_IN# 2 10KR2F-L1-GP
1
B DY B

change 0227

CHECK NEED PULL HIGH? 3D3V_S0

EC_SMI# 2 R1409 110KR2F-L1-GP

<Core Design>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Dr-Bios.com
Title

PCH_GPP1
Size Document Number Rev
A4
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 14 of 105
5 4 3 2 1
5 4 3 2 1

D D

PCH1B 2 OF 12
SSID = PCH L27 AF5 USB_PCH_PN1 36
3
3
DMI_TX_CPU_N0
DMI_TX_CPU_P0 N27
DMI_RXN0
DMI_RXP0
SPL PCH-H USB2N_1
USB2P_1 AG7 USB_PCH_PP1 36
USB3.0 Port 1 USB Charger
C27 AD5 USB_PCH_PN2 35
3
3
DMI_RX_CPU_N0
DMI_RX_CPU_P0 B27
DMI_TXN0
DMI_TXP0
USB2N_2
USB2P_2 AD7 USB_PCH_PP2 35
USB3.0 Port 2(USB2.0)
3 DMI_TX_CPU_N1 E24 DMI_RXN1 USB2N_3 AG8
3 DMI_TX_CPU_P1 G24 DMI_RXP1 USB2P_3 AG10
3 DMI_RX_CPU_N1 B28 DMI_TXN1 USB2N_4 AE1
3 DMI_RX_CPU_P1 A28 DMI_TXP1 DMI
USB2P_4 AE2 Port change 0224
3 DMI_TX_CPU_N2 G27 DMI_RXN2 USB2N_5 AC2
3 DMI_TX_CPU_P2 E26 DMI_RXP2 USB2P_5 AC3
B29 AF2 USB_PCH_PN6 66
3
3
DMI_RX_CPU_N2
DMI_RX_CPU_P2 C29
DMI_TXN2
DMI_TXP2
USB2N_6
USB2P_6 AF3 USB_PCH_PP6 66
USB2.0 (DB)
L29 AB3 USB_PCH_PN7 61,89
3
3
DMI_TX_CPU_N3
DMI_TX_CPU_P3 K29
DMI_RXN3
DMI_RXP3
USB 2.0
USB2N_7
USB2P_7 AB2 USB_PCH_PP7 61,89
Bluetooth
3 DMI_RX_CPU_N3 B30 DMI_TXN3 USB2N_8 AL8
3 DMI_RX_CPU_P3 A30 DMI_TXP3 USB2P_8 AL7
AA1 USB_PCH_PN9 38
PEG_RCOMPN_CPU B18 PCIE_RCOMPN
USB2N_9
USB2P_9 AA2 USB_PCH_PP9 38
CCD
1 2 PEG_RCOMPP_CPU C17 AJ8 USB_PCH_PN10 66
R1504 PCIE_RCOMPP USB2N_10
USB2P_10 AJ7 USB_PCH_PP10 66
Card reader
100R2F-L3-GP H15 W2
PCIE1_RXN/USB3_7_RXN USB2N_11
G15 PCIE1_RXP/USB3_7_RXP USB2P_11 W3
Delete WIGIG 0204 A16 PCIE1_TXN/USB3_7_TXN USB2N_12 AD3
C B16 AD2 C

PCIe/USB 3
PCIE1_TXP/USB3_7_TXP USB2P_12
B19 PCIE2_TXN/USB3_8_TXN USB2N_13 V2
C19 V1
WIGIG E17
PCIE2_TXP/USB3_8_TXP
PCIE2_RXN/USB3_8_RXN
USB2P_13
USB2N_14 AJ11
G17 PCIE2_RXP/USB3_8_RXP USB2P_14 AJ13
L17 3D3V_S5
61,89
PCIE_RX_PCH_N3 PCIE3_RXN/USB3_9_RXN
K17
WIFI 61,89
PCIE_RX_PCH_P3
61
PCIE_TX_PCH_N3 B20
PCIE3_RXP/USB3_9_RXP
PCIE3_TXN/USB3_9_TXN
R1510
C20 AD43 USB2_OC 1 10KR2F-L1-GP
2
61
PCIE_TX_PCH_P3 PCIE3_TXP/USB3_9_TXP GPP_E9/USB2_OC0#
31
PCIE_RX_PCH_N4 E20 PCIE4_RXN/USB3_10_RXN GPP_E10/USB2_OC1# AD42
G19 AD39 JJ 2015/01/27
LAN 31
PCIE_RX_PCH_P4
31
PCIE_TX_PCH_N4 B21
PCIE4_RXP/USB3_10_RXP
PCIE4_TXN/USB3_10_TXN
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3# AC44 RN1501
A21 Y43 USB2_VBUSSENSE 1 4
31
PCIE_TX_PCH_P4 PCIE4_TXP/USB3_10_TXP GPP_F15/USB2_OCB_4
K19 Y41 USB2_ID 2 3
JJ 20150129 71
PCIE_RX_PCH_N5 PCIE5_RXN GPP_F16/USB2_OCB_5
71
PCIE_RX_PCH_P5 L19 PCIE5_RXP GPP_F17/USB2_OCB_6 W44
C1503 1 2 TBT SCD22U10V1KX-GP PCIE_TX_PCH_N5 D22 W43 SRN1KJ-7-GP
71 PCIE_TX_CON_N5 PCIE5_TXN GPP_F18/USB2_OCB_7
C1504 1 2 TBT SCD22U10V1KX-GP PCIE_TX_PCH_P5 C22
71 PCIE_TX_CON_P5 PCIE5_TXP
G22 R1509
71 PCIE_RX_PCH_N6 PCIE6_RXN
E22 AG3 USBCOMP 1 113R2F-GP
2
71 PCIE_RX_PCH_P6 PCIE6_RXP USB2_COMP
C1505 1 2 TBT SCD22U10V1KX-GP PCIE_TX_PCH_N6 B22 AD10 USB2_VBUSSENSE
71 PCIE_TX_CON_N6 PCIE6_TXN USB2_VBUSSENSE
C1506 1 2 TBT SCD22U10V1KX-GP PCIE_TX_PCH_P6 A23 AB13
71 PCIE_TX_CON_P6 PCIE6_TXP RSVD_AB13
L22 AG2 USB2_ID
Alpine-Ridge 71 PCIE_RX_PCH_N7
71 PCIE_RX_PCH_P7 K22
PCIE7_RXN
PCIE7_RXP
USB2_ID
C1509 1 2 TBT SCD22U10V1KX-GP PCIE_TX_PCH_N7 C23
71 PCIE_TX_CON_N7
71 PCIE_TX_CON_P7
C1510 1 2 TBT SCD22U10V1KX-GP
71 PCIE_RX_PCH_N8
PCIE_TX_PCH_P7 B23
K24
PCIE7_TXN
PCIE7_TXP
BD14
USB Table
PCIE8_RXN GPD7/RSVD
71 PCIE_RX_PCH_P8 L24 PCIE8_RXP Pair Device
C1507 1 2 TBT SCD22U10V1KX-GP PCIE_TX_PCH_N8 C24
71 PCIE_TX_CON_N8 PCIE8_TXN
C1508 1 2 TBT SCD22U10V1KX-GP PCIE_TX_PCH_P8 B24 1
B 71 PCIE_TX_CON_P8 PCIE8_TXP USB3.0 Port 1(USB2.0) Charger B

2 USB3.0 Port 2(USB2.0)


ENG change 0416 SUNRISE-1-GP
3
4
5 USB2.0
6
7 Bluetooth
8 Touch Screen
9 CCD
10 Card reader
11 Finger Printer
12
13
14
<Core Design>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH_PCIE_DMI_USB
Size Document Number Rev
A3
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 15 of 105

5 4 3 2 1
5 4 3 2 1

SSID = PCH PCH1C 3 OF 12

AV2 CL_CLK PCIE9_RXN/SATA0A_RXN G31 SATA_RX_PCH_N0 63


AV3 SPL PCH-H H31
CL_DATA CLINK PCIE9_RXP/SATA0A_RXP SATA_RX_PCH_P0 63
AW2 CL_RST# PCIE9_TXN/SATA0A_TXN C31 SATA_TX_PCH_N0 63
PCIE9_TXP/SATA0A_TXP B31 SATA_TX_PCH_P0 63
R44 GPP_G8/FAN_PWM_0
R43
D U39
GPP_G9/FAN_PWM_1
G29 PCIE_RX_PCH_N10 63
MSATA D
GPP_G10/FAN_PWM_2 PCIE10_RXN/SATA1A_RXN
Delete WIGIG 0204 N42 GPP_G11/FAN_PWM_3 PCIE10_RXP/SATA1A_RXP E29 PCIE_RX_PCH_P10 63
PCIE10_TXN/SATA1A_TXN C32 PCIE_TX_PCH_N10 63
FAN
U43 GPP_G0/FAN_TACH_0 PCIE10_TXP/SATA1A_TXP B32 PCIE_TX_PCH_P10 63
change 0227 U42 GPP_G1/FAN_TACH_1
U41 GPP_G2/FAN_TACH_2 PCIE15_RXN/SATA2_RXN F41 SATA_RX_CPU_N2 60
24 EC_SCI# M44 GPP_G3/FAN_TACH_3 PCIE15_RXP/SATA2_RXP E41 SATA_RX_CPU_P2 60
U36 B39
38 FW_GPIO
P44
GPP_G4/FAN_TACH_4 PCIE15_TXN/SATA2_TXN
A39
SATA_TX_CPU_N2
SATA_TX_CPU_P2
60
60
HDD
GPP_G5/FAN_TACH_5 PCIE15_TXP/SATA2_TXP
T45 GPP_G6/FAN_TACH_6
T44 D43 SATA_RX_CPU_N3 60

PCIe/SATA
GPP_G7/FAN_TACH_7 PCIE16_RXN/SATA3_RXN
E42
63 PCIE_TX_PCH_P11 B33
PCIE16_RXP/SATA3_RXP
A41
SATA_RX_CPU_P3
SATA_TX_CPU_N3
60
60
ODD
PCIE11_TXP PCIE16_TXN/SATA3_TXN
63 PCIE_TX_PCH_N11 C33 PCIE11_TXN PCIE16_TXP/SATA3_TXP A40 SATA_TX_CPU_P3 60
K31
MSATA 63
63
PCIE_RX_PCH_P11
PCIE_RX_PCH_N11 L31
PCIE11_RXP
H42
PCIE11_RXN PCIE17_RXN/SATA4_RXN
PCIE17_RXP/SATA4_RXP H40
AB33 E45 3D3V_S0
GPP_F10/SCLOCK PCIE17_TXN/SATA4_TXN
AB35 GPP_F11/SLOAD PCIE17_TXP/SATA4_TXP F45
AA44 RN1601
C
GPP_F13/SDATAOUT0 SATAGP0
AA45 GPP_F12/SDATAOUT1 PCIE18_RXN/SATA5_RXN K37 1 4 C
G37 SATA_LED# 2 3
PCIE18_RXP/SATA5_RXP
B38 PCIE14_TXN/SATA1B_TXN PCIE18_TXN/SATA5_TXN G45
C38 G44 SRN10KJ-L-GP
PCIE14_TXP/SATA1B_TXP PCIE18_TXP/SATA5_TXP
D39 PCIE14_RXN/SATA1B_RXN
E37 AD44 SATA_LED#
PCIE14_RXP/SATA1B_RXP GPP_E8/SATALED#
C36 PCIE13_TXN/SATA0B_TXN GPP_E0/SATAXPCIE0/SATAGP0 AG36 SATAGP0 63
B36 PCIE13_TXP/SATA0B_TXP GPP_E1/SATAXPCIE1/SATAGP1 AG35
G35 PCIE13_RXN/SATA0B_RXN GPP_E2/SATAXPCIE2/SATAGP2 AG39
E35 PCIE13_RXP/SATA0B_RXP GPP_F0/SATAXPCIE3/SATAGP3 AD35
GPP_F1/SATAXPCIE4/SATAGP4 AD31
63 PCIE_TX_PCH_P12 A35 PCIE12_TXP GPP_F2/SATAXPCIE5/SATAGP5 AD38
B35 AC43
MSATA 63
63
PCIE_TX_PCH_N12
PCIE_RX_PCH_P12 H33
PCIE12_TXN GPP_F3/SATAXPCIE6/SATAGP6
AB44
PCIE12_RXP GPP_F4/SATAXPCIE7/SATAGP7
63 PCIE_RX_PCH_N12 G33 PCIE12_RXN
GPP_F21/EDP_BKLTCTL W36 eDP_BLCTRL_CPU 55
J45 W35 eDP_BLEN_CPU 24
K44
PCIE20_TXP
PCIE20_TXN
GPP_F20/EDP_BKLTEN
GPP_F19/EDP_VDDEN W42 eDP_VDDEN_CPU 55
eDP
N38 PCIE20_RXP HOST
B UN 0225 N39 AJ3 PCH_THERMTRIP# B
PCIE20_RXN THERMTRIP#
H44 PCIE19_TXP PECI AL3 PCH_PECI 6
H43 AJ4 H_PM_SYNC_R 2 R1603 1 30R2J-1-GP
PCIE19_TXN PM_SYNC H_PM_SYNC 6
L39 PCIE19_RXP PLTRST_CPU# AK2 PLTRST# 6
L37 PCIE19_RXN PM_DOWN AH2 H_PM_DOWN 6
SUNRISE-1-GP
change 0227 RN1602
eDP_BLEN_CPU 1 4
1V_VCCST eDP_BLCTRL_CPU 2 3
CHECK NEED PULL HIGH? 3D3V_S0 SRN100KJ-6-GP
1

R1601 EC_SCI# 2 R1604 1


1KR2F-L1-GP <Core Design>
10KR2F-L1-GP
2

A
Wistron Corporation A
PCH_THERMTRIP# 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2 R1602 1 H_THERMTRIP# 6

Dr-Bios.com
620R2F-GP Taipei Hsien 221, Taiwan, R.O.C.

AROUND PCH Title


PCH_PCIE_SATA
Size Document Number Rev
A4
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 16 of 105
5 4 3 2 1
5 4 3 2 1

1D2V_S3
SSID = PCH RN1708

1
SRN33J-5-GP-U
1 4 HDA_BITCLK_CPU R1702
27 HDA_BITCLK_CODEC
2 3 AUD_AZAPCH_SCLK 470R2F-GP
3 AUD_AZACPU_SCLK

2
SM_DRAMRST# 1 R1705 2 0R0402-PAD DDR4_DRAMRST# 12,13

PD change 0622
D 1 R1713 2 0R0402-PAD HDA_SDOUT_CPU D
27 HDA_SDOUT_CODEC
3D3V_S5
PD change 0622
JJ 20150127
3D3V_RTC_AUX RTC Reset PD change 0622 DY
PCH1D 4 OF 12 EXT_PWR_GATE# 2 1
PD change 0622 20KR2J-L2-GP R1734
RN1705
1 4 RTC_RST# HDA_BITCLK_CPU BA9 BB17 GC6_FB_EN_MCP 2 R1706 1
HDA_BCLK GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF# GC6_FB_EN 79,86
2 3 27,28 HDA_RST#_CODEC 1 R1711 2 0R0402-PAD HDA_RST#_CPU BD8 SPL PCH-H AW22 0R0402-PAD
PM_CLKRUN#_EC 24,91
HDA_RST# GPP_A8/CLKRUN#
27 HDA_SDIN0_CPU BE7
SRN20KJ-1-GP HDA_SDI0 3D3V_S0
BC8 AR15
2

R1727 HDA_SDI1 GPD11/LANPHYPC


1

C1701 G1701 1 1KR2F-L1-GP


2 HDA_SDOUT_CPU BB7 AV13 RN1703
24 ME_UNLOCK HDA_SDO GPD9/SLP_WLAN#
1 R1712 2 0R0402-PAD HDA_SYNC_CPU PM_CLKRUN#_EC
SC1U6D3V3KX-2GP

GAP-OPEN BD9 Strap 1 4


27 HDA_SYNC_CODEC HDA_SYNC
BC14 SM_DRAMRST# SYS_RESET# 2 3
2

DRAM_RESET#
PD change 0622 BD1 BD23
1

RSVD_BD1 GPP_B2/VRALERT# DGPU_PWROK 24,85,86


BE2 AL27 SRN10KJ-L-GP
RSVD_BE2 GPP_B1
AUDIO GPP_B0
AR27 JJ 20150130 3D3V_S5
1 R1714 AUD_AZAPCH_SDO
2 0R0402-PAD AM1 N44
3 AUD_AZACPU_SDO DISPA_SDO GPP_G17/ADR_COMPLETE
AN2 AN24 EXT_PWR_GATE#
3 AUD_AZACPU_SDI AUD_AZAPCH_SCLK DISPA_SDI GPP_B11
AM2 AY1 SYS_PWROK 24
DISPA_BCLK SYS_PWROK
PD change 0622 AL42
GPP_D8/SSP0_SCLK WAKE#
BC13 PCIE_WAKE# 31,61,63,71 JJ 20150130
AN42 BC15
SRTC_RST# GPP_D7/SSP0_RXD GPD6/SLP_A#
AM43 AV15
GPP_D6/SSP0_TXD SLP_LAN#
AJ33 BC26
GPP_D5/SSP0_SFRM GPP_B12/SLP_S0# RN1704
38 DMIC_PCH_DATA AH44 AW15 PM_SLP_S3# 24,40,53,71
DMIC_PCH_CLK AJ35 GPP_D20/DMIC_DATA0 GPD4/SLP_S3# AC_PRESENT
38 DMIC_CLK_CON_R 1 R1704 2 BD15 PM_SLP_S4# 24,40,51 8 1
1

C1703 33R2F-L-GP GPP_D19/DMIC_CLK0 GPD5/SLP_S4# PCIE_WAKE#


AJ38 BA13 7 2
GPP_D18/DMIC_DATA1 GPD10/SLP_S5# BATLOW#
SC1U6D3V3KX-2GP

AJ42 6 3
GPP_D17/DMIC_CLK1 PM_SUSACK#
AN15 5 4
2

GPD8/SUSCLK SUS_CLK_CPU 63
BD13 BATLOW#
GPD0/BATLOW# PM_SUSACK# SRN10KJ-6-GP
BB19
GPP_A15/SUSACK#
BC10
RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK
BD19 ENG change 0417
BB10
SRTCRST#
AW11 BD11 GPD2/LAN_WAKE# RN1706
40 PCH_PWROK PM_RSMRST# PCH_PWROK GPD2/LAN_WAKE# GPD2/LAN_WAKE#
change 0226 SWAP 0303 BA11
RSMRST# GPD1/ACPRESENT
BB15 AC_PRESENT 24 1 4
BB13 PM_PWRBTN# 2 3
SLP_SUS#
C AV11 AT13 PM_PWRBTN# 24,89
C
3D3V_S5 DSW_PWROK GPD3/PWRBTN# SYS_RESET# SRN10KJ-L-GP
22 GPP_C2 BB41 AW1
SMB_CLK GPP_C2/SMBALERT# SYS_RESET#
AW44 Strap BD26 ENG SUS_CLK_CPU delete 0421

SMBUS
GPP_C0/SMBCLK GPP_B14/SPKR HDA_SPKR 27
delete 0225 SMB_DATA BB43 Strap AM3
DM1 & 2 BA40
GPP_C1/SMBDATA PROCPWRGD H_PWRGD 6,89
GPP_C5/SML0ALERT#
AY44
GPP_C3/SML0CLK
Strap ITP_PMODE
AT2 ITP_PMODE 99
G-SENSOR BB39 AR3 PROC_JTAGX_TCK 6
GPP_C4/SML0DATA JTAGX
22 GPP_B23 AT27 JTAG AR2 PROC_JTAG_TMS 6,99
GPP_B23/SML1ALERT#/PCHHOT# JTAG_TMS
24,73,79 SML1_CLK AW42
GPP_C6/SML1CLK
Strap JTAG_TDO
AP1 PROC_JTAG_TDO 6,99
RN1707 AW45 AP2
24,73,79 SML1_DATA GPP_C7/SML1DATA JTAG_TDI PROC_JTAG_TDI 6,99
8 1 SML1_CLK AN3
JTAG_TCK H_TCK 99 1V_VCCST
7 2 SMB_DATA
6 3 SMB_CLK
5 4 SML1_DATA SUNRISE-1-GP R1715
PROC_JTAG_TDO 1 51R2J-L1-GP
2
SRN2K2J-4-GP DY
RTC_RST#
3D3V_AUX_S5
EC & GPU R1728
1 100KR2F-L3-GP
2

D
Q1703
2

3D3V_S0 2N7002K-2-GP
RN1702 R1729
SRN2K2J-1-GP 10KR2F-L1-GP
84.2N702.J31
1 4 Q1702 R1731 For AFR 2ND = 84.2N702.031
2 3 4 3 PM_RSMRST# 2 1KR2F-L1-GP
1 3rd = 84.2N702.W31
RSMRST#_KBC 24
1

S
3V_5V_POK_# 5 2 3V_5V_POK_C 1 R1732 2 0R0402-PAD 3V_5V_POK 45,52
6 1 PD change 0622
Q1701
SMB_DATA 24 RTCRST_ON
6 1 2N7002KDW-GP
PCH_SMBDATA 12,13,69
84.2N702.A3F RTC_RST#_R
5 2 2nd = 75.00601.07C
3rd = 075.01660.007C

1
4 3 R1733
PM_RSMRST# 2 10KR2F-L1-GP
1
2N7002KDW-GP R1701 R1703
B 84.2N702.A3F 100KR2F-L3-GP 2K2R2J-L1-GP B
2nd = 75.00601.07C

2
PCH_SMBCLK 12,13,69
3rd = 075.01660.007C
SMB_CLK

UN 0225

A A

Wistron Confidential document, Anyone can not

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Duplicate, Modify, Forward or any other purpose
<Core Design> application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH_HDA_GPP1_JTAG
Size Document Number Rev
A2
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 17 of 105
5 4 3 2 1
5 4 3 2 1

SSID = PCH

GPIO REVIEW CHECK


PCH1F 6 OF 12
C11 USB3_1_TXN
B11 AT22

LPC/eSPI
USB3_1_TXP SPL PCH-H GPP_A1/LAD0/ESPI_IO0 LPC_AD_CPU_P0 24,68,91
B7 USB3_1_RXN GPP_A2/LAD1/ESPI_IO1 AV22 LPC_AD_CPU_P1 24,68,91
A7 USB3_1_RXP GPP_A3/LAD2/ESPI_IO2 AT19 LPC_AD_CPU_P2 24,68,91
D
GPP_A4/LAD3/ESPI_IO3 BD16 LPC_AD_CPU_P3 24,68,91 D
B12 3D3V_S0
35 USB30_TX_CPU_N2 USB3_2_TXN/SSIC_1_TXN
35 USB30_TX_CPU_P2 A12 USB3_2_TXP/SSIC_1_TXP GPP_A5/LFRAME#/ESPI_CS# BE16 LPC_FRAME#_CPU 24,68,91
35 USB30_RX_CPU_N2 C8 USB3_2_RXN/SSIC_1_RXN GPP_A6/SERIRQ BA17 INT_SERIRQ 24,91
B8 AW17 PIRQA# RN1806
35 USB30_RX_CPU_P2 USB3_2_RXP/SSIC_1_RXP GPP_A7/PIRQA#/ESPI_ALERT0#
AT17 INT_SERIRQ 1 4
GPP_A0/RCIN#/ESPI_ALERT1# H_RCIN# 24
B15 BC18 H_RCIN# 2 3
35 USB30_TX_CPU_N1 USB3_6_TXN GPP_A14/SUS_STAT#/ESPI_RESET# PM_SUS_STAT# 91
MP change 0807 35 USB30_TX_CPU_P1 C15 USB3_6_TXP
K15 SRN10KJ-5-GP
(not change net name) 35 USB30_RX_CPU_N1 USB3_6_RXN

USB
K13 BC17 LPC_CLK_CPU_P0
35 USB30_RX_CPU_P1 USB3_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK
AV19 LPC_CLK_CPU_P1 delete 0227 ENG change 0416
GPP_A10/CLKOUT_LPC1
38 USB30_TX_CPU_N5 B14 USB3_5_TXN
38 USB30_TX_CPU_P5 C14 USB3_5_TXP GPP_G19/SMI# M45
38 USB30_RX_CPU_N5 G13 USB3_5_RXN GPP_G18/NMI# N43
38 USB30_RX_CPU_P5 H13 USB3_5_RXP 2 R1809 122R2J-L1-GP LPC_CLK_KBC 24
LPC_CLK_CPU_P0 2 R1810 122R2J-L1-GP LPC_CLK_DBG 68
D13 USB3_3_TXP/SSIC_2_TXP GPP_E6/DEVSLP2 AE45 GPIO REVIEW CHECK
C13 USB3_3_TXN/SSIC_2_TXN GPP_E5/DEVSLP1 AG43
3D3V_S0 A9 AG42
USB3_3_RXP/SSIC_2_RXP GPP_E4/DEVSLP0 DEVSLP_PCH 63
B10 AB39 R1805
USB3_3_RXN/SSIC_2_RXN GPP_F9/DEVSLP7 LPC_CLK_CPU_P1
AB36 2 22R2J-L1-GP
1

SATA
GPP_F8/DEVSLP6 LPC_CLK_TPM 91
B13 USB3_4_TXP GPP_F7/DEVSLP5 AB43
1 R1801 2 PIRQA# A14 USB3_4_TXN GPP_F6/DEVSLP4 AB42 TPM
10KR2F-L1-GP G11 AB41
USB3_4_RXP GPP_F5/DEVSLP3
E11
DY USB3_4_RXN
SUNRISE-1-GP

3D3V_S0
C C
RN1802
1 8 W LAN_CLKREQ_CPU# PEG CLOCK CHECK WITH SW
2 7 LAN_CLKREQ_CPU#
3 6 MSATA_CLKREQ_CPU# PCH1G 7 OF 12
4 5 AR17 GPP_A16/CLKOUT_48 CHECK P and N
SPL PCH-H L1
SRN10KJ-6-GP CLKOUT_ITPXDP#
6 PCH_CPU_NSSC_CLK_DP G1 CLKOUT_CPUNSSC_P CLKOUT_ITPXDP_P L2
6 PCH_CPU_NSSC_CLK_DN F1 CLKOUT_CPUNSSC#
CLKOUT_CPUPCIBCLK# J1 PCH_CPU_PCIBCLK_R_DN 6
RN1805 G2 J2
6 PCH_CPU_BCLK_DP CLKOUT_CPUBCLK_P CLKOUT_CPUPCIBCLK_P PCH_CPU_PCIBCLK_R_DP 6
1 4 PEG_CLKREQ_CPU# H2
6 PCH_CPU_BCLK_DN CLKOUT_CPUBCLK#
2 3 TBT_CLKREQ_CPU#
CPU_XTAL_24M_OUT A5 N7
1D0V_S5 XTAL24_OUT CLKOUT_PCIE_N0 PEG_CLK_CPU# 76
SRN10KJ-L-GP CPU_XTAL_24M_IN A6 N8
XTAL24_IN CLKOUT_PCIE_P0 PEG_CLK_CPU 76
R1806
2 2K7R2F-GP
1 XCLK_BIASREF E1 XCLK_BIASREF CLKOUT_PCIE_N1 L7
CHECK WITH SW( VGA) CLKOUT_PCIE_P1 L5 Delete WIGIG 0204
POWER modify 0223 SWAP 0303 XTL_32K_X1_CPU BC9
XTL_32K_X2_CPU RTCX1
BD10 RTCX2 CLKOUT_PCIE_N2 D3 W LAN_CLK_CPU# 61,89
CLKOUT_PCIE_P2 F2 W LAN_CLK_CPU 61,89
76 PEG_CLKREQ_CPU# BC24 GPP_B5/SRCCLKREQ0#
AW24 GPP_B6/SRCCLKREQ1# CLKOUT_PCIE_N3 E5 LAN_CLK_CPU# 31
61,89 W LAN_CLKREQ_CPU# AT24 GPP_B7/SRCCLKREQ2# CLKOUT_PCIE_P3 G4 LAN_CLK_CPU 31
C1803 BD25
31 LAN_CLKREQ_CPU# GPP_B8/SRCCLKREQ3#
2 1 SC15P50V2JN-2-GP CPU_XTAL_24M_IN
71 TBT_CLKREQ_CPU# BB24 GPP_B9/SRCCLKREQ4# CLKOUT_PCIE_N4 D5 TBT_CLK_CPU# 71
BE25 GPP_B10/SRCCLKREQ5# CLKOUT_PCIE_P4 E6 TBT_CLK_CPU 71
AT33 GPP_H0/SRCCLKREQ6#
X1802 AR31 D8
B GPP_H1/SRCCLKREQ7# CLKOUT_PCIE_N5 B
63 MSATA_CLKREQ_CPU# BD32 GPP_H2/SRCCLKREQ8# CLKOUT_PCIE_P5 D7
INPUT/OUTPUT#1 1 BC32 GPP_H3/SRCCLKREQ9#
1

NC#2 2 BB31 GPP_H4/SRCCLKREQ10# CLKOUT_PCIE_N6 R8


3 R1808 BC33 R7
INPUT/OUTPUT#3 1MR2F-L-GP GPP_H5/SRCCLKREQ11# CLKOUT_PCIE_P6
BA33 GPP_H6/SRCCLKREQ12#
XTL_32K_X1_CPU AW33 U5
XTAL-24MHZ-135-GP GPP_H7/SRCCLKREQ13# CLKOUT_PCIE_N7
BB33 U7
2

GPP_H8/SRCCLKREQ14# CLKOUT_PCIE_P7
082.30006.0041 BD33 GPP_H9/SRCCLKREQ15#
CLKOUT_PCIE_N8 W10 MSATA_CLK_CPU# 63
C1804 R1807 R13 W11
CLKOUT_PCIE_N15 CLKOUT_PCIE_P8 MSATA_CLK_CPU 63
2 1 SC15P50V2JN-2-GP CPU_XTAL_24M_OUT 1 10MR2J-L-GP
2 XTL_32K_X2_CPU R11 CLKOUT_PCIE_P15
CLKOUT_PCIE_N9 N3
ENG change 0417 P1 CLKOUT_PCIE_N14 CLKOUT_PCIE_P9 N2
X1801 R2 CLKOUT_PCIE_P14
CLKOUT_PCIE_N10 P3
1 4 W7 CLKOUT_PCIE_N13 CLKOUT_PCIE_P10 P2
Y5 CLKOUT_PCIE_P13
CLKOUT_PCIE_N11 R3
1

C1802 U2 R4
CLKOUT_PCIE_N12 CLKOUT_PCIE_P11
1

C1801 2 3 U3 CLKOUT_PCIE_P12
SC4D7P50V2BN-GP
2
SC4D7P50V2BN-GP
2

SUNRISE-1-GP
XTAL-32D768KHZ-6-GP

82.30001.B21

A <Core Design> A

Dr-Bios.com
ENG 0412 change Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH_USB3_CLOCK
Size Document Number Rev
A3 Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 18 of 105
5 4 3 2 1
5 4 3 2 1

SSID = PCH

PCH1E 5 OF 12
SPL PCH-H
Delete 0225
GPP_I7/DDPC_CTRLCLK BB3
D 71 DDI1_TBT_HPD_CPU AW4 GPP_I0/DDPB_HPD0
Strap GPP_I8/DDPC_CTRLDATA BD6 DDI2_TBT_DATA_CPU 22 D
71 DDI2_TBT_HPD_CPU AY2 GPP_I1/DDPC_HPD1 GPP_I5/DDPB_CTRLCLK BA5 DDI1_TBT_CLK_CPU 71
AV4 Strap BC4 DDI1_TBT_DATA_CPU 71
GPP_I2/DDPD_HPD2 GPP_I6/DDPB_CTRLDATA
BA4 GPP_I3/DDPE_HPD3 GPP_I9/DDPD_CTRLCLK BE5
Strap BE6 DDPD_DATA_CPU 22
GPP_I10/DDPD_CTRLDATA

GPP_F14 Y44
GPP_F23 V44
GPP_F22 W39
55 eDP_HPD_CPU BD7 GPP_I4/EDP_HPD
GPP_G23 L43
GPP_G22 L44
GPP_G21 U35
1 R1904 2 DGPU_PW R_EN#
GPP_G20 R35
10KR2F-L1-GP BD36
GPP_H23 3D3V_S0
JJ 20150127 JJ 20150130
PSW _CLR# SUNRISE-1-GP
PSW _CLR# 1 R1906 2
2

Pass Word Clear 10KR2F-L1-GP


3D3V_S5
G1901
GAP-OPEN
RN1904
1 4 RTC_DET#
1

2 3 GPU_EVENT#

SRN10KJ-L-GP
PCH1K 11 OF 12
C AT29 C
3D3V_S0 22 GPP_B22/GSPI1_MOSI GPP_B22/GSPI1_MOSI
86 DGPU_PW R_EN# AR29 StrapSPL PCH-H AL44
PSW _CLR# GPP_B21/GSPI1_MISO GPP_D9
AV29 GPP_B20/GSPI1_CLK GPP_D10 AL36
RN1901 25 RTC_DET# BC27 AL35
I2C1_CLK_CPU GPP_B19/GSPI1_CS# GPP_D11
3 2 GPP_D12 AJ39
4 1 I2C1_DATA_CPU BD28 CHECK NEED PULL HIGH?
22 GPP_B18/GSPI0_MOSI GPP_B18/GSPI0_MOSI
79 GPU_EVENT# BD27 GPP_B17/GSPI0_MISO
Strap GPP_D16/ISH_UART0_CTS# AJ43 LAB 做做做
SRN2K2J-5-GP 38 CCD_PW R_EN AW27 AL43
GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS#
Royee 20150202 AR24 GPP_B15/GSPI0_CS# GPP_D14/ISH_UART0_TXD AK44
ENG change 0412 GPP_D13/ISH_UART0_RXD AK45
AV44 GPP_C9/UART0_TXD JJ 20150130
BA41 GPP_C8/UART0_RXD
AU44 GPP_C11/UART0_CTS#
AV43 GPP_C10/UART0_RTS#
AU41 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H20/ISH_I2C0_SCL BC38
AT44 GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_H19/ISH_I2C0_SDA BB38
ENG change 0427 AT43 GPP_C13/UART1_TXD/ISH_UART1_TXD
AU43 GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL BD38
GPP_H21/ISH_I2C1_SDA BE39
LPSS_UART2_CTS# AN43
LPSS_UART2_RTS# GPP_C23/UART2_CTS#
AN44 GPP_C22/UART2_RTS#
LPSS_UART2_TXD AR39
LPSS_UART2_RXD GPP_C21/UART2_TXD
AR45 GPP_C20/UART2_RXD GPP_A23/ISH_GP5 BC22
BD18 3D3V_S5
GPP_A22/ISH_GP4
AR41 BE21
TOUCH PAD 65 I2C1_CLK_CPU
65 I2C1_DATA_CPU AR44
GPP_C19/I2C1_SCL
GPP_C18/I2C1_SDA
GPP_A21/ISH_GP3
GPP_A20/ISH_GP2 BD22

2
AR38 GPP_C17/I2C0_SCL GPP_A19/ISH_GP1 BD21
AT42 BB22 R1908
B GPP_C16/I2C0_SDA GPP_A18/ISH_GP0 GSENSOR_INT# 69 B
BC19 TBT_PRESENT# 10KR2J-3-GP
GPP_A17/ISH_GP7
AM44 GPP_D4/ISH_I2C2_SDA DY
AJ44

1
GPP_D23/ISH_I2C2_SCL
JJ 20150130
TBT_PRESENT#
SUNRISE-1-GP

ENG change 0412

2
R1907
3D3V_S0 10KR2J-3-GP
TBT

1
R1903 1 2 49K9R2F-L-GP DEBUG LPSS_UART2_CTS#
R1909 1 2 49K9R2F-L-GP DEBUG LPSS_UART2_RTS#
R1910 1 2 49K9R2F-L-GP DEBUG LPSS_UART2_TXD
R1911 1 2 49K9R2F-L-GP DEBUG LPSS_UART2_RXD

ENG change 0412

5V_S5
5

DEBUG2
DEBUG
1

LPSS_UART2_TXD 2 20.F1897.004
A LPSS_UART2_RXD 3 <Core Design> A
4

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Wistron Corporation
6

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


ACES-CON4-37-GP Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH_GPP2_GPP3
Size Document Number Rev
A3
ENG change property 0505 Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 19 of 105
5 4 3 2 1
5 4 3 2 1

SSID = PCH

1D0V_S5
1D0V_S5

D PCH1H 8 OF 12 3D3V_S5 D

AA23 VCCPRIM_1P0_AA23
AA26 SPL PCH-H
VCCPRIM_1P0_AA26
AA28 VCCPRIM_1P0_AA28 VCCPRIM_1P0_AL22 AL22

CORE
AC23 VCCPRIM_1P0_AC23
AC26 VCCPRIM_1P0_AC26 VCCDSW_3P3_BA24 BA24
AC28 VCCPRIM_1P0_AC28 VCCPGPPA BA31

VCCGPIO
1V_DCPDSW AE23 VCCPRIM_1P0_AE23
AE26 VCCPRIM_1P0_AE26 VCCPGPPBH_BC42 BC42
Y23 VCCPRIM_1P0_Y23 VCCPGPPBH_BD40 BD40
Y25 VCCPRIM_1P0_Y25 VCCPGPPEF_AJ41 AJ41
1D0V_S5 BA29 AL41
DCPDSW_1P0 VCCPGPPEF_AL41
VCCPGPPG AD41
N17 VCCCLK1 VCCPRIM_3P3_AN5 AN5
R19 1D0V_S5
VCCCLK3 3D3V_S0
U20 VCCCLK4
V17 AD15 3D3V_S5
VCCCLK2 VCCPRIM_1P0_AD15 3D3V_RTC_AUX
R17 VCCCLK6 VCCATS AD13
BA20 DCPRTC
C
VCCRTCPRIM_3P3
K2 VCCCLK5_K2 VCCRTC BA22 C
K3 BA26 1D0V_S5
VCCCLK5_K3 DCPRTC
U21 VCCMPHY_1P0_U21 VCCPRIM_1P0_AJ20 AJ20

MPHY
U23 VCCMPHY_1P0_U23 VCCPRIM_1P0_AJ21 AJ21
U25 VCCMPHY_1P0_U25 VCCPRIM_1P0_AJ23 AJ23
U26 VCCMPHY_1P0_U26 VCCPRIM_1P0_AJ25 AJ25
V26 3D3V_S5
VCCMPHY_1P0_V26
A43 VCCMPHYPLL_1P0_A43
B43 VCCMPHYPLL_1P0_B43 VCCSPI_BE41 BE41
C44 VCCPCIE3PLL_1P0_C44 VCCSPI_BE43 BE43
C45 BE42 3D3V_S5
VCCPCIE3PLL_1P0_C45 VCCSPI_BE42
V28 VCCAPLLEBB_1P0 VCCPGPPCD_BC44 BC44
USB

AC17 VCCPRIM_1P0_AC17 VCCPGPPCD_BA45 BA45


AJ5 VCCUSB2PLL_1P0_AJ5 VCCPGPPCD_BC45 BC45
AL5 VCCUSB2PLL_1P0_AL5 VCCPGPPCD_BB45 BB45
3D3V_S5 AN19 VCCHDAPLL_1P0
VCCPRIM_3P3_BD3 BD3
BA15 VCCHDA VCCPRIM_3P3_BE3 BE3
B
VCCPRIM_3P3_BE4 BE4 B
W15 VCCDSW_3P3_W15
SUNRISE-1-GP

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCH_POWER_VCCPRIM_VCCMPHY
Size Document Number Rev
A4
Newgate 1M
Date: Wednesday, August 12, 2015 Sheet 20 of 105
5 4 3 2 1
5 4 3 2 1

SSID = PCH

DcpDSW VccRTC VccRTCPRIM DcpRTC


D D
1x 1uF 1x1 uF 1x0.1 uF 1x1 uF 1x0.1 uF 1x 0.1uF
1V_DCPDSW 3D3V_RTC_AUX 3D3V_S5 DCPRTC
1

1
C2101 C2106 C2107 C2108 C2109 C2111
SC1U10V2KX-1GP

SCD1U16V2KX-3GP

SC1U10V2KX-1GP

SCD1U16V2KX-3GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
2

2
near BA29 near BA22 near BA20 near BA26
C C

VccMPHYPLL / VccPCIE3PLL VccATS VccMPHY / VccPRIM / VccAPLLEBB VccDSW


1x1 uF 1x1 uF 1x1 uF 1x22 uF 1x 1uF
1D0V_S5 3D3V_S5
3D3V_S0 1D0V_S5
1

1
C2102 C2103 C2112
1

1
SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
DY C2110 C2104 C2105 DY
SC1U10V2KX-1GP
2

2
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC22U6D3V5MX-2GP
2

2
B B
near K2 near A43 near W15
near AD13 near U21

VccPGPPBCH / VccPGPPEF / VccPGPPG


/ VccPRIM
4x 0.1 uF
Wistron Confidential document, Anyone can not
3D3V_S5 Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

<Core Design>
1

C2113 C2114 C2115 C2116


SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

A
DY DY DY DY Wistron Corporation A
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCH_POWER_CAP1
Size Document Number Rev
near BC42 near AJ41 near AD41 near AN5
A4 Newgate 1M
Date: Wednesday, August 12, 2015 Sheet 21 of 105
5 4 3 2 1
5 4 3 2 1

SSID = PCH

Display Port Display Port Display Port Boot BIOS Flash descriptor
Description No reboot ESPI FLASH SHARING MODE
D B Detected C Detected D Detected strap bit BBS security override D

GPIO GPP_I6 GPP_I8 GPP_I10 GPP_B18 GPP_B22 HDA_SDO GPP_H12


change 0225
3D3V_S0 3D3V_S0 3D3V_S5
Pull up at p.71 3D3V_S0
RN7101

1
2
R2201 R2202 R2203
R2208 2K2R2J-L1-GP 4K7R2J-L-GP 4K7R2J-L-GP
Schematic 2K2R2J-L1-GP DY DY DY

2
1
DDPD_DATA_CPU 19 GPP_B18/GSPI0_MOSI 19 GPP_B22/GSPI1_MOSI 19
DDI2_TBT_DATA_CPU 19

1:SLAVE ATTACEHD FLASH SHARING


High Detected Detected Detected Enable LPC Disable
ESPI FLASH SHARING MODE

Low Not Detected Not Detected Not Detected Disable SPI Enable 0: MASTER ATTACHED FLASH SHARING

C C

internal pull-down internal pull-down internal pull-down internal pull-down internal pull-down internal pull-down internal pull-down

Top Swap TLS Confi-


Description eSPI or LPC Reserved Reserved Reserved Reserved Reserved
Override dentiality

GPIO GPP_B14 GPP_C5 GPP_C2 SPI0_IO3 SPI0_IO2 SPI0_MOSI SPI0_MISO GPP_B23

3D3V_S5 3D3V_S5 3D3V_S5 3D3V_S5

3D3V_S5
modify 0227
PD change 0703
1

1
R2204 R2205 R2206 R2207
Schematic 4K7R2J-L-GP 20KR2F-L-GP 20KR2F-L-GP 4K7R2J-L-GP
DY RN2201 DY DY DY
1 4
2

2
B SPI_IO3_ROM 14,25 B
2 3 SPI_IO2_ROM 14,25
SRN1KJ-7-GP

GPP_C2 17 SPI_SI_CPU 14 SPI_SO_CPU 14 GPP_B23 17

High Enable eSPI Enable

Low Disable LPC Disable

internal pull-down internal pull-down internal pull-down internal pull-up internal pull-up internal pull-up internal pull-up internal pull-down

A A

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose

Dr-Bios.com
<Core Design> application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCH_STRAP
Size Document Number Rev
A2 Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 22 of 105

5 4 3 2 1
5 4 3 2 1

SSID = PCH
PCH1I 9 OF 12 PCH1L 12 OF 12

SPL PCH-H SPL PCH-H


AC18 VSS VSS AR5 C42 VSS VSS AB11
AN4 VSS VSS AR7 D10 VSS VSS AB7
AN10 VSS VSS U15 D12 VSS VSS AB14
D D
BE14 VSS VSS AL4 D15 VSS VSS AB31
BE18 VSS VSS AE29 D16 VSS VSS AB32
BE23 VSS VSS AE4 D17 VSS VSS AB38
BE28 VSS VSS AE42 D19 VSS VSS AB4
BE32 VSS VSS AF18 D21 VSS VSS AB5
BE37 VSS VSS AF20 D24 VSS VSS AC1
BE40 VSS VSS AF21 D25 VSS VSS AC20
BE9 VSS VSS AF23 D27 VSS VSS AC21
C10 VSS VSS AF25 D29 VSS VSS AC25
C2 VSS VSS AF26 D30 VSS VSS AC29
C28 VSS VSS AF28 D31 VSS VSS AC45
C37 VSS VSS AF29 D33 VSS VSS AB8
J7 VSS VSS AG11 D35 VSS VSS AD11
K10 VSS VSS AG13 D36 VSS VSS AD14
K27 VSS VSS AG31 E13 VSS VSS AB15
K33 VSS VSS AG32 E15 VSS VSS AD32
K36 AG33 E31 AD33 PCH1J 10 OF 12
VSS VSS VSS VSS
K4 VSS VSS AG38 E33 VSS VSS AD36
K42 AG4 F44 AD4 SPL PCH-H
VSS VSS VSS VSS
K43 VSS VSS AH1 F8 VSS VSS AD8 RSVD_AR22 AR22
L12 VSS VSS AH17 G42 VSS VSS AE18 BD2 VSS_BD2 RSVD_W13 W13
L13 VSS VSS AH18 G9 VSS VSS AE20 BD45 VSS_BD45 RSVD_U13 U13
L15 VSS VSS AH20 H17 VSS VSS AE21 BD44 VSS_BD44
C L4 VSS VSS AH21 H19 VSS VSS AE25 BE44 VSS_BE44 RSVD_P31 P31 C
L41 VSS VSS AH23 H22 VSS VSS AE28 D45 VSS_D45 RSVD_N31 N31
L8 VSS VSS AH25 H24 VSS VSS AL10 A42 VSS_A42
M35 VSS VSS AH26 H27 VSS VSS AL11 B45 VSS_B45 RSVD_P27 P27
M42 VSS VSS AH28 H29 VSS VSS AL13 B44 VSS_B44 RSVD_R27 R27
N10 VSS VSS AH29 H3 VSS VSS AL17 A4 VSS_A4 RSVD_N29 N29
N15 VSS VSS AH45 H35 VSS VSS AL19 A3 VSS_A3 RSVD_P29 P29
N19 VSS VSS AJ10 J10 VSS VSS AL24 B2 VSS_B2 RSVD_AN29 AN29
N22 VSS VSS AJ14 J11 VSS VSS AL29 A2 VSS_A2 RSVD_R24 R24
N24 VSS VSS AJ15 J3 VSS VSS AL32 B1 VSS_B1 RSVD_P24 P24
N35 VSS VSS AJ17 J39 VSS VSS AL33 BB1 VSS_BB1
N36 VSS VSS AJ18 J5 VSS VSS AL38 BC1 VSS_BC1 PREQ# AT3 XDP_PREQ# 6,99
N4 VSS VSS AJ26 T42 VSS VSS AM15 A44 VSS_A44 PRDY# AT4 XDP_PRDY# 6,99
N41 VSS VSS AJ28 U10 VSS VSS AM17 CPU_TRST# AY5 PROC_TRST# 6,99
N5 VSS VSS AJ29 U11 VSS VSS AM19 C1 RSVD_C1 PCH_TRIGOUT AL2 PCH_2_CPU_TRIGGER_R 2 R2301 1 PCH_2_CPU_TRIGGER 8
P17 AJ31 U14 AM22 D1 AK1 30R2J-1-GP CPU_2_PCH_TRIGGER 8
VSS VSS VSS VSS RSVD_D1 PCH_TRIGIN
P19 VSS VSS AJ32 U17 VSS VSS AM24
P22 VSS VSS AJ36 U18 VSS VSS AM27
P45 AK4 U28 AM29
R10
VSS
VSS
VSS
VSS AK42 U29
VSS
VSS
VSS
VSS AM45 SUNRISE-1-GP SA做驗
R14 VSS VSS AU7 U31 VSS VSS AN11
R22 VSS VSS AV17 U32 VSS VSS AN22
R29 VSS VSS AV24 U33 VSS VSS AN27
R33 VSS VSS AV27 U38 VSS VSS AN31
B R38 VSS VSS AV31 U4 VSS VSS AN39 B
R5 VSS VSS AV33 U8 VSS VSS AN7
T1 VSS VSS AV6 V18 VSS VSS AN8
T2 VSS VSS AW13 V20 VSS VSS AP11
T4 VSS VSS AW19 V21 VSS VSS AP4
Y18 VSS VSS AW29 V23 VSS VSS AR33
Y20 VSS VSS AW37 V25 VSS VSS AR34
Y21 VSS VSS AW9 V29 VSS VSS AR42
Y26 VSS VSS AY38 V3 VSS VSS AR9
Y28 VSS VSS AY45 V45 VSS VSS AT10
Y29 VSS VSS B25 W14 VSS VSS AT15
A18 VSS VSS B3 W31 VSS VSS AT36
A25 VSS VSS B37 W32 VSS VSS AT9
A32 VSS VSS B40 W33 VSS VSS AU1
A37 VSS VSS B6 W38 VSS VSS AU35
AA17 VSS VSS BA1 W4 VSS VSS AU36
AA18 VSS VSS BB11 W8 VSS VSS AU39
AA20 VSS VSS BB16 Y17 VSS VSS AU45
AA21 VSS VSS BB21 VSS C4
AA25 VSS VSS BB25
AA29 VSS VSS BB30
AA4 VSS VSS BB34 <Core Design>
AA42 VSS VSS BC2
AB10 VSS VSS BD43
A SUNRISE-1-GP A
Wistron Corporation
SUNRISE-1-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCH_RSVD_VSS
Size Document Number Rev
B Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 23 of 105

Dr-Bios.com
5 4 3 2 1
5 4 3 2 1

SSID = KBC

3D3V_AUX_KBC 3D3V_AUX_S5
PLT_RST#
R2402 1 2 0R0603-PAD

1
R2403
3D3V_AUX_KBC
47KR2J-L2-GP PD change 0622
PD change 0622 9028 hasn't 0313

2
Royee 20150204
R2401
0R0402-PAD
OPMODE (Pin71): PU (Default:eSPI)
OPMODE(Default/Internal PU):

1
U2401 3D3V_AUX_KBC_AVCC 3D3V_AUX_KBC

VCC_LPC 9 1.8_3.3V L2402


VCC_LPC
1.8_3.3V AVCC
67 2 1
1
GPIO00/GA20/ESPI_GPIO EC9028 ASM(LPC)
D 2 63 BLM15AG121SN-1GP D
3D3V_AUX_S5 18 H_RCIN# GPIO01/KBRST#/ESPI_ALERT# GPIO38/AD0 AD_IA 44
3 64 PCB_VER_AD
18,91 INT_SERIRQ GPIO02/SERIRQ/ESPI_GPIO GPIO39/AD1

1
18,68,91 LPC_FRAME#_CPU 4 VCC _ LPC 65 ADT_TYPE C2402 C2403 EC9038 DY(eSPI)
R2434 LFRAME#/ESPI_CS# GPIO3A/AD2 MODEL_ID_AD
18,68,91 LPC_AD_CPU_P3 5 66
LAD3/ESPI_IO3 ADC GPIO3B/AD3

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
1 2 LID_CLOSE# 6 75

2
65 KB_BL_DET GPIO04/ESPI_CS2#/ESPI_GPIO GPIO42/AD4 BT_IA 44
18,68,91 LPC_AD_CPU_P2 7 76 5V_CHARGER_EN 45
100KR2F-L3-GP LAD2/ESPI_IO2 LPC / eSPI GPIO43/AD5
18,68,91 LPC_AD_CPU_P1 8 73 USB_CHARGER_EN 36
LAD1/ESPI_IO1 AVCC GPIO40/CIR_RX/AD6
18,68,91 LPC_AD_CPU_P0 10 74 ALL_SYS_PWRGD 6,40
LAD0/ESPI_IO0 GPIO41/CIR_RLC_TX/AD7
ENG change 0412 18 LPC_CLK_KBC 12
PCICLK/ESPICLK
14,31,61,63,68,71,89,91 PLT_RST# 13 68 FAN1_ADB 26 EC_AGND
GPIO05/PCIRST#/WP2/ESPI_GPIO GPIO3C/DA0
14 70 FAN2_ADB 26
GPIO07/I_CLK_EHB/ESPI_RST# DAC GPIO3D/OPMODE/DA1 OPMODE
71 1 R2408 2 0R0402-PAD USB_CHAR_SEL 36
OPMODE
GPIO3E/DA2
72 PTP_PWR_EN# 65
3D3V_AUX_KBC GPIO3F/DA3

2
PD change 0622
modify 0227 22 R2409
VCC2
33
VCC2 1.8_3.3V DY 6K2R2F-GP

16 15 ENG change 0423 (USB_CHAR_CT2)

1
66 LID_CLOSE# GPIO0A/OWM/RLC_RX2 GPIO08/I_CLK_EPB/PROCHOT2#/SCL4 DGPUHOT 79
DY ECSCI#_KBC 20 VCC2 SM / ESB GPIO0D/RLC_TX2/SDA4 19 USB_CHAR_CT2 36
0R2J-L-GP 1 R2406 2 17,40,53,71 PM_SLP_S3# 32
GPIO0E/SCI#
17 ENG change 0427 (TBTA_MRESET)
14 EC_SMI# GPIO18/POWER_FAIL1 MISC GPIO0B/ESBCLK/SCL5 TBTA_MRESET 73
17,40,51 PM_SLP_S4# 36 18 USB_TYPEC_I2C_INT# 73
0R0402-PAD 1 R2410 ECSCI#_KBC ECRST# GPIO1A/NUMLED# GPIO0C/ESBDAT/SDA5
16 EC_SCI# 2 37
ECRST# 3D3V_AUX_KBC
17,91 PM_CLKRUN#_EC 38
GPIO1D/CLKRUN# PD change 0706
PD change 0622
61 E51_TXD 30
GPIO16/TXD/SER_TXD/LPC_TXD 1.8_3.3V VCC3
96
61 E51_RXD 31
GPIO17/RXD/SER_CLK/LPC_CLK/PBOUT
77
GPIO44/SCL0

1
SM 78 SML1_CLK 17,73,79
< ---CPU/GPU C2404 C2405 C2406 C2407 C2408 C2409
GPIO45/SDA0 SML1_DATA 17,73,79
27 KBC_BEEP 21 79
GPIO0F/PWM0 GPIO46/IEDI_SCL/SCL1_BATMGR BAT_SCL 43,44 < -BATTER /CHARGER

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
64 LB_PWM 23 80

2
GPIO10/PWM1 GPIO47/IEDI_SDA/SDA1_BATMGR BAT_SDA 43,44 3D3V_AUX_KBC
66,89 PWRLED 25
GPIO11/PWM2 SRN4K7J-8-GP
66,89 STDBY_LED 34 83 FUN_OFF# 65
GPIO19/PWM3/WDT_LED_ALT GPIO4A/SMBD_CLK/PSCLK1/SCL2 BAT_SCL
84 EC_TP_IN# 65 4 1
PWM GPIO4B/SMBD_DAT/PSDAT1/SDA2 BAT_SDA SML1_CLK
26,89 FAN1_PWM 26 85 DGPU_PWROK 17,85,86 3 2
GPIO12/FANPWM0 PS2 GPIO4C/PSCLK2/SCL3 Charger_Boost_Status#
26,89 FAN2_PWM 27 86 2 R2413 1 0R0402-PAD PWR_CHG_BM# 44
SML1_DATA
GPIO13/FANPWM1 GPIO4D/PSDAT2/SDA3 RN2402
26 FAN_TACH1 28 87 TPCLK 65
GPIO14/FANFB0 GPIO4E/PSCLK3/KSO18
3D3V_S0 26 FAN_TACH2 29
GPIO15/FANFB1 GPIO4F/PSDAT3/KSO19
88 TPDATA 65 Touch Pad

1
PD change 0622 modify 0227
90 ME_UNLOCK 17 ECRST# 1 2 D2401
RN2405 GPIO52/WP#/KSO20 R2414
FAN_TACH1
65,89 KCOL0 55
GPIO30/KSI0/SER_TXD/TRAP2 10KR2J-3-GP
DY AZ5125-02S-R7G-GP
1 4 65,89 KCOL1 56
2 3 FAN_TACH2 65,89 KCOL2 57
GPIO31/KSI1
GPIO32/KSI2
071.09028.000G

1
65,89 KCOL3 58 97 C2401 75.05125.07D
GPIO33/KSI3 GPIO60/SHICS# RTCRST_ON 17
SRN10KJ-L-GP 65,89 KCOL4 59 98
GPIO34/KSI4/EDICS GPIO61/SHICLK BLON_OUT 55
SHDI

SCD1U16V2KX-3GP
65,89 KCOL5 60 99 2nd = 75.08212.07D

3
GPIO35/KSI5/EDICLK GPIO62/SHIDO AD_OFF 43
65,89 KCOL6 61 VCC3 DY
GPIO36/KSI6/EDIDI
65,89 KCOL7 62 109 VD_IN1 26
GPIO37/KSI7/EDIDO GPIO78/ADC8/VCIN0/SHIDI swap D2401 1/29
104 VD_OUT1 26
VC GPIO67/VCOUT0
65,89 KROW0 39 102 VD_IN2 26
GPIO20/KSO0/TRAP_TCK GPIO65/ADC9/VCIN1 PROCHOT#_EC
65,89 KROW1 40 103
GPIO21/KSO1/TRAP0 GPIO66/PROCHOT#/VCOUT1
65,89 KROW2 41
GPIO22/KSO2/TRAP1
65,89 KROW3 42 89 KB_BL_EN 65
GPIO23/KSO3/TRAP_EN GPIO50/LOCK#
65,89 KROW4 43 91 BAT_IN# 43,44
GPIO24/KSO4 GPIO53/CAPSLED#
65,89 KROW5 44 92 CHARGE_LED 66,89
3D3V_AUX_S5 GPIO25/KSO5 GPIO54/WDT_LED
65,89 KROW6 45 93 DC_BATFULL 66,89
GPIO26/KSO6 GPIO55/SCROLED# Q2401
65,89 KROW7 46 95 RSMRST#_KBC 17
GPIO27/KSO7 IKB GPIO56/RSMRST# PROCHOT#_EC
65,89 KROW8 47 100 AMP_MUTE# 27,28 G
C GPIO28/KSO8 GPIO63/POWER_FAIL0/FANFB2 C
65,89 KROW9 48 101 S5_ENABLE 40,89
GPIO29/KSO9 GPIO64/FANFB3
2

65,89 KROW10 49 D PROCHOT#_CPU 6,44,46


R2416 GPIO2A/KSO10
65,89 KROW11 50
GPIO2B/KSO11

1
330KR2J-L-GP 65,89 KROW12 51 106 SYS_PWROK 17 SYS_PWROK(S0_PWR_GOOD) ==DELAY 100ms S
GPIO2C/KSO12 GPIO69
65,89 KROW13 52 108 DC_Protect_EC 44
GPIO2D/KSO13 GWG GPIO6B/GWG R2417 2N7002K-2-GP
65,89 KROW14 53
1

GPIO2E/KSO14 3D3V_AUX_KBC 100KR2F-L3-GP


65,89 KROW15 54
GPIO2F/KSO15 GPIO68/IO2_SHR_ROM
105 eDP_BLEN_CPU 16 84.2N702.J31
64,65,89 KBC_PWRBTN# 2 R2418 1 KBC_PWRBTN#_R 107 2ND = 84.2N702.031

2
GPIO6A/IO3_SHR_ROM AC_PRESENT 17
3rd = 84.2N702.W31
470R2F-GP

1
65,89 KROW16 81 PD change 0622 C2410
GPIO48/KSO16
2

65,89 KROW17 82
GPIO49/KSO17 1.8_3.3V

SCD1U16V2KX-3GP
124

2
SHR_ROM VCC_IO2
G2401 VCC_IO2 119 SPI_SO_KBC 1 R2420 2 0R0402-PAD SPI_SO_ROM 14,25
GAP-OPEN GPIO5B/MISO_SHR_ROM SPI_SI_KBC
120 1 R2419 2 0R0402-PAD
1

3D3V_RTC_AUX GPIO5C/MOSI_SHR_ROM SPI_SI_ROM 14,25


126 SPI_CLK_KBC 1 R2421 2 0R0402-PAD
GPIO58/SPICLK_SHR_ROM SPI_CLK_ROM 14,25
128 SPI_CS_KBC_N0 1 R2422 2 0R0402-PAD R2423
GPIO5A/SPICS#_SHR_ROM SPI_CS_CPU_N0 14,25
111 5V_CHARGER_EN 1 10KR2F-L1-GP
2
VCC0
1.8_3.3V GPIO7D/IO2_ROM_EXPD
116 USB_TYPEC_EN# 73
117 R2424
GPIO7E/IO3_ROM_EXPD WIFI_RF_EN 61
44 AC_IN# 110 S5_ENABLE 1 10KR2F-L1-GP
2
GPIO79/AC_IN# VCC0
112
GPIO7A/GPXIOD02/EC_EN# DY
KBC_PWRBTN#_R 114 PLC ROM_EXPD
GPIO7B/PBIN/PWRBTN#
17,89 PM_PWRBTN# 115 121 BLUETOOTH_EN 61,89
GPIO7C/GPXIOD04 GPIO57/XCLK32K/MOSI_ROM_EXPD
122 USB_PWR_EN# 35,66
GPIO5D/XCLKI/MISO_ROM_EXPD
123 USB_CHAR_CT1 36
GPIO5E/XCLKO/SPICS#_ROM_EXPD
127 CHG_ON# 44
GPIO59/SPICLK_ROM_EXPD
PECI 118 H_PECI_KBC 1 R2425 2 33R2F-L-GP H_PECI 6 R2426
ECRST# GPIO7F/PECI

AGND
125 AD_OFF 2 1
GND
GND
GND
GND
GND
VCC 3D3V_AUX_KBC
1KR2F-L1-GP

KB9028Q-C-GP
113
94
35
24
11
69
RN2403
E

RN2401 Q2402 C2411 KB_BL_EN 1 4


1 4 ECRST#_Q B LMBT3906LT1G-1-GP FUN_OFF# 2 3
SCD1U16V2KX-3GP

2 3 3D3V_AUX_S5 L2401
2

26,40 PURE_HW_SHUTDOWN#
84.T3906.E11 2 1
C

SRN10KJ-L-GP 2nd = 84.T3906.I11 BLM15AG121SN-1GP SRN10KJ-L-GP

EC_AGND
EC_AGND

3D3V_AUX_KBC
ENG change 0412
RN2404
BAT_IN# 1 4
CHG_ON# 2 3

SRN100KJ-6-GP

Change R2428 and pic 0223


B B

3D3V_AUX_KBC
3D3V_AUX_KBC
UN 0225
1

R2428
R2427 100KR2F-L3-GP
64K9R2F-1-GP
2

PCB_VER_AD
MODEL_ID_AD
MP change 0818
1

R2430
R2429 100KR2F-L3-GP
100KR2F-L3-GP
2

EC_AGND

EC_AGND

3D3V_AUX_KBC
1

R2431
100KR2F-L3-GP
2

ADT_TYPE
1

R2432
47KR2F-GP
2

EC_AGND

A A

5
Dr-Bios.com 4 3 2
<Core Design>

Title

Size
A1

Date:
Document Number

Tuesday, August 18, 2015

1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

KBC_ENE_KB9028_KB9038_
Newgate
Rev

Sheet
1M
24 of 105
5 4 3 2 1

SSID = Flash.ROM SPI FLASH ROM (8M byte) for PCH


3D3V_S5

1
D C2502 D
C2501

SCD1U16V2KX-3GP
SC10U6D3V3MX-L-GP

2
DY

R2508 PD change 0622


3D3V_S5 1 3K3R2F-2-GP
2
3D3V_S5
U2501

14,24 SPI_CS_CPU_N0 1 CS# VCC 8


14,24 SPI_SO_ROM 2 SO/SIO1 SIO3 7 SPI_IO3_ROM 14,22
14,22 SPI_IO2_ROM 3 SIO2 SCLK 6 SPI_CLK_ROM 14,24
4 GND SI/SIO0 5 SPI_SI_ROM 14,24

MX25L6473FM2I-08G-GP
072.25647.000D MAIX P/N change 0420

SPI FLASH ROM (8M byte) for PCH


SPI ROM Equal length need to less than 500mil
C C

SPI FLASH ROM (8M byte)

1st = 072.25647.000D (MXIC MX25L6473FM2I-08G)


2nd= 072.25Q64.0F01 (MICRON N25Q064A13ESED0F)
3rd= 72.25Q64.K01 (WINBOND W25Q64FVSSIQ)

3D3V_AUX_S5

1
R2505
1K6R2F-GP modify 0311

2
3D3V_RTC_SYS

1
B B
R2503
Main Func = RTC 3D3V_RTC_VCC
2
47KR2F-GP 3D3V_RTC_AUX

D2501
RTC BATTERY 1

RTC1 3
1st= 23.22065.001 PWR 1 2 R2502 1 3D3V_RTC_PW R 2

1
2 1KR2F-L1-GP DY
2nd= 23.20068.001 GND
NP1 NP1
NP2 Width=20mils
BAS40CW -GP
83.00040.E81
C2503
SC1U6D3V3KX-L1-GP

2
NP2
2nd = 83.00040.T81
BAT-060003HA002M213ZL-GP-U1 3rd = 83.00040.K81
62.70014.001
2nd = 20.F2316.002
3rd = 62.70001.061

<Core Design>
A A

Wistron Corporation

Dr-Bios.com
Q2505
G 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1

D RTC_DET# 19
R2504 Title
10MR2J-L-GP S
Flash(KBC+PCH)/RTC
2N7002K-2-GP Size Document Number Rev
2

84.2N702.J31 A3
2ND = 84.2N702.031 Newgate 1M
3rd = 84.2N702.W31 Date: Tuesday, August 18, 2015 Sheet 25 of 105

5 4 3 2 1
5 4 3 2 1

*Layout* 15 mil
SSID = Thermal *Layout* 15 mil
5V_FAN2_S0
5V_FAN1_S0

1
C2614 C2606

1
C2603 C2602 D2603

SC4D7U25V5KX-GP

SCD1U16V2KX-3GP
D2601 RB551V30-GP

2
SC4D7U25V5KX-GP

SCD1U16V2KX-3GP
RB551V30-GP

2
83.R5003.H8H

A
ADB (Active Dusting Blower) function 83.R5003.H8H

A
2ND = 83.R5003.C8F
2ND = 83.R5003.C8F
D D

AFTP TESTPOINT
FAN_TACH1_C FAN_TACH1_C 89
FAN_TACH2_C FAN_TACH2_C 89 D2602 D2604

24 FAN_TACH1 A K FAN_TACH1_C 24 FAN_TACH2 A K FAN_TACH2_C

RB551V30-GP RB551V30-GP
83.R5003.H8H 83.R5003.H8H
2ND = 83.R5003.C8F 2ND = 83.R5003.C8F

FAN1 FAN2
6 6

24,89 FAN1_PWM 4 24,89 FAN2_PWM 4


3 3
FAN_TACH1_C 2 FAN_TACH2_C 2

5V_FAN1_S0 1 5V_FAN2_S0 1

C 5 5 C

ACES-CON4-67-GP ACES-CON4-67-GP
020.F0220.0004 020.F0220.0004
3D3V_AUX_S5

FAN1 conn change by Royee 20150202 FAN2 conn change by Royee 20150202
FOR CPU T8
1

R2611 3D3V_S0
16KR2F-GP 3D3V_S0

5V_FAN1_S0
2

2
5V_FAN2_S0

2
VD_IN1 24
5V_FAN1_S0 R2603
1

10KR2F-L1-GP 5V_FAN2_S0 R2604


RT2601 10KR2F-L1-GP

1
1

NTC-100K-11-GP-U C2607 C2608 FON1# U2602

1
SC100P50V2JN-3GP 5V_S0 FON2# U2603
5V_S0
SCD1U16V2KX-3GP

1 8
2

FON# GND
2 VIN GND 7 1 FON# GND 8
3 6 2 7
2

VOUT GND VIN GND


1

4 VSET GND 5 3 VOUT GND 6

1
C2613 4 5
SC2D2U10V3KX-1GP C2615 VSET GND
2

AP2113MTR-G1-GP SC2D2U10V3KX-1GP

2
AP2113MTR-G1-GP

3D3V_AUX_S5 FAN1_ADB_R 1 R2616 2 FAN1_ADB 24


0R0402-PAD FAN2_ADB_R 1 R2617 2 FAN2_ADB 24
0R0402-PAD
PD change 0622
PD change 0622
1

B B
R2612
DY 16KR2F-GP

FOR SYSTEM 3D3V_S0


2

VD_IN2 24
1

1
DY RT2602 DY CHECK BROOK ? R2606
1

NTC-100K-11-GP-U C2610 DY C2609 2KR2F-L1-GP


SCD1U16V2KX-L-GP SC100P50V2JN-L-GP
PD change 0622
2

2
Q2603
2

S THERM_SYS_SHDN#_R 1 R2610 2 VD_OUT1 24


0R0402-PAD
24,40 PURE_HW_SHUTDOWN# D DY
R2607
G IMVP_PWRGD_G 1 0R2J-L-GP
2 3D3V_S0
1

R2608 C2611 2N7002K-2-GP


SCD1U16V2KX-L-GP

10KR2J-L-GP 84.2N702.J31
DY DY 2ND = 84.2N702.031
2

3rd = 84.2N702.W31 1 R2609 2


2

IMVP_PWRGD 40,46
0R0402-PAD

PD change 0622
UN 0225
T8 = 85 degree

A A

Dr-Bios.com
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal T8 and FAN


Size Document Number Rev
Custom
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 26 of 105 Wistron Confidential document,
5 4 3 2 1 Duplicate, Modify, Forward or a
5 4 3 2 1

G2706
1 2

SSID = AUDIO GAP-CLOSE

G2707
1 2
5V_S0
GAP-CLOSE

1 R2719 2 5VA_S0 G2708


1 2
0R0603-PAD

1
C2709 C2708 placed nearby codec PIN12 GAP-CLOSE

SCD1U16V2KX-3GP

SC10U10V5KX-2GP
1 R2721 2 C2726
Modify 0213 RN2704 G2709

2
D 0R0603-PAD AUDIO_PC_BEEP 1 2 KBC_BEEP_C 1 4 1 2 D
KBC_BEEP 24
PD change 0622 2 3 HDA_SPKR 17
SCD1U16V2KX-3GP GAP-CLOSE
29 LINE1_VREFO_R SRN47K-2-GP-U

2
G2710
3D3V_S0 29 LINE1_VREFO_L 1 2
R2730
10KR2F-L1-GP GAP-CLOSE
Close to Pin46 29 AUD_HP1_JACK_L2

1
AUD_AGND

1
29 AUD_HP1_JACK_R2 AUD_AGND
C2701

SC10U6D3V3MX-GP
1SC2D2U10V3KX-1GP
SC4D7U6D3V3KX-GP

2
Close pin36 AUD_AGND close to codec IC
C2704

1
1 2 R2711 ENG change 0421
100KR2F-L3-GP 5V_PVDD2
SC2D2U10V3KX-1GP

1 C2705
1

C2707 C2706

1
SCD1U16V2KX-3GP

SC10U10V5KX-2GP

1 R2748 2 C2710 C2711


1D5V_S0 PD change 0622 C2702
Layout Note:
2

SC10U6D3V3MX-GP
1D5V_AUDIO_AVDD2

2D5V_AUDIO_VREF
0R0402-PAD

3V_LDO1_CAP 2

2
1
SC10U6D3V3MX-GP

SCD1U16V2KX-3GP
3D3V_S0 C2714 Place close to Pin 26

2
1 R2766 2

AUD_CBN
0R0402-PAD 5V_PVDD2 1 R2755 2 0R0603-PAD 5V_S0

2
1
moat moat

CPVDD

CPVEE
C2715 AUD_AGND

1
SC4D7U6D3V3KX-GP C2703

SC2D2U10V3KX-1GP
Close to Pin41 PD change 0622

2
Close pin40

36
35
34
33
32
31
30
29
28
27
26
25
U2701
AUD_AGND

VREF
HPOUT-L_PORT-I-L
LINE1-VREFO-L

AVDD1
AVSS1
MIC2-VREFO
CPVDD
CBN

HPOUT-R_PORT-I-R

LINE1-VREFO-R
CPVEE

LDO1-CAP
AUD_SPK1_R+

AUD_SPK1_R- change 0216


AUD_CBP 37 24 3D3V_S5
CBP LINE2-L_PORT-E-L AUD_LINE_L 28
AUD_AGND C2712 SC10U6D3V3MX-GP 38 23 C2723
AVSS2 LINE2-R_PORT-E-R AUD_LINE_R 28
C 1 2 3V_LDO2_CAP39 22 LINE1_L C2727 1 2SC4D7U6D3V3KX-GP LINE1_L_C C
2

LDO2-CAP LINE1-L_PORT-C-L LINE1_R LINE1_L_C 29


1D5V_AUDIO_AVDD2 40 21 1 2SC4D7U6D3V3KX-GP LINE1_R_C
LINE1_R_C 29
D2704 AVDD2 LINE1-R_PORT-C-R V3D3_STB
5VA_S0 41 20 1 R2712 2 0R0402-PAD
PVDD1 VD33_STB MIC_CAP C2713 1
AZ5125-02S-R7G-GP 42 19 2SC10U6D3V3MX-GP AUD_AGND
29,89 AUD_SPK1_L+ SPK-OUT-L+ MIC_CAP
29,89 AUD_SPK1_L-
43 18
SPK-OUT-L- MIC2-R_PORT-F-R/SLEEVE
75.05125.07D PD change 0622 29,89 AUD_SPK1_R-
44
SPK-OUT-R- MIC2-L_PORT-F-L/RING
17
29,89 AUD_SPK1_R+
45
SPK-OUT-R+ 071.00255.0003 MONO-OUT
16 PD change 0622
2nd = 75.08212.07D 5VA_S0 46
PVDD2 SPDIFO/FRONT_JD_JD3/GPIO3
15
1 R2754 2 PD# 47 14
3

24,28 AMP_MUTE# 0R0402-PAD PDB MIC2/LINE2_JD_JD2


AUD_SPDIF_OUT 2 R2713 200KR2F-L-3-GP

GPIO0/DMIC-DATA
48 13 AUD_SENSE_A 1
SPDIF-OUT/GPIO2 HP/LINE1_JD_JD1 AUD_HP1_JD# 29,89

GPIO1/DMIC-CLK
29,89 AUD_SPDIF_OUT
R2708 is need to 49 1 2 R2714 100KR2F-L3-GP AUD_MIC1_JD# 29,89
GND

SDATA-OUT
connect.To prvent SPDIF 0203

LDO3-CAP
3D3V_S0

SDATA-IN
DVDD-IO

PCBEEP
DC_DET

RESET#
the beep sound Layout Note: change 0213

DVDD

SYNC
BCLK
AUD_SPK1_L+ R2722
Place close to Pin 13 AUD_SENSE_A 1 2
AUD_SPK1_L- Layout Note:
ALC255-CG-GP-U 100KR2F-L3-GP

1
2
3
4
5
6
1 3V_LDO3_CAP 7
8
9
10
11
12
3D3V_S0
2

D2705 3V_AUDIO_DVDIO 1 R2715 2


AZ5125-02S-R7G-GP 0R0402-PAD
3D3V_AUDIO_DVDD

C2719
75.05125.07D PD change 0622 Codec

C2718
3D3V_S0 1 R2720 2 3D3V_AUDIO_DVDD
1

1
2nd = 75.08212.07D C2717 C2716 Width>40mil, to improve Headpohone Crosstalk noise
Analog
SC10U6D3V3MX-GP

SCD1U16V2KX-3GP

0R0603-PAD
Change it to sharp will be better.
3

1
SC10U6D3V3MX-GP
C2720 pin 12~33, 38~40
2

2
Add 2 vias (>0.5A) when trace layer change.

SCD1U16V2KX-3GP

SC10U6D3V3MX-GP
PD change 0622

2
Digital
AUD_HP1_JACK_L2
pin 1~11, 34~37,
AUD_HP1_JACK_R2 Close to Pin1 42~48
B 38 DMIC_DATA DY B
2 R2702 1 DMIC_CLK_R
38 DMIC_CLK 0R2J-L-GP AUDIO_PC_BEEP
3D3V_S0
2

28 AMP_PWR#
D2703
2

17 HDA_SDOUT_CODEC
AZ5125-02S-R7G-GP PD change 0622
2nd = 75.08212.07D Vendor suggest 17 HDA_BITCLK_CODEC
DY R2731
10KR2F-L1-GP 1 2 HDA_SDIN0_CODEC
17 HDA_SDIN0_CPU R2718 33R2J-L1-GP
1
3

AMP_PWR# 17 HDA_SYNC_CODEC

17,28 HDA_RST#_CODEC
2

DY R2732
10KR2F-L1-GP
1

LINE1_L_C

LINE1_R_C

問問問pull down是是打是是是
2

D2706
AZ5125-02S-R7G-GP
2nd = 75.08212.07D
3

A A

<Core Design>
Added part 0213

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Audio Codec ALC255


Size Document Number Rev
Custom
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 27 of 105
5 4 3 2 1

Dr-Bios.com
5 4 3 2 1

3D3V_S0

2
MP change 0902
R2810 PD change 0622
10KR2J-L-GP 2 G2801
1 2
D2804 3 modify 0303
AMP_PWR# 27

1
BAS16-4-GP 83.00016.I11 GAP-CLOSE
D D
1 2ND = 83.00016.P11
AMP_AGND 5V_S0
D2803 2 PD change 0622
HDA_RST#_CODEC 17,27
BAW56-5-GP
AMP_PD# 3 83.00056.Q11
2nd = 83.00056.R11 5V_AMP_PVDD 1 R2809 2
1 AMP_MUTE# 24,27

1
C2802 0R0603-PAD

SC10U10V5KX-2GP
C2801
SC1U10V2KX-1GP 1 R2811 2

2
C2805 C2803
SC1U10V2KX-1GP R2801 SC1U10V2KX-1GP 0R0603-PAD

4
27 AUD_LINE_R 1 2 AMP_LINE_R1 1 2 AMP_LINE_RR 1 2 AMP_LINE_RC U2801

PVDD1

PVDD2
1K8R2F-GP

1
R2807
2K2R2F-GP 9 5
INPUT_R OUT_RN AMP_SPK1_R- 29,89
C 6 C
AMP_SPK1_R+ 29,89

2
AMP_PD# OUT_RP
7 PD#
C2806 AMP_AGND
SC1U10V2KX-1GP R2802
27 AUD_LINE_L 1 2 AMP_LINE_L1 1 2 AMP_LINE_LR 1 2 AMP_LINE_LC 10 INPUT_L OUT_LN 2 AMP_SPK1_L- 29,89
1

1K8R2F-GP C2804 1
OUT_LP AMP_SPK1_L+ 29,89
R2808 SC1U10V2KX-1GP AMP_BP 8
2K2R2F-GP BYPASS G1
G1 11
12 G2
G2

GND
2

1
C2809
ENG change 0429 AMP_AGND SC2D2U10V3KX-1GP ALC1001-CGT-GP

13
74.01001.013
Reserve for input attenuation AMP_SPK1_R+ AMP_SPK1_L-
to have optimized output power AMP_AGND AMP_SPK1_R- AMP_SPK1_L+
modify 0303
2Watt
B B

2
5V_S0 D2801 D2802
AZ5125-02S-R7G-GP AZ5125-02S-R7G-GP
2W 4ohm 75.05125.07D 75.05125.07D
2nd = 75.08212.07D 2nd = 75.08212.07D
R1 R2

3
1

DY R2803 DY R2804
0R2J-2-GP 0R2J-2-GP
2

G1 G2
<Core Design>
1

R2805 R2806
0R0402-PAD 0R0402-PAD
Wistron Corporation
A
R3 R4 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
2

Taipei Hsien 221, Taiwan, R.O.C.

Dr-Bios.com
PD change 0622 Title
AMP_AGND AMP_AGND
(Reserved)
Size Document Number Rev
A4
Newgate 1M
Date: Wednesday, September 02, 2015 Sheet 28 of 105
5 4 3 2 1
5 4 3 2 1

SSID = AUDIO AMP_SPK1_L-


AMP_SPK1_L- 28,89
AMP_SPK1_L+
AMP_SPK1_L+ 28,89
Check speaker spec and confirm 2nd with ME 0302 AUD_SPK1_L-
AUD_SPK1_L- 27,89
AUD_SPK1_L+
AUD_SPK1_L+ 27,89
AMP_SPK1_R-
Speaker SPK1
ACES-CON8-12-GP-U1 AMP_SPK1_R+
AMP_SPK1_R- 28,89

AMP_SPK1_R+ 28,89
D 10 D
8 AUD_SPK1_R-
28,89 AMP_SPK1_L- AUD_SPK1_R- 27,89
28,89 AMP_SPK1_L+ 7
6 AUD_SPK1_R+
27,89 AUD_SPK1_L- AUD_SPK1_R+ 27,89
27,89 AUD_SPK1_L+ 5
28,89 AMP_SPK1_R- 4
3
AFTP TESTPOINT
28,89 AMP_SPK1_R+
27,89 AUD_SPK1_R- 2

27,89 AUD_SPK1_R+ 1
9

20.F0818.008 AUD_HP1_JACK_R2_OUT
12/17 AUD_HP1_JACK_R2_OUT 89
1

1
EC2906 EC2905 EC2904 EC2903 EC2916 EC2917 EC2918 EC2919 AUD_HP1_JACK_L2_OUT
Layout Note: DY DY DY DY DY DY DY DY
AUD_HP1_JACK_L2_OUT 89
2

2
1nd = 20.F0818.008 LINE1_L_IN
SC1KP50V2KX-L-1-GP

SC1KP50V2KX-L-1-GP

SC1KP50V2KX-L-1-GP

SC1KP50V2KX-L-1-GP

SC1KP50V2KX-L-1-GP

SC1KP50V2KX-L-1-GP

SC1KP50V2KX-L-1-GP

SC1KP50V2KX-L-1-GP
Trace width=40mil LINE1_L_IN 89
LINE1_R_IN
LINE1_R_IN 89
5V_SPDIF_S0
5V_SPDIF_S0 89
AUD_SPDIF_OUT
AUD_SPDIF_OUT 27,89
ENG add AFTP 0430
AFTP TESTPOINT
C C

ENG connector change 0504


ENG change 0504 PD change 0622
LINE OUT M6
SPDIF1

27 AUD_HP1_JACK_R2 1 R2904 2 63D4R3F-GPAUD_HP1_JACK_R2_R 1 R2908 2 0R0402-PAD AUD_HP1_JACK_R2_OUT M1


27 AUD_HP1_JACK_L2 1 R2905 2 63D4R3F-GPAUD_HP1_JACK_L2_R 1 R2909 2 0R0402-PAD AUD_HP1_JACK_L2_OUT M4
M5
U2901 27,89 AUD_HP1_JD# M7
LED
5V_S0 5 1 5V_SPDIF_S0 A
IN OUT 5V_SPDIF_S0 DRIVE
GND 2 B
1

AUD_HP1_JD# 4 3 C IC
EN# OC# 27,89 AUD_SPDIF_OUT
C2921
TX
1

C2920 SCD1U16V2ZY-2GP 8
2

1
SY6288DAAC-GP 9
DY
SCD1U16V2ZY-2GP

DY 074.06288.009B C2922 C2923


2

SC100P50V2JN-3GP

SC100P50V2JN-3GP
2nd = 074.00524.0C9F DY DY

2
3rd = 074.02822.009F AUDIO-JK530-GP-U
B 022.10033.0011 B

2 R2903 1
DY 0R2J-2-GP
AUD_AGND
AUD_AGND

ENG change 0412


ENG connector change 0504
27 LINE1_VREFO_L 1 R2906

1 R2907
2 2K2R2J-L1-GP

2 2K2R2J-L1-GP PD change 0622


MIC IN
27 LINE1_VREFO_R
MICIN1
M5
27 LINE1_L_C 1 R2901 2 1KR2F-L1-GP LINE1_L_R 1 R2910 2 0R0402-PAD LINE1_L_IN M4
M3

27 LINE1_R_C 1 R2902 2 1KR2F-L1-GP LINE1_R_R 1 R2911 2 0R0402-PAD LINE1_R_IN M1


MP
27,89 AUD_MIC1_JD# MQ

NP1
NP2

1
C2924 C2925 AUDIO-JK528-GP-U1

SC100P50V2JN-3GP

SC100P50V2JN-3GP
DY DY 022.10002.00J1

2
A <Core Design> A
AUD_AGND

AUD_AGND Wistron Corporation


21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Dr-Bios.com
Title

Speaker/ALC255
Size Document Number Rev
Custom
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 29 of 105
5 4 3 2 1
5 4 3 2 1

PD change 0622

REGOUT 1 R3101 2 1V_LAN_VDD10


RSET
1 0R0603-PAD

D R3102 D

1
2K49R2F-2-L-GP C3102 C3127 C3130 C3125 C3126 C3124

SCD1U16V2KX-3GP

SCD1U16V2KX-L-GP

SC1U10V2KX-L1-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
C3114
SCD1U16V2KX-L-GP
2

2
U3101

1V_LAN_VDD10 3 1
3D3V_LAN_VDD33 AVDD10 MDIP0 MDI0+ 32
8 AVDD10 MDIN0 2 MDI0- 32
30 AVDD10 MDIP1 4 MDI1+ 32
MDIN1 5 MDI1- 32
11 AVDD33 MDIP2 6 MDI2+ 32
32 AVDD33 MDIN2 7 MDI2- 32
MDIP3 9 MDI3+ 32
1V_LAN_VDD10 22 10
DVDD10 MDIN3 MDI3- 32
3D3V_LAN_VDD33 23 28 LAN_XTAL_25M_IN
VDDREG CKXTAL1 LAN_XTAL_25M_OUT
CKXTAL2 29

C3120 2 1SCD1U16V2KX-3GP PCIE_TX_CON_P4 13 24 REGOUT Added TP 0210


15 PCIE_TX_PCH_P4 HSIP REGOUT 3D3V_S5 3D3V_LAN_VDD33
C3119 2 1SCD1U16V2KX-3GP PCIE_TX_CON_N4 14 31 RSET
15 PCIE_TX_PCH_N4 HSIN RSET
C C3108 2 1SCD1U16V2KX-3GP PCIE_RX_CON_P4 17 27 LAN_LED0 1 TP3101 C
15 PCIE_RX_PCH_P4 HSOP LED0
C3107 2 1SCD1U16V2KX-3GP PCIE_RX_CON_N4 18 26 LAN_LED1 1 TP3102 1 R3104 2 0R0805-PAD
15 PCIE_RX_PCH_N4 HSON LED1/GPO
25 LAN_LED2 1 TP3103
LED2
18 LAN_CLK_CPU 15 REFCLK_P
16 20 ISOLATEB
18 LAN_CLK_CPU# REFCLK_N ISOLATE#

1
C3117
LANWAKE# 21 PCIE_W AKE# 17,61,63,71 DYC3118 C3109 C3110

SC4D7U6D3V3KX-L-GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
18 LAN_CLKREQ_CPU# 12 CLKREQ# PD change 0622

SC4D7U6D3V3KX-L-GP
DY

2
14,24,61,63,68,71,89,91 PLT_RST# 19 PERST# GND 33

RTL8111H-CG-1-GP

3D3V_S0

2
R3107
B C3122 1KR2J-L2-GP B
SC12P50V2JN-3GP
2 1

1
ISOLATEB
X3101

1
LAN_XTAL_25M_IN 1 4 R3108
15K4R2F-GP
2

R3109

2
1MR2J-L3-GP 2 3
DY C3123
SC15P50V2JN-L-GP
1

LAN_XTAL_25M_OUT XTAL-25MHZ-181-GP 2 1
82.30020.G71
2nd = 82.30020.D41
3rd = 082.30005.0231

A <Core Design> A

Dr-Bios.com
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN(RTL8111)
Size Document Number Rev
A3
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 31 of 105
5 4 3 2 1
5 4 3 2 1

SSID = LAN PD change 0624

RJ1
part change 0430 9 CHASSIS
CHASSIS
11
RJ45_1 1
XF3201 89 RJ45_1
1:1
12 13 RJ45_1 RJ45_2 2
D 31 MDI0+ 89 RJ45_2 RJ45_3 D
3
XRF_TDC1 MCT1 89 RJ45_3 RJ45_4
10 15 4
89 RJ45_4 RJ45_5 5
RJ45_2 89 RJ45_5 RJ45_6
31 MDI0- 11 14 89 RJ45_6 6
RJ45_7 7
89 RJ45_7 RJ45_8 8
1:1
RJ45_5 89 RJ45_8
9 16 12
31 MDI2-
1
C3201
SCD1U16V2KX-L-GP

10 CHASSIS
7 18 MCT2 CHASSIS
RJ45-8P-172-GP-U
2

8 17 RJ45_4 022.10001.0831
31 MDI2+

1:1
6 19 RJ45_3
31 MDI1+
ENG change 0412
4 21 MCT3

5 20 RJ45_6 5V_S5
31 MDI1-

1:1
3 22 RJ45_8
31 MDI3-

4
1 24 MCT4
C
U3201 C
2 23 RJ45_7 PJSRV05W-4DW6-GP
31 MDI3+
075.00005.0B7C
XFORM-24P-63-GP
2nd = 075.01256.007C
68.89240.30D
3rd = 75.09904.07C

3
2nd = 68.IH601.301

31 MDI1+
31 MDI1-
31 MDI3+
31 MDI3-

SWAP 0228 5V_S5

MCT4
MCT3
MCT2
MCT1

4
U3202
B PJSRV05W-4DW6-GP B
075.00005.0B7C
2nd = 075.01256.007C

8
7
6
5
3rd = 75.09904.07C

3
RN3201
SRN75J-1-GP
MDI1-
MDI0+

MDI1+

MDI2+

MDI3+
MDI0-

MDI2-

MDI3-

31 MDI0+
31 MDI0-

1
2
3
4
31 MDI2+
31 MDI2-

MCT_R
2

EC3201 EC3202 EC3203 EC3204 EC3205 EC3206 EC3207 EC3208


<Core Design>
1

1
SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

C3202
A SC100P3KV8JN-2-GP A
Wistron Corporation

2
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RJ45+Transformer
Size Document Number Rev
DY DY DY DY DY DY DY DY B
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 32 of 105

Dr-Bios.com
5 4 3 2 1
5 4 3 2 1

Low Active 2A AFTP TESTPOINT USB 3.0 Connector


5V_S5 5V_USB30 Pin definition
U3501
USB30_RX_CON_N1 89
USB30_RX_CON_P1 89 1 POWER
5 IN OUT 1
GND 2 USB30_TX_CON_N1 89 Close to USB1 0416 2 USB 2.0 D-
4 EN# OC# 3 USB30_TX_CON_P1 89
1

3 USB 2.0 D+

1
C3501 C3502 C3503
USB_CON_PN1 89

SCD1U16V2KX-L-GP
SC1U10V2KX-L1-GP SY6288DAAC-GP SC100U6D3V6MX-GP 4 GND
2

USB_CON_PP1 89 5V_USB30_CHARGER
074.06288.009B

2
D 2nd = 074.00524.0C9F 5 StdA_SSRX- SuperSpeed RX D
3rd = 074.02822.009F
USB30_RX_CON_N2 89 6 StdA_SSRX+
24,66 USB_PW R_EN# USB30_RX_CON_P2 89
7 GND
USB30_TX_CON_N2 89

1
C3504 8 StdA_SSTX- SuperSpeed TX
USB30_TX_CON_P2 89
SC100U6D3V6MX-GP
9 StdA_SSTX+

2
USB_CON_PN2 89
USB_CON_PP2 89

JJ 20150127

18 USB30_RX_CPU_N1 2 FR3501 1 0R0402-PAD USB30_RX_CON_N1 USB3.0 conn change by Royee 20150202


2 FR3502 1 0R0402-PAD USB30_RX_CON_P1 EU3501 PD change 0624
18 USB30_RX_CPU_P1 5V_USB30_CHARGER
PD change 0701 1 10 USB30_RX_CON_N1
1

1
SC1P50V2CN-1GP
FC3516

SC1P50V2CN-1GP
FC3503

2 9 USB30_RX_CON_P1
DY DY 3 8 USB1
2

4 7 USB30_TX_CON_N1 1 10
VBUS 10
11 11
5 6 USB30_TX_CON_P1 12
USB_CON_PN1 12
2 D- 13 13
PD change 0701 USB_CON_PP1 3
C PJE5UFN10A-GP D+ C
C3508 USB30_RX_CON_N1 5
SCD1U16V2KX-L-GP USB30_TX_N1_R STDA_SSRX-
18 USB30_TX_CPU_N1 2 1 2 FR3504 1 0R0402-PAD USB30_TX_CON_N1 USB30_RX_CON_P1 6 STDA_SSRX+ GND_DRAIN 7
C3509 USB30_TX_CON_N1 8
SCD1U16V2KX-L-GP USB30_TX_P1_R STDA_SSTX-
18 USB30_TX_CPU_P1 2 1 2 FR3506 1 0R0402-PAD USB30_TX_CON_P1 075.00510.0073 USB30_TX_CON_P1 9 STDA_SSTX+ GND 4
2nd = 075.00550.0071
3rd = 75.01045.073
SKT-USB13-72-GP-U
1

1
SC1P50V2CN-1GP
FC3505

SC1P50V2CN-1GP
FC3507
EL3501
22.10341.711
DY DY 2nd = 22.10339.I41
2 1 USB_CON_PP1
36 USB_CHAR_PP1
2

2
3 4 USB_CON_PN1 5V_USB30
36 USB_CHAR_PN1
MCM1012B900FBP-GP-U
68.01012.201
2nd = 68.00396.001
3rd = 69.10118.001 USB2

EU3503 1 VBUS 10 10
11 11
12 12
USB_CON_PN2 1 6 USB_CON_PP2 USB_CON_PN2 2 13
USB_CON_PP2 D- 13
3 D+
2 5 5V_S5
USB30_RX_CON_N2 5
USB_CON_PN1 USB_CON_PP1 USB30_RX_CON_P2 STDA_SSRX-
3 4 6 STDA_SSRX+ GND_DRAIN 7
USB30_TX_CON_N2 8
USB30_TX_CON_P2 STDA_SSTX-
9 STDA_SSTX+ GND 4
B B
PJSRV05W -4DW 6-GP
075.00005.0B7C SKT-USB13-72-GP-U
2nd = 075.01256.007C 22.10341.711
3rd = 75.09904.07C 2nd = 22.10339.I41

JJ 20150127 EL3502
2 1 USB_CON_PN2
15 USB_PCH_PN2
PD change 0701
3 4 USB_CON_PP2
15 USB_PCH_PP2

18 USB30_RX_CPU_N2 2 FR3508 1 0R0402-PAD USB30_RX_CON_N2 MCM1012B900FBP-GP-U


68.01012.201
18 USB30_RX_CPU_P2 2 FR3510 1 0R0402-PAD USB30_RX_CON_P2 2nd = 68.00396.001
3rd = 69.10118.001
1

FC3509 FC3511
SC1P50V2CN-1GP
SC1P50V2CN-1GP

DY DY EU3502
2

1 10 USB30_RX_CON_N2

2 9 USB30_RX_CON_P2
3 8
PD change 0701 <Core Design>
A 4 7 USB30_TX_CON_N2 A
C3511
SCD1U16V2KX-L-GP 2 1 USB30_TX_N2_R 2 FR3512 1 0R0402-PAD USB30_TX_CON_N2 5 6 USB30_TX_CON_P2
18 USB30_TX_CPU_N2
Wistron Corporation

Dr-Bios.com
C3510
SCD1U16V2KX-L-GP 2 1 USB30_TX_P2_R 2 FR3514 1 0R0402-PAD USB30_TX_CON_P2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
18 USB30_TX_CPU_P2
PJE5UFN10A-GP Taipei Hsien 221, Taiwan, R.O.C.
1

1
SC1P50V2CN-1GP

SC1P50V2CN-1GP

FC3513 FC3515 Title


DY DY USB3.0 CONN
2

075.00510.0073 Size Document Number Rev


2nd = 075.00550.0071 A3
3rd = 75.01045.073 Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 35 of 105

5 4 3 2 1
5 4 3 2 1

USB_CHARGER_EN 24

5V_S5 USB_CHAR_SEL 24
USB_CHAR_ILIM_LO 33KR2F-2-GP 1 R3607 2
D USB_CHAR_ILIM_HI 23K2R2F-GP 1 R3604 2 5V_S5 5V_S5 D

SCD1U16V2KX-L-GP

SC10U10V5KX-L1-GP
DY
1

1
C3604 C3605

2
PD change 0622

15
16
USB_CHAR_CT1 24

2
R3602 U3603
2

2
DY 10KR2F-L1-GP R3605 R3606

EN

ILIM_HI
ILIM_SEL
ILIM_LO
10KR2F-L1-GP 10KR2F-L1-GP
PD change 0622

1
1 6

1
IN CTL1 USB_CHAR_CT2_R
CTL2 7 1 R3608 2
USB_CHAR_CT3 0R0402-PAD USB_CHAR_CT2 24
CTL3 8
ST_R 9
5V_USB30_CHARGER NC#9
13 FAULT#
GND 14 ENG change 0423
12 17

DM_OUT
OUT GND

DP_OUT

DM_IN
DP_IN
SCD1U16V2KX-3GP

SC1KP50V2KX-1GP

DY DY
1

EC3604 EC3603

TPS2544RTER-GP
2

3
2

10
11
74.02544.073

C USB_CHAR_PN1 35 C
To Connector
USB_CHAR_PP1 35

USB_PCH_PN1 15
To PCH
USB_PCH_PP1 15

ENG change 0412

B B

<Core Design>

A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB CHARGER
Size Document Number Rev
B
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 36 of 105

Dr-Bios.com
5 4 3 2 1
5 4 3 2 1

3D3V_S0 UN 0225
U3801 3D3V_S0

1 23 USB3_UTXN0
VCC DEVICE_TX1- USB3_UTXP0
13 VCC DEVICE_TX1+ 22
R3820 2 10KR2F-L1-GP
1 DY U3RE_EQ1
11 USB3_URXN_UP_C SCD1U16V2KX-L-GP
2 1 C3850
HOST_TX2- USB30_RX_CPU_N5 18
R3827 2 10KR2F-L1-GP
1 3D_Camera U3RE_EQ1 2 EQ1 HOST_TX2+ 12 USB3_URXP_UP_C SCD1U16V2KX-L-GP
2 1 C3851 USB30_RX_CPU_P5 18
1

2
R3811 2 10KR2F-L1-GP
1 DY U3RE_EQ2 17 3D_Camera
C3812 C3813 C3819 EQ2
3D_Camera
SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
D D

3D_Camera
SCD01U50V2KX-L-GP
R3814 2 10KR2F-L1-GP
1 DY RR1 4 8 USB3_UTXN0_UP_C SCD1U16V2KX-L-GP
2 1 C3848 R3821 2 10KR2F-L1-GP
1 DY U3RE_EQ2
2

1
R3815 2 10KR2F-L1-GP RR2 OS1 HOST_RX1- USB3_UTXP0_UP_C SCD1U16V2KX-L-GP USB30_TX_CPU_N5 18
1 DY 15 OS2 HOST_RX1+ 9 2 1 C3849
USB30_TX_CPU_P5 18
3D_Camera
3D_Camera

3D_Camera R3855 2 10KR2F-L1-GP


1 3D_Camera U3RE_DE1 3 20 3D_Camera USB3_URXN0
DE1 DEVICE_RX2-
R3813 2 10KR2F-L1-GP
1 3D_Camera U3RE_DE2 16 DE2 DEVICE_RX2+ 19 USB3_URXP0 R3822 2 10KR2F-L1-GP
1 DY U3RE_DE1

R3825 2 10KR2F-L1-GP
1 DY U3RE_EN_RXD 5 UN 0225 RF 0303
EN_RXD R3823 2 10KR2F-L1-GP U3RE_DE2
14 RSVD GND 6 1 DY
10 USB3_URXN0
GND USB3_URXP0
18
7 NC#7
GND
GND 21 Preserve schematic
24 25 CCD_UTXN0 3D3V_S0
NC#24 GND CCD_UTXP0

HPA02232ARGER-GP

1
3D_Camera RC3801 RC3802 RC3803 RC3804

SC1P50V2CN-1GP

SC1P50V2CN-1GP

SC1P50V2CN-1GP

SC1P50V2CN-1GP
CAM1 71.02232.003 R3818
21 10KR2F-L1-GP

2
1 DY DY DY DY 1 2 3D_Camera U3RE_EN_RXD

2 USB3_URXN0 UN 0225
USB3_URXP0 R3824 2 10KR2F-L1-GP DY RR1
3
4
3D_Camera 1
C C
5 CCD_UTXN0 C3846 1 SCD1U16V2KX-L-GP
2 USB3_UTXN0
6 CCD_UTXP0 C3847 1 SCD1U16V2KX-L-GP
2 USB3_UTXP0 R3826 2 10KR2F-L1-GP
1 DY RR2
7
8 FW_GPIO35 R3836 2 1
3D_Camera FW_GPIO 16 Camera Power
9 0R2J-L-GP 3D3V_S0
10 5V_CAMERA_S0 3D3V_CAMERA_S0
11
3D_Camera F3801 CCD ENG change 0412
12 3D3V_CAMERA_S0 1 2
13
14 3D3V_S0 POLYSW-1D1A6V-9-GP-U
15 DMIC_CLK_CON 69.48001.081 5V_S0

2
16 DMIC_DATA_CON_R 2ND = 69.50011.081 C3801 C3802 5V_S0

SC10U10V5KX-L1-GP

SCD1U16V2KX-L-GP
JJ 20150130 CCD
17 CCD 5V_CAMERA_S0
18 PD change 0622

1
19
20 DMIC_CLK_CON 2 R3803 1 0R0402-PAD
DMIC_CLK_CON_R 17
22
DMIC_DATA_CON_R 1 R3805 2 33R2F-L-GP DMIC_PCH_DATA 17

1
FOX-CON20-5-GP-U
020.K0050.0020 DY R3828
C3807

1
10KR2F-L1-GP
2nd = 20.K0708.020 DMIC_CLK_CON 2 R3801 1 0R2J-L-GP
3D_Camera 3D_Camera

SC1U10V2KX-L1-GP
DMIC_CLK 27
DMIC_DATA_CON_R 2 R3802 1 0R2J-L-GP DMIC_DATA 27

2
B DY B

3D Camera Power ENG change 0412


U3802
DY DY
1

Q3801
EC3807 EC3809 19 CCD_PWR_EN G 5 1
IN OUT
SC4D7P50V2BN-GP

SC4D7P50V2BN-GP

2
2

GND

1
D CCD_PWR_EN# 4 3 C3814
EN# OC# SC10U10V5KX-L1-GP
0205 S
3D_Camera

2
SY6288DAAC-GP
2N7002K-2-GP 074.06288.009B
3D_Camera
84.2N702.J31 2nd = 074.00524.0C9F
2ND = 84.2N702.031 3rd = 074.02822.009F
EU3801 3rd = 84.2N702.W31

CCD_UTXN0 CCD_UTXP0
SWAP 0228 ENG change 0412 3D_Camera
1 6

2 5 EL3801 CCD
5V_S0
CCD_UTXN0 2 1
AFTP TESTPOINT
USB_PCH_PN9 15
3 4 <Core Design>
CCD_UTXP0 3 4 USB_PCH_PP9 15 USB3_URXN0 89
A
CCD MCM1012B900FBP-GP-U
USB3_URXP0 89
A
PJSRV05W-4DW6-GP
68.01012.201 CCD_UTXN0 89
Wistron Corporation
075.00005.0B7C 2nd = 68.00396.001 CCD_UTXP0 89 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2nd = 075.01256.007C 3rd = 69.10118.001 Taipei Hsien 221, Taiwan, R.O.C.
3rd = 75.09904.07C FW_GPIO35 89
DMIC_CLK_CON 89 Title
DMIC_DATA_CON_R 89 USB RE_DRIVER_3D CAMERA
ENG change 0412 Size Document Number Rev
B
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 38 of 105

Dr-Bios.com
5 4 3 2 1
5 4 3 2 1

Power Sequence PD change 0622

PD change 0622
53 1D5V_S0_PWRGD 1 R4017 2 0R0402-PAD ALL_SYS_PWRGD 6,24

26,46 IMVP_PWRGD 1 R4002 2 0R0402-PAD PCH_PWROK 17

1
C4020 1 R4018 2 0R0402-PAD VR_EN 46
SCD01U50V2KX-L-GP
D DY D

2
D4001 PD change 0622
1

17,24,53,71 PM_SLP_S3# 3

BAS16-4-GP
83.00016.I11
2ND = 83.00016.P11

ENG change 0412

1D0V_S5 5V_S5
1D2V_S3 U4002
1V_VCCST

ANNIE Run Power PD change 0622 1


2
VIN1#1
VIN1#2
GND
VOUT1#14
VOUT1#13
15
14
13
1 R4008 2 PM_SLP_S4#_R 3 12 VTT_CT_1V
17,24,51 PM_SLP_S4# ON1 CT1 1D2V_VCCSFR_OC
0R0402-PAD 4 11
PM_SLP_S3#_R VBIAS GND VTT_CT_1D2V
17,24,53,71 PM_SLP_S3# 1 R4009 2 5 10
0R0402-PAD ON2 CT2
6 9
VIN2#6 VOUT2#9
7 8
VIN2#7 VOUT2#8

1
PD change 0622 C4019

1
C4014 C4015 C4016 C4017 TPS22966DPUR-GP

1
SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP

SC33P50V2JN-3GP
DY DY C4018

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

2
74.22966.093 DY DY

SC33P50V2JN-3GP
C 1 R4001 2 VTT_PWR 2nd = 74.03523.A73 C

2
17,24,53,71 PM_SLP_S3#
0R0402-PAD 3rd = 074.05016.0093

5V_S5 3D3V_S5

U4001
3D3V_S0
15
GND
1 14
VIN1#1 VOUT1#14
2 13
VIN1#2 VOUT1#13 VTT_CT_3D3VC
3 12
ON1 CT1 5V_S0
4 11
VTT_PWR VBIAS GND VTT_CT_5VC 3D3V_S0 5V_S0
5 10
ON2 CT2
6 9 1D0V_S5
VIN2#6 VOUT2#9
7 8
VIN2#7 VOUT2#8
1

2
C4005 C4006

SC1U10V2KX-L1-GP
SC47P50V2JN-3GP

SC47P50V2JN-3GP

TPS22966DPUR-GP C4010
2

2
DY C4007 C4008
2

1
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
DY 74.22966.093 DY DY
C4002 2nd = 74.03523.A73 U4004
1

1
1

C4004 3rd = 074.05016.0093


1

SC22U6D3V5MX-2GP

SC22U10V5MX-GP

C4003 PD change 0622 1 8 0D95V_VCCIO


VIN VOUT#8
SC1U10V2KX-L1-GP

C4001 2 7
2

VIN VOUT#7
SC1U10V2KX-L1-GP

5V_S5 3 6
2

2
VCCSTG_EN_R VBIAS VOUT#6
17,24,53,71 PM_SLP_S3# 1 R4006 2 4 5 C4012
EN GND

SCD1U16V2KX-L-GP
0R0402-PAD

1
C4009 9

1
VIN

SC1U10V2KX-L1-GP
1
C4021

2
SCD01U50V2KX-L-GP APE8939GN3-GP
ENG Change 0412 DY 074.08939.0093

2
B B

ENG Change 0412

ENG change 0412


D4002
2

3 PURE_HW_SHUTDOWN# 24,26

45 3V_5V_EN 1
2

BAS16-4-GP
1

EC4001 R4011 83.00016.I11


SC47P50V2JN-3GP

200KR2J-L1-GP
DY DY 2ND = 83.00016.P11
2

2 1
1

A S5_ENABLE 24,89 A
R4012
2KR2F-L1-GP

Wistron Confidential document, Anyone can not

Dr-Bios.com
Duplicate, Modify, Forward or any other purpose
<Core Design> application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Plane Enable & SEQUENCE


Size Document Number Rev
A2
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 40 of 105
5 4 3 2 1
5 4 3 2 1

12V_BT+_connector PD change 0626 update symbol

UN 0225

1
PC4304
BAT1
SCD1U25V2KX-L-GP
D 12 D

2
10
9
PN4301 8
BI 7
4 5 BAT_IN#_1 6
24,44 BAT_IN#
3 6 BAT_SCL_1 5
24,44 BAT_SCL
2 7 BAT_SDA_1 4
24,44 BAT_SDA
1 8 3
2

K
SRN33J-7-GP-U

2
1
PD4303 PD4302 11
AZ5125-02S-R7G-GP
83.5R603.Q3F MMSZ5232BS-GP
DY
DY ACES-CON10-38-GP-U2
2ND = 83.5R603.K3F

A
20.F2133.010
3RD = 83.5R603.D3F

3
2nd = 75.08212.07D
Battery Insert
ENG change 0412 BTSW1 conn change by Royee 20150202
Battery Reset 3D3V_RTC_AUX
DY 0421 PD change 0624
RST1 conn change by Royee 20150202
3D3V_RTC_AUX

1
BIS
PR4310 PR4309
C 1 1MR2J-1-GP
2 BI_RST 10MR2J-L-GP C
DY
BTSW 1

2
1 2

BI 5
RST1
5

SW -TACT-124-GP 3 4
2 1
62.40078.001 D SW -TACT-5P-8-GP
2nd = 62.40009.D71
3rd = 62.40089.441
4 3 Q4301
BI_RST G DMN5L06K-7-GP
6

AFTP TESTPOINT
S

DY BI
89 BI
PR4307 BAT_IN#_1
89 BAT_IN#_1
2 0R2J-L-GP
1 BIS
89 BAT_SCL_1
BAT_SCL_1
BAT_SDA_1
89 BAT_SDA_1

ENG change 0416

PU4302
B TPCC8103-GP 19V_AD+ B
AD_JK
ENG change 0412
84.08103.037
ANNIE solution 2nd = 084.03335.0037
1 S D 8
Adaptor in to generate DCBATOUT 2 S D 7
3 S D 6
PR4305 PC4306 4 G D 5

200KR3F-GP

SC1U50V5ZY-1-GP-U
1

PWR_AD+_2
AD_JK 2nd change 0421

2
DCIN1
PQ4305

2
7 R2
1B 1A PQ4304 2
3 PW R_ADJK_EN 1
R1 R1
2B 2A 24 AD_OFF 1 3
K

3B 3A 2
1

4B 4A PD4301 PC4302 R2
LTA024EUB-FS8-GP

1
SC1U50V5ZY-1-GP-U

5B 5A P6SMBJ20A-GP PC4305 LTC024EUB-FS8-GP


SCD1U50V3KX-L-GP

6B 6A 83.P6SMB.AAG 84.00024.A1K 84.00024.01K PR4304


2

8 2nd = 083.00020.00AG 2ND = 84.00124.H1K 2nd = 84.02303.01K 100KR2F-L3-GP


A

3rd = 84.00124.V1K
ACES-CONN12G-2-GP

2
20.F2434.006 ENG change 0421 Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
2nd = 20.F2383.006 application without get Wistron permission
<Core Design>
A A

Wistron Corporation

Dr-Bios.com
ENG change 0412
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DC IN / BATT Conn
Size Document Number Rev
A3
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 43 of 105

5 4 3 2 1
5 4 3 2 1

2nd = 084.03335.0037
SSID = Charger 19V_AD+ PU4401
TPCC8103-GP
AD+_TO_SYS 19V_DCBATOUT
84.08103.037 BT+_R
PR4404 TPCC8103-GP
19V_AD+ 8 D S 1 D01R3721F-GP-U
7 D S 2 1 2 1 S D 8

1
6 D S 3 PR4421 2 S D 7

1
EC4415 5 D G S D 6

100KR2F-L3-GP
4 3

1
EC4414 19V_AD+ 4 G D 5

SCD1U25V2KX-L-GP
SC10U25V5KX-GP
RC4401 RC4402

1
SCD1U25V2KX-L-GP
SCD1U25V2KX-L-GP
PR4423 PU4402

1
10KR2F-L1-GP
84.08103.037 AD+_G_2 PG4401 PG4402
DY DY

1
DY DY 2nd = 084.03335.0037 PR4411

1
GAP-CLOSE-PWR-3-GP PR4409 GAP-CLOSE-PWR-3-GP 2nd change 0421

2
2nd change 0421 PR4422 0R2J-L-GP 470KR2J-L1-GP

DC_IN_D
10KR2F-L1-GP 1 2
D
DY D

2
ENG change 0412 PQ4401

2
AD+_G_1
1 2
close to PU4401 3 4 PC4403
SCD1U25V2KX-L-GP ENG change 0412 ENG change 0412
PWR_CHG_ACOK 2 5
PWR_CHG_ACP PWR_CHG_ACN
1 6 19V_DCBATOUT 19V_DCBATOUT BT+_R
3D3V_AUX_S5

1
2N7002KDW-GP PC4402
84.2N702.A3F SCD1U25V2KX-L-GP PC4404

1
2nd = 75.00601.07C SCD1U25V2KX-L-GP PWR_CHG_REGN

2
3D3V_AUX_S5 PR4430 3rd = 075.01660.007C

1
100KR2F-L3-GP RC4405 RC4406 RC4403 RC4404

1
PC4405 PC4425 PC4406
PQ4406
1

19V_AD+

SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

SCD1U25V2KX-L-GP

SCD1U25V2KX-L-GP

SCD1U25V2KX-L-GP

SCD1U25V2KX-L-GP

SCD1U25V2KX-L-GP
PR4427 CHG_AGND CHG_AGND
PD4404
2

2
5
6
7
8
PU4404
100KR2F-L3-GP

4 3 PD4403

2
AC_IN# 24

D
D
D
D
A K PWR_CHG_VCC_R 1 2 PWR_CHG_VCC SM3319NSQAC-TRG-GP DY
AC_IN 5 2 PWR_CHG_BOOT_A K A 084.03319.0A37 DY DY DY DY
CHG_ON# 24

1
PR4415 PC4401 2ND = 84.08067.A37
2

PWR_CHG_ILIM RB520S30-GP 10R5J-GP SCD47U25V3KX-1GP


6 1
RB520S30-GP SC1U10V2KX-L1-GP

G
PD change 0624 4

2
PC4409

S
S
S
2N7002KDW-GP PR4408
84.2N702.A3F CHG_AGND 0R0603-PAD PD change 0624 close to PU4404

3
2
1
2nd = 75.00601.07C 19V_DCBATOUT close to PU4402
PD4405

1
3rd = 075.01660.007C PC4417

28

2
A K PU4403 SCD047U25V2KX-GP
ENG change 0421 PD change 0622 CYNTEC. 7*7*3

VCC

2
ENG change 0412 RB520S30-GP
24 DCR: 37~40mOhm
3D3V_AUX_S5 19V_AD+ PWR_CHG_ACN 1
ACN
REGN
Idc : 5.5 A , Isat : 10A
BT+_R Charger Current=1.4~3.6A
PD change 0624 DY1 12V_BT+_connector
PD4406 18 2 PL4401 PR4417
PWR_CHG_ACP BATDRV
2
AD+_TO_SYS ACP
A KPWR_CHG_ACDET_A ENG change 0421 PC4413 1 2 BT+_R 1 2

1
17 SC3300P50V2KX-1GP IND-4D7UH-88-GP
BATSRC
PR4406 1 2PWR_CHG_CMSRC 3 68.4R710.20D D01R3721F-GP-U
RB520S30-GP 316KR2F-GP CMSRC
2nd = 68.4R71C.10K
PR4403 25 PWR_CHG_BOOT PC4420 PC4421 PC4422 PC4423
BTST

1
4K02R2F-GP 4

2
ACDRV

5
6
7
8

GAP-CLOSE-PWR-3-GP
PR4412 PU4405

GAP-CLOSE-PWR-3-GP
PD4407

D
D
D
D

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SCD1U25V2KX-L-GP
C 78K7R2F-GP MP change 0902 SM3319NSQAC-TRG-GP C

2
2

2
PG4403
A KPWR_CHG_ACDET_B 1 2 PWR_CHG_ACDET 6 26 PWR_CHG_HG 084.03319.0A37 ENG change 0412

PG4404
ACDET HIDRV
2ND = 84.08067.A37

1
RB520S30-GP

1
PR4410 PC4410 12V_BT+_connector

G
4

1
52K3R2F-L-GP SCD01U50V2KX-L-GP

S
S
S
27 PWR_CHG_PH PC4419

2
PWR_CHG_DATA PHASE

SCD1U25V2KX-L-GP
11

3
2
1
SDA

2
PWR_CHG_REGN PWR_CHG_CLK 12 23 PWR_CHG_LG
Total Power Setting SCL LODRV

1
CHG_AGND RC4407 RC4408
CHG_AGND PR4429 PWR_CHG_REGN GAP-CLOSE-PWR-3-GP

SCD1U25V2KX-L-GP

SCD1U25V2KX-L-GP
PG4414 100KR2J-4-GP PG4413 PWR_CHG_SRP_A

2
GAP-CLOSE-PWR-3-GP 1 2 22 2 1 CHG_AGND
GND

1
PR4425
1

PR4431 AC_IN 2 1 PWR_CHG_ACOK 5 10R2F-L1-GP PC4416 DY DY


PR4433 ACOK PWR_CHG_SRP
20 1 2 SCD1U25V2KX-L-GP

2
10KR2F-L1-GP 120KR2J-L-GP SRP
1 2 PWR_CHG_IADP 7
IADP PWR_CHG_SRN PWR_CHG_SRN_A
19 1 2
2

SRN
3D3V_AUX_S5
close to PR4417
AC_Protect PWR_CHG_IDCHG 8 PR4405 PR4424
IDCHG 10KR2F-L1-GP 7D5R2F-GP

1
2 1
ENG change 0412 PWR_CHG_PMON 9 PC4412
PMON
1

PR4402 16 PWR_CHG_BM# SCD1U25V2KX-L-GP


PWR_CHG_BM# 24

2
PWR_CHG_IADP TB_STAT#
Royee 201502043D3MR2J-GP
1

PWR_CHG_CMPIN PROCHOT#_BAT 10 15 PWR_CHG_BATPRES# 2 1


PROCHOT# BATPRES# BAT_IN# 24,43
PR4407 CHG_AGND
2

R1 137KR2F-L-GP PG4411
PWR_CHG_CMPIN 13 GAP-CLOSE-PWR-3-GP
CMPIN
2

AC_Protect 14
CMPOUT
1

PR4401 29
100KR2F-L3-GP PWR_CHG_ILIM GND
R2 21
ILIM
2

B PWR_CHG_ILIM BQ24780SRUYR-GP UN 0225 B


CHG_AGND 074.24780.0B73 CHG_AGND
1

PR4432
3D3V_AUX_KBC 100KR2J-4-GP DY
SMBuS AC_Protect
2

DY
Royee 20150204
PQ4408
1
2

PD change 0622
RN4401 4 3
DGPUHOT# 79
SRN4K7J-8-GP
1 PR4446 2 AC_Protect_R1 5 2 AC_Protect_R 2 PR4442 1
0R0402-PAD 0R0402-PAD
6 1
4
3

PWR_CHG_CLK 6,24,46 PROCHOT#_CPU


24,43 BAT_SCL 2 1 DY PD change 0622

1
PG4408 GAP-CLOSE-PWR-3-GP 2N7002KDW-GP
84.2N702.A3F PC4426
2 1 PWR_CHG_DATA 2nd = 75.00601.07C SCD01U50V2KX-L-GP
24,43 BAT_SDA

2
PG4410 GAP-CLOSE-PWR-3-GP

net change 0223 PD change 0622


2 1 PWR_CHG_IDCHG 24 AD_IA 2 PR4413 1 0R0402-PAD PWR_CHG_IADP
24 BT_IA
1

PG4409 PC4411
1

GAP-CLOSE-PWR-3-GP SC220P50V2KX-3GP PR4428


PC4407 8K45R2F-2-GP
DY
2

SC100P50V2JN-L-GP MP change 0812


2

IDCHG : Dischange detect current : IADP : AC adapter detect current :


CHG_AGND
CHG_AGND = 8 or 16 x ( Vsrn - Vsrp ) = 20 or 40 x ( Vacp - Vacn ) / 10mohm

A 3D3V_S5 A
2 1 PWR_CHG_PMON
46 PWR_CORE_PSYS PR4447
PG4412 3D3V_S5 6,24,46 PROCHOT#_CPU 0R0402-PAD
1

GAP-CLOSE-PWR-3-GP 1 2 PROCHOT#_BAT
PC4408 PR4435 24 DC_Protect_EC
SC100P50V2JN-L-GP <Core Design>
100KR2F-L3-GP
2

PQ4402
PQ4409
1

G PROCHOT#_BAT_R
Wistron Corporation
2

PR4434 4 3
PMON : Total system power 100KR2F-L3-GP D 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
79 DGPUHOT#

Dr-Bios.com
CHG_AGND 5 2 PROCHOT#_BAT Taipei Hsien 221, Taiwan, R.O.C.
S
2

PROCHOT#_BAT_R 6 1 Title
2N7002K-2-GP MP change 0902 CHARGER HPA02224
2N7002KDW-GP 84.2N702.J31
84.2N702.A3F 2ND = 84.2N702.031 Size Document Number Rev
2nd = 75.00601.07C 3rd = 84.2N702.W31 Custom
Newgate 1M
Date: Wednesday, September 02, 2015 Sheet 44 of 105
5 4 3 2 1
5 4 3 2 1

3D3V_S5 PWR_3D3V 19V_DCBATOUT PWR_DCBATOUT_3D3V 3D3V_S5 PWR_3D3V

PG4501 PG4506 PG4522


1 2 1 2 1 2 19V_DCBATOUT PWR_DCBATOUT_5V
PWR_5V 5V_S5
GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP
PG4502 PG4507 PG4523 PG4510 PG4515
1 2 1 2 1 2 1 2 1 2
PWR_DCBATOUT_5V
GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP
PG4503 PG4508 PG4524 RF 0412 PG4511 PG4516
1 2 1 2 1 2 1 2 1 2

1
GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP PWR_DCBATOUT_3D3V PC4522 PC4515 PC4502 GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SCD1U50V3KX-L-GP
PG4504 PG4509 PG4525 PG4512 PG4517
D 1 2 1 2 1 2 1 2 1 2 D

2
GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP
PG4505 PG4526 PG4513 PG4518

1
1 2 1 2 RC4501 RC4502 1 2 1 2

SCD1U25V2KX-L-GP

SCD1U25V2KX-L-GP
20141022 Jack DY DY Add 3rd 0423
GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP

2
PG4514 PG4519
PU4507 Muxless2
MP change 0814 1 2 1 2
3
1 4 GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP
PWR_DCBATOUT_3D3V 10 PG4520
19V_DCBATOUT 9 1 2
7
close to PU4504 8 6 GAP-CLOSE-PWR-6-GP
DY 5 PG4521
PC4501 PC4509 PC4511 1 2
1

1
SC10U25V5KX-GP

SC10U25V5KX-GP
PC4513 PC4512

SCD1U50V3KX-L-GP

SC10U25V5KX-GP
GAP-CLOSE-PWR-6-GP
SCD1U50V3KX-L-GP

FDMS3600-02-RJK0215-COLAY-GP
2

2
1st = 84.00920.037 PG4527

D 8
D 7
D 6
D 5
PU4504 PU4501 2nd = 84.03664.037 1 2
SM3319NSQAC-TRG-GP RT6575DGQW-GP 3rd = 075.06994.0073
GAP-CLOSE-PWR-6-GP

12
084.03319.0A37 074.06575.0A43
2ND = 84.08067.A37 PG4528

VIN
MagLayer. 6.86 x 6.47 x 3.0mm 4 PC4517 PC4518 MagLayer. 6.86 x 6.47 x 3.0mm 1 2

G
SCD1U50V3KX-L-GP PR4508 PR4509 SCD1U50V3KX-L-GP

S
S
S
Design Current : 9.67A DCR: 18~20 mOhm 2D2R3F-L-GP 2D2R3F-L-GP DCR: 18~20 mOhm GAP-CLOSE-PWR-6-GP
Design Current : 11A

1
2
3
OCP : 13.5A Idc : 8A , Isat : 14A 2 1 PWR_3D3V_BOOT2_A 1 2 PWR_3D3V_BOOT2 9
BOOT2 BOOT1
17 PWR_5V_BOOT1 1 2 PWR_5V_BOOT1_A 1 2 Idc : 8A , Isat : 14A
OCP : 16A PG4529
PWR_3D3V PWR_3D3V_HG2 10 16 PWR_5V_HG1 PWR_5V 1 2
PL4502 UGATE2 UGATE1 PL4501
1 2 PWR_3D3V_PH2 8 18 PWR_5V_PH1 1 2 GAP-CLOSE-PWR-6-GP
IND-2D2UH-46-GP-U PHASE2 PHASE1 IND-2D2UH-46-GP-U
68.2R210.20B PWR_3D3V_LG2 11 15 PWR_5V_LG1 68.2R210.20B PG4535
PU4508 LGATE2 LGATE1
2nd = 68.2R21B.10J 2nd = 68.2R21B.10J 1 2
D 8
D 7
D 6
D 5
SM3317NSQAC-TRG-GP
084.03317.0A37 14 PWR_5V_BYP1 GAP-CLOSE-PWR-6-GP
1

PC4519 PG4530 BYP1


2ND = 84.08065.B37

1
SCD1U25V2KX-L-GP

GAP-CLOSE-PWR-3-GP

PT4502 PWR_3D3V_FB2 4 2 PWR_5V_FB1 PG4532 PG4531 PC4520 PG4536


FB2 FB1

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

SCD1U25V2KX-L-GP
C ST150U6D3VDM-28-GP PT4501 1 2 C
2

077.51571.0001 2ND change 0423 4 ST150U6D3VDM-28-GP


G
2

2
077.51571.0001 GAP-CLOSE-PWR-6-GP
S
S
S

2
PWR_3D3V_EN2 6 20 PWR_5V_EN1
PWM 3D3V OCP PWM 5V OCP
1
2
3

EN2 EN1
MP change 0814
PWR_3D3V_CS2 5 1 PWR_5V_CS1
CS2 CS1
PWR_3D3V_FB2_A

RF 0303

PWR_5V_FB1_A
PR4501 19 PR4502
RF 0303 133KR2F-GP VCLK 37K4R2F-1-GP PWR_5V

PWR_3D3V_5V_PG 7 21

2
PWR_3D3V PGOOD GND
Close to FB2 Pin (pin4)

LDO3

LDO5
Close to FB1 Pin (pin2)

1
RC4505 RC4506
1

PD change 0625

13

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
PR4512

2
1

RC4503 RC4504 6K98R2F-GP 3D3V_AUX_S5 PG4533 PG4534 5V_AUX_S5 PR4515


R1 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
R1 15K8R2F-GP
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

1 2 1 2 DY DY
2

MP change 0804(PD EC)

2
PWR_3D3V_LDO3
DY DY

PWR_5V_LDO5
close to PL4501

1
PR4520
1

PR4517 10KR2F-L1-GP
close to PL4502
R2 10KR2F-L1-GP 3D3V_AUX_S5 3D3V_S5
R2

2
1

1
2

DY PR4522 PR4519 PC4527 PC4526

1
100KR2F-L3-GP 100KR2F-L3-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
DY
2

2
17,52 3V_5V_POK 1 PR4523 2
0R0402-PAD
Vout = 2 * ( 1 + R1/R2 )
Vout = 2 * ( 1 + R1/R2 )
= 2 * ( 1 + 6.8K / 10K) ENG change 0412
B
PD change 0622 = 2 * ( 1 + 15.8K / 10K) B
= 3.36V
= 5.16 V

ENG change R4515 value 0504B


PWM 5V En PD change 0622

PWR_5V_EN1 1 PR4521 2
0R0402-PAD 5V_CHARGER_EN 24

PD change 0622
PWM 3D3V En
PWR_3D3V_EN2 1 PR4527 2
0R0402-PAD 3V_5V_EN 40

Vin POR threshold , Rising :4.6 V ; Failing : 3.7 V


EN threshold Logic-High : 1.6 V
EN threshold Logic-Low : 0.4 V

A A

Dr-Bios.com
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
RT6575D_5V/3D3V
Size Document Number Rev
A2
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 45 of 105
5 4 3 2 1
5 4 3 2 1

5V_S5 19V_DCBATOUT PROG1 - PR4612 : 110K -> VBOOT 0V / Slew Rate : 30mV/us / VRA:IA,VR2:GT,VR3:SA
PROG2 - PR4613 : 34K -> VRA IMAX:70A / VRA 2 Phase
PROG3 - PR4614 : 16K9 -> VRB IMAX:50A / VRB 2 Phase
PR4674
PROG4 - PR4615 : 182K -> Droop Active / VRA & VRB FREQ 750KHz

1
1V_VCCST 45D3R2F-L-GP PD change 0622
PR4602 PR4604
VIDSCK_CPU
PROG5 - PR4616 : 121K -> VRC IMAX 13A / VRC FREQ 750KHz
1 2 0R0402-PAD 0R0402-PAD
PD change 0622
PC4605 PR4610 ENG change 0421

2
PR4673 SC2K2P50V2KX-L-GP 1KR2F-3-GP
100R2F-L3-GP PC4602 PC4604 1 2 ISUMN_C_D 1 2
1 2 VIDSOUT_CPU SC1U10V2KX-1GP SCD1U25V2KX-GP

1
PR4605 1 2 1 2
10R2F-L-GP
PR4675 1 2 ENG Part change and Dummy 0430 PR4619
6 VIDSOUT_CPU
1KR2F-3-GP NTC-10K-23-GP-U
PD stuff 0701 PR4617

1
D 1 2 PROCHOT#_CPU PR4608 ENG change 0412 69.60011.131 D

1ISUMN_C_B
DY 0R2J-2-GP 590R2F-GP
PWR_I4_SEN1_N 50
JJ 20150202 1 2 1 2 PR4622

2
6 VIDALERT#_CPU
11KR2F-L-GP

1
PR4620 ENG change 0430
44 PWR_CORE_PSYS PWR_I4_SEN1_P 50

2
49D9R2F-L1-GP PC4606 PC4607
1 2 SCD047U25V2KX-GP SCD01U50V2KX-L-GP PR4624

2
6 VIDSCK_CPU
MP change 0804 2K61R2F-1-GP
ENG change 0430
PC4614
SC2K2P50V2KX-L-GP

2
6,24,44 PROCHOT#_CPU
1 2

1
3D3V_S0 PR4612 PR4613 PR4614 PR4615 PR4616
PR4632 110KR2F-L-GP 34KR2F-GP 16K9R2F-GP 182KR2F-L1-GP 121KR2F-L-GP
8K06R2F-GP

2
1 2

2
PR4623
10KR2F-L1-GP

1
PC4613 ENG change 0412 PC4609
SC330P50V2KX-3GP MP change 0804 SC330P50V2KX-3GP PR4626

1
1 2 1 2 100R2F-L3-GP
DY PD change 0622

RN

2
26,40 IMVP_PWRGD
PR4635 PR4627 PC4610
DYPC4611

1
97K6R2F-GP 499R2F-2-GP SC1KP50V2KX-L-1-GP 1 PR4629 4
40 VR_EN VSSSA_SENSE 8
1 2 1 2 PWR_VCCSA_FB_C_A 1 2 SC330P50V2KX-3GP 2 3 VCCSA_SENSE 8

1
PC4608

2
PR4645 SCD01U50V2KX-1GP DY 0R4P2R-PAD

PWR_VCCGT_ALERT#

1
PWR_VCCGT_PROG1
PWR_VCCGT_PROG2
PWR_VCCGT_PROG3
PWR_VCCGT_PROG4
27K4R2F-GP PR4630 PC4612

PWR_VCCGT_DATA
2

PWR_VCCGT_VCC
PWR_VCCGT_CLK
1 2 MP change 0902 2K26R2F-1-GP SCD01U50V2KX-L-GP PR4634

PWR_VCCGT_VIN
PROCHOT#_CPU
1 2 VCCSA_SENSE_B 1 2 100R2F-L3-GP
PR4638
PR4637 14KR2F-GP

2
1 2 NTC_B 1 2

NTC-470K-2-GP-U PC4616 1V_VCCSA


modify 0305 69.60011.101 SC33P50V2JN-3GP PR4633 PC4615
2nd = 069.60006.0001 1 2 2KR2F-L1-GP SC330P50V2KX-3GP
PWR_VCCSA_FB_C_A

48
47
46
45
44
43
42
41
40
39
38
37
PWM_C 50 1 2 1 2
PD change 0701 PU4601 PD change 0622 DY
C
DY C

VR_ENABLE
VR_READY
VR_HOT#
SCLK
ALERT#
SDA

PROG1
PROG2
PROG3
PROG4
VCC
VIN
PC4618 PR4639 ENG change 0430
SC3300P50V2KX-1GP 2KR2F-L1-GP
modify 0228 1 2 PWR_VCCGT_COMP_B_A 1 2 1 PR4628 2 PR4636 PC4617
0R0402-PAD FCCM_C 50 4K02R2F-GP SC8200P50V2KX-GP
PWR_CORE_PSYS 1 36 PWR_VCCSA_PROG5 1 2 PWR_VCCSA_COMP_C_A 1 2
1V_VCCGT PSYS PROG5
排排 PWR_VCCGT_IMON_B 2
IMON_B PWM_C
35
PC4621 PR4641 PWR_VCCGT_NTC_B 3 34 PWR_VCCSA_FCCM_C PC4620
SC680P50V2KX-2GP 2KR2F-L1-GP PWR_VCCGT_COMP_B NTC_B FCCM_C PWR_VCCSA_ISUMN_C SC33P50V2JN-3GP
RN4603 4 33
PWR_VCCGT_FB_B_A PWR_VCCGT_FB_B COMP_B ISUMN_C
1 2 1 2 5 32 1 2
PWR_VCCGT_RTN_B FB_B ISUMP_C PWR_VCCSA_RTN_C
2 3 6 31
R2 RTN_B RTN_C PWR_VCCSA_FB_C PC4619
1 4 7 30
R1
PR4644 PWR_VCCGT_ISUMN_B ISUMP_B FB_C PWR_VCCSA_COMP_C SC330P50V2KX-3GP
PD change 0701 8
ISUMN_B COMP_C
29
PD change 0622 2K94R2F-GP PWR_VCCGT_ISEN1_B 9 28 PWR_VCCSA_IMON_C 1 2
SRN100F-1-GP VCCGT_SENSE_A PWR_VCCGT_ISEN2_B ISEN1_B IMON_C
1 2 10 27
PWR_VCCGT_FCCM_B ISEN2_B PWM3_A
11 26 PWM2_A 47
FCCM_B PWM2_A
12 25 PWM1_A 47
PWM1_B PWM1_A PR4642
1 PR4606 2 PD change 0701 100KR2F-L1-GP

ISUMN_A
ISUMP_A
PWM2_B

COMP_A

FCCM_A
ISEN1_A
ISEN2_A
ISEN3_A
9 VCCGT_SENSE

IMON_A
0R0402-PAD 49 1 2

NTC_A

RTN_A
GND

FB_A
PC4622 PC4601 PR4646
SC330P50V2KX-3GP SC220P50V2KX-3GP 1KR2F-3-GP
1 PR4607 2 1 2 1 2 PWR_VCCGT_COMP_B_B 1 2 ISL95855HRTZ-GP
9 VSSGT_SENSE DY

13
14
15
16
17
18
19
20
21
22
23
24
0R0402-PAD
1

PC4623
SC330P50V2KX-3GP PC4624
SCD01U50V2KX-L-GP PD change 0701
DY
2

PWR_CORE_ISUMN_A
PWR_CORE_COMP_A

PWR_CORE_FCCM_A
PWR_CORE_IMON_A
PWR_CORE_NTC_A

PWR_CORE_RTN_A
PWR_CORE_FB_A
PD change 0622
1

PR4648
2K61R2F-1-GP 1 PR4676 2 1 PR4650 2 FCCM_A 47
48 ISEN1_B
0R0402-PAD 0R0402-PAD
1

1 PR4677 2 5V_S5
48 ISEN2_B
ISUMP_B_D

PC4625 PC4626 0R0402-PAD


2

B SCD047U25V2KX-GP SCD15U16V2KX-GP ISEN3_A 1 PR4678 2 B


2

2
1

PR4649 0R0402-PAD
48 PWR_I2_SEN1_P ISEN2_A 47
11KR2F-L-GP PD change 0622 PC4628
ISEN1_A 47
SCD1U25V2KX-GP
PD change 0701 PR4653 PD stuff 0701 1 2
1

309R2F-GP
2

48 PWR_I2_SEN1_N
1 2 PC4630 1 2 SCD022U16V2KX-3GP
PR4652
NTC-10K-23-GP-U PC4631 1 2 SCD022U16V2KX-3GP
69.60011.131 PR4659 PC4635
1KR2F-3-GP SC2200P50V2KX-2GP ENG change 0421
1 2 ISUMN_B_A 1 2
2

1 2 ISUMN_A_A 1 2
PD stuff 0701

1
PC46341 2 SCD022U16V2KX-3GP SC2200P50V2KX-2GP 1KR2F-3-GP
PC4636 PR4660
ENG change 0421
PC46371 2 SCD022U16V2KX-3GP ENG Dummy 0430 PR4661
1

PC4633 NTC-10K-23-GP-U
PD stuff 0701

1ISUMN_A_B
SCD1U25V2KX-GP 69.60011.131 PWR_I1_SEN1_N 47

1
1 PR4662 2 PR4663 PR4667
2

48 FCCM_B
0R0402-PAD 432R2F-GP 11KR2F-L-GP

2
48 PWM1_B
48 PWM2_B 1 2 PWR_I1_SEN1_P 47
PD change 0622

1
PR4668

2
ENG change 0416 PC4640 PC4641 2K61R2F-1-GP
SCD15U16V2KX-GP SCD022U16V2KX-3GP

2
1

PR4651

2
1

14KR2F-GP
PR4657 PR4655
1

2KR2F-L1-GP 2KR2F-L1-GP
2
1

PC4629 PR4654 MP change 0902


SC330P50V2KX-3GP 97K6R2F-GP
PWR_CORE_NTC_A_A

2
2

1
PC4643
2

PWR_CORE_COMP_A_A
1

ENG change 0416 SC330P50V2KX-3GP PR4669


PC4632 PR4666 1 2 PD change 0622 100R2F-L3-GP
1

SC18P50V2JN-1-GP
1PWR_CORE_FB_A_A

499R2F-2-GP
2

RN
PR4665 PC4645
DY

2
2K55R2F-GP CORE_SENSE_C PC4644 SC330P50V2KX-3GP
1 2

SCD01U50V2KX-L-GP DY 1 PR4670 4
2

2
A VSSCORE_SENSE 7 A
2 3
2

VCCCORE_SENSE 7
modify 0305 PC4642

1
SC330P50V2KX-3GP 0R4P2R-PAD
2
1

PR4672
1

PR4658 CORE_SENSE_A 100R2F-L3-GP

Dr-Bios.com
1

PR4664 NTC-470K-2-GP-U PC4639


27K4R2F-GP <Core Design>
PC4638 SC680P50V2KX-2GP ENG change 0416
69.60011.101

2
SC3300P50V2KX-1GP
2

2nd = 069.60006.0001 ENG change 0416


Wistron Corporation
2

1V_CPU_CORE
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title
ISL95855_CPU_VCORE(1/3)
Size Document Number Rev
A2 1M
Newgate
Wednesday, September 02, 2015
Date: Sheet 46 of 105
5 4 3 2 1
5 4 3 2 1

MP change 0814
PWR_DCBATOUT_COREA
19V_DCBATOUT PWR_DCBATOUT_COREA 5V_S5

PG4702
1 2 PR4702
2D2R2F-GP
GAP-CLOSE-PWR-6-GP 2 1 PWR_CORE_VCCA
PG4703

1
1 2 PC4706 PC4707
SC1U10V2KX-1GP SC1U10V2KX-1GP
GAP-CLOSE-PWR-6-GP PR4703

2
PG4704 2D2R3-1-U-GP
PWR_CORE_BOOTA_A

29

10
11
33
1 2 1 2

8
9
PU4702 MagLayer. 6.86 x 6.47 x 4.0mm
GAP-CLOSE-PWR-6-GP

VCC

PVCC

VIN
VIN
VIN
VIN
VIN
PG4705 DCR: 0.66 +- 7% mOhm
1 2 PC4701 1V_CPU_CORE
D
31 5 PWR_CORE_BOOTA SCD22U25V3KX-GP
Idc : 36A , Isat : 45A D

GAP-CLOSE-PWR-6-GP NC#31 BOOT PWR_CORE_BOOTA_B


7 1 2 PL4701
PG4706 PR4705 2 PWR_CORE_PWMA PHASE
1 0R0402-PAD 1
46 PWM1_A PWM PWR_CORE_PHA
1 2
SW#16
16 1 2 RF 0303
PR4706 2 1 0R0402-PAD PWR_CORE_FCCM_PS4#A 2 17
GAP-CLOSE-PWR-6-GP 46 FCCM_A FCCM_PS4# SW#17 IND-D15UH-11-GP
18
PG4707 SW#18 1V_CPU_CORE
30
NC#30 SW#19
19 ENG change 0430 68.R1510.10H
1 2 PD change 0622 SW#20
20
MP change 0812 2ND = 68.R1510.20A
21
GAP-CLOSE-PWR-6-GP SW#21 PT4701
6 22

1
NC#6 SW#22
23
PWR_DCBATOUT_COREA SW#23 PG4701 PG4708
24

1
SW#24

ST470U2VDM-GP
ISUMP_CORE_A
27 25 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP RC4701 RC4702

2
19V_DCBATOUT GL#27 SW#25
35 26

1
GL#35 SW#26

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
2

2
AGND

PGND
PGND
PGND
PGND
PGND
PGND
NC#4
PR4709
100KR2F-L1-GP
1 2 V1N_B DY DY
SIC631CD-T1-GE3-GP

4
32

12
13
14
15
28
34
1

PC4703 PC4702 PC4704 PC4705 PC4708 PT4702

1
SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

ST15U25VDM-1-GP

PR4707 PR4710

3K65R2F-1-GP

100KR2F-L1-GP
DY PR4708
2

10R2F-L1-GP close to PL4701


DY DY

2
46 PWR_I1_SEN1_P
PD change 0622 46 ISEN1_A
V2N_B

46 PWR_I1_SEN1_N

ENG change 0412

C C

19V_DCBATOUT
5V_S5

PR4711
2D2R2F-GP
2 1 PWR_CORE_VCCB
1

1
PC4710 PC4711
ENG delete 0412 SC1U10V2KX-1GP SC1U10V2KX-1GP
PR4713
2

2
2D2R3-1-U-GP
PWR_CORE_BOOTB_A

29

10
11
33
ENG change 0412 1 2

8
9
PU4701 MagLayer. 6.86 x 6.47 x 4.0mm

VCC

PVCC

VIN
VIN
VIN
VIN
VIN
DCR: 0.66 +- 7% mOhm
PC4716 1V_CPU_CORE
19V_DCBATOUT 31 5 PWR_CORE_BOOTB SCD22U25V3KX-GP
Idc : 36A , Isat : 45A
NC#31 BOOT PWR_CORE_BOOTB_B
7 1 2 PL4702
PR4714 2 PWR_CORE_PWMB PHASE
1 0R0402-PAD 1
46 PWM2_A PWM PWR_CORE_PHB
16 1 2
PR4715 2 PWR_CORE_FCCM_PS4#B 2 SW#16
1 0R0402-PAD 17
46 FCCM_A FCCM_PS4# SW#17 IND-D15UH-11-GP
SW#18
18 ENG change 0430
30
NC#30 SW#19
19
MP change 0812 68.R1510.10H
PD change 0622 20 2ND = 68.R1510.20A
1

PC4715 PC4709 PC4712 PC4713 PC4714 SW#20


21
SW#21
SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

6 22 PT4704

1
NC#6 SW#22
23
2

SW#23 PG4715 PG4716


24
SW#24

ST470U2VDM-GP
27 25 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
DY

2
GL#27 SW#25
35 26

ISUMP_CORE_B1

1
GL#35 SW#26

AGND

PGND
PGND
PGND
PGND
PGND
PGND
NC#4
PR4720
PD change 0622 SIC631CD-T1-GE3-GP 100KR2F-L1-GP V2N_B
4
32

12
13
14
15
28
34
1 2

1
B PR4717 PR4719 B

100KR2F-L1-GP
3K65R2F-1-GP PR4718
10R2F-L1-GP
DY

2
46 PWR_I1_SEN1_P

46 ISEN2_A
V1N_B

46 PWR_I1_SEN1_N

A A

Dr-Bios.com
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
SIC631CD_CPU_VCORE(2/3)
Size Document Number Rev
A2
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 47 of 105
5 4 3 2 1
5 4 3 2 1
ENG change 0412
5V_S5
PWR_DCBATOUT_VCCGTA

1
PC4802
SC1U10V2KX-1GP
19V_DCBATOUT PWR_DCBATOUT_VCCGTA 5V_S5 PR4802

2
PG4802 2D2R2F-GP
GAP-CLOSE-PWR-3-GP 2 1 PWR_VCCGT_VCCA PR4803
1 2 2D2R3-1-U-GP
PWR_VCCGT_BOOTA 1 2PWR_VCCGT_BOOTA_A
PG4803
GAP-CLOSE-PWR-3-GP

1
1 2 PC4803
SC1U10V2KX-1GP

21
2

6
7
8

4
PG4804 PU4802

2
GAP-CLOSE-PWR-3-GP MagLayer. 6.86 x 6.47 x 4.0mm

VCC

VIN
VIN
VIN

PVCC

BOOT
1 2
PD change 0622 PC4801 DCR: 0.66 +- 7% mOhm
PG4805 SCD22U25V3KX-GP 1V_VCCGT
GAP-CLOSE-PWR-3-GP 5 PWR_VCCGT_BOOTA_B 1 2
Idc : 36A , Isat : 45A
D PL4802 D
PHASE
1 2
PR4805 2 1 0R0402-PAD PWR_VCCGT_FCCM_PS4#A 1 16 PWR_VCCGT_PHA 1 2
PG4806 46 FCCM_B FCCM_PS4# VSWH#16
15
GAP-CLOSE-PWR-3-GP VSWH#15 IND-D15UH-11-GP
VSWH#14
14 ENG change 0430
1 2 PR4801 2 1 0R0402-PAD PWR_VCCGT_PWMA 22 13 68.R1510.10H
MP change 0812

2
46 PWM1_B PWM VSWH#13
VSWH#12
12 2ND = 68.R1510.20A
PG4808 PG4807 PG4809
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
1 2 24 PT4801

1
GL#24
3 19
NC#3 GL#19

PGND
PGND
PGND
PGND
PGND
PGND
PGND

ISUMP_GT_A

ST470U2VDM-GP
PWR_DCBATOUT_VCCGTA

2
PR4804 ISUMN_GT_A

PR4810
SIC532CD-T1-GE3-GP 100KR2F-L1-GP

23
20
18
17
11
10
9
1 2
1

PC4804 PC4805 PC4806 PC4807 PC4808

1
SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

PR4807 PR4808
3K65R2F-1-GP 10R2F-L-GP
DY
2

DY

2
100KR2F-L1-GP
5V_S5 46 PWR_I2_SEN1_P

PD change 0622 46 ISEN1_B


ISUMN_GT_B

1
ENG change 0412 PC4809
5V_S5 PWR_DCBATOUT_VCCGTB SC1U10V2KX-1GP

2
19V_DCBATOUT PWR_DCBATOUT_VCCGTB PR4811 46 PWR_I2_SEN1_N
PG4810 2D2R2F-GP PR4814
GAP-CLOSE-PWR-3-GP 2 1PWR_VCCGT_VCCB 2D2R3-1-U-GP
1 2 PWR_VCCGT_BOOTB 1 2PWR_VCCGT_BOOTB_A

PG4811
GAP-CLOSE-PWR-3-GP
C 1 2 C

1
PC4810

21
2

6
7
8

4
PG4812 SC1U10V2KX-1GP PU4803 MagLayer. 6.86 x 6.47 x 4.0mm
GAP-CLOSE-PWR-3-GP

VCC

VIN
VIN
VIN

PVCC

BOOT
2
1 2 DCR: 0.66 +- 7% mOhm
PD change 0622 PC4811
PG4801 SCD22U25V3KX-GP
Idc : 36A , Isat : 45A 1V_VCCGT
GAP-CLOSE-PWR-3-GP 5 PWR_VCCGT_BOOTB_B 1 2
PHASE PL4803
1 2
PR4815 2 1 0R0402-PAD PWR_VCCGT_FCCM_PS4#B 1 16 PWR_VCCGT_PHB 1 2
PG4813 46 FCCM_B FCCM_PS4# VSWH#16
15
GAP-CLOSE-PWR-3-GP VSWH#15 IND-D15UH-11-GP
VSWH#14
14 ENG change 0430
1 2 PR4813 2 1 0R0402-PAD PWR_VCCGT_PWMB 22 13 68.R1510.10H
MP change 0812

2
46 PWM2_B PWM VSWH#13
PG4816 VSWH#12
12
PG4814
2ND = 68.R1510.20A PG4815
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
1 2 24 PT4802

ISUMP_GT_B 1

1
GL#24
3 19
NC#3

PGND
PGND
PGND
PGND
PGND
PGND
PGND
GL#19

ST470U2VDM-GP
PWR_DCBATOUT_VCCGTB PR4806

2
PR4809
100KR2F-L1-GP ISUMN_GT_B
SIC532CD-T1-GE3-GP 1 2

23
20
18
17
11
10
9
1

1
PC4812 PC4813 PC4814 PC4815 PC4816 PR4817 PR4818
SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

3K65R2F-1-GP 10R2F-L-GP
DY
2

DY

2
100KR2F-L1-GP
46 PWR_I2_SEN1_P

46 ISEN2_B
PD change 0622 ISUMN_GT_A

46 PWR_I2_SEN1_N
B B

A A

Dr-Bios.com
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

SIC631CD_CPU_VCORE(2/3)
Size Document Number Rev
A2
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 48 of 105
5 4 3 2 1
5 4 3 2 1

PW R_DCBATOUT_VCCSA
19V_DCBATOUT PW R_DCBATOUT_VCCSA
PG5002
GAP-CLOSE-PW R-3-GP
1 2

PG5003
GAP-CLOSE-PW R-3-GP

1
1 2 PC5004 PC5005 PC5006 PC5007 PC5008

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
PG5004

2
GAP-CLOSE-PW R-3-GP
D 1 2 DY D

PG5005
GAP-CLOSE-PW R-3-GP
5V_S5 PW R_DCBATOUT_VCCSA 5V_S5 1 2

PG5001
PR5002 GAP-CLOSE-PW R-3-GP PD change 0622
2D2R2F-GP 1 2
2 1 PW R_VCCSA_VCC
PG5006

1
PC5002 PC5001 GAP-CLOSE-PW R-3-GP
SC1U10V2KX-1GP SC1U10V2KX-1GP 1 2

2
ENG change 0412
PR5003
2D2R3-1-U-GP
PW R_VCCSA_BOOTA 1 2 PW R_VCCSA_BOOTA_A
Cyntec. 6.6mmx7.3mm x3.0mm
DCR: 2.5~3m Ohm
Idc : 23A , Isat : 34A

1
SCD22U25V3KX-GP

21
2

6
7
8

4
PU5001 PC5003
1V_VCCSA

VCC

VIN
VIN
VIN

PVCC

BOOT

2
PL5001
ENG change 0430
5 PW R_VCCSA_PH MP change 0812 1 2
C PHASE C
PR5006 2 1 0R0402-PAD PW R_VCCSA_FCCM_PS4# 1 16 COIL-D47UH-6-GP
46 FCCM_C FCCM_PS4# VSWH#16
VSWH#15 15 68.R4710.20F
PR5004 2 VSWH#14 14 2nd = 68.R4710.10V
46 PW M_C 1 0R0402-PAD PW R_VCCSA_PW M 22 PWM VSWH#13 13
VSWH#12 12

1
PT5001

SE330U2VDM-L-GP
PG5007 PG5008
PD change 0622 24 GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP

2
GL#24
3 19

1
NC#3 GL#19
PGND
PGND
PGND
PGND
PGND
PGND
PGND
DY
SIC532CD-T1-GE3-GP ISUMP_C_A ISUMN_C_A
23
20
18
17
11
10
9

1
PR5008

3K65R2F-1-GP
PR5001
0R0402-PAD

2
PD change 0622
46 PW R_I4_SEN1_P

B B
46 PW R_I4_SEN1_N

<Core Design>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

SIC631CD_VCCSA
Size Document Number Rev
A3
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 50 of 105

5 4 3 2 1
5 4 3 2 1

19V_DCBATOUT PWR_DCBATOUT_VDDQ PWR_1D2V 1D2V_S3

PG5117 PG5119
1 2 1 2

GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP
PG5118 PG5120
1 2 1 2

GAP-CLOSE-PWR-6-GP GAP-CLOSE-PWR-6-GP
PG5121
VID 20141022 Jack 1 2

Logic-High = 0.75V MP change 0814 GAP-CLOSE-PWR-6-GP


PG5122
Logic-Low = 0.3V 1 2
PR5107
5D1R2F-GP GAP-CLOSE-PWR-6-GP
PWR_VDDQ_VID 2 1 5V_S5 PG5123
1 2

1
PC5102
SC1U10V2KX-L1-GP GAP-CLOSE-PWR-6-GP
PWR_DCBATOUT_VDDQ PG5124

2
1 2
20141022 Jack GAP-CLOSE-PWR-6-GP
OCP setting
D
PD change 0622 D
MP change 0814

1
PC5103 PC5104 PC5105

SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

SCD1U25V2KX-L-GP
PWR_VDDQ_CS PWR_VDDQ_VDD 1 PR5109 2
0R0402-PAD
5V_S5 Muxless 20141022 Jack

2
1
3D3V_S5 PU5108 2

1
PR5114 PC5107 3
220KR2F-L-GP SC1U10V2KX-L1-GP 1 4

1
PR5111 10

2
10KR2F-L1-GP 9

2
DY 7
8 6
5

2
PU5101
RT8231AGQW-GP

13

11

12
074.08231.0073 PR5112 PC5108
2D2R3F-L-GP SCD1U50V3KX-L-GP FDMS3600-02-RJK0215-COLAY-GP Design Current : 15.6A

CS

VID

VDD
Freq. setting
PWR_DCBATOUT_VDDQ 1st = 84.00920.037 OCP : 21.84A
18 PWR_VDDQ_BOOT 1 2 PWR_VDDQ_BOOT_A 1 2 2nd = 84.03664.037
PR5113 PWR_VDDQ_PG BOOT
750K -> 350K Hz 10
PGOOD 3rd = 075.06994.0073
750KR2F-L-GP
1 2 PWR_VDDQ_TON 9 17 PWR_VDDQ_HG Add 3rd 0423
TON UGATE
PWR_VDDQ_EN 8 PL5101 PWR_1D2V
S5 IND-1UH-94-GP-U
PWR_VTT_EN 7 16 PWR_VDDQ_PH 1 2
PG5115 S3 PHASE
1D2V_S3 1 2 PWR_VDDQ_VLDOIN 19 68.1R01B.10K
VLDOIN
2nd = 68.1R010.20I
GAP-CLOSE-PWR-6-GP 1 PC5109
LGATE
15 PWR_VDDQ_LG
PG5116 SC10U6D3V3MX-L-GP
Close to output cap pin1, not

1
1 2 PC5110 PT5102
2

inside of the output cap

SC22U6D3V5MX-L3-GP

SE330U2VDM-L-GP
GAP-CLOSE-PWR-6-GP 1 14

2
VTTGND PGND PG5101
PD change 0622 PWR_VDDQ_VTT
MP change 0814 GAP-CLOSE-PWR-6-GP
5 PWR_VDDQ_VDDQ 2 1 1D2V_S3
PWR_2D5V_PG VDDQ
1 PR5108 2 PWR_VDDQ_EN
0R0402-PAD 20 6 PWR_VDDQ_FB MP change 0814
VTT FB
1

PC5106 2
SCD1U16V2KX-L-GP VTTSNS

VTTREF
2

1
DY S5 DY

GND

GND
PR5116

1
15K8R2F-GP PC5115
21 R1 SC18P50V2JN-1-GP

4
PD change 0622

2
PWR_VDDQ_VTTREF
1 PR5119 2 PWR_VTT_EN
6 DDR_PG_OUT 0R0402-PAD

R2
S3

1
PR5117
20KR2F-L3-GP

C Vout Setting C

2
1

PC5116 Vout = Vref * ( 1 + R1/R2 )


SCD033U16V2KX-GP
= 0.675 * ( 1 + 15.8K / 20K)
2

= 1.2V

VID vs Vref Table


VID Logic-High => Vref = 0.675 V
VID Logic-Low => Vref = 0.75 V
Vout = 0.6V note. Vref can only be changed form
MP change 0814 Iomax = 1.2A 0.675v to 0.75v after power-on
0D6V_S0 PWR_VDDQ_VTT
PG5113
1 2

GAP-CLOSE-PWR-6-GP
PG5114 DY
1 2
1

PC5117 PC5118
SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

GAP-CLOSE-PWR-6-GP
2

20141022 Jack

SY8288 For DDR4


Vout = 2.5V 19V_DCBATOUT PWR_DCBATOUT_2D5V

PG5126
1 2

GAP-CLOSE-PWR-6-GP
PG5125
B PWR_DCBATOUT_2D5V B
1 2

GAP-CLOSE-PWR-6-GP

MP change 0814
1

PC5142 PC5141 PC5140


SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

SCD1U25V2KX-L-GP
2

delete 0306

3D3V_S5

PR5137 PC5137
1

PR5133 2D2R3F-L-GP SCD1U50V3KX-L-GP


10KR2F-L1-GP
1

PC5132 PWR_2D5V_BOOT 1 2 PWR_2D5V_BOOT_A 1 2


SC1U10V2KX-L1-GP
Design Current :4A
OCP : 7 A
2

PU5105 PL5102 2D5V_S3


PWR_DCBATOUT_2D5V IND-1UH-94-GP-U
PWR_2D5V_VDD 17 6 PWR_2D5V_PH 1 2
VCC LX#6
19
PWR_2D5V_PG LX#19
LX#20
20 68.1R01B.10K
2
IN#2 2nd = 68.1R010.20I
3 10
IN#3 NC#10
4 12
IN#4 NC#12
1

1
5 16 PC5150 PC5149 PC5148 PC5147 PC5145
IN#5 NC#16
SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SCD1U16V2KX-L-GP
PWR_2D5V_BOOT 1
2

2
PWR_2D5V_PG BS
9
3D3V_S5 PWR_2D5V_S5_EN PG
11 7
PWR_2D5V_CS EN GND
13 8 Close to output cap pin1, not
PG5136 PWR_2D5V_FB ILMT GND
14 18
PWR_2D5V_BYP FB GND inside of the output cap
2 1 15 21
BYP GND
GAP-CLOSE-PWR-6-GP
SY8288RAC-GP PG5135
1

MP change 0814 PC5134 PWR_2D5V_FB_G 2 1 2D5V_S3


PD change 0622 SC1U10V2KX-L1-GP
GAP-CLOSE-PWR-6-GP
2

MP change 0814
1

17,24,40 PM_SLP_S4# 1 PR5135 2 PWR_2D5V_S5_EN


0R0402-PAD PC5138 MP change 0812
1

SC220P50V2KX-3GP
2

PR5138
1

PC5133 63K4R2F-2-GP PWR_2D5V_FB_A


SCD1U16V2KX-L-GP R1
1

DY
2

PR5140
1KR2F-L1-GP
A Enable A
2

PWR_2D5V_FB

Dr-Bios.com
OCP setting R2
1

PR5139
20KR2F-L3-GP

PWR_2D5V_CS
Vout Setting
2
1

Vout = Vref * ( 1 + R1/R2 )


PR5103
0R0402-PAD = 0.6 * ( 1 + 63.4K / 20K)
<Core Design>
= 2.502 V
2

PD change 0622 Wistron Corporation


21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Current Limit
Low : OCP 8A Title

Floating : OCP 12A


RT8231_1D2V
Size Document Number Rev
Custom
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 51 of 105

5 4 3 2 1
5 4 3 2 1

19V_DCBATOUT PWR_DCBATOUT_1D0V

PG5201
1 2

GAP-CLOSE-PWR-6-GP
PG5202
1 2

GAP-CLOSE-PWR-6-GP

VID 20141022 Jack MP change 0814


Logic-High = 0.75V
Logic-Low = 0.3V
D D
PR5207
5D1R2F-GP PWR_DCBATOUT_1D0V
PWR_1D0V_VID 2 1 5V_S5

1
PC5202
SC1U10V2KX-L1-GP

1
PC5203 PC5204 PC5205

SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

SCD1U25V2KX-L-GP
OCP setting

2
Add 3rd 0423
PWR_1D0V_CS PWR_1D0V_VDD 1 PR5209 2 5V_S5
0R0402-PAD

1
3D3V_S5 PR5210
Muxless

1
PC5207
182KR2F-L1-GP SC1U10V2KX-L1-GP PD change 0622 PU5202 2

1
PR5211 3

2
DY 10KR2F-L1-GP 1 4

2
10
9
7

2
PU5201 8 6
RT8231AGQW-GP

13

11

12
5
074.08231.0073 PR5212 PC5208
2D2R3F-L-GP SCD1U50V3KX-L-GP

VID

VDD
CS
PWR_DCBATOUT_1D0V
Freq. setting PWR_1D0V_BOOT PWR_1D0V_BOOT_A FDMS3600-02-RJK0215-COLAY-GP
18 1 2 1 2
PR5213 PWR_1D0V_PG BOOT
750K -> 350K Hz 10
PGOOD
1st = 84.00920.037 Design Current :11.74A
750KR2F-L-GP 2nd = 84.03664.037
1 2 PWR_1D0V_TON 9
TON UGATE
17 PWR_1D0V_HG 3rd = 075.06994.0073 OCP : 16.43 A
PWR_1D0V_S5_EN 8 PL5201 1D0V_S5
S5 IND-1UH-94-GP-U
PWR_1D0V_S3_EN 7 16 PWR_1D0V_PH 1 2
S3 PHASE
C TP5201 1 PWR_1D0V_VLDOIN 19 68.1R01B.10K C
TPAD14-OP-GP VLDOIN
2nd = 68.1R010.20I
15 PWR_1D0V_LG
LGATE
Close to output cap pin1, not

1
PC5210 PT5201 PC5214
inside of the output cap

SC22U6D3V5MX-L3-GP

SE330U2VDM-L-GP

SCD1U16V2KX-L-GP
1 PR5208 2 PWR_1D0V_S5_EN 1 14

2
17,45 3V_5V_POK 0R0402-PAD VTTGND PGND
PG5209 MP change 0814
5 PWR_1D0V_VDDQ 2 1 1D0V_S5
VDDQ
1

PD change 0622 PC5206


SCD1U16V2KX-L-GP 20 6 PWR_1D0V_FB
VTT FB GAP-CLOSE-PWR-6-GP
DY
2

2
S5 VTTSNS

VTTREF

1
DY

GND

GND
PR5216

1
9K76R2F-1-GP PC5215
21 R1 SC18P50V2JN-1-GP

4
1 PR5219 2 PWR_1D0V_S3_EN

2
0R0402-PAD

PD change 0622 S3
PWR_1D0V_VTTREF

R2

1
PR5217
20KR2F-L3-GP

Vout Setting

2
1

PC5216 Vout = Vref * ( 1 + R1/R2 )


SCD033U16V2KX-GP
= 0.675 * ( 1 + 9.76K / 20K)
2

= 1.004 V
B B

VID vs Vref Table


VID Logic-High => Vref = 0.675 V
VID Logic-Low => Vref = 0.75 V
note. Vref can only be changed form
0.675v to 0.75v after power-on

A A

Dr-Bios.com
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
RT8231_1D0V
Size Document Number Rev
C
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 52 of 105
5 4 3 2 1
5 4 3 2 1

1D5V_S0 3D3V_S5
PD = (Vin Vout ) x Iout
= ( 3.3 - 1.5 ) x 0.3A = 0.54W
PW R_1D5V_S0 1D5V_S0
PD de-rating(%) = 0.54W/1.33W = 40.6%
PG5306 PU5304 PG5308
1 2 RT9025-25ZSP-GP 1 2

GAP-CLOSE-PW R-6-GP
74.09025.B3D GAP-CLOSE-PW R-6-GP
D PG5307 PG5309 D

1
1 2 PC5309 PC5313 1 2
1D5V_S0_PW RGD 1 9
PGOOD GND

1
SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
GAP-CLOSE-PW R-6-GP PW R_1D5V_S0_EN 2 8 PC5311 PC5312 GAP-CLOSE-PW R-6-GP

2
PW R_1D5V_S0_PVDD EN GND PW R_1D5V_S0_FB
PD change 0814 3 VIN ADJ 7

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
5V_S5 PW R_1D5V_S0_VDD 4 6 PD change 0814

2
VDD VOUT
NC#5 5

1
PR5309 PC5308
R18K87R2F-2-GP

2
PR5310 SC22P50V2JN-L-GP
2D2R2F-GP
20141028 Jack

2
1 2

3D3V_S0 PW R_1D5V_S0_FB

1
PC5310
R2

1
SC1U10V2KX-L1-GP
PR5308

2
10KR2F-L1-GP
17,24,40,71 PM_SLP_S3# 1 PR5306 2 PW R_1D5V_S0_EN PR5311

2
0R0402-PAD 1KR2J-1-GP

2
PD change 0622
Vout Setting
1

PC5320
1D5V_S0_PW RGD 40
SCD1U16V2KX-L-GP

C
Enable DY Vout = 0.8 * ( 1 + R1/R2 ) C

Power Good = 0.8 * ( 1 + 8K87 / 10K)


2

EN_Logic-High = 1.4V
EN_Logic-Low = 0.8V = 1.5096V

B B

<Core Design>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
RT9025_1D5V
Size Document Number Rev
A3
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 53 of 105
5 4 3 2 1
5 4 3 2 1

eDP conn change by Royee 20150202

EDP1
41
AFTP TESTPOINT
eDP_HPD_CON 89
1
eDP_AUX_CON_P 89
2 eDP_AUX_CON_P C5515 1 2 SCD1U16V2KX-L-GP eDP_AUX_7513_P eDP_7513SS eDP_AUX_CON_N 89
3 eDP_AUX_CON_N C5507 1 2 SCD1U16V2KX-L-GP eDP_AUX_7513_N eDP_7513SS
4 eDP_TX_CON_P0 89
5 eDP_TX_CON_P0 C5508 1 2 SCD1U16V2KX-L-GP eDP_TX_7513_P0 eDP_7513SS eDP_TX_CON_N0 89
6 eDP_TX_CON_N0 C5509 1 2 SCD1U16V2KX-L-GP eDP_TX_7513_N0 eDP_7513SS
7 eDP_TX_CON_P1 89
8 eDP_TX_CON_P1 C5510 1 2 SCD1U16V2KX-L-GP eDP_TX_7513_P1 eDP_7513SS eDP_TX_CON_N1 89
9 eDP_TX_CON_N1 C5511 1 2 SCD1U16V2KX-L-GP eDP_TX_7513_N1 eDP_7513SS
10 eDP_TX_CON_P2 89
D 11 eDP_TX_CON_P2 C5512 1 2 SCD1U16V2KX-L-GP eDP_TX_7513_P2 eDP_7513SS D
eDP_TX_CON_N2 89
12 eDP_TX_CON_N2 C5513 1 2 SCD1U16V2KX-L-GP eDP_TX_7513_N2 eDP_7513SS
13 eDP_TX_CON_P3 89
14 eDP_TX_CON_P3 C5514 1 2 SCD1U16V2KX-L-GP eDP_TX_7513_P3 eDP_7513SS eDP_TX_CON_N3 89
15 eDP_TX_CON_N3 C5516 1 2 SCD1U16V2KX-L-GP eDP_TX_7513_N3 eDP_7513SS
16 eDP_HPD_CON
17 3D3V_LCDVDD_PWR 1 R5506 2 0R0805-PAD 3D3V_LCDVDD_S0
18
19 PD change 0622
20
21 Delete by Royee 20150202
22
23
24 eDP_BLEN_CON 89
25 eDP_BLCTRL_CON 89
26
27
28 PD change 0626
29
30
31 eDP_HPD_CON 1 R5509 2 eDP_HPD_CPU 19 3D3V_LCDVDD_PWR 89
32
33 0R2J-2-GP
34 eDP_BLEN_CON R5513 R5511
35 eDP_BLCTRL_CON 1 33R2J-L1-GP
2 7513SS_DY 2 100KR2F-L3-GP
1
eDP_BLCTRL_CPU 16
36
37 19V_DCBATOUT_LCD
38
39
40 19V_DCBATOUT_LCD Inverter Power 19V_DCBATOUT R5512
eDP_BLEN_CON 1 1KR2J-L2-GP
2 BLON_OUT 24
42 F5501
2 1
STAR-CON40-1-GP

2
20.K0809.040 POLYSW-1D1A24V-GP-U
1

2
2nd = 020.K0144.0040 C5502 C5503 C5504 69.50007.A31 C5521 R5514
SC4D7U25V5KX-L2-GP

SC1KP50V2KX-L-1-GP

SCD1U50V3KX-L-GP

SC100P50V2JN-L-GP
3rd = 20.K0678.040 2nd = 69.50007.A41 100KR2J-4-GP
MP change 0814
2

1
C 5V_S5 3D3V_S5 T-COM Power C

U5502
3D3V_LCDVDD_S0
Delete touch panel Power by Royee 20150202 15
Delete USB P8 and I2C0 by Royee 20150202 1
VIN1#1
GND
VOUT1#14
14
Layout 40 mil 2 13
VIN1#2 VOUT1#13 VTT_CT_3D3VC_2
16 eDP_VDDEN_CPU 3 12
ON1 CT1
4 11
VBIAS GND
5 10
ON2 CT2
6 9

2
VIN2#6 VOUT2#9
7 8

1
R5528 C5529 VIN2#7 VOUT2#8 C5547

2
SC4D7U6D3V3KX-L-GP
100KR2F-L3-GP C5527 C5530 C5528

SC2K2P50V2KX-L-GP

SC4D7U6D3V3KX-L-GP

SCD1U16V2KX-L-GP

SC1U10V2KX-L1-GP
TPS22966DPUR-GP

2
1

1
74.22966.093
2nd = 74.03523.A73
7513SS_DY 3rd = 074.05016.0093
RN5501
eDP_TX_CON_P0 C5520 1 2SCD1U16V2KX-L-GP 7513SS_DY eDP_TX_CPU_P0_R 1 4 eDP_TX_CPU_P0
eDP_TX_CON_N0 C5519 1 2SCD1U16V2KX-L-GP 7513SS_DY eDP_TX_CPU_N0_R 2 3 eDP_TX_CPU_N0

SRN0J-14-GP
7513SS_DY MP change 0902
RN5502
eDP_TX_CON_P1 C5526 1 2SCD1U16V2KX-L-GP 7513SS_DY eDP_TX_CPU_P1_R 1 4 eDP_TX_CPU_P1
eDP_TX_CON_N1 C5525 1 2SCD1U16V2KX-L-GP 7513SS_DY eDP_TX_CPU_N1_R 2 3 eDP_TX_CPU_N1

SRN0J-14-GP
7513SS_DY Swap0306
RN5503
eDP_TX_CON_P2
eDP_TX_CON_N2
C5532 1
C5531 1
2SCD1U16V2KX-L-GP
2SCD1U16V2KX-L-GP
7513SS_DY
7513SS_DY
eDP_TX_CPU_P2_R
eDP_TX_CPU_N2_R
1
2
4
3
eDP_TX_CPU_P2
eDP_TX_CPU_N2
CHECK FAE
SRN0J-14-GP
7513SS_DY CHECK PULL HIGH PULL LOW UN 0225
RN5504
eDP_TX_CON_P3 C5534 1 2SCD1U16V2KX-L-GP 7513SS_DY eDP_TX_CPU_P3_R 1 4 eDP_TX_CPU_P3
eDP_TX_CON_N3 C5533 1 2SCD1U16V2KX-L-GP eDP_TX_CPU_N3_R 2 eDP_TX_CPU_N3 3D3V_S0
7513SS_DY 3
RN5506
B SRN0J-14-GP eDP_AUX_CON_N 2 3 B
eDP_AUX_CON_P 1 4
modify 0227 SRN100KJ-6-GP

3D3V_S0
modify 0304 swap 0303
7513SS_DY
RN5505
eDP_AUX_CON_P C5517 1 2SCD1U16V2KX-L-GP 7513SS_DY eDP_AUX_CPU_P_R 2 3 eDP_AUX_CPU_P
eDP_AUX_CON_N C5518 1 2SCD1U16V2KX-L-GP 7513SS_DY eDP_AUX_CPU_N_R 1 4 eDP_AUX_CPU_N
eDP_7513SS eDP_7513SS
1

C5524 C5523 SRN0J-14-GP


SCD01U50V2KX-L-GP

SCD1U16V2KX-L-GP
2

U5501
DDC ADTA TERMINALS
AUX CHANNEL AND

1 30 eDP_AUX_CPU_C_P C5544 1 2 SCD1U16V2KX-L-GP eDP_7513SS


VCC AUX_SRCP eDP_AUX_CPU_P 3
6 29 eDP_AUX_CPU_C_N C5543 1 2 SCD1U16V2KX-L-GP eDP_7513SS
VCC AUX_SRCN eDP_AUX_CPU_N 3
12 28 eDP_AUX_7513_P
VCC AUX_SNKP eDP_AUX_7513_N
25 27
VCC AUX_SNKN
32 33
VCC SCL_DDC
36 34
VCC SDA_DDC
eDP_7513SS SCD1U16V2KX-L-GP 2 1 C5542 eDP_TX_CPU_C_P0 38
3 eDP_TX_CPU_P0 IN0P
eDP_7513SS SCD1U16V2KX-L-GP 2 1 C5539 eDP_TX_CPU_C_N0 39 9 eDP_HPD_CPU
3 eDP_TX_CPU_N0 IN0N HPD_SRC
eDP_7513SS SCD1U16V2KX-L-GP 1 C5538 eDP_TX_CPU_C_P1 eDP_HPD_CON
HPD,CAD,ANDCONTROL TERMINALS

3 eDP_TX_CPU_P1 2 41 11
SCD1U16V2KX-L-GP eDP_TX_CPU_C_N1 IN1P HPD_SNK
3 eDP_TX_CPU_N1 eDP_7513SS 2 1 C5535 42 delete 0225
MAIN LINK TERMINALS

SCD1U16V2KX-L-GP eDP_TX_CPU_C_P2 IN1N


3 eDP_TX_CPU_P2 eDP_7513SS 2 1 C5537 44 8
SCD1U16V2KX-L-GP eDP_TX_CPU_C_N2 IN2P CAD_SRC CAD_SNK
3 eDP_TX_CPU_N2 eDP_7513SS 2 1 C5541 45 10 1 2
SCD1U16V2KX-L-GP eDP_TX_CPU_C_P3 IN2N CAD_SNK
JJ 20150127 3 eDP_TX_CPU_P3 eDP_7513SS 2 1 C5540 47 R5530
SCD1U16V2KX-L-GP eDP_TX_CPU_C_N3 IN3P
3 eDP_TX_CPU_N3 eDP_7513SS 2 1 C5536 48 4 1MR2F-L-GP
3D3V_S5 eDP_TX_7513_P0 IN3N SCL_CTL
23
OUT0P SDA_CTL
5 eDP_7513SS
eDP_TX_7513_N0 22
eDP_TX_7513_P1 OUT0N eDP_RST#
20 35
eDP_TX_7513_N1 OUT1P RST#
19
eDP_TX_7513_P2 OUT1N
17 26 JJ 20150128
CHECK FAE
2

A eDP_TX_7513_N2 OUT2P EN A
16
1

R5503 eDP_TX_7513_P3 OUT2N ADRR_EQ PC5504


14 3
eDP_TX_7513_N3 OUT3P ADDR_EQ SC2D2U10V3KX-L-GP
DY10KR2F-L1-GP 13
OUT3N
eDP_7513SS
2

7 2 PS7513_CEXT

Dr-Bios.com
1

NC#7 VDDD_DREG <Core Design>


15 18
1

ADRR_EQ NC#15 GND


21
NC#21 GND
24 eDP_7513SS
37 31 PC5501
NC#37 GND
Wistron Corporation
SC1U10V2KX-L1-GP

40 49
2
2

NC#40 GND
43 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R5502 NC#43
46 Taipei Hsien 221, Taiwan, R.O.C.
NC#46
DY10KR2F-L1-GP eDP_7513SS Title
SN75DP130SSRGZR-GP
EOPIO/EDRAM Power
1

71.75130.003
Size Document Number Rev
Custom
Newgate 1M
Date: Wednesday, September 02, 2015 Sheet 55 of 105

5 4 3 2 1
5 4 3 2 1

5V_S0

SSID = VIDEO HDMI Level Shifter & CONNECTOR

3
D5701
BAW56-5-GP
83.00056.Q11

5V_DDC_HDMI1 1

5V_DDC_HDMI2 2
HDMI_CLK_CON_N3 2nd = 83.00056.R11
71 HDMI_CLK_CON_N3
HDMI_CLK_CON_P3
D 71 HDMI_CLK_CON_P3 D
HDMI_DATA_CON_N0
71 HDMI_DATA_CON_N0 HDMI_DATA_CON_P0
71 HDMI_DATA_CON_P0

HDMI_DATA_CON_N1
71 HDMI_DATA_CON_N1

4
3
HDMI_DATA_CON_P1
71 HDMI_DATA_CON_P1
HDMI_DATA_CON_N2 RN5701
71 HDMI_DATA_CON_N2 HDMI_DATA_CON_P2 3D3V_S0 SRN2K2J-5-GP
71 HDMI_DATA_CON_P2
Change from 470 to 475 0204

1
2
Q5703
1 R5701 2 475R2F-L1-GP 4 3 HDMI_CLK_CON
71 TBT_HDMI_DDC_CLK HDMI_DATA_CON
1 R5704 2 475R2F-L1-GP
71 TBT_HDMI_DDC_DATA
1 R5706 2 475R2F-L1-GP 5 2
1 R5707 2 475R2F-L1-GP
1 R5709 2 475R2F-L1-GP 6 1
1 R5710 2 475R2F-L1-GP
1 R5711 2 475R2F-L1-GP 2N7002KDW-GP
1 R5708 2 475R2F-L1-GP 84.2N702.A3F
2nd = 75.00601.07C

HDMI_PLL_GND
3rd = 075.01660.007C

C C

Change TBT 0209


3D3V_S0

D Q5702
Change TBT 0209 2N7002K-2-GP
84.2N702.J31 HDMI_CLK_CON_N3
Q5701
2nd = 84.2N702.031 R5717

1
3rd = 84.2N702.W31 2 1 G
1MR2F-L-GP ER5701
G

3D3V_S0 D HDMI_DET_CON 180R2J-1-GP


DY
S

2
71 TBT_SRC_HPD HDMI_CLK_CON_P3
2N7002K-2-GP

1
HDMI_DATA_CON_N0
84.2N702.J31 R5718

1
2nd = 84.2N702.031 20KR2F-L3-GP
ER5702
3rd = 84.2N702.W31 180R2J-1-GP

2
DY

2
HDMI_DATA_CON_P0

HDMI_DATA_CON_N1

1
ER5703
180R2J-1-GP
B B
DY

2
5V_S0 5V_HDMI_S0 HDMI_DATA_CON_P1
F5702
POLYSW-1D1A6V-9-GP-U HDMI_DATA_CON_N2
2 1 5V_HDMI_S0

1
ER5704
1

C5702 180R2J-1-GP
HDMI CONN
SCD1U25V2KX-L-GP

DY
2

2
HDMI_DATA_CON_P2

HDMI1

18 15 HDMI_CLK_CON
+5V_POWER SCL HDMI_DATA_CON
16
SDA
HDMI_DATA_CON_P0 7
HDMI_DATA_CON_N0 TMDS_DATA0+
9 TMDS_DATA0- CEC 13
HDMI_DATA_CON_P1 4 17
HDMI_DATA_CON_N1 TMDS_DATA1+ DDC/CEC_GROUNG HDMI_DET_CON
6 TMDS_DATA1- HOT_PLUG_DETECT 19
HDMI_DATA_CON_P2 1
HDMI_DATA_CON_N2 TMDS_DATA2+
3 TMDS_DATA2- RESERVED#14 14

8
TMDS_DATA0_SHIELD
5 TMDS_DATA1_SHIELD
2
TMDS_DATA2_SHIELD
GND 20
11 21
HDMI_CLK_CON_P3 TMDS_CLOCK_SHIELD GND
10 22
HDMI_CLK_CON_N3 TMDS_CLOCK+ HDMI GND
12 TMDS_CLOCK- GND 23
A (A_Type) Wistron Confidential document, Anyone can not A
<Core Design> Duplicate, Modify, Forward or any other purpose
SKT-HDMI23-131-GP-U application without get Wistron permission

Dr-Bios.com
022.10025.0091 Wistron Corporation
2nd = 022.10025.0061 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
HDMI conn change by Royee 20150202
Title
PD change 0624
HDMI Level Shifter/Conn
Size Document Number Rev
Custom
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 57 of 105

5 4 3 2 1
5 4 3 2 1

SSID = SATA 5V_S0 5V_HDD_S0

1 R6023 2

0R0805-PAD
SATA HDD Connector

1
C6020 1 R6024 2 HDD1
AFTP TESTPOINT

1
SC1U10V2KX-L1-GP
21
0R0805-PAD C6021 C6022 1

SC10U10V5KX-L1-GP
89 SATA_TX_HDD_P2 SCD1U16V2KX-L-GP 22

2
D PD change 0622 5V_HDD_S0 2 D
89 SATA_TX_HDD_N2
MP change 0804 3
89 SATA_RX_HDD_N2 4
89 SATA_RX_HDD_P2 5
6
added 0225 7

2
C6014 8
SC10U10V5KX-L1-GP C6013 9
SCD1U16V2KX-L-GP 10

1
11
EU6001 12
13
1 10 SATA_TX_HDD_P2 14
SCD01U50V2KX-L-GP 1 2 C6015 SATA_TX_HDD_P2 15
16 SATA_TX_CPU_P2
2 9 SATA_TX_HDD_N2 SCD01U50V2KX-L-GP 1 2 C6019 SATA_TX_HDD_N2 16
16 SATA_TX_CPU_N2
3 8 17
SCD01U50V2KX-L-GP 1 2 C6018 SATA_RX_HDD_N2 18
16 SATA_RX_CPU_N2
4 7 SATA_RX_HDD_N2 SCD01U50V2KX-L-GP 1 2 C6017 SATA_RX_HDD_P2 19 23
16 SATA_RX_CPU_P2
20
5 6 SATA_RX_HDD_P2 24

DY AC coupling caps near connector < 100 mils ACES-CON20-28-GP


PJE5UFN10A-GP 20.F2036.020
2nd = 20.F2480.020

075.00510.0073
2nd = 075.00550.0071
3rd = 75.01045.073
C C

5V_S0
PD change 0622 5V_ODD_S0

1 R6022 2 ENG change 0412


0R0805-PAD
1

C6009 C6008 C6016


SC1U10V2KX-L1-GP

SCD1U16V2KX-L-GP

SC10U10V5KX-L1-GP
2

follow SLU 0225

5V_ODD_S0

B ODD1 B

P2 +5V MD P4
P3 P1 PRSNT#
+5V DP

1
S1 R6018
SCD01U50V2KX-L-GP 1 GND
16 SATA_TX_CPU_N3 2 C6012 SATA_TX_ODD_N3 S3 A- GND S4 10KR2F-L1-GP
SCD01U50V2KX-L-GP 1 2 C6007 SATA_TX_ODD_P3 S2 S7
16 SATA_TX_CPU_P3 A+ GND
P5
2
GND
GND P6
SCD01U50V2KX-L-GP 1 2 C6011 SATA_RX_ODD_N3 S5 14
16 SATA_RX_CPU_N3 B- GND
SCD01U50V2KX-L-GP 1 2 C6010 SATA_RX_ODD_P3 S6 15
16 SATA_RX_CPU_P3 B+ GND
NP1 NP1
NP2 NP2

SKT-SATA7P-6P-122-GP
22.10300.H61
AFTP TESTPOINT 2nd = 22.10300.H31

89 SATA_TX_ODD_N3
89 SATA_TX_ODD_P3

89 SATA_RX_ODD_N3 Wistron Confidential document, Anyone can not


89 SATA_RX_ODD_P3 Duplicate, Modify, Forward or any other purpose
application
<Core Design>without get Wistron permission
A A

Dr-Bios.com
ODD1 conn change by Royee 20150202
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HDD/ODD
Size Document Number Rev
A3
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 60 of 105
5 4 2 1
5 4 3 2 1

SSID = Wireless/ Wigig


NGFF Connector (802.11a/b/g/n) PD change 0622

WLAN conn change by Royee 20150202 3D3V_S0 3D3V_IOAC

1 R6105 2 modify 0302


0R0805-PAD

D 3D3V_IOAC WLAN1 D

76 77
76 77
Delete WIGIG 0204 74
3_3VAUX GND
75
72 73
3_3VAUX RESERVED#73
70
RESERVED#70 RESERVED#71
71 Delete WIGIG 0204
68 RESERVED#68 GND 69
66 67
RESERVED#66 RESERVED#67/2ND_LANE_PERN1
64 GPIO0_NFC_RESET#/MGPIO7 RESERVED#65/2ND_LANE_PERP1 65
PD change 0622 62
NFC_I2C_IRQ/MGPIO5 GND
63
60 61
NFC_I2C_SM_CLK RESERVED#61/2ND_LANE_PETN1
58
NFC_I2C_SM_DATA RESERVED#59/2ND_LANE_PETP1
59 PD change 0622
R6101 1 2 1KR2J-L2-GP WIFI_RF_EN_CON 56 57
24 WIFI_RF_EN W_DISABLE#1 GND
54 55 PCIE_WAKE#_WLANR6107 1 2 0R0402-PAD
24,89 BLUETOOTH_EN RESERVED#54/W_DISABLE#2 PEWAKE0# PCIE_WAKE# 17,31,63,71
R6102 2 1 0R0402-PAD WLAN_RST# 52 53
14,24,31,63,68,71,89,91 PLT_RST# PERST0# CLKREQ0# WLAN_CLKREQ_CPU# 18,89
50 SUSCLK_32KHZ GND 51
ENG delete 0412 48 COEX1 REFCLKN0 49 WLAN_CLK_CPU# 18,89
R6116 1 2 0R0402-PAD E51_RXD_R 46 47
24 E51_RXD COEX2 REFCLKP0 WLAN_CLK_CPU 18,89
R6117 1 2 0R0402-PAD E51_TXD_R 44 45
24 E51_TXD COEX3 GND
42 43 PCIE_RX_PCH_N3 15,89
CLINK_CLK PERN0
40 41 PCIE_RX_PCH_P3 15,89
CLINK_DATA PERP0
PD change 0622 38
CLINK_RESET GND
39
36 37 PCIE_TX_CON_N3 C6105 1 2 SCD22U10V2KX-L1-GP
UART_CTS PETN0 PCIE_TX_PCH_N3 15
34 35 PCIE_TX_CON_P3 C6106 1 2 SCD22U10V2KX-L1-GP
UART_RTS PETP0 PCIE_TX_PCH_P3 15
32 UART_TX GND 33

22 UART_RX SDIO_RESET 23
20 UART_WAKE SDIO_WAKE 21
C 18 19 C
GND SDIO_DAT3
16 17
LED#2 SDIO_DAT2
14 15
PCM_OUT SDIO_DAT1
12 13
3D3V_IOAC PCM_IN SDIO_DAT0
10 11
PCM_SYNC SDIO_CMD
8 PCM_CLK SDIO_CLK 9
6 LED#1 GND 7
3D3V_IOAC 4 3_3VAUX USB_D- 5 USB_PCH_PN7 15,89
2 3 USB_PCH_PP7 15,89
3_3VAUX NGFF_KEY_E_75P USB_D+
GND
1
1

C6101 C6102 C6103


SCD1U16V2KX-L-GP

SC10U6D3V3MX-L-GP

SCD1U16V2KX-L-GP

NP2 NP2 NP1 NP1


2

SKT-MINI75P-8-GP
062.10007.0241
2nd = 062.10007.0511
3rd = 062.10007.0291
4th = 062.10007.0371

AFTP TESTPOINT UN 0225

B B

PCIE_WAKE#_WLAN 89
WLAN_CLKREQ_CPU# 18,89

WLAN_CLK_CPU# 18,89
WLAN_CLK_CPU 18,89

PCIE_RX_PCH_N3 15,89
PCIE_RX_PCH_P3 15,89

PCIE_TX_CON_N3 89
PCIE_TX_CON_P3 89

USB_PCH_PN7 15,89
USB_PCH_PP7 15,89

WIFI_RF_EN_CON 89 Wistron Confidential document, Anyone can not


BLUETOOTH_EN 24,89 Duplicate, Modify, Forward or any other purpose
WLAN_RST# 89 application without get Wistron permission
<Core Design>
A E51_RXD_R 89 A
E51_TXD_R 89
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Mini card-WLAN
Size Document Number Rev
Custom
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 61 of 105
5 4 3 2 1

Dr-Bios.com
5 4 3 2 1

SSID = m-SATA Mini Card Connector (NGFF m-SATA)


3D3V_MSATA_S0

PD change 0622
3D3V_MSATA_S0

1
3D3V_S0 3D3V_MSATA_S0
R6302
D 10KR2J-L-GP D
1 R6313 2
1

1
C6301 C6302 C6303 C6304 FC1 0R0805-PAD

2
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SCD1U16V2KX-L-GP
Q6301
MSATA_PEDET G
2

2
DY SATAGP0
D
ME main change 0416
S

SSD1 2N7002K-2-GP
3D3V_MSATA_S0 84.2N702.J31
NP2 NP2 NP1 NP1 2ND = 84.2N702.031
76 76 77 77 3rd = 84.2N702.W31
ENG add 0417 74 3_3VAUX GND 75
72 3_3VAUX GND 73 DY
R6301 DY 70 71 R6304
3_3VAUX GND
17 SUS_CLK_CPU 1 0R2J-L-GP
2 CLK_MSATA 68 SUSCLK_32KHZ PEDET(OC_PCIE/GND_SATA) 69 MSATA_PEDET 1 0R2J-L-GP
2 SATAGP0 16
58 NC#58 NC#67 67
56 NC#56 GND 57
17,31,61,71 PCIE_W AKE# 2 R6303 1 0R0402-PADMSATA_PCIE_W AKE#_C 54 PEWAKE#/NC#54 REFCLKP 55 MSATA_CLK_CPU 18
18 MSATA_CLKREQ_CPU# 52 CLKREQ#/NC#52 REFCLKN 53 MSATA_CLK_CPU# 18
14,24,31,61,68,71,89,91 PLT_RST# 2 R6305 1 0R0402-PADMSATA_RST# 50 PERST#/NC#50 GND 51
48 49 SATA_TX_MSATA_P0 C6311 1 2 SCD22U10V2KX-L1-GP
NC#48 PERP0/SATA_A+ SATA_TX_PCH_P0 16
46 47 SATA_TX_MSATA_N0 C6312 1 2 SCD22U10V2KX-L1-GP
NC#46 PERN0/SATA_A- SATA_TX_PCH_N0 16
PD change 0622 44 NC#44 GND 45
42 NC#42 PETP0/SATA_B- 43 SATA_RX_PCH_N0 16
40 NC#40 PETN0/SATA_B+ 41 SATA_RX_PCH_P0 16
18 DEVSLP_PCH 2 1DEVSLP_CON 38 DEVSLP GND 39
C R6308 36 37 PCIE_TX_CON_P10 C6305 1 2 SCD22U10V2KX-L1-GP C
NC#36 PERP1 PCIE_TX_PCH_P10 16
0R2J-L-GP 34 35 PCIE_TX_CON_N10 C6306 1 2 SCD22U10V2KX-L1-GP
NC#34 PERN1 PCIE_TX_PCH_N10 16
32 33
DY 30
NC#32 GND
31
NC#30 PETP1 PCIE_RX_PCH_P10 16
28 NC#28 PETN1 29 PCIE_RX_PCH_N10 16
26 NC#26 GND 27
24 25 PCIE_TX_CON_P11 C6307 1 2 SCD22U10V2KX-L1-GP
NC#24 PERP2 PCIE_TX_PCH_P11 16
22 23 PCIE_TX_CON_N11 C6308 1 2 SCD22U10V2KX-L1-GP
NC#22 PERN2 PCIE_TX_PCH_N11 16
20 NC#20 GND 21
18 3_3VAUX PETN2 19 PCIE_RX_PCH_P11 16
16 3_3VAUX PETP2 17 PCIE_RX_PCH_N11 16
14 3_3VAUX GND 15
UN 0225 12 13 PCIE_TX_CON_P12 C6309 1 2 SCD22U10V2KX-L1-GP
3_3VAUX PERP3 PCIE_TX_PCH_P12 16
10 11 PCIE_TX_CON_N12 C6310 1 2 SCD22U10V2KX-L1-GP
DAS/DSS# PERN3 PCIE_TX_PCH_N12 16
8 NC#8 GND 9
6 NC#6 PETN3 7 PCIE_RX_PCH_P12 16
4 3_3VAUX PETP3 5 PCIE_RX_PCH_N12 16
2 3_3VAUX GND 3
GND 1
NGFF_KEY_M 75P

SKT-MINI67P-15-GP
062.10003.0481

B B

<Core Design>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
SSD-NGFF
Size Document Number Rev
A3
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 63 of 105

5 4 3 2 1
5 4 3 2 1

SSID = User.Interface

D D

MP change 0804
C C

Power Button
ENG change 0412

6
3 4 KBC_PWRBTN# 24,65,89
PW1
LG1 conn ENG change 0412 DY SW-TACT-4P-59-GP

5V_S5 1 2
62.40009.E51
LG1 2nd = 62.40089.441

5
5 3rd = 62.40094.011
1 4th = 62.40009.D71
B B
2 LB_PWM_R 1 R6405 2 200R2F-L1-GP
3 LB_PWM_L 1 R6406 2 200R2F-L1-GP LB_PWM_D
4
6
D

ACES-CON4-65-GP LB_PWM_R
LB_PWM_R 89
Q6403
020.F0189.0004 2N7002K-2-GP LB_PWM_L
LB_PWM_L 89
84.2N702.J31
2nd = 20.F1579.004 2nd = 84.2N702.031
3rd = 84.2N702.W31
3rd = 20.F1808.004 AFTP TESTPOINT
G

ENG change 0412


<Core Design>
24 LB_PWM

Wistron Corporation
1

A C6401 A
SCD1U16V2KX-L-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.
2

Title

LED Bard/Power Button


Size Document Number Rev
A4
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 64 of 105
5 4 3 2 1
5 4 3 2 1

Precision Touch Pad


3D3V_TP_S3
I2C Addr. = 0X2C (Synaptics)
3D3V_TP_S3

1
2
TPAD1 conn change by Royee 20150202
AFTP TESTPOINT
RN6501

1
SRN4K7J-8-GP 3D3V_TP_S3
EC_TP_CLK_C 89
R6502
TPAD1 EC_TP_DATA_C 89
100KR2F-L3-GP
I2C1_DATA_TP 89
Q6502

4
3
10

2
I2C1_CLK_TP 89
3D3V_S0 G RN6502
TP_IN#_R 89
SRN33J-5-GP-U 8 TP_LID_CLOSE# 89
D TP_IN#_R 24 TPCLK 1 4 EC_TP_CLK_C 7
D 2 3 EC_TP_DATA_C 6 D
24 TPDATA
14 TP_IN#
S 5
I2C1_DATA_TP 4
2N7002K-2-GP I2C1_CLK_TP 3
84.2N702.J31 TP_IN#_R 2
2nd = 84.2N702.031
3rd = 84.2N702.W31 1 R6503 2 TP_LID_CLOSE# 1
24 FUN_OFF#

24 EC_TP_IN#
1 R6504 2 0R0402-PAD 9

0R0402-PAD PD change 0622 ETY-CON8-20-GP-U


20.K0465.008
PD change 0626 2nd = 20.K0422.008
3D3V_TP_S3
3D3V_S5 3D3V_TP_S3

UN 0225
3D3V_S0 4
3

U6501
RN6503 C6502

1
SRN2K2J-5-GP 5 1 C6503
IN OUT

SC4D7U6D3V3KX-L-GP
2 SC4D7U6D3V3KX-L-GP
TPAD_PWRCTL GND
4 3
1
2

2
Q6503 EN# OC#

2
1 6 I2C1_CLK_TP
19 I2C1_CLK_CPU
R6505 SY6288DAAC-GP
1

2 5 0R0402-PAD 074.06288.009B
EC6501 2nd = 074.00524.0C9F
3 4 SC10P50V2JN-L1-GP PD change 0622 3rd = 074.02822.009F
2

1
2N7002KDW-GP DY PTP_PWR_EN# 24
UN 0225
19 I2C1_DATA_CPU
I2C1_DATA_TP 3D3V_S5
84.2N702.A3F
1

C 2nd = 75.00601.07C C
3rd = 075.01660.007C EC6502 DY
R6506
SC10P50V2JN-L1-GP
2

2 1 PTP_PWR_EN#
DY
10KR2F-L1-GP

Internal KeyBoard Connector


ENG connector change 0427
5V_S0
KB1
ACES-CON28-10-GP 020.K0173.0028 KB_BL1
5
1 KB_LED_PWM_D
R6507
CHECK WITH SPEC 2 KB_BL_DET_R 1 2 KB_BL_DET 24
3 100KR2F-L3-GP
30

28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2

29

4
6

1
KROW10
KROW11
KROW12
KROW13
KROW14
KROW15
KROW16
KROW17
KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
KROW9

PTWO-CON4-13-GP R6508

D
C6501

1
20.K0511.004 200KR2F-L-3-GP
Q6501

SCD1U16V2KX-L-GP
2N7002K-2-GP

2
KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6

KCOL7

84.2N702.J31
2nd = 84.2N702.031
3rd = 84.2N702.W31

S
24 KB_BL_EN
B KBC_PWRBTN# 24,64,89 B

1
C6504 KB_BL_DET_R 89
SCD1U16V2KX-L-GP
KB_LED_PWM_D 89

KROW[0..17] 24,89 2 AFTP TEST POINT


KCOL[0..7] 24,89

KB_BL1 conn change by Royee 20150202


Check SPEC

UN 0225

Wistron Confidential document, Anyone can not


A Duplicate, Modify, Forward or any other purpose A
application without get Wistron permission
<Core Design>

Dr-Bios.com
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LED Bard / Power Button


Size Document Number Rev
Custom
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 65 of 105

5 4 3 2 1
5 4 3 2 1

Low Active 2A
5V_S5 RDSon = 80mΩ (Typ) 5V_USB
U6601

5 IN OUT 1
GND 2
1 4 EN# OC# 3

1
C6609 C6604 C6603

SCD1U16V2KX-L-GP

SC10U10V5KX-L1-GP
SC1U10V2KX-L1-GP SY6288DAAC-GP
2

D 074.06288.009B D

2
2nd = 074.00524.0C9F
DY
24,35 USB_PW R_EN#

Added 0303
USB_CON_PN10 89 3D3V_S0 3D3V_CR_S0
USB_CON_PP10 89
PD change 0622
USB_CON_PN6 89

USB_CON_PP6 89 1 R6610 2

0R0603-PAD
AFTP TESTPOINT

Card Reader PD change 0626 USB2.0 C

EL6601
USB_CON_PP10 1 2 USB_PCH_PP10 15
CR1 3D3V_AUX_S5 3D3V_CR_S0 USB_CON_PN10 4 3 5V_USB
USB_PCH_PN10 15
17
MCM1012B900FBP-GP-U DB1
1 68.01012.201 9
2nd = 68.00396.001
2 3rd = 69.10118.001 1
3
4 2
5 3
6 USB_CON_PN10 4
7 USB_CON_PP10 15 USB_PCH_PN6 1 ER6606 2 0R0402-PAD USB_CON_PN6 5
8 PD change 0622 15 USB_PCH_PP6 1 ER6605 2 0R0402-PAD USB_CON_PP6 6
9 LID_CLOSE#_R 0R0402-PAD 1 R6611 2 7
LID_CLOSE# 24
10 PW RLED 24,89 PD change 0624 8
11 STDBY_LED 24,89
12 DC_BATFULL 24,89 10
13 CHARGE_LED 24,89
14 ACES-CON8-15-GP
15 5V_S5 20.K0315.008
16 5V_AUX_S5 2nd = 20.K0392.008
18
B B

PTW O-CON16-1-GP

20.K0429.016
5V_USB

EU6601
ENG change 0412
USB_CON_PN6 1 6 USB_CON_PP6

2 5

3D3V_AUX_S5 3 4
3D3V_CR_S0

USB_CON_PN10 PJSRV05W -4DW 6-GP


USB_CON_PN10 89
075.00005.0B7C
USB_CON_PP10 2nd = 075.01256.007C
USB_CON_PP10 89
3rd = 75.09904.07C
LID_CLOSE#_R USB_CON_PN6
LID_CLOSE#_R 89 USB_CON_PN6 89
ENG change 0412
USB_CON_PP6
USB_CON_PP6 89
PW RLED 24,89
STDBY_LED 24,89 <Core Design>
A DC_BATFULL 24,89 A
CHARGE_LED 24,89
Wistron Corporation

Dr-Bios.com
5V_S5
5V_AUX_S5 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

AFTP TESTPOINT IO Board Connector


Size Document Number Rev
A3 Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 66 of 105

5 4 3 2 1
5 4 3 2 1

D ENG change 0416 D

3D3V_S0
DEBUG1
11
1

18,24,91 LPC_AD_CPU_P0 2
18,24,91 LPC_AD_CPU_P1 3
18,24,91 LPC_AD_CPU_P2 4 DEBUG
18,24,91 LPC_AD_CPU_P3 5
18,24,91 LPC_FRAME#_CPU 6
14,24,31,61,63,71,89,91 PLT_RST# 7
8
18 LPC_CLK_DBG 9
10
12
C C
ACES-CON10-1-GP-U1
20.F0714.010

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Dr-Bios.com
Title

Debug connector
Size Document Number Rev
A
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 68 of 105
5 4 3 2 1
5 4 3 2 1

Note
SSID = User.Interface - no via, trace, under the sensor (keep out area around 2mm)
- stay away from the screw hole or metal shield soldering joints
- design PCB pad based on our sensor LGA pad size (add 0.1mm)
G Sensor - solder stencil opening to 90% of the PCB pad size
- mount the sensor near the center of mass of the NB as possible as you can

D D

CHECK WITH MICK

change 0225

3D3V_S0

3D3V_S0

1
C6901 C6902

2
GSENSOR SCD1U16V2KX-L-GP

14
15
16
R6909 U6901

SCD22U10V2KX-L1-GP
GSENSOR

2
C
GSENSOR 10KR2F-L1-GP C

ADC2
ADC1
VDD
PD change 0622

1
13 ADC3 VDD_IO 1
12 GND NC#2 2
1 R6911 2 GSENSOR_INT#_R 11 3

SDA/SDI/SDO
19 GSENSOR_INT# INT1 NC#3
0R0402-PAD 10 4 SML0_CLK_G
RES SCL/SPC
9 5

SDO/SA0
INT2 GND

CS
GSENSOR LIS3DHTR-GP

8
7
6
3D3V_S0 3D3V_S0
74.00003.0B0

2
3D3V_S0

G_SA0
SML0_DATA_G

G_CS
R6905 R6907
GSENSOR 10KR2F-L1-GP DY 10KR2F-L1-GP

2
R6910

1
G_CS G_SA0 10KR2F-L1-GP
DY

1
R6906 R6908
DY 10KR2F-L1-GP 10KR2F-L1-GP
GSENSOR GSENSOR_INT2
1

1
B B

PD change 0622

12,13,17 PCH_SMBDATA 1 R6901 2 SML0_DATA_G


0R0402-PAD
SDO="H"; address="3Ah" 12,13,17 PCH_SMBCLK 1 R6902 2 SML0_CLK_G
0R0402-PAD
*SDO="L"; address="38h"

*CS="H"; mode="I2C"
CS="L"; mode="SPI"

<Core Design>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
G-SENSOR
Size Document Number Rev
A3
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 69 of 105

5 4 3 2 1
5 4 3 2 1

ENG change 0416 HDMI_DATA_TBT_P2 C7101 2 1 TBT SCD7P25V1AN-GP HDMI_DATA_TBT_N2

U7101A 1 OF 2 HDMI_DATA_TBT_P1 C7102 2 1 TBT SCD7P25V1AN-GP HDMI_DATA_TBT_N1


PCIE_TX_CON_P5 Y23 V23 PCIE_RX_CON_P5 C7162 1 2TBT SCD22U10V1KX-GP
15 PCIE_TX_CON_P5 PCIE_RX0_P PCIE_TX0_P PCIE_RX_PCH_P5 15
PCIE_TX_CON_N5 Y22 V22 PCIE_RX_CON_N5 C7163 1 2TBT SCD22U10V1KX-GP HDMI_DATA_TBT_P0 C7103 2 1 TBT SCD7P25V1AN-GP HDMI_DATA_TBT_N0
15 PCIE_TX_CON_N5 PCIE_RX0_N PCIE_TX0_N PCIE_RX_PCH_N5 15
PCIE_TX_CON_P6 T23 P23 PCIE_RX_CON_P6 C7164 1 2TBT SCD22U10V1KX-GP HDMI_CLK_TBT_P3 C7104 2 1 TBT SCD7P25V1AN-GP HDMI_CLK_TBT_N3
15 PCIE_TX_CON_P6 PCIE_RX1_P PCIE_TX1_P PCIE_RX_PCH_P6 15

PCIe GEN3
PCIE_TX_CON_N6 T22 P22 PCIE_RX_CON_N6 C7165 1 2TBT SCD22U10V1KX-GP
15 PCIE_TX_CON_N6 PCIE_RX1_N PCIE_TX1_N PCIE_RX_PCH_N6 15
PCIE_TX_CON_P7 M23 K23 PCIE_RX_CON_P7 C7166 1 2TBT SCD22U10V1KX-GP
15 PCIE_TX_CON_P7 PCIE_RX2_P PCIE_TX2_P PCIE_RX_PCH_P7 15
PCIE_TX_CON_N7 M22 K22 PCIE_RX_CON_N7 C7167 1 2TBT SCD22U10V1KX-GP PD change 0622
15 PCIE_TX_CON_N7 PCIE_RX2_N PCIE_TX2_N PCIE_RX_PCH_N7 15
D PCIE_TX_CON_P8 H23 F23 PCIE_RX_CON_P8 C7168 1 2TBT SCD22U10V1KX-GP MP change 0820 D
15 PCIE_TX_CON_P8 PCIE_RX3_P PCIE_TX3_P PCIE_RX_PCH_P8 15
PCIE_TX_CON_N8 H22 F22 PCIE_RX_CON_N8 C7169 1 2TBT SCD22U10V1KX-GP ENG change 0513
15 PCIE_TX_CON_N8 PCIE_RX3_N PCIE_TX3_N PCIE_RX_PCH_N8 15

18 TBT_CLK_CPU V19 L4 PLT_RST# 14,24,31,61,63,68,89,91


PCIE_REFCLK_100_IN_P PERST_N R7103
18 TBT_CLK_CPU# T19
PCIE_REFCLK_100_IN_N TBT modify 0305
1 R7119 2 0R2J-L-GP TBT_CLKREQ_CPU#_R AC5 N16 PCIE_RBIAS 1 3K01R2F-3-GP
2 VCC3P3_SX
18 TBT_CLKREQ_CPU# PCIE_CLKREQ_N PCIE_RBIAS
MP change 0804
C7133 1 2TBT SCD1U16V2KX-L-GP DDI1_TBT_DATA_CON_P0 AB7 R2 HDMI_DATA_TBT_P2 C7123 1 2TBT SCD1U16V2KX-L-GP R7117 TBT
3 DDI1_TBT_DATA_CPU_P0 DPSNK0_ML0_P DPSRC_ML0_P HDMI_DATA_CON_P2 57
C7134 1 2TBT SCD1U16V2KX-L-GP DDI1_TBT_DATA_CON_N0 AC7 R1 HDMI_DATA_TBT_N2 C7124 1 2TBT SCD1U16V2KX-L-GP TBT_I2C_SDA 1 2K2R2J-L1-GP
2
3 DDI1_TBT_DATA_CPU_N0 DPSNK0_ML0_N DPSRC_ML0_N HDMI_DATA_CON_N2 57
C7135 1 2TBT SCD1U16V2KX-L-GP DDI1_TBT_DATA_CON_P1 AB9 N2 HDMI_DATA_TBT_P1 C7125 1 2TBT SCD1U16V2KX-L-GP R7120 TBT
3 DDI1_TBT_DATA_CPU_P1 DPSNK0_ML1_P DPSRC_ML1_P HDMI_DATA_CON_P1 57
C7136 1 2TBT SCD1U16V2KX-L-GP DDI1_TBT_DATA_CON_N1 AC9 N1 HDMI_DATA_TBT_N1 C7126 1 2TBT SCD1U16V2KX-L-GP TBT_I2C_SCL 1 2K2R2J-L1-GP
2
HDMI_DATA_CON_N1 57

SOURCE PORT 0
3 DDI1_TBT_DATA_CPU_N1 DPSNK0_ML1_N DPSRC_ML1_N

SINK PORT 0
C7137 1 2TBT SCD1U16V2KX-L-GP DDI1_TBT_DATA_CON_P2 AB11 L2 HDMI_DATA_TBT_P0 C7127 1 2TBT SCD1U16V2KX-L-GP HDMI_DATA_CON_P0 57
3 DDI1_TBT_DATA_CPU_P2 DPSNK0_ML2_P DPSRC_ML2_P
C7138 1 2TBT SCD1U16V2KX-L-GP DDI1_TBT_DATA_CON_N2 AC11 L1 HDMI_DATA_TBT_N0 C7128 1 2TBT SCD1U16V2KX-L-GP HDMI_DATA_CON_N0 57
3 DDI1_TBT_DATA_CPU_N2 DPSNK0_ML2_N DPSRC_ML2_N RN7108
C7139 1 2TBT SCD1U16V2KX-L-GP DDI1_TBT_DATA_CON_P3 AB13 J2 HDMI_CLK_TBT_P3 C7129 1 2TBT SCD1U16V2KX-L-GP TBT_TMU_CLK_OUT 1 8
3 DDI1_TBT_DATA_CPU_P3 DPSNK0_ML3_P DPSRC_ML3_P HDMI_CLK_CON_P3 57
ENG change 0416 C7140 1 2TBT SCD1U16V2KX-L-GP DDI1_TBT_DATA_CON_N3 AC13 J1 HDMI_CLK_TBT_N3 C7130 1 2TBT SCD1U16V2KX-L-GP 2 7
3 DDI1_TBT_DATA_CPU_N3 DPSNK0_ML3_N DPSRC_ML3_N HDMI_CLK_CON_N3 57
RTD3_CIO_PWR_EN 3 TBT 6
C7142 1 2TBT SCD1U16V2KX-L-GP DDI1_TBT_AUX_CON_P Y11 W19 RTD3_USB_PWR_EN 4 5
3 DDI1_TBT_AUX_CPU_P
C7143 1 2TBT SCD1U16V2KX-L-GP DDI1_TBT_AUX_CON_N W11
DPSNK0_AUX_P DPSRC_AUX_P
Y19
JJ 20150129
3D3V_LC 3 DDI1_TBT_AUX_CPU_N DPSNK0_AUX_N DPSRC_AUX_N SRN100KJ-L-GP
R7126 1 2 0R0402-PAD DDI1_TBT_HPD AA2 G1
19 DDI1_TBT_HPD_CPU DPSNK0_HPD DPSRC_HPD TBT_SRC_HPD 57
PD change 0624 R7104 TBT ENG change 0513
Y5 N6 DPSRC_RBIAS 1 14KR2F-GP
2
19 DDI1_TBT_CLK_CPU DPSNK0_DDC_CLK DPSRC_RBIAS
19 DDI1_TBT_DATA_CPU R4
TBT_TDI DPSNK0_DDC_DATA VCC3P3_SX
1 R7112 2 10KR2J-L-GP TBT U1 TBT_I2C_SDA 73
TBT_TDO DDI2_TBT_DATA_CON_P0 GPIO_0
1 R7115 2 10KR2J-L-GP TBT 3 DDI2_TBT_DATA_CPU_P0
C7109 1 2TBT SCD1U16V2KX-L-GP AB15 U2 TBT_I2C_SCL 73
TBT_TMS DDI2_TBT_DATA_CON_N0 DPSNK1_ML0_P GPIO_1 TBT_EE_WP_N
1 R7116 2 10KR2J-L-GP TBT C7110 1 2TBT SCD1U16V2KX-L-GP AC15 V1 PD change 0624 JJ 20150203

LC GPIO
3 DDI2_TBT_DATA_CPU_N0 DPSNK1_ML0_N GPIO_2
1 R7118 2 10KR2J-L-GP TBT TBT_TCK V2 TBT_TMU_CLK_OUT
C7111 DDI2_TBT_DATA_CON_P1 GPIO_3 TBT_PCIE_WAKE#
1 2TBT SCD1U16V2KX-L-GP AB17 W1 R7105 1 2 0R0402-PAD PCIE_WAKE# 17,31,61,63
3 DDI2_TBT_DATA_CPU_P1 C7112 DDI2_TBT_DATA_CON_N1 DPSNK1_ML1_P GPIO_4 TBT_CIO_PLUG_EVENT#
1 2TBT SCD1U16V2KX-L-GP AC17 W2 R7123 1 2 0R0402-PAD TBT_PLUG_EVENT# 14 H: HDMI Enable
3 DDI2_TBT_DATA_CPU_N1 DPSNK1_ML1_N GPIO_5 R7111
GPIO_6
Y1 TBT_HDMI_DDC_DATA 57 TBT
C7113 1 2TBT SCD1U16V2KX-L-GP DDI2_TBT_DATA_CON_P2 AB19 Y2 TBT_SRC_CFG1 2 10KR2J-L-GP
1

SINK PORT 1
3 DDI2_TBT_DATA_CPU_P2 DPSNK1_ML2_P GPIO_7 TBT_HDMI_DDC_CLK 57
C7114 1 2TBT SCD1U16V2KX-L-GP DDI2_TBT_DATA_CON_N2 AC19 AA1 TBT_SRC_CFG1
3 DDI2_TBT_DATA_CPU_N2 DPSNK1_ML2_N GPIO_8
J4 TBTA_I2C_INT 73
C7115 DDI2_TBT_DATA_CON_P3 POC_GPIO_0 TBTB_I2C_INT
1 2TBT SCD1U16V2KX-L-GP AB21 E2

POC GPIO
3 DDI2_TBT_DATA_CPU_P3 DPSNK1_ML3_P POC_GPIO_1
C7116 1 2TBT SCD1U16V2KX-L-GP DDI2_TBT_DATA_CON_N3 AC21 D4 RTD3_USB_PWR_EN
3 DDI2_TBT_DATA_CPU_N3 DPSNK1_ML3_N POC_GPIO_2 VCC3P3_SX
H4 TBT_FORCE_PWR_R R7125 1 2 0R0402-PAD
DDI2_TBT_AUX_CON_P POC_GPIO_3 TBT_BATLOW# TBT_FORCE_PWR 14
C7144 1 2TBT SCD1U16V2KX-L-GP Y12 F2
3 DDI2_TBT_AUX_CPU_P DPSNK1_AUX_P POC_GPIO_4
C7145 1 2TBT SCD1U16V2KX-L-GP DDI2_TBT_AUX_CON_N W12 D2 TBT_SLP_S3# R7124 1 2 0R0402-PAD ENG change 0412 RN7112
3 DDI2_TBT_AUX_CPU_N DPSNK1_AUX_N POC_GPIO_5 PM_SLP_S3# 17,24,40,53
C F1 RTD3_CIO_PWR_EN TBTA_I2C_INT 1 8 ENG change 0513 C
R7127 DDI2_TBT_HPD POC_GPIO_6 TBT_CIO_PLUG_EVENT#
19 DDI2_TBT_HPD_CPU 1 2 0R0402-PAD Y6 RN7115 PD change 0624 JJ 20150203 2 7
DPSNK1_HPD TBT_TEST_EN TBT_BATLOW#
PD change 0624 E1 1 4 3 TBT 6
DDI2_TBT_CLK TEST_EN TBTB_I2C_INT
Y8 2 TBT 3 4 5

Misc
DDI2_TBT_DATA DPSNK1_DDC_CLK TBT_TEST_PWG
N4 AB5
DPSNK1_DDC_DATA TEST_PWR_GOOD SRN100J-3-GP SRN10KJ-12-GP
Change TBT 0225 1 2 DPSNK_RBIAS Y18 F4
DPSNK_RBIAS RESET_N TBT_RESET_N 73
R7102 TBT SWAP 0303 SWAP 0228 TBT 0225
14KR2F-GP TBT_TDI Y4 D22 TBT_XTAL25_IN
TBT_TMS TDI XTAL_25_IN TBT_XTAL25_OUT
V4 D23
TBT_TCK TMS XTAL_25_OUT TBT_RESET_N TP7101
3D3V_S0
ENG change 0416 T4
TCK
1
3D3V_S0
TBT_TDO W4 MISC AB3
TDO EE_DI TBT_EE_DI 73
R7101 TBT AC4 ENG change 0423
EE_DO TBT_EE_DO 73
RN7101 1 4K75R2F-1-GP
2 TBT_RBIAS H6 AC3 RN7105
RBIAS EE_CS_N TBT_EE_CS_N 73
1 4 DDI1_TBT_DATA_CPU ENG change 0416 TBT_RSENSE J6 AB4 TBT_HDMI_DDC_DATA 1 4
RSENSE EE_CLK TBT_EE_CLK 73
2 TBT 3 DDI1_TBT_CLK_CPU ENG change 0416 TBT_HDMI_DDC_CLK 2 TBT 3
73 TBTA_USB31_RX_CON_P1 A15 B7
SRN2K2J-5-GP PA_RX1_P PB_RX1_P SRN2K2J-5-GP
73 TBTA_USB31_RX_CON_N1 B15 A7
PA_RX1_N PB_RX1_N 3D3V_FLASH
Change TBT 0225
C7119 1 2 TBT SCD22U10V1KX-GP TBTA_TX1_P A17 A9
73 TBTA_USB31_TX_CON_P1 PA_TX1_P PB_TX1_P
RN7116 C7120 1 2 TBT SCD22U10V1KX-GP TBTA_TX1_N B17 B9
73 TBTA_USB31_TX_CON_N1 PA_TX1_N PB_TX1_N 3D3V_FLASH
1 4 DDI2_TBT_DATA
2 TBT 3 DDI2_TBT_CLK
73 TBTA_USB31_TX_CON_P0
C7121 1 2 TBT SCD22U10V1KX-GP TBTA_TX0_P A19 A11 CHECK FW 如如如

1
C7122 1 SCD22U10V1KX-GP TBTA_TX0_N PA_TX0_P PB_TX0_P C7141 RN7104
73 TBTA_USB31_TX_CON_N0 2 TBT B19
PA_TX0_N PB_TX0_N
B11

SCD1U16V2KX-L-GP
SRN100KJ-6-GP TBT_EE_CS_N 1 8

TBT PORTS
B21 A13 U7102 TBT TBT_EE_DO 2 7

2
73 TBTA_USB31_RX_CON_P0 PA_RX0_P PB_RX0_P TBT_EE_WP_N
RN7113 A21 B13 3 TBT 6

Port A

PORT B
73 TBTA_USB31_RX_CON_N0 PA_RX0_N PB_RX0_N
1 4 DDI1_TBT_HPD_CPU TBT_EE_CS_N 1 TBT 8 TBT_HOLD_N 4 5
DDI2_TBT_HPD_CPU C7131 SCD1U16V1KX-GP TBTA_AUX_P TBT_EE_DO CS# VCC TBT_HOLD_N
2 TBT 3 73 TBTA_DPSRC_AUX_P 2 1 TBT Y15
PA_DPSRC_AUX_P PB_DPSRC_AUX_P
Y16 2
DO/IO1 HOLD#/IO3
7
C7132 2 1 TBT SCD1U16V1KX-GP TBTA_AUX_N W15 W16 TBT_EE_WP_N 3 6 TBT_EE_CLK SRN3K3J-1-GP
73 TBTA_DPSRC_AUX_N PA_DPSRC_AUX_N PB_DPSRC_AUX_N WP#/IO2 CLK
SRN100KJ-6-GP ENG change 0416 4 5 TBT_EE_DI
GND DI/IO0
73 TBTA_USB2_D_P E20 E19
PA_USB2_D_P PB_USB2_D_P
73 TBTA_USB2_D_N D20 D19
R7110 PA_USB2_D_N PB_USB2_D_N W25Q80DVSSIG-GP RN7107
TBT TBTA_LSTX NC_B4 NC_B4
2 1MR1F-GP
1 73 TBTA_LSTX A5 B4 072.25Q80.0001 1 8
PA_LS_G1 PB_LS_G1

POC
POC
A4 B5 NC_B5 NC_B5 2 7
73 TBTA_LSRX PA_LS_G2 PB_LS_G2
R7121 NC_G2 NC_G2 TBT
TBT TBTA_LSRX
73 TBTA_HPD M4
PA_LS_G3 PB_LS_G3
G2
TBTA_HPD
3 6
2 1MR1F-GP
1 R7107 TBT R7108 TBT 4 5
1 499R2F-2-GP
2 PA_USB2_RBIAS H19 F19 PB_USB2_RBIAS 1 499R2F-2-GP
2 ENG change 0430
PA_USB2_RBIAS PB_USB2_RBIAS SRN100KJ-L-GP
AC23 D6
B THERMDA#AC23 MONDC_SVR B
ENG change 0416 AB23
THERMDA#AB23
A23 C7117
ATEST_P SC27P50V2JN-2-GP
V18
PCIE_ATEST ATEST_N
B23 modify 0306
TBT_XTAL25_OUT 1 2
3D3V_FLASH ENG change 0416 AC1 DEBUG E18 ENG change 0412
TEST_EDM USB2_ATEST
RN7117 L15 W13
TBTA_DPSRC_AUX_N FUSE_VQPS_64 MONDC_DPSNK_0
1 4 N15
TBTA_DPSRC_AUX_P FUSE_VQPS_128 TBT 3D3V_S0
2 TBT 3
MONDC_DPSNK_1
W18
C23

3
SRN100KJ-9-GP-U MONDC_CIO_0
C22
MONDC_CIO_1 MONDC_DPSRC
AB2 TBT
X7101 TBT_FORCE_PWR_R 1 R7113 2
ALPINE-RIDGE-DP-GP XTAL-25MHZ-240-GP 1KR2F-L1-GP
82.30020.P41 DY
TBT_FORCE_PWR_R 1 R7114 2
100KR2F-L3-GP

2
DY

C7118
SC27P50V2JN-2-GP
TBT_XTAL25_IN 1 2

TBT
ENG change 0430

delete 0225
A A

Dr-Bios.com
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Thunderbolt(1/5)
Size Document Number Rev
A2
Newgate 1M
Date: Friday, September 04, 2015 Sheet 71 of 102
5 4 3 2 1
5 4 3 2 1

Follow AR Host Ref Design 0504B


1151 to 1221 0505
3D3V_LC change power rail 0515
Follow R change 0416 Move C and change power rail 0515
Follow Intel 0513 3D3V_S0_SYS 3D3V_S0
L7202

1
3D3V_LC VCC3P3_SX 3D3V_S0
TBT
C7241 Follow AR Host Ref Design 0504B 1 2

SC1U6D3V1MX-4-GP
3D3V_S0_SYS
change power rail 0515

2
IND-1UH-294-GP

1
TBT C7221 C7238 C7239 068.1R010.1221

SC1U6D3V1MX-4-GP

SC47U6D3V5MX-1-GP

SC47U6D3V5MX-1-GP
2

2
1

1
0D9V_DP C7220 C7231 C7232 C7233 C7234 TBT TBT TBT

R13

SC1U6D3V1MX-4-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
R6

H9
F8
Follow R change 0416
U7101B 2 OF 2

2
L8 A2

VCC3P3_SX

VCC3P3_S0

VCC3P3A
VCC3P3_LC
VCC0P9_DP VCC3P3_SVR
D L11
VCC0P9_DP VCC3P3_SVR
A3 TBT TBT TBT TBT TBT D
L12 B3
VCC0P9_DP VCC3P3_SVR
M8

1
VCC0P9_DP
T11
C7207 C7206 C7205 C7204 C7203 C7202 C7201 VCC0P9_DP
T12 L9
VCC0P9_DP VCC0P9_SVR

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP
L6 M9

2
VCC0P9_ANA_DPSRC VCC0P9_SVR 0D9V_SVR
M6 E12
VCC0P9_ANA_DPSRC VCC0P9_SVR_ANA
TBT TBT TBT TBT TBT TBT TBT V11
VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA
E13 Follow R change 0416
V12 F11
VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA 3D3V_S5 3D3V_S0
V13 F12
VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA
F13
VCC0P9_SVR_ANA
M13 F15

1
0D9V_PCIE VCC0P9_PCIE VCC0P9_SVR_ANA
Follow R change 0416 M15 J9

1
VCC0P9_PCIE VCC0P9_SVR_SENSE C7222 C7223 C7224 C7225 C7226 C7227 C7228 R7202
M16
VCC0P9_PCIE

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP
L19 L7201 TBT R7201 0R2J-L-GP

2
VCC0P9_ANA_PCIE_1 TBT_SVR_IND
N19
VCC0P9_ANA_PCIE_1 SVR_IND
C1 1 2 0R2J-2-GP TBT
L18 C2 IND-D68UH-105-GP TBT TBT TBT TBT TBT TBT TBT
0D9V_USB VCC0P9_ANA_PCIE_2 SVR_IND DY
M18 D1 068.R6810.1201

2
VCC0P9_ANA_PCIE_2 SVR_IND
Follow R change 0416 N18

VCC
1

1
VCC0P9_ANA_PCIE_2 PD change 0706
C7211 C7210 C7209 C7208 R15 A1 ENG change 0430
VCC0P9_USB SVR_VSS
SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP
R16 B1 VCC3P3_SX
2

0D9V_CIO VCC0P9_USB SVR_VSS


B2
SVR_VSS 0D9V_LVR
TBT TBT TBT TBT Follow R change 0416 R8

1
VCC0P9_CIO
R9
C7213 C7212 VCC0P9_CIO
R11

1
VCC0P9_CIO

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP
2 R12 F18 C7235 C7236 C7237

2
VCC0P9_CIO VCC0P9_LVR

SC47U6D3V5MX-1-GP

SC47U6D3V5MX-1-GP

SC47U6D3V5MX-1-GP
H18 C7219
VCC0P9_LVR

SC1U6D3V1MX-4-GP
TBT TBT VCC3V3_ANA_PCIE L16 J11

2
1

1
VCC3V3_ANA_USB2 VCC3P3_ANA_PCIE VCC0P9_LVR
J16 H11 TBT TBT TBT

1
C7214 C7215 C7216 VCC3P3_ANA_USB2 VCC0P9_LVR_SENSE
TBT

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP
A6 V5 C7242 C7243 C7244 C7245

1
VSS_ANA VSS_ANA

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
A8 V6

2
C7218 C7217 VSS_ANA VSS_ANA
TBT TBT TBT A10
VSS_ANA VSS_ANA
V8

SC1U6D3V1MX-4-GP

SC1U6D3V1MX-4-GP
A12 V9 TBT TBT TBT TBT

2
VSS_ANA VSS_ANA
A14 V15
VSS_ANA VSS_ANA
TBT TBT A16
VSS_ANA VSS_ANA
V16 Follow Intel 0513
A18 V20
VSS_ANA VSS_ANA
A20 W5
VSS_ANA VSS_ANA
A22
VSS_ANA VSS_ANA
W6 ENG confirm with RAYLEIGH 0504B
B6 W8
VSS_ANA VSS_ANA
C B8
VSS_ANA VSS_ANA
W9 Follow R change 0416 C
B10 W20
VSS_ANA VSS_ANA
B12 W22
VSS_ANA VSS_ANA
B14 W23
VSS_ANA VSS_ANA
Follow R change 0416 B16
VSS_ANA VSS_ANA
Y9
B18 Y13
VSS_ANA VSS_ANA
B20 Y20
VSS_ANA VSS_ANA
B22 AA22
VSS_ANA VSS_ANA
D8 AA23
VSS_ANA VSS_ANA
D9 AB6
VSS_ANA VSS_ANA
D11 AB8
VSS_ANA VSS_ANA
D12 AB10
VSS_ANA VSS_ANA
D13 AB12
VSS_ANA VSS_ANA
D15 AB14
VSS_ANA VSS_ANA
D16 AB16

GND
VSS_ANA VSS_ANA
D18 AB18
VSS_ANA VSS_ANA
E8 AB20
VSS_ANA VSS_ANA
E9 AB22
VSS_ANA VSS_ANA
E11 AC6
VSS_ANA VSS_ANA
E15 AC8
VSS_ANA VSS_ANA
E16 AC10
VSS_ANA VSS_ANA
E22 AC12
VSS_ANA VSS_ANA
E23 AC14
VSS_ANA VSS_ANA
F9 AC16
VSS_ANA VSS_ANA
F16 AC18
VSS_ANA VSS_ANA
F20 AC20
VSS_ANA VSS_ANA
G22 AC22
VSS_ANA VSS_ANA
G23 D5
VSS_ANA VSS
H1 E4
VSS_ANA VSS
H2 E5
VSS_ANA VSS
H12 E6
VSS_ANA VSS
H13 F5
VSS_ANA VSS
H15 F6
VSS_ANA VSS
H16 H5
VSS_ANA VSS
H20 H8
VSS_ANA VSS
J5 J8
VSS_ANA VSS
J18 J12
VSS_ANA VSS
J19 J13
VSS_ANA VSS
J20 J15
VSS_ANA VSS
J22 L13
VSS_ANA VSS
J23 M11
B VSS_ANA VSS B
K1 M12
VSS_ANA VSS
K2 N8
VSS_ANA VSS
L5 N9
VSS_ANA VSS
L20 N11
VSS_ANA VSS
L22 N12
VSS_ANA VSS
L23 N13
VSS_ANA VSS
M1 T6
VSS_ANA VSS
M2 T8
VSS_ANA VSS
M5 T9
VSS_ANA VSS
M19 T13
VSS_ANA VSS
M20 T15
VSS_ANA VSS
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
N5 T16
VSS_ANA VSS
N20 T18
VSS_ANA VSS
N22 AB1
VSS_ANA VSS
N23 AC2
VSS_ANA VSS
P1
P2
R5
R18
R19
R20
R22
R23
T1
T2
T5
T20
U22
U23

ALPINE-RIDGE-DP-GP

A A

Dr-Bios.com
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt(2/5)
Size Document Number Rev
A2
Newgate 1M
Date: Wednesday, August 12, 2015 Sheet 72 of 105
5 4 3 2 1
5 4 3 2 1

3D3V_S5 3D3V_S5
ENG change 0412 5V_TBT_VBUS 5V_TBT_BUS
change 0225
5V_S5
Eng cap change 0513
RN7301 L7301
1 4 SML1_DATA_R 1 2

2
2 DY 3 SML1_CLK_R UPB201209T-330Y-NP01-GP
R7317

1
100KR2F-L3-GP SRN10KJ-L-GP C7313 C7314 C7315 C7316 C7319

SCD22U10V1KX-GP

SCD22U10V1KX-GP

SCD22U10V1KX-GP

SCD22U10V1KX-GP

SC100U6D3V6MX-GP
TBT TBT TBT TBT TBT DY

1
PD change 0706 C7304 C7305 C7306 C7307
1

2
SC22U10V5MX-GP

SC22U10V5MX-GP

SC22U10V5MX-GP

SC22U10V5MX-GP
ENG change 0513 D7301
USB_TYPEC_I2C_INT# C7301 TBT RB751V-40-H-GP

2
1 2 SC2D2U10V3KX-L-GP TBTA_LDO_BMC TBT TBT TBT TBT TBT

A
change 0306
PD change 0706 C7302 TBT
1 2 SC2D2U10V3KX-L-GP VCC1V8D_TBTA
change 0225
C7303 TBT
1 2 SC2D2U10V3KX-L-GP VCC1V8A_TBTA Eng change 0504
D TBT1 D
3D3V_S5 change 0302 PD change 0624
A4 A2 TBTA_USB31_TX_CON_P0 PD change 0713
5V_TBT_VBUS VBUS#A4 SSTXP1 TBTA_USB31_TX_CON_N0
A9 A3
MP change 0804(PD EC)

1
VBUS#A9 SSTXN1 TBTA_USB31_TX_CON_P1
PD change 0624 B4
VBUS#B4 SSTXP2
B2
R7305 B9
VBUS#B9 SSTXN2
B3 TBTA_USB31_TX_CON_N1 MP change 0807(Old symbol from 0713)
0R0402-PAD MP change 0814
3D3V_S5
modify 0303 GND
G1
TBTA_USB31_RX_CON_P0 B11 G2

1
C7320 TBTA_USB31_RX_CON_N0 SSRXP1 GND
B10 A1
TBT_VDDIO SC1U10V2KX-L1-GP TBTA_USB31_RX_CON_P1 SSRXN1 GND
A11 A12
TBTA_USB31_RX_CON_N1 SSRXP2 GND
TBT A10 B1

2
SSRXN2 GND
B12
TBTA_CC1 GND
Eng I2C_ADDR setting follow CRB 0505 A5
1

C7308 TBTA_CC2 CC1


ENG cap change 0513 B5

H10

C11
D11
A11
B11

B10

A10
PD change 0624 CC2

H1

B1

K1

A2

E1

A6
A7
A8
B7

B9

A9
SC10U6D3V3MX-L-GP 13
U7301 TBTA_SBU1 CHASSIS#13
TBT ENG change 0513 A8 14
2

TBTA_SBU2 RFU1 CHASSIS#14


B8 15

VIN_3V3

VDDIO

LDO_1V8A

PP_CABLE

PP_5V0
PP_5V0
PP_5V0
PP_5V0

PP_HV
PP_HV
PP_HV
PP_HV

SENSEP

HV_GATE1

HV_GATE2
LDO_1V8D

LDO_BMC

SENSEN
TBT_I2C_ADDR F1 RFU2 CHASSIS#15
1 R7301 2 16
0R0402-PAD I2C_ADDR TBTA_USB_DP0 CHASSIS#16
A6 17
3D3V_TBT TBTA_USB_DN0 DP1 CHASSIS#17
71 TBT_I2C_SDA D1 A7 18
I2C_SDA1 TBTA_USB_DP1 DN1 CHASSIS#18
71 TBT_I2C_SCL D2
C1
I2C_SCL1 TBTA_USB_DN1
B6
B7
DP2 CHASSIS#19
19
20
PD change 0706
71 TBTA_I2C_INT I2C_IRQ1# DN2 CHASSIS#20
1 R7318 2 0R0402-PAD SML1_DATA_R A5 NP1
17,24,79 SML1_DATA I2C_SDA2 NP1
1 R7319 2 0R0402-PAD SML1_CLK_R B5 NP2
17,24,79 SML1_CLK

1
USB_TYPEC_I2C_INT#_R I2C_SCL2 NP2
24 USB_TYPEC_I2C_INT# 1 R7320 2 0R0402-PAD B6 H11 C7310 ED7301
I2C_IRQ2# VBUS SC1U10V2KX-L1-GP TBTA_USB31_TX_CON_P1 1
VBUS
J11 022.10005.02J1 SKT-USB36-5-GP-U1
2
B2 J10 TBT

2
GPIO0 VBUS ESD8011MUT5G-GP
PD change 0706 C2
GPIO1 VBUS
K11
3D3V_FLASH
TBT
D10 TBTA_CC1 C7317 1 2 SC220P50V2KX-3GP
G11
GPIO2
H2 TBTA_CC2 C7318 1 2 SC220P50V2KX-3GP
PD change 0622 ED7302
GPIO3 VOUT_3V3 TBTA_USB31_TX_CON_N1 1
71 TBTA_HPD C10
GPIO4
Swap0306_2 2
E10
GPIO5 LDO_3V3
G1 TBT
G10 ESD8011MUT5G-GP
GPIO6
D7

1
GPIO7 TBTA_USB_R_DP0 C7311 ED7303
H6 K6
GPIO8 C_USB_TP

SC10U6D3V3MX-L-GP
L6 TBTA_USB_R_DN0 TBTA_USB31_RX_CON_N1 1 2
C_USB_TN
A3 TBT

2
71 TBT_EE_CLK SPI_CLK
B4 ESD8011MUT5G-GP
71 TBT_EE_DI SPI_MOSI
A4 K7 TBTA_USB_R_DP1
71 TBT_EE_DO SPI_MISO C_USB_BP
C B3 L7 TBTA_USB_R_DN1 ED7304 C
71 TBT_EE_CS_N SPI_SSZ C_USB_BN TBTA_USB31_RX_CON_P1 1 2
71 TBTA_USB2_D_P L5
K5
USB_RP_P
L9 TBTA_CC1
ENG change 0421 ESD8011MUT5G-GP
71 TBTA_USB2_D_N USB_RP_N C_CC1
L10 TBTA_CC2
C_CC2
E2
TBTA_UART_RX UART_TX
F2
UART_RX
ENG change 0427 F4
SWD_DAT Change TBT 0225
G4
SWD_CLK PRD_CC1 0R2J-L-GP TBTA_CC1
K9 2 R7302 DY
1
RPD_G1 PRD_CC2 0R2J-L-GP TBTA_CC2 3D3V_FLASH
24 TBTA_MRESET E11 K10 2 R7303 DY
1 PD change 0706
MRESET RPD_G2
RN7302
E4 TBTA_DBG_CTL1 1 4 ED7305
TBTA_LSTX_R DEBUG_CTL1 TBTA_DBG_CTL2 TBTA_USB31_TX_CON_N0 1
71 TBTA_LSTX 1 R7307 2 0R0402-PAD L4 D5 2 TBT 3 2
TBTA_LSRX_R LSX_R2P DEBUG_CTL2
71 TBTA_LSRX 1 R7308 2 0R0402-PAD K4
LSX_P2R SRN10KJ-L-GP ESD8011MUT5G-GP
TBTA_DIG_AUD_P L3
TBTA_DIG_AUD_N DEBUG3 TBTA_SBU1_R 2 R7309 TBTA_SBU1
PD Change 0624 K3 K8 1 0R0402-PAD ED7306
DEBUG4 C_SBU1 TBTA_USB31_TX_CON_P0 1 2
TBTA_DEBUG1 L2 L8 TBTA_SBU2_R 2 R7310 1 0R0402-PAD TBTA_SBU2
TBTA_DEBUG2 DEBUG1 C_SBU2 ESD8011MUT5G-GP
K2
DEBUG2
PD change 0624
J1 ED7307
71 TBTA_DPSRC_AUX_P AUX_P TBTA_USB31_RX_CON_P0 1
71 TBTA_DPSRC_AUX_N J2 F11 TBT_RESET_N 71 2
AUX_N RESET#
2 R7304 1 0R0402-PAD TBT_BUSPWR F10 ESD8011MUT5G-GP
3D3V_FLASH BUSPOWERZ
NC#11

PD change 0624 TBTA_ROSC G2 ED7308


GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND

R_OSC TBTA_USB31_RX_CON_N0 1
SS

2
1

TPS65982ZQZR-GP-U TBT ESD8011MUT5G-GP


A1
D6
E5
E6
E7
F5
G5
H4
H5
B8
D8
E8
F6
F7
F8
G6
G7
G8
H7
H8
L1
L11

ENG change 0427 R7313 R7306 JJ 20150128 EU7301


074.65982.009Z
0R2J-L-GP

DY 15KR2F-GP
TBT TBTA_USB_DN1 1 6 TBTA_USB_DP1
EMI Request ENG change 0421
TBT_L11_TP TP7301
1 EL7301
2

1 R7314 2 TBTA_MRESET TPAD14-OP-GP 2 5 TBTA_USB_R_DP0 2 1 TBTA_USB_DP0


5V_S5
100KR2F-L3-GP
TBTA_USB_DN0 3 4 TBTA_USB_DP0 TBTA_USB_R_DN0 3 4 TBTA_USB_DN0

B
Change TBT 0302 B
MCM1012B900FBP-GP-U
TBT
RN7303 TBT_GND PJSRV05W-4DW6-GP 68.01012.201 PD change 0709
1 8 TBTA_UART_RX 075.00005.0B7C 2nd = 68.00396.001
JJ 20150129
2

2 7 2nd = 075.01256.007C 3rd = 69.10118.001


3 TBT 6 TBTA_DIG_AUD_P C7312 3rd = 75.09904.07C EL7302
4 5 TBTA_DIG_AUD_N 1 R7315 2 65982_HRESET TBT SCD22U10V2KX-L1-GP PD change 0625 TBTA_USB_R_DN1 2 1 TBTA_USB_DN1
1

24 USB_TYPEC_EN#
SRN100KJ-L-GP PD change 0703 0R2J-2-GP TBT TBTA_USB_R_DP1 3 4 TBTA_USB_DP1
TBT EU7304
1

MCM1012B900FBP-GP-U
TBT
RN7305 R7316 TBTA_CC1 1 6 TBTA_CC2 68.01012.201
1 4 TBTA_DEBUG1 0R2J-2-GP 2nd = 68.00396.001
2 TBT 3 TBTA_DEBUG2 2 5 3rd = 69.10118.001
5V_S5
DY
2

SRN100KJ-6-GP TBTA_SBU1 3 4 TBTA_SBU2

PD Change 0624 PJSRV05W-4DW6-GP


075.00005.0B7C UN 0225
2nd = 075.01256.007C
0R0402-PAD 1 R7311 2 PRD_CC1 3rd = 75.09904.07C
PD change 0625
0R0402-PAD 1 R7312 2 PRD_CC2 Eng change 0416
RC delete

TBTA_USB31_TX_CON_P0
71 TBTA_USB31_TX_CON_P0
TBTA_USB31_TX_CON_N0
71 TBTA_USB31_TX_CON_N0
TBTA_USB31_TX_CON_P1
71 TBTA_USB31_TX_CON_P1
TBTA_USB31_TX_CON_N1
71 TBTA_USB31_TX_CON_N1

TBTA_USB31_RX_CON_P0
71 TBTA_USB31_RX_CON_P0
TBTA_USB31_RX_CON_N0
71 TBTA_USB31_RX_CON_N0 TBTA_USB31_RX_CON_P1
71 TBTA_USB31_RX_CON_P1
TBTA_USB31_RX_CON_N1
71 TBTA_USB31_RX_CON_N1

A A

Dr-Bios.com
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt(3/5)
Size Document Number Rev
A2
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 73 of 105

5 4 3 2 1
5 4 3 2 1

1 R7603 2 VGA_RST#
14,79 DGPU_HOLD_RST#
0R2J-L-GP
NON_GC6
UN 0225

3D3V_AON_S0 1D05V_VGA_S0

C7602
SC1U10V2KX-L1-GP
Muxless

C7603
SC4D7U6D3V3KX-L-GP
Muxless

C7604
SC10U6D3V3MX-L-GP
Muxless

C7605
SC10U6D3V3MX-L-GP
Muxless
R7604 VGA1A 1 OF 17

1
Q7601 3D3V_AON_S0 10KR2J-L-GP
2N7002K-2-GP Muxless
D D
G AJ11

2
PEX_WAKE#
AG19
PEX_IOVDD_1
18 PEG_CLKREQ_CPU# D 84.2N702.J31 79 VGA_RST#
AJ12
PEX_RST# PEX_IOVDD_2
AG21
2ND = 84.2N702.031 PEX_IOVDD_3
AG22
S 3rd = 84.2N702.W31 PEG_CLKREQ_dGPU# AK12 AG24
PEX_CLKREQ# PEX_IOVDD_4
AH21
PEX_IOVDD_5
Muxless 18 PEG_CLK_CPU AL13
PEX_REFCLK PEX_IOVDD_6
AH25
18 PEG_CLK_CPU# AK13
PEX_REFCLK#
C7601 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_P0 AK14
3 PEG_RX_CPU_P0 PEX_TX0
C7606 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_N0 AJ14
3 PEG_RX_CPU_N0 PEX_TX0# 1D05V_VGA_S0
3 PEG_TX_CON_P0 AN12
PEX_RX0
3 PEG_TX_CON_N0 AM12 AG13
PEX_RX0# PEX_IOVDDQ_1
AG15
C7607 PEX_IOVDDQ_2
3 PEG_RX_CPU_P1 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_P1 AH14 AG16
PEX_TX1 PEX_IOVDDQ_3

C7609
SC1U10V2KX-L1-GP
Muxless

C7610
SC4D7U6D3V3KX-L-GP
Muxless

C7611
SC10U6D3V3MX-L-GP
Muxless

C7612
SC10U6D3V3MX-L-GP
Muxless
C7608 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_N1 AG14 AG18
3 PEG_RX_CPU_N1

1
PEX_TX1# PEX_IOVDDQ_4
AG25
PEX_IOVDDQ_5
3 PEG_TX_CON_P1 AN14 AH15
PEX_RX1 PEX_IOVDDQ_6
3 PEG_TX_CON_N1 AM14 AH18

2
PEX_RX1# PEX_IOVDDQ_7
AH26
C7613 PEG_RX_CON_P2 PEX_IOVDDQ_8
3 PEG_RX_CPU_P2 1 2 SCD22U10V2KX-L1-GP Muxless AK15 AH27
C7614 PEG_RX_CON_N2 PEX_TX2 PEX_IOVDDQ_9
3 PEG_RX_CPU_N2 1 2 SCD22U10V2KX-L1-GP Muxless AJ15 AJ27
PEX_TX2# PEX_IOVDDQ_10
AK27
PEX_IOVDDQ_11
3 PEG_TX_CON_P2 AP14 AL27
PEX_RX2 PEX_IOVDDQ_12
3 PEG_TX_CON_N2 AP15 AM28
PEX_RX2# PEX_IOVDDQ_13
AN28
C7615 PEG_RX_CON_P3 PEX_IOVDDQ_14
3 PEG_RX_CPU_P3 1 2 SCD22U10V2KX-L1-GP Muxless AL16
C7616 PEX_TX3
3 PEG_RX_CPU_N3 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_N3 AK16 Place under GPU Place near GPU
PEX_TX3#

3 PEG_TX_CON_P3 AN15
PEX_RX3
3 PEG_TX_CON_N3 AM15
PEX_RX3#
C7617 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_P4 AK17
3 PEG_RX_CPU_P4 PEX_TX4
C7618 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_N4 AJ17
3 PEG_RX_CPU_N4 PEX_TX4#
C C
3 PEG_TX_CON_P4 AN17
PEX_RX4
3 PEG_TX_CON_N4 AM17
PEX_RX4#
C7619 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_P5 AH17 3D3V_AON_S0
3 PEG_RX_CPU_P5 PEX_TX5
C7620 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_N5 AG17
3 PEG_RX_CPU_N5 PEX_TX5#
AH12
PEX_PLL_HVDD
3 PEG_TX_CON_P5 AP17
PEX_RX5

C7623
SCD1U16V2KX-L-GP
Muxless

C7624
SC4D7U6D3V3KX-L-GP
Muxless
3 PEG_TX_CON_N5 AP18 AG12
PEX_RX5# PEX_SVDD_3V3
C7621 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_P6 AK18
3 PEG_RX_CPU_P6

1
C7622 PEG_RX_CON_N6 PEX_TX6
3 PEG_RX_CPU_N6 1 2 SCD22U10V2KX-L1-GP Muxless AJ18
PEX_TX6#
AN18

2
3 PEG_TX_CON_P6 PEX_RX6
3 PEG_TX_CON_N6 AM18
PEX_RX6#
C7625 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_P7 AL19
3 PEG_RX_CPU_P7 PEX_TX7
C7626 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_N7 AK19
3 PEG_RX_CPU_N7 PEX_TX7#

3 PEG_TX_CON_P7 AN20
PEX_RX7
3 PEG_TX_CON_N7 AM20
PEX_RX7#
Place near GPU
C7627 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_P8 AK20
3 PEG_RX_CPU_P8 PEX_TX8
C7628 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_N8 AJ20
3 PEG_RX_CPU_N8 PEX_TX8#
L4 NVVDD_SENSE 85
VDD_SENSE
3 PEG_TX_CON_P8 AP20
PEX_RX8
3 PEG_TX_CON_N8 AP21
PEX_RX8#
L5 NVGND_SENSE 85
C7629 GND_SENSE
3 PEG_RX_CPU_P9 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_P9 AH20
C7630 PEG_RX_CON_N9 PEX_TX9
3 PEG_RX_CPU_N9 1 2 SCD22U10V2KX-L1-GP Muxless AG20
PEX_TX9#

3 PEG_TX_CON_P9 AN21
PEX_RX9
3 PEG_TX_CON_N9 AM21
PEX_RX9#
C7631 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_P10 AK21
3 PEG_RX_CPU_P10 PEX_TX10
C7632 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_N10 AJ21
3 PEG_RX_CPU_N10 PEX_TX10#
P8
B NC#P8 B
3 PEG_TX_CON_P10 AN23
PEX_RX10
3 PEG_TX_CON_N10 AM23
PEX_RX10#
C7633 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_P11 AL22
3 PEG_RX_CPU_P11 PEX_TX11
C7634 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_N11 AK22
3 PEG_RX_CPU_N11 PEX_TX11#
AP23 DY 200R2F-L1-GP
3 PEG_TX_CON_P11 PEX_RX11
3 PEG_TX_CON_N11 AP24
PEX_RX11# VGAPEX_AJ26
AJ26 1 R7605 2
C7635 PEG_RX_CON_P12 PEX_TSTCLK_OUT VGAPEX_AK26
3 PEG_RX_CPU_P12 1 2 SCD22U10V2KX-L1-GP Muxless AK23 AK26
C7636 PEG_RX_CON_N12 PEX_TX12 PEX_TSTCLK_OUT#
3 PEG_RX_CPU_N12 1 2 SCD22U10V2KX-L1-GP Muxless AJ23
PEX_TX12#

3 PEG_TX_CON_P12 AN24
PEX_RX12
3 PEG_TX_CON_N12 AM24
PEX_RX12# 1D05V_VGA_S0
Place near AG26
C7637 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_P13 AH23
3 PEG_RX_CPU_P13 PEX_TX13
C7638 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_N13 AG23 AG26
3 PEG_RX_CPU_N13 PEX_TX13# PEX_PLLVDD

3 PEG_TX_CON_P13 AN26
PEX_RX13

C7641
SCD1U16V2KX-L-GP
Muxless

C7642
SC4D7U6D3V3KX-L-GP
Muxless

C7643
SC1U10V2KX-L1-GP
Muxless
3 PEG_TX_CON_N13 AM26

1
PEX_RX13#
C7639 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_P14 AK24
3 PEG_RX_CPU_P14 PEX_TX14
C7640 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_N14 AJ24 AK11 TESTMODE 1 R7606 2
3 PEG_RX_CPU_N14

2
PEX_TX14# TESTMODE 10KR2J-L-GP
3 PEG_TX_CON_P14 AP26
PEX_RX14 Muxless
3 PEG_TX_CON_N14 AP27
PEX_RX14#
C7644 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_P15 AL25
3 PEG_RX_CPU_P15 PEX_TX15
C7645 1 2 SCD22U10V2KX-L1-GP Muxless PEG_RX_CON_N15 AK25
3 PEG_RX_CPU_N15 PEX_TX15# R7607

3 PEG_TX_CON_P15 AN27 AP29 PEX_TERMP 1 2


PEX_RX15 PEX_TERMP 2K49R2F-2-L-GP
3 PEG_TX_CON_N15 AM27
PEX_RX15#
Muxless Place near GPU
N15P-GT-A2-GP
A A
071.0N15P.000U
Muxless <Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU_840M_PEG (1/5)
Size Document Number Rev
Custom
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 76 of 105
5 4 3 2 1
5 4 3 2 1

VGA1J 10 OF 17

AN6 VGA1K 11 OF 17
IFPA_TXC#
AM6
IFPA_TXC
AJ8
IFPAB_RSET

IFPA_TXD0# AN3
IFPA_TXD0 AP3
AF8 IFPC_RSET
AH8 IFPAB_PLLVDD
D D
IFPA_TXD1# AM5
AN5
IFPA_TXD1
AF7 AG2
IFPC_PLLVDD IFPC_AUX_I2CW_SDA#
AG3
IFPC_AUX_I2CW_SCL
IFPA_TXD2# AK6
AL6
IFPA_TXD2
IFPC_L3# AG4
AG5
LVDS IFPA_TXD3# AH6
AJ6
IFPC_L3
AH4
IFPA_TXD3
HDMI IFPC_L2#
IFPC_L2 AH3

AH9 AJ2
IFPB_TXC# IFPC_L1#
IFPB_TXC AJ9 IFPC_L1 AJ3

AG8 AJ1
IFPA_IOVDD IFPC_L0#
AP5 AK1
IFPB_TXD4# IFPC_L0
AG9 AP6
IFPB_IOVDD IFPB_TXD4

AL7 AF6 P2
JJ 20150128 IFPB_TXD5# IFPC_IOVDD GPIO15
AM7
IFPB_TXD5
N15P-GT-A2-GP
IFPB_TXD6# AM8 071.0N15P.000U
IFPB_TXD6 AN8
JJ 20150128
Muxless
IFPB_TXD7# AL8
AK8
IFPB_TXD7

N4
C GPIO14 C

N15P-GT-A2-GP
071.0N15P.000U
Muxless

VGA1M 13 OF 17

VGA1L 12 OF 17

AB4
IFPE_AUX_I2CY_SDA#
AB3 AN2
IFPE_AUX_I2CY_SCL IFPD_RSET
AB8
IFPEF_PLLVDD
AC5
IFPE_L3#
AD6 AC4 AG7 AK2
IFPEF_RSET IFPE_L3 IFPD_PLLVDD IFPD_AUX_I2CX_SDA#
AK3
IFPD_AUX_I2CX_SCL
IFPE_L2# AC3
AC2
IFPE_L2
IFPD_L3# AK5
IFPE_L1# AC1 IFPD_L3 AK4
IFPE_L1 AD1
AL4
IFPD_L2#
AD3 AL3
IFPE_L0#
IFPE_L0
AD2
eDP IFPD_L2

IFPD_L1#
AM4
AM3
B
DP IFPD_L1

IFPD_L0#
AM2
B

AM1
IFPD_L0
R1
GPIO18

AG6 M6
IFPD_IOVDD GPIO17

N15P-GT-A2-GP

JJ 20150128
071.0N15P.000U
AC7
IFPE_IOVDD
IFPF_AUX_I2CZ_SDA#
AF2 Muxless
AF3
IFPF_AUX_I2CZ_SCL
AC8
IFPF_IOVDD
AF1
IFPF_L3#
AG1
JJ 20150128 IFPF_L3
AD5
IFPF_L2#
AD4
IFPF_L2

IFPF_L1# AF5
AF4
IFPF_L1
AE4
IFPF_L0#
IFPF_L0 AE3

P3
GPIO19

A
N15P-GT-A2-GP A
071.0N15P.000U
Muxless <Core Design>

Dr-Bios.com
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU_DIGITALOUT (2/5)
Size Document Number Rev
Custom
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 77 of 105
5 4 3 2 1
5 4 3 2 1

VGA1B 2 OF 17
81 MDA[63..0]
VGA1C 3 OF 17
1D35V_VGA_S0
MDA0 L28 E1 FB_CLAMP
MDA1 FBA_D0 FB_CLAMP
M29

1
MDA2 FBA_D1 82 MDB[63..0] MDB0
L29 G9
MDA3 FBA_D2 R7802 MDB1 FBB_D0
M28 E9
MDA4 FBA_D3 MDB2 FBB_D1
N31 10KR2J-L-GP G8
FBA_D4 FBB_D2

C7802
SCD1U16V2KX-L-GP
Muxless

C7803
SCD1U16V2KX-L-GP
Muxless

C7804
SCD1U16V2KX-L-GP
Muxless

C7808
SCD1U16V2KX-L-GP
Muxless

C7805
SCD1U16V2KX-L-GP
Muxless

C7809
SC1U10V2KX-L1-GP
Muxless

C7806
SC1U10V2KX-L1-GP
Muxless

C7810
SC4D7U6D3V3KX-L-GP
Muxless

C7807
SC4D7U6D3V3KX-L-GP
Muxless
MDA5 P29 K27 FB_PLLVDD_16mil_R 1 R7801 2 0R2J-L-GP FB_PLLVDD_16mil Muxless
MDB3 F9
MDA6 FBA_D5 FB_DLL_AVDD MDB4 FBB_D3
R29 F11

2
MDA7 FBA_D6 MDB5 FBB_D4
P28 Muxless_N16PGX G11

1
MDA8 FBA_D7 PLLVDD_PWR MDB6 FBB_D5
J28 F12
MDA9 FBA_D8 MDB7 FBB_D6 4 OF 17 VGA1D
H29 G12
FBA_D9

1
MDA10 C7801 MDB8 FBB_D7
J29 G6

2
FBA_D10 FBB_D8

SCD1U16V2KX-L-GP
MDA11 H28 Muxless 1 R7822 2 0R2J-L-GP MDB9 F5
MDA12 FBA_D11 MDB10 FBB_D9
G29 E6 AA27

2
MDA13 FBA_D12 MDB11 FBB_D10 FBVDDQ_1
E31
FBA_D13 Muxless_N16EGR F6
FBB_D11 FBVDDQ_2
AA30
MDA14 E32 MDB12 F4 AB27
MDA15 FBA_D14 MDB13 FBB_D12 FBVDDQ_3
D F30 G4 AB33 D
MDA16 FBA_D15 MDB14 FBB_D13 FBVDDQ_4
C34 E2 AC27
MDA17 FBA_D16 MDB15 FBB_D14 FBVDDQ_5
D32
FBA_D17 Place close to K27 F3
FBB_D15 FBVDDQ_6
AD27
MDA18 B33 PD change 0629 MDB16 C2 AE27 Place close to GPU Balls
MDA19 FBA_D18 MDB17 FBB_D16 FBVDDQ_7
C33 D4 AF27
MDA20 FBA_D19 MDB18 FBB_D17 FBVDDQ_8
F33 D3 AG27
MDA21 FBA_D20 MDB19 FBB_D18 FBVDDQ_9
F32 C1 B13
MDA22 FBA_D21 MDB20 FBB_D19 FBVDDQ_10
H33 B3 B16
MDA23 FBA_D22 MDB21 FBB_D20 FBVDDQ_11
H32 C4 B19
MDA24 FBA_D23 MDB22 FBB_D21 FBVDDQ_12
P34 B5 E13
MDA25 FBA_D24 MDB23 FBB_D22 FBVDDQ_13
P32 C5 E16
MDA26 FBA_D25 MDB24 FBB_D23 FBVDDQ_14
P31 A11 E19
MDA27 FBA_D26 MDB25 FBB_D24 FBVDDQ_15
P33 C11 H10
MDA28 FBA_D27 MDB26 FBB_D25 FBVDDQ_16
L31 D11 H11
MDA29 FBA_D28 MDB27 FBB_D26 FBVDDQ_17
L34 B11 H12
MDA30 FBA_D29 MDB28 FBB_D27 FBVDDQ_18
L32 D8 H13
MDA31 FBA_D30 MDB29 FBB_D28 FBVDDQ_19
L33 A8 H14
MDA32 FBA_D31 MDB30 FBB_D29 FBVDDQ_20
AG28 C8 H15
MDA33 FBA_D32 MDB31 FBB_D30 FBVDDQ_21
AF29 U30 B8 H16
MDA34 FBA_D33 FBA_CMD0 -FBA0_CS 81 MDB32 FBB_D31 FBVDDQ_22
AG29 T31 F24 H18
MDA35 FBA_D34 FBA_CMD1 FBA0_A3_BA3 81 MDB33 FBB_D32 FBVDDQ_23
AF28 U29 G23 D13 H19
MDA36 FBA_D35 FBA_CMD2 FBA0_A2_BA0 81 MDB34 FBB_D33 FBB_CMD0 -FBB0_CS 82 FBVDDQ_24
AD30 R34 E24 E14 H20
MDA37 FBA_D36 FBA_CMD3 FBA0_A4_BA2 81 MDB35 FBB_D34 FBB_CMD1 FBB0_A3_BA3 82 FBVDDQ_25
AD29 R33 FBA0_A5_BA1 81
G24 F14 FBB0_A2_BA0 82
H21
MDA38 FBA_D37 FBA_CMD4 MDB36 FBB_D35 FBB_CMD2 FBVDDQ_26
AC29 U32 D21 A12 H22
MDA39 FBA_D38 FBA_CMD5 -FBA0_WE 81 MDB37 FBB_D36 FBB_CMD3 FBB0_A4_BA2 82 FBVDDQ_27
AD28 U33 E21 B12 H23
MDA40 FBA_D39 FBA_CMD6 FBA0_A7_A8 81 MDB38 FBB_D37 FBB_CMD4 FBB0_A5_BA1 82 FBVDDQ_28
AJ29 U28 FBA0_A6_A11 81
G21 C14 -FBB0_WE 82
H24
MDA41 FBA_D40 FBA_CMD7 MDB39 FBB_D38 FBB_CMD5 FBVDDQ_29
AK29 V28 -FBA0_ABI 81
F21 B14 FBB0_A7_A8 82
H8
MDA42 FBA_D41 FBA_CMD8 MDB40 FBB_D39 FBB_CMD6 FBVDDQ_30
AJ30 V29 G27 G15 H9
MDA43 FBA_D42 FBA_CMD9 FBA0_A12_A13 81 MDB41 FBB_D40 FBB_CMD7 FBB0_A6_A11 82 FBVDDQ_31
AK28 V30 FBA0_A0_A10 81
D27 F15 -FBB0_ABI 82
L27
MDA44 FBA_D43 FBA_CMD10 MDB42 FBB_D41 FBB_CMD8 FBVDDQ_32
AM29 U34 G26 E15 M27
MDA45 FBA_D44 FBA_CMD11 FBA0_A1_A9 81 MDB43 FBB_D42 FBB_CMD9 FBB0_A12_A13 82 FBVDDQ_33
AM31 U31 E27 D15 N27
MDA46 FBA_D45 FBA_CMD12 -FBA0_RAS 81 MDB44 FBB_D43 FBB_CMD10 FBB0_A0_A10 82 FBVDDQ_34
AN29 V34 -FBA0_RST 81
E29 A14 FBB0_A1_A9 82
P27
MDA47 FBA_D46 FBA_CMD13 MDB45 FBB_D44 FBB_CMD11 FBVDDQ_35
AM30 V33 -FBA0_CKE 81
F29 D14 -FBB0_RAS 82
R27
MDA48 FBA_D47 FBA_CMD14 MDB46 FBB_D45 FBB_CMD12 FBVDDQ_36
AN31 Y32 E30 A15 T27
MDA49 FBA_D48 FBA_CMD15 -FBA0_CAS 81 MDB47 FBB_D46 FBB_CMD13 -FBB0_RST 82 FBVDDQ_37
AN32 AA31 D30 B15 T30
MDA50 FBA_D49 FBA_CMD16 -FBA1_CS 81 MDB48 FBB_D47 FBB_CMD14 -FBB0_CKE 82 FBVDDQ_38
AP30 AA29 FBA1_A3_BA3 81
A32 C17 -FBB0_CAS 82
T33
MDA51 FBA_D50 FBA_CMD17 MDB49 FBB_D48 FBB_CMD15 FBVDDQ_39
AP32 AA28 C31 D18 V27
MDA52 FBA_D51 FBA_CMD18 FBA1_A2_BA0 81 MDB50 FBB_D49 FBB_CMD16 -FBB1_CS 82 FBVDDQ_40
AM33 AC34 FBA1_A4_BA2 81
C32 E18 FBB1_A3_BA3 82
W27
MDA53 FBA_D52 FBA_CMD19 MDB51 FBB_D50 FBB_CMD17 FBVDDQ_41
AL31 AC33 FBA1_A5_BA1 81
B32 F18 FBB1_A2_BA0 82
W30
MDA54 FBA_D53 FBA_CMD20 MDB52 FBB_D51 FBB_CMD18 FBVDDQ_42
AK33 AA32 D29 A20 W33
MDA55 FBA_D54 FBA_CMD21 -FBA1_WE 81 MDB53 FBB_D52 FBB_CMD19 FBB1_A4_BA2 82 FBVDDQ_43
AK32 AA33 FBA1_A7_A8 81
A29 B20 FBB1_A5_BA1 82
Y27
MDA56 FBA_D55 FBA_CMD22 MDB54 FBB_D53 FBB_CMD20 FBVDDQ_44
AD34 Y28 FBA1_A6_A11 81
C29 C18 -FBB1_WE 82
MDA57 FBA_D56 FBA_CMD23 MDB55 FBB_D54 FBB_CMD21
AD32 Y29 B29 B18
MDA58 FBA_D57 FBA_CMD24 -FBA1_ABI 81 MDB56 FBB_D55 FBB_CMD22 FBB1_A7_A8 82
AC30 W31 FBA1_A12_A13 81
B21 G18 FBB1_A6_A11 82
F1
MDA59 FBA_D58 FBA_CMD25 MDB57 FBB_D56 FBB_CMD23 FB_VDDQ_SENSE
AD33 Y30 C23 G17 1D35V_VGA_S0
C MDA60 FBA_D59 FBA_CMD26 FBA1_A0_A10 81 MDB58 FBB_D57 FBB_CMD24 -FBB1_ABI 82 C
AF31 AA34 A21 F17
MDA61 FBA_D60 FBA_CMD27 FBA1_A1_A9 81 MDB59 FBB_D58 FBB_CMD25 FBB1_A12_A13 82
AG34 Y31 -FBA1_RAS 81
C21 D16 FBB1_A0_A10 82
F2
MDA62 FBA_D61 FBA_CMD28 MDB60 FBB_D59 FBB_CMD26 R7803 FB_GND_SENSE
AG32 Y34 -FBA1_RST 81
B24 A18 FBB1_A1_A9 82
MDA63 FBA_D62 FBA_CMD29 MDB61 FBB_D60 FBB_CMD27 40D2R2F-GP
AG33 Y33 C24 D17
FBA_D63 FBA_CMD30 -FBA1_CKE 81 MDB62 FBB_D61 FBB_CMD28 -FBB1_RAS 82
V31 B26 A17 2 1 FB_CAL_PD_VDDQ J27
FBA_CMD31 -FBA1_CAS 81 MDB63 FBB_D62 FBB_CMD29 -FBB1_RST 82 FB_CAL_PD_VDDQ
C26 B17 -FBB1_CKE 82
FBB_D63 FBB_CMD30
81 DQMA0
P30
FBA_DQM0 FBA_CMD_RFU0
R32
FBB_CMD31
E17
-FBB1_CAS 82 Muxless
F31 AC32 FB_CAL_PU_GND H27
81 DQMA1 FBA_DQM1 FBA_CMD_RFU1 FB_CAL_PU_GND
81 DQMA2
F34 82 DQMB0 E11 C12
FBA_DQM2 FBB_DQM0 FBB_CMD_RFU0
M32 82 DQMB1 E3 C20
81 DQMA3 FBA_DQM3 FBB_DQM1 FBB_CMD_RFU1 FB_CAL_TERM_GND
81 DQMA4
AD31 1D35V_VGA_S0 82 DQMB2 A3 H25
FBA_DQM4 FBB_DQM2 FB_CAL_TERM_GND
81 DQMA5
AL29 82 DQMB3 C9 1D35V_VGA_S0
FBA_DQM5 FBB_DQM3
81 DQMA6
AM32
FBA_DQM6 DY 82 DQMB4 F23
FBB_DQM4
AF34 R28 FBA_DEBUG0_R28 R7804 1 2 60D4R2F-GP 82 DQMB5 F27 N15P-GT-A2-GP
81 DQMA7 FBA_DQM7 FBA_DEBUG0 FBA_DEBUG0_AC28 R7805 1 FBB_DQM5
AC28 2 60D4R2F-GP 82 DQMB6 C30 DY 071.0N15P.000U
FBA_DEBUG1 FBB_DQM6 R7806 1
82 DQMB7 A24 G14 FBB_DEBUG0_G14 2 60D4R2F-GP

1
FBB_DQM7 FBB_DEBUG0
81 QSAP_0 M31 DY G20 FBB_DEBUG0_G20 R7807 1 2 60D4R2F-GP Muxlless
FBA_DQS_WP0 FBB_DEBUG1 R7808 R7809
81 QSAP_1 G31
FBA_DQS_WP1 60D4R2F-GP
81 QSAP_2 E33
FBA_DQS_WP2 FBA_CLK0
R30
CLKA0 81 82 QSBP_0 D10
FBB_DQS_WP0 DY 40D2R2F-GP
81 QSAP_3 M33
FBA_DQS_WP3 FBA_CLK0#
R31
CLKA0# 81 82 QSBP_1 D5
FBB_DQS_WP1 Muxless Muxless
81 QSAP_4 AE31 AB31 82 QSBP_2 C3 D12

2
FBA_DQS_WP4 FBA_CLK1 CLKA1 81 FBB_DQS_WP2 FBB_CLK0 CLKB0 82
81 QSAP_5 AK30
FBA_DQS_WP5 FBA_CLK1#
AC31
CLKA1# 81 PD change 0625 82 QSBP_3 B9
FBB_DQS_WP3 FBB_CLK0#
E12
CLKB0# 82
81 QSAP_6 AN33 82 QSBP_4 E23 E20
FBA_DQS_WP6 FBB_DQS_WP4 FBB_CLK1 CLKB1 82
81 QSAP_7 AF33 82 QSBP_5 E28 F20 CLKB1# 82
FBA_DQS_WP7 FBB_DQS_WP5 FBB_CLK1#
3D3V_VGA_S0 82 QSBP_6 B30
FBB_DQS_WP6
82 QSBP_7 A23
FBB_DQS_WP7
M30 K31 FBA_WCK01 81
FBA_DQS_RN0 FBA_WCK01
H30
FBA_DQS_RN1 FBA_WCK01#
L30
-FBA_WCK01 81 Follow design guide
E34 H34 FBA_WCK23 81
D9 F8 FBB_WCK01 82
FBA_DQS_RN2 FBA_WCK23 FBB_DQS_RN0 FBB_WCK01
M34 J34 E4 E8
FBA_DQS_RN3 FBA_WCK23# -FBA_WCK23 81 FBB_DQS_RN1 FBB_WCK01# -FBB_WCK01 82
AF30 AG30 FBA_WCK45 81 L7802 B2 A5 FBB_WCK23 82
FBA_DQS_RN4 FBA_WCK45 FBB_DQS_RN2 FBB_WCK23
AK31 AG31 -FBA_WCK45 81
A9 A6 -FBB_WCK23 82
FBA_DQS_RN5 FBA_WCK45# ( FBB_DQS_RN3 FBB_WCK23#
AM34 AJ34 1 ( 2 D22 D24
FBA_DQS_RN6 FBA_WCK67 FBA_WCK67 81 FBB_DQS_RN4 FBB_WCK45 FBB_WCK45 82
AF32 AK34 -FBA_WCK67 81
D28 D25 -FBB_WCK45 82
FBA_DQS_RN7 FBA_WCK67# BLM18KG300TN1D-GP FBB_DQS_RN5 FBB_WCK45#
A30 B27
CHIP BEAD BLM18KG300TN1D MURATA FBB_DQS_RN6 FBB_WCK67 FBB_WCK67 82
J30 B23 C27
FBA_WCKB01 FBB_DQS_RN7 FBB_WCK67# -FBB_WCK67 82
FBA_WCKB01#
J31 Muxless_N16EGR
FBA_WCKB23
J32 68.00084.H41 FBB_WCKB01
D6
FBA_WCKB23#
J33 2nd = 68.00334.051 FBB_WCKB01#
D7
AH31 C6
FBA_WCKB45 FBB_WCKB23
AJ31 1D05V_VGA_S0 B6
FBA_WCKB45# FBB_WCKB23#
AJ32 F26
FBA_WCKB67 FBB_WCKB45
FBA_WCKB67#
AJ33 Place close to GPU L7801 FBB_WCKB45#
E26
A26
FB_PLLVDD_16mil ( FBB_WCKB67
H26 U27 1 ( 2 A27
B FB_VREF FBA_PLL_AVDD FBB_WCKB67# B
C7811
SCD1U16V2KX-L-GP
Muxless

BLM18KG300TN1D-GP H17 FB_PLLVDD_16mil


1

N15P-GT-A2-GP CHIP BEAD BLM18KG300TN1D MURATA FBB_PLL_AVDD


Muxless

071.0N15P.000U C7812 Muxless_N16PGX


68.00084.H41 N15P-GT-A2-GP
2

2 SC22U6D3V5MX-L3-GP

C7813
SCD1U16V2KX-L-GP
Muxless
Muxless 2nd = 68.00334.051

1
071.0N15P.000U
PD change 0624 Muxless

2
Place close to H18 PD change 0625

1D35V_VGA_S0 1D35V_VGA_S0
Place close to H17
1

1
R7810
10KR2J-L-GP
Muxless

R7811
10KR2J-L-GP
Muxless

Group A Group B

R7812
10KR2J-L-GP
Muxless

R7813
10KR2J-L-GP
Muxless
Follow design guide
2

2
CKE0 CKE0
-FBA0_CKE -FBB0_CKE Follow design guide
CLKA1 CLKA0
CKE1 -FBA1_CKE Follow design guide CKE1 -FBB1_CKE Follow design guide
CLKB1 CLKB0
1

R7814 R7815 -FBA0_RST -FBB0_RST

1
80D6R2F-L-GP 80D6R2F-L-GP Reset Reset
Muxless Muxless -FBA1_RST -FBB1_RST R7816 R7817
80D6R2F-L-GP 80D6R2F-L-GP
2

Muxless Muxless
CLKA1# CLKA0#

2
1

CLKB1# CLKB0#
R7818
10KR2J-L-GP
Muxless

R7819
10KR2J-L-GP
Muxless

Muxless
10KR2J-L-GP
R7820

Muxless
10KR2J-L-GP
R7821

FBCLK Termination place on VRAM side FBCLK Termination place on VRAM side
2

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU_VRAM I/F (3/5)


Size Document Number Rev
Custom
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 78 of 105

5 4 3 2 1

Dr-Bios.com
5 4 3 2 1

CHECK WITH FAE 1D05V_VGA_S0 Muxless PLLVDD_PWR


VGA1N 14 OF 17 L7902 Place close to AD8
BLM18KG300TN1D-GP
1 ( 2 (
68.00084.H41
3D3V_VGA_S0_DACA_VDD_16MIL AG10 R4 VGASCL_R4 2nd = 68.00334.051
DACA_VDD I2CA_SCL VGASDA_R5
R5
I2CA_SDA

1
DACA_VREF_AP9 AP9 C7901 C7902
DACA_VREF

SCD1U16V2KX-L-GP
SC22U6D3V5MX-L3-GP

2
1
AP8 AM9 Muxless Muxless

2
DACA_RSET DACA_HSYNC
AN9
1
2

DACA_VSYNC RN7901 VGA1O 15 OF 17


SRN1K8J-GP
RN7905 1D05V_VGA_S0
DACA_RED
AK9 Muxless Muxless
SRN10KJ-L-GP L7901

3
4
Muxless AL10 HCB1608KF-181-GP AD8
DACA_GREEN SP_PLLVDD PLLVDD
1 2 AE8
4
3

SP_PLLVDD
DACA_BLUE
AL9 68.00214.051
AD7
VID_PLLVDD

1
N15P-GT-A2-GP Muxless C7903 C7904 C7905 C7906

SC22U6D3V5MX-L3-GP

SC4D7U6D3V3KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
071.0N15P.000U
D D

2
Muxless Muxless Muxless Muxless
VIDEO_CLK_XTAL_SS H1 J4 XTAL_OUTBUFF
XTAL_SSIN XTAL_OUTBUFF

H3 H2
XTAL_IN XTAL_OUT
3D3V_AON_S0 3D3V_AON_S0 N15P-GT-A2-GP
Place C7606 close to AE8 071.0N15P.000U
GC6_20
3D3V_S0
Place C7607 close to AD7
Q7905 Muxless
Muxless VGA_RST#GC6 6 1 DY
Q7901 RN7906 R7907
4
3

SMBC_THERM_NV 1 6 5 2 3D3V_7905 2 3 RN7908 DGPU_XTAL_27M_IN 1 1MR2J-L3-GP


2 DGPU_XTAL_27M_OUT
SML1_CLK 17,24,73
14,76 DGPU_HOLD_RST#
1 4 2 3 VIDEO_CLK_XTAL_SS
RN7902 2 5 4 3 1 4 XTAL_OUTBUFF
SRN2K2J-5-GP SRN10KJ-L-GP

2
Muxless 3 4 SMBD_THERM_NV 2N7002KDW-GP GC6_20 SRN10KJ-L-GP
17,24,73 SML1_DATA
84.2N702.A3F Muxless R7908
1
2

2N7002KDW-GP 2nd = 75.00601.07C 390R2J-3-L-GP


84.2N702.A3F 3rd = 075.01660.007C Muxless Muxless
SMBC_THERM_NV 2nd = 75.00601.07C X7901

1
SMBD_THERM_NV 3rd = 075.01660.007C GC6_20
Q7906 1 4
PD change 0622 VGA_RST#GC6 6 1

Muxless GPU_PEX_RST_HOLD# 5 2 3D3V_7907


Q7903 2 3 27MHZ_OUT_R
24 DGPUHOT 1 R7910 2 DGPUHOT_R G 4 3
0R0402-PAD

1
D DGPUHOT# 2N7002KDW-GP C7908 XTAL-27MHZ-137-GP C7907

SC15P50V2JN-L-GP

SC15P50V2JN-L-GP
84.2N702.A3F 82.30034.A61
S 2nd = 75.00601.07C 2nd = 82.30034.921

2
3rd = 075.01660.007C
2N7002K-2-GP
84.2N702.J31 3D3V_AON_S0
2nd = 84.2N702.031
3rd = 84.2N702.W31 RN7907
VGA_RST#GC6 2 3
GPU_EVENT_GPU# 1 4

SRN10KJ-L-GP
3D3V_AON_S0
GC6_20
GC6_20 PD change 0622
Q7902
G

D VGA_RST#GC6 1 R7941 2
GPU_EVENT# 19 VGA_RST# 76
0R0402-PAD
GPU_EVENT_GPU# S

2N7002K-2-GP PD change 0622


84.2N702.J31
2nd = 84.2N702.031
C
3rd = 84.2N702.W31 C
GC6_FB_EN_GPU 2 R7912 1 GC6_FB_EN 17,86
0R0402-PAD
1

R7913
10KR2J-3-GP
GC6_20
2

VGA1Q 17 OF 17

T4 SMBC_THERM_NV
I2CS_SCL SMBD_THERM_NV
I2CS_SDA
T3 Muxless
RN7904 SRN1K8J-GP
R2 VGASCL_R2 1 4
I2CC_SCL VGASDA_R3
R3 2 3
I2CC_SDA
R7 VGASCL_R7 2 3
I2CB_SCL VGASDA_R6 3D3V_AON_S0
K4 R6 1 4
THERMDN I2CB_SDA
K3 RN7903 SRN1K8J-GP RN7909
THERMDP GPIO5_GC6_PWR_EN
Muxless 1 8
VGA_GPIO9_ALERT# 2 7
AM10 VGA_CORE_PSI 3 6
JTAG_TCK GPU_PEX_RST_HOLD#
AP11 4 5
JTAG_TMS
Muxless AM11
JTAG_TDI
R7915 AP12 SRN10KJ-12-GP
JTAG_TDO
1 10KR2J-L-GP
2 VGA_JTAG_TRST# AN11 P6 GC6_FB_EN_GPU Muxless
JTAG_TRST# GPIO0
M3
GPIO1
L6
GPIO2
P5
GPIO3 RN7910
P7
GPIO4 GPU_OVERT#
L7 GPIO5_GC6_PWR_EN 86 1 4
GPIO5 GPU_EVENT_GPU# DGPUHOT#
M7 2 3
GPIO6
N8
GPIO7 GPU_OVERT# SRN100KJ-6-GP
M1
GPIO8 VGA_GPIO9_ALERT#
GPIO9
M2 Muxless
L1 VRAM_VREF_CTL 83,84
GPIO10
M5 VGA_CORE_VID 85
GPIO11 DGPUHOT#
N3 DGPUHOT# 44
GPIO12 VGA_GPIO16_R8
M4 1 R7919 2 VGA_CORE_PSI 85
GPIO13 0R0402-PAD
R8
GPIO16
P4
GPIO20 GPU_PEX_RST_HOLD#
GPIO21
P1 PD change 0622 3D3V_VGA_S0
1

N15P-GT-A2-GP Muxless R7902 R7930 R7931


071.0N15P.000U 4K99R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP
B DY DY DY B
2

ROM_SLK_D4
ROM_SI_D3
VGA1P 16 OF 17 ROM_SO_C4

JJ 20150128
1

H6
ROM_CS# R7932 R7934 R7935
3D3V_AON_S0 H5 ROM_SI_D3 4K99R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP
ROM_SI ROM_SO_C4
ROM_SO
H7 DY
STRAP0 J2 H4 ROM_SLK_D4
4.99Kohm 64.49915.6DL
2

STRAP1 STRAP0 ROM_SCLK


J7
STRAP2 STRAP1
J6
STRAP3 J5
STRAP2
10Kohm 64.10025.L0L
1

STRAP4 STRAP3
J3
R7929
49K9R2F-L-GP
R7928
49K9R2F-L-GP
R7927
49K9R2F-L-GP
R7926
49K9R2F-L-GP
R7925
49K9R2F-L-GP
STRAP4
15Kohm 64.15025.6DL
DY DY DY DY 20Kohm 64.20025.6DL
24.9Kohm 64.24925.6DL
2

BUFRST#
L2 PD change 0622
STRAP0
STRAP1
STRAP2
30.1Kohm 64.30125.6DL
STRAP3
STRAP4
STRAP_REF0_GND_N9 J1
MULTI_STRAP_REF0_GND CEC
L3 SYS_PEX_RST_MON#_R 1 R7901 2
0R0402-PAD
DGPU_HOLD_RST# 34.8Kohm 64.34825.6DL
45Kohm 64.45325.6DL
1

R7940 R7939 R7938 R7937 R7936 R7924


49K9R2F-L-GP 49K9R2F-L-GP 49K9R2F-L-GP 49K9R2F-L-GP 49K9R2F-L-GP 40K2R2F-GP
DY DY DY DY DY Muxless
N15P-GT-A2-GP Muxless
2

071.0N15P.000U

A A

5 4
Dr-Bios.com 3 2
<Core Design>

Title

Size
Custom

Date:
Document Number
GPU_GPIO/STRAP

Tuesday, August 18, 2015


Newgate
1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Sheet 79 of
Rev
1M
105
5 4 3 2 1

VGA1I 9 OF 17

N19 GND GND T28


1V_VGACORE_S0 VGA1E 5 OF 17 VGA1G 7 OF 17 N2 T32
GND GND
N21 T5
GND GND
A2 GND GND AM25 N23 GND GND T7
AA12 AA17 AN1 N28 U12
VDD_1 GND GND GND GND
AA14 AA18 AN10 N30 U14
C8001 VDD_2 GND GND GND GND
SC4D7U6D3V3KX-L-GP
Muxless

C8004
SC4D7U6D3V3KX-L-GP
Muxless

C8005
SC4D7U6D3V3KX-L-GP
Muxless

C8003
SC4D7U6D3V3KX-L-GP
Muxless
AA16 VDD_3 AA20 GND GND AN13 N32 GND GND U16
AA19 AA22 AN16 N33 U19
VDD_4 GND GND GND GND
1

1
AA21 AB12 AN19 N5 U21
VDD_5 GND GND GND GND
AA23 AB14 AN22 N7 U23
VDD_6 GND GND GND GND
AB13 AB16 AN25 P13 V12
2

2
VDD_7 GND GND GND GND
AB15 AB19 AN30 P15 V14
VDD_8 GND GND GND GND
AB17 AB2 AN34 P17 V16
D VDD_9 GND GND GND GND D
AB18 VDD_10 AB21 GND GND AN4 P18 GND GND V19
AB20 A33 AN7 P20 V21
VDD_11 GND GND GND GND
AB22 AB23 AP2 P22 V23
VDD_12 GND GND GND GND
AC12 AB28 AP33 R12 W13
VDD_13 GND GND GND GND
AC14 VDD_14 AB30 GND GND B1 R14 GND GND W15
AC16 AB32 B10 R16 W17
VDD_15 GND GND GND GND
AC19 AB5 B22 R19 W18
VDD_16 GND GND GND GND
AC21 VDD_17 AB7 GND GND B25 R21 GND GND W20
AC23 AC13 B28 R23 W22
VDD_18 GND GND GND GND
C8006
SC4D7U6D3V3KX-L-GP
Muxless

C8007
SC4D7U6D3V3KX-L-GP
Muxless

C8008
SC4D7U6D3V3KX-L-GP
Muxless

C8009
SC4D7U6D3V3KX-L-GP
Muxless
M12 AC15 B31 T13 W28
VDD_19 GND GND GND GND
M14 AC17 B34 T15 Y12
VDD_20 GND GND GND GND
1

M16 VDD_21 AC18 GND GND B4 T17 GND GND Y14


M19 VDD_22 AA13 GND GND B7 T18 GND GND Y16
M21 AC20 C10 T2 Y19
2

VDD_23 GND GND GND GND


M23 AC22 C13 T20 Y21
VDD_24 GND GND GND GND
N13 AE2 C19 T22 Y23
VDD_25 GND GND GND GND
N15 VDD_26 AE28 GND GND C22
N17 AE30 C25
VDD_27 GND GND
N18 VDD_28 AE32 GND GND C28
N20 AE33 C7
VDD_29 GND GND
N22 VDD_30 AE5 GND GND D2
P12 VDD_31 AE7 GND GND D31
P14 AH10 D33 AG11 AH11
VDD_32 GND GND GND GND
P16 VDD_33 AA15 GND GND E10
P19 AH13 E22
VDD_34 GND GND
P21 AH16 E25
VDD_35 GND GND
P23 VDD_36 AH19 GND GND E5
C8010
SCD1U16V2KX-L-GP
Muxless

C8011
SCD1U16V2KX-L-GP
Muxless

C8012
SCD1U16V2KX-L-GP
Muxless

C8013
SCD1U16V2KX-L-GP
Muxless

R13 AH2 E7
VDD_37 GND GND
R15 VDD_38 AH22 GND GND F28
1

R17 AH24 F7
VDD_39 GND GND
R18 AH28 G10 C16
VDD_40 GND GND GND_OPT_1
R20 AH29 G13 W32
2

VDD_41 GND GND GND_OPT_2


R22 AH30 G16
VDD_42 GND GND
T12 VDD_43 AH32 GND GND G19
C C
T14 VDD_44 AH33 GND GND G2
T16 AH5 G22
VDD_45 GND GND N15P-GT-A2-GP
T19 VDD_46 AH7 GND GND G25
T21 VDD_47 AJ7 GND GND G28 071.0N15P.000U
T23 VDD_48 AK10 GND GND G3 Muxless
U13 AK7 G30
VDD_49 GND GND
U15 AL12 G32
VDD_50 GND GND VGA1H 8 OF 17
U17 AL14 G33
VDD_51 GND GND
C8014
SC10U6D3V3MX-L-GP
Muxless

C8015
SC10U6D3V3MX-L-GP
Muxless

C8016
SC10U6D3V3MX-L-GP
Muxless

C8017
SC10U6D3V3MX-L-GP
Muxless

C8018
SC10U6D3V3MX-L-GP
Muxless

U18 AL15 G5
VDD_52 GND GND
U20 AL17 G7
VDD_53 GND GND
1

U22 VDD_54 AL18 GND GND K2


V13 VDD_55 AL2 GND GND K28
V15 AL20 K30
2

VDD_56 GND GND


V17 VDD_57 AL21 GND GND K32 XVDD U1
V18 AL23 K33 U2
VDD_58 GND GND XVDD
V20 VDD_59 AL24 GND GND K5 XVDD U3
V22 AL26 K7 U4
VDD_60 GND GND XVDD
W12 AL28 M13 U5
VDD_61 GND GND XVDD
W14 VDD_62 AL30 GND GND M15 XVDD U6
W16 AL32 M17 U7
VDD_63 GND GND XVDD
W19 AL33 M18 U8
VDD_64 GND GND XVDD
W21 VDD_65 AL5 GND GND M20
W23 AM13 M22
VDD_66 GND GND
C8019
SC22U6D3V5MX-L3-GP
Muxless

C8020
SC22U6D3V5MX-L3-GP
Muxless

C8021
SC22U6D3V5MX-L3-GP
Muxless

C8022
SC22U6D3V5MX-L3-GP
Muxless

Y13 AM16 N12 V1


VDD_67 GND GND XVDD
Y15 AM19 N14 V2
VDD_68 GND GND XVDD
1

Y17 VDD_69 AM22 GND GND N16 XVDD V3


Y18 VDD_70 XVDD V4
Y20 V5
2

VDD_71 XVDD
Y22 VDD_72 XVDD V6
N15P-GT-A2-GP V7
XVDD
071.0N15P.000U XVDD
V8
N15P-GT-A2-GP
071.0N15P.000U Muxless
W2
B XVDD B
Muxless XVDD
W3
XVDD W4
XVDD W5
W7
XVDD
XVDD W8
C8033
SC22U6D3V5MX-L3-GP
Muxless_N16EGR

C8034
SC22U6D3V5MX-L3-GP
Muxless_N16EGR

C8035
SC22U6D3V5MX-L3-GP
Muxless_N16EGR

XVDD Y1
1

Y2
XVDD
Y3
XVDD
Y4
2

3D3V_AON_S0 XVDD
Place near J8/K8 XVDD
Y5
Y6
XVDD
Y7
XVDD
XVDD Y8
C8002
SCD1U16V2KX-L-GP
Muxless

C8024
SCD1U16V2KX-L-GP
DY

C8025
SC1U10V2KX-L1-GP
Muxless

C8026
SC4D7U6D3V3KX-L-GP
Muxless
1

XVDD AA1
PD change 0626 AA2
2

XVDD
AA3
XVDD
AA4
XVDD
AA5
XVDD
AA6
XVDD
AA7
XVDD
XVDD AA8
VGA1F 6 OF 17
PD change 0625 N15P-GT-A2-GP
4.7uF(X6S) 15
071.0N15P.000U
1uF(X6S) 8 AC6
NC#AC6 3V3MISC
J8
3D3V_VGA_S0
Muxless
AJ28 NC#AJ28 3V3MISC K8
22uF(X5R) 7 AJ4
AJ5
NC#AJ4 VDD33
L8
M8
A NC#AJ5 VDD33 A
4.7uF(X5R) 5 AL11 NC#AL11
C8027
SCD1U16V2KX-L-GP
Muxless

C8028
SCD1U16V2KX-L-GP
Muxless

C8029
SCD1U16V2KX-L-GP
DY

C8030
SC1U10V2KX-L1-GP
Muxless

C8031
SC4D7U6D3V3KX-L-GP
Muxless

Dr-Bios.com
C15 NC#C15
1

330uF(POS) 1 D19
D20
NC#D19 <Core Design>
NC#D20
D23
2

NC#D23
D26
H31
NC#D26 Wistron Corporation
NC#H31 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
T8
NC#T8 Taipei Hsien 221, Taiwan, R.O.C.
V32
NC#V32
Title

N15P-GT-A2-GP Place near L8/M8 Place near GPU GPU_POWER/GND (5/5)


Size Document Number Rev
071.0N15P.000U Custom
Newgate 1M
Muxless Date: Wednesday, August 12, 2015 Sheet 80 of 105
5 4 3 2 1
5 4 3 2 1

TABLE
GDDR5 VIDEO MEMORY 72.05224.A0U 72.20325.B0U

HYNIX 2GBITS SAMSUNG 2GBITS HYNIX 4GBITS SAMSUNG 4GBITS


(64Mx32) (64Mx32) (128Mx32) (128Mx32)

U91 U92 U93 U94 H5GC4H24MFR K4G41325FC-HC03


U95 U96 U97 U98 H5GQ2H24AFR-T2C K4G20325FD-FC04 (tentative) (tentative)

D D

FB CMD mapping Mode H -N15P-GX GDDR5 LOGIC CHECK PM AVL


MDA[63..0] 78

VRAM1B 2 OF 2 VRAM2B 2 OF 2

K4 A4 MDA0 FBA0_A0_A10 K4 A4 MDA24


78 FBA0_A7_A8
H5
A8/A7 Normal DQ0
A2 MDA1 FBA0_A6_A11 H5
A8/A7 Mirror DQ0
A2 MDA25
78 FBA0_A1_A9 A9/A1 DQ1 A9/A1 DQ1
H4 B4 MDA2 FBA0_A7_A8 H4 B4 MDA26
78 FBA0_A0_A10 A10/A0 DQ2 A10/A0 DQ2
K5 B2 MDA3 FBA0_A1_A9 K5 B2 MDA27
78 FBA0_A6_A11 A11/A6 DQ3 A11/A6 DQ3
J5 E4 MDA4 FBA0_A12_A13 J5 E4 MDA28
78 FBA0_A12_A13 A12/A13 DQ4 A12/A13 DQ4
E2 MDA5 E2 MDA29
DQ5 MDA6 FBA0_A4_BA2 DQ5 MDA30
78 FBA0_A2_BA0 H11 BA0/A2 DQ6 F4 H11 BA0/A2 DQ6 F4
K10 F2 MDA7 FBA0_A3_BA3 K10 F2 MDA31
78 FBA0_A5_BA1 BA1/A5 DQ7 BA1/A5 DQ7
K11 A11 FBA0_A2_BA0 K11 A11
78 FBA0_A4_BA2 BA2/A4 DQ8 BA2/A4 DQ8
H10 A13 FBA0_A5_BA1 H10 A13
78 FBA0_A3_BA3 BA3/A3 DQ9 BA3/A3 DQ9
B11 B11
DQ10 -FBA0_ABI DQ10
78 -FBA0_ABI J4 ABI# DQ11 B13 J4 ABI# DQ11 B13
G3 E11 -FBA0_CAS G3 E11
78 -FBA0_RAS RAS# DQ12 RAS# DQ12
G12 E13 -FBA0_WE G12 E13
78 -FBA0_CS CS# DQ13 CS# DQ13
L3 F11 -FBA0_RAS L3 F11
78 -FBA0_CAS CAS# DQ14 CAS# DQ14
L12 F13 -FBA0_CS L12 F13
78 -FBA0_WE WE# DQ15 WE# DQ15
U11 MDA16 U11 MDA8
DQ16 MDA17 CLKA0 DQ16 MDA9
78 CLKA0 J12 U13 J12 U13
CK DQ17 MDA18 1D35V_VGA_S0 CLKA0# CK DQ17 MDA10
78 CLKA0# J11 T11 J11 T11
CK# DQ18 MDA19 -FBA0_CKE CK# DQ18 MDA11
78 -FBA0_CKE J3 CKE# DQ19 T13 J3 CKE# DQ19 T13
N11 MDA20 N11 MDA12
DQ20 MDA21 DQ20 MDA13
78 DQMA0 D2 DBI0# DQ21 N13 78 DQMA3 D2 DBI0# DQ21 N13
C MDA22 MDA14 C
D13 DBI1# DQ22 M11 D13 DBI1# DQ22 M11

1
P13 M13 MDA23 P13 M13 MDA15
78 DQMA2 DBI2# DQ23 78 DQMA1 DBI2# DQ23
P2 DBI3# DQ24 U4 P2 DBI3# DQ24 U4
U2 R8102 U2
DQ25 1KR2J-1-GP -FBA0_RST DQ25
78 -FBA0_RST J2 RESET# DQ26 T4 J2 RESET# DQ26 T4
T2 Muxless T2

2
DQ27 DQ27
J10 N4 J10 N4
FBA0_ZQ1 SEN DQ28 FBA0_ZQ2 SEN DQ28
J13 N2 J13 N2
ZQ DQ29 FBA0_MF2 ZQ DQ29
J1 M4 J1 M4
MF DQ30 MF DQ30
M2 M2
DQ31 FBA_WCK23 DQ31
78 FBA_WCK01 D4 WCK01 D4 WCK01
D5 C2 -FBA_WCK23 D5 C2
78 -FBA_WCK01 WCK01# EDC0 QSAP_0 78 WCK01# EDC0 QSAP_3 78
C13 C13
EDC1 FBA_WCK01 EDC1
78 FBA_WCK23 P4 WCK23 EDC2 R13 QSAP_2 78 P4 WCK23 EDC2 R13 QSAP_1 78
P5 R2 -FBA_WCK01 P5 R2
78 -FBA_WCK23 WCK23# EDC3 WCK23# EDC3
1

1
H5GC2H24BFR-T2C-GP H5GC2H24BFR-T2C-GP
Muxless Muxless
R8103 R8104
121R2F-GP 121R2F-GP
Muxless Muxless
2

2
VRAM3B 2 OF 2 VRAM4B 2 OF 2

K4 A4 MDA32 FBA1_A0_A10 K4 A4 MDA56


78 FBA1_A7_A8
H5
A8/A7 Normal DQ0
A2 MDA33 FBA1_A6_A11 H5
A8/A7 Mirror DQ0
A2 MDA57
78 FBA1_A1_A9 A9/A1 DQ1 A9/A1 DQ1
H4 B4 MDA34 FBA1_A7_A8 H4 B4 MDA58
78 FBA1_A0_A10 A10/A0 DQ2 A10/A0 DQ2
K5 B2 MDA35 FBA1_A1_A9 K5 B2 MDA59
78 FBA1_A6_A11 A11/A6 DQ3 A11/A6 DQ3
J5 E4 MDA36 FBA1_A12_A13 J5 E4 MDA60
78 FBA1_A12_A13 A12/A13 DQ4 A12/A13 DQ4
E2 MDA37 E2 MDA61
DQ5 MDA38 FBA1_A4_BA2 DQ5 MDA62
78 FBA1_A2_BA0 H11 F4 H11 F4
B BA0/A2 DQ6 MDA39 FBA1_A3_BA3 BA0/A2 DQ6 MDA63 B
78 FBA1_A5_BA1 K10 F2 K10 F2
BA1/A5 DQ7 FBA1_A2_BA0 BA1/A5 DQ7
78 FBA1_A4_BA2 K11 BA2/A4 DQ8 A11 K11 BA2/A4 DQ8 A11
H10 A13 FBA1_A5_BA1 H10 A13
78 FBA1_A3_BA3 BA3/A3 DQ9 BA3/A3 DQ9
B11 B11
DQ10 -FBA1_ABI DQ10
78 -FBA1_ABI J4 ABI# DQ11 B13 J4 ABI# DQ11 B13
G3 E11 -FBA1_CAS G3 E11
78 -FBA1_RAS RAS# DQ12 RAS# DQ12
G12 E13 -FBA1_WE G12 E13
78 -FBA1_CS CS# DQ13 CS# DQ13
L3 F11 -FBA1_RAS L3 F11
78 -FBA1_CAS CAS# DQ14 CAS# DQ14
L12 F13 -FBA1_CS L12 F13
78 -FBA1_WE WE# DQ15 WE# DQ15
U11 MDA48 U11 MDA40
DQ16 MDA49 CLKA1 DQ16 MDA41
78 CLKA1 J12 U13 J12 U13
CK DQ17 MDA50 1D35V_VGA_S0 CLKA1# CK DQ17 MDA42
78 CLKA1# J11 T11 J11 T11
CK# DQ18 MDA51 -FBA1_CKE CK# DQ18 MDA43
78 -FBA1_CKE J3 CKE# DQ19 T13 J3 CKE# DQ19 T13
N11 MDA52 N11 MDA44
DQ20 MDA53 DQ20 MDA45
78 DQMA4 D2 N13 78 DQMA7 D2 N13
DBI0# DQ21 MDA54 DBI0# DQ21 MDA46
D13 M11 D13 M11
DBI1# DQ22 DBI1# DQ22
1

P13 M13 MDA55 P13 M13 MDA47


78 DQMA6 DBI2# DQ23 78 DQMA5 DBI2# DQ23
P2 DBI3# DQ24 U4 P2 DBI3# DQ24 U4
U2 R8105 U2
DQ25 1KR2J-1-GP -FBA1_RST DQ25
78 -FBA1_RST J2 RESET# DQ26 T4 J2 RESET# DQ26 T4
T2 Muxless T2
2

DQ27 DQ27
J10 N4 J10 N4
FBA1_ZQ3 SEN DQ28 FBA1_ZQ4 SEN DQ28
J13 N2 J13 N2
ZQ DQ29 FBA1_MF4 ZQ DQ29
J1 M4 J1 M4
MF DQ30 MF DQ30
M2 M2
DQ31 FBA_WCK67 DQ31
78 FBA_WCK45 D4 D4
WCK01 -FBA_WCK67 WCK01
78 -FBA_WCK45 D5 WCK01# EDC0 C2 QSAP_4 78 D5 WCK01# EDC0 C2 QSAP_7 78
EDC1 C13 EDC1 C13
P4 R13 FBA_WCK45 P4 R13
78 FBA_WCK67 WCK23 EDC2 QSAP_6 78 WCK23 EDC2 QSAP_5 78
P5 R2 -FBA_WCK45 P5 R2
78 -FBA_WCK67 WCK23# EDC3 WCK23# EDC3
1

H5GC2H24BFR-T2C-GP H5GC2H24BFR-T2C-GP
A Muxless Muxless A
R8101 R8106
121R2F-GP 121R2F-GP

Dr-Bios.com
Muxless Muxless <Core Design>
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VRAM 1,2 (1/4)
Size Document Number Rev
Custom Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 81 of 105
5 4 3 2 1
5 4 3 2 1

MDB[63..0] 78
VRAM5B 2 OF 2 VRAM6B 2 OF 2

K4 A4 MDB0 FBB0_A0_A10 K4 A4 MDB24


78 FBB0_A7_A8
H5
A8/A7 Normal DQ0
A2 MDB1 FBB0_A6_A11 H5
A8/A7 Mirror DQ0
A2 MDB25
78 FBB0_A1_A9 A9/A1 DQ1 A9/A1 DQ1
H4 B4 MDB2 FBB0_A7_A8 H4 B4 MDB26
78 FBB0_A0_A10 A10/A0 DQ2 A10/A0 DQ2
K5 B2 MDB3 FBB0_A1_A9 K5 B2 MDB27
78 FBB0_A6_A11 A11/A6 DQ3 A11/A6 DQ3
J5 E4 MDB4 FBB0_A12_A13 J5 E4 MDB28
78 FBB0_A12_A13 A12/A13 DQ4 A12/A13 DQ4
E2 MDB5 E2 MDB29
DQ5 MDB6 FBB0_A4_BA2 DQ5 MDB30
78 FBB0_A2_BA0 H11 F4 H11 F4
BA0/A2 DQ6 MDB7 FBB0_A3_BA3 BA0/A2 DQ6 MDB31
78 FBB0_A5_BA1 K10 F2 K10 F2
D BA1/A5 DQ7 FBB0_A2_BA0 BA1/A5 DQ7 D
78 FBB0_A4_BA2 K11 BA2/A4 DQ8 A11 K11 BA2/A4 DQ8 A11
H10 A13 FBB0_A5_BA1 H10 A13
78 FBB0_A3_BA3 BA3/A3 DQ9 BA3/A3 DQ9
B11 B11
DQ10 -FBB0_ABI DQ10
78 -FBB0_ABI J4 B13 J4 B13
ABI# DQ11 -FBB0_CAS ABI# DQ11
78 -FBB0_RAS G3 RAS# DQ12 E11 G3 RAS# DQ12 E11
G12 E13 -FBB0_WE G12 E13
78 -FBB0_CS CS# DQ13 CS# DQ13
L3 F11 -FBB0_RAS L3 F11
78 -FBB0_CAS CAS# DQ14 CAS# DQ14
L12 F13 -FBB0_CS L12 F13
78 -FBB0_WE WE# DQ15 WE# DQ15
U11 MDB16 U11 MDB8
DQ16 MDB17 CLKB0 DQ16 MDB9
78 CLKB0 J12 U13 J12 U13
CK DQ17 MDB18 1D35V_VGA_S0 CLKB0# CK DQ17 MDB10
78 CLKB0# J11 T11 J11 T11
CK# DQ18 MDB19 -FBB0_CKE CK# DQ18 MDB11
78 -FBB0_CKE J3 CKE# DQ19 T13 J3 CKE# DQ19 T13
N11 MDB20 N11 MDB12
DQ20 MDB21 DQ20 MDB13
78 DQMB0 D2 DBI0# DQ21 N13 78 DQMB3 D2 DBI0# DQ21 N13
D13 M11 MDB22 D13 M11 MDB14
DBI1# DQ22 DBI1# DQ22

1
P13 M13 MDB23 P13 M13 MDB15
78 DQMB2 DBI2# DQ23 78 DQMB1 DBI2# DQ23
P2 DBI3# DQ24 U4 P2 DBI3# DQ24 U4
U2 R8202 U2
DQ25 1KR2J-1-GP -FBB0_RST DQ25
78 -FBB0_RST J2 RESET# DQ26 T4 J2 RESET# DQ26 T4
T2 Muxless T2

2
DQ27 DQ27
J10 SEN DQ28 N4 J10 SEN DQ28 N4
FBB0_ZQ1 J13 N2 FBB0_ZQ2 J13 N2
ZQ DQ29 FBB0_MF2 ZQ DQ29
J1 M4 J1 M4
MF DQ30 MF DQ30
DQ31 M2 DQ31 M2
D4 FBB_WCK23 D4
78 FBB_WCK01 WCK01 WCK01
D5 C2 -FBB_WCK23 D5 C2
78 -FBB_WCK01 WCK01# EDC0 QSBP_0 78 WCK01# EDC0 QSBP_3 78
EDC1 C13 EDC1 C13
P4 R13 FBB_WCK01 P4 R13
78 FBB_WCK23 WCK23 EDC2 QSBP_2 78 WCK23 EDC2 QSBP_1 78
P5 R2 -FBB_WCK01 P5 R2
78 -FBB_WCK23 WCK23# EDC3 WCK23# EDC3
1

1
H5GC2H24BFR-T2C-GP H5GC2H24BFR-T2C-GP
Muxless Muxless
R8201 R8203
C 121R2F-GP 121R2F-GP C

Muxless Muxless
2

2
VRAM7B 2 OF 2 VRAM8B 2 OF 2

K4 A4 MDB32 FBB1_A0_A10 K4 A4 MDB56


78 FBB1_A7_A8
H5
A8/A7 Normal DQ0
A2 MDB33 FBB1_A6_A11 H5
A8/A7 Mirror DQ0
A2 MDB57
78 FBB1_A1_A9 A9/A1 DQ1 A9/A1 DQ1
H4 B4 MDB34 FBB1_A7_A8 H4 B4 MDB58
78 FBB1_A0_A10 A10/A0 DQ2 A10/A0 DQ2
K5 B2 MDB35 FBB1_A1_A9 K5 B2 MDB59
78 FBB1_A6_A11 A11/A6 DQ3 A11/A6 DQ3
J5 E4 MDB36 FBB1_A12_A13 J5 E4 MDB60
78 FBB1_A12_A13 A12/A13 DQ4 A12/A13 DQ4
E2 MDB37 E2 MDB61
DQ5 MDB38 FBB1_A4_BA2 DQ5 MDB62
78 FBB1_A2_BA0 H11 F4 H11 F4
BA0/A2 DQ6 MDB39 FBB1_A3_BA3 BA0/A2 DQ6 MDB63
78 FBB1_A5_BA1 K10 F2 K10 F2
BA1/A5 DQ7 FBB1_A2_BA0 BA1/A5 DQ7
78 FBB1_A4_BA2 K11 BA2/A4 DQ8 A11 K11 BA2/A4 DQ8 A11
H10 A13 FBB1_A5_BA1 H10 A13
78 FBB1_A3_BA3 BA3/A3 DQ9 BA3/A3 DQ9
B11 B11
DQ10 -FBB1_ABI DQ10
78 -FBB1_ABI J4 ABI# DQ11 B13 J4 ABI# DQ11 B13
G3 E11 -FBB1_CAS G3 E11
78 -FBB1_RAS RAS# DQ12 RAS# DQ12
G12 E13 -FBB1_WE G12 E13
78 -FBB1_CS CS# DQ13 CS# DQ13
L3 F11 -FBB1_RAS L3 F11
78 -FBB1_CAS CAS# DQ14 CAS# DQ14
L12 F13 -FBB1_CS L12 F13
78 -FBB1_WE WE# DQ15 WE# DQ15
U11 MDB48 U11 MDB40
B DQ16 MDB49 CLKB1 DQ16 MDB41 B
78 CLKB1 J12 U13 J12 U13
CK DQ17 MDB50 1D35V_VGA_S0 CLKB1# CK DQ17 MDB42
78 CLKB1# J11 CK# DQ18 T11 J11 CK# DQ18 T11
J3 T13 MDB51 -FBB1_CKE J3 T13 MDB43
78 -FBB1_CKE CKE# DQ19 CKE# DQ19
N11 MDB52 N11 MDB44
DQ20 MDB53 DQ20 MDB45
78 DQMB4 D2 DBI0# DQ21 N13 78 DQMB7 D2 DBI0# DQ21 N13
D13 M11 MDB54 D13 M11 MDB46
DBI1# DQ22 DBI1# DQ22
1

P13 M13 MDB55 P13 M13 MDB47


78 DQMB6 DBI2# DQ23 78 DQMB5 DBI2# DQ23
P2 U4 P2 U4
DBI3# DQ24 R8204 DBI3# DQ24
U2 U2
DQ25 1KR2J-1-GP -FBB1_RST DQ25
78 -FBB1_RST J2 RESET# DQ26 T4 J2 RESET# DQ26 T4
T2 Muxless T2
2

DQ27 DQ27
J10 N4 J10 N4
FBB1_ZQ3 SEN DQ28 FBB1_ZQ4 SEN DQ28
J13 ZQ DQ29 N2 J13 ZQ DQ29 N2
J1 M4 FBB1_MF4 J1 M4
MF DQ30 MF DQ30
M2 M2
DQ31 FBB_WCK67 DQ31
78 FBB_WCK45 D4 D4
WCK01 -FBB_WCK67 WCK01
78 -FBB_WCK45 D5 WCK01# EDC0 C2 QSBP_4 78 D5 WCK01# EDC0 C2 QSBP_7 78
EDC1 C13 EDC1 C13
P4 R13 FBB_WCK45 P4 R13
78 FBB_WCK67 WCK23 EDC2 QSBP_6 78 WCK23 EDC2 QSBP_5 78
P5 R2 -FBB_WCK45 P5 R2
78 -FBB_WCK67 WCK23# EDC3 WCK23# EDC3
1

H5GC2H24BFR-T2C-GP H5GC2H24BFR-T2C-GP
Muxless Muxless
R8205 R8206
121R2F-GP 121R2F-GP
Muxless Muxless
2

A A

Dr-Bios.com
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VRAM 3,4 (2/4)
Size Document Number Rev
Custom Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 82 of 105
5 4 3 2 1
5 4 3 2 1

1D35V_VGA_S0 1D35V_VGA_S0 1D35V_VGA_S0 1D35V_VGA_S0


VRAM1A 1 OF 2 VRAM2A 1 OF 2 VRAM3A 1 OF 2 VRAM4A 1 OF 2

C5 B5 C5 B5 C5 B5 C5 B5
C10
VDD Normal VSS
B10 C10
VDD Mirror VSS
B10 C10
VDD Normal VSS
B10 C10
VDD Mirror VSS
B10
VDD VSS VDD VSS VDD VSS VDD VSS
D11 D10 D11 D10 D11 D10 D11 D10
VDD VSS VDD VSS VDD VSS VDD VSS
G1 G5 G1 G5 G1 G5 G1 G5
VDD VSS VDD VSS VDD VSS VDD VSS
G4 G10 G4 G10 G4 G10 G4 G10
VDD VSS VDD VSS VDD VSS VDD VSS
G11 H1 G11 H1 G11 H1 G11 H1
VDD VSS VDD VSS VDD VSS VDD VSS
G14 H14 G14 H14 G14 H14 G14 H14
VDD VSS VDD VSS VDD VSS VDD VSS
L1 K1 L1 K1 L1 K1 L1 K1
VDD VSS VDD VSS VDD VSS VDD VSS
L4 K14 L4 K14 L4 K14 L4 K14
VDD VSS VDD VSS VDD VSS VDD VSS
L11 L5 L11 L5 L11 L5 L11 L5
VDD VSS VDD VSS VDD VSS VDD VSS
L14 L10 L14 L10 L14 L10 L14 L10
VDD VSS VDD VSS VDD VSS VDD VSS
P11 P10 P11 P10 P11 P10 P11 P10
VDD VSS VDD VSS VDD VSS VDD VSS
D R5 T5 R5 T5 R5 T5 R5 T5 D
VDD VSS VDD VSS VDD VSS VDD VSS
R10 T10 R10 T10 R10 T10 R10 T10
VDD VSS VDD VSS VDD VSS VDD VSS
B1 A1 B1 A1 B1 A1 B1 A1
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
B3 A3 B3 A3 B3 A3 B3 A3
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
B12 A12 B12 A12 B12 A12 B12 A12
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
B14 A14 B14 A14 B14 A14 B14 A14
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
D1 C1 D1 C1 D1 C1 D1 C1
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
D3 C3 D3 C3 D3 C3 D3 C3
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
D12 C4 D12 C4 D12 C4 D12 C4
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
D14 C11 D14 C11 D14 C11 D14 C11
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
E5 C12 E5 C12 E5 C12 E5 C12
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
E10 C14 E10 C14 E10 C14 E10 C14
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
F1 E1 F1 E1 F1 E1 F1 E1
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
F3 E3 F3 E3 F3 E3 F3 E3
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
F12 E12 F12 E12 F12 E12 F12 E12
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
F14 E14 F14 E14 F14 E14 F14 E14
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
G2 F5 G2 F5 G2 F5 G2 F5
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
G13 F10 G13 F10 G13 F10 G13 F10
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
H3 H2 H3 H2 H3 H2 H3 H2
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
H12 H13 H12 H13 H12 H13 H12 H13
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
K3 K2 K3 K2 K3 K2 K3 K2
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
K12 K13 K12 K13 K12 K13 K12 K13
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
L2 M5 L2 M5 L2 M5 L2 M5
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
L13 M10 L13 M10 L13 M10 L13 M10
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
M1 N1 M1 N1 M1 N1 M1 N1
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
M3 N3 M3 N3 M3 N3 M3 N3
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
M12 N12 M12 N12 M12 N12 M12 N12
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
M14 N14 M14 N14 M14 N14 M14 N14
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
N5 R1 N5 R1 N5 R1 N5 R1
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
N10 R3 N10 R3 N10 R3 N10 R3
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
P1 R4 P1 R4 P1 R4 P1 R4
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
P3 R11 P3 R11 P3 R11 P3 R11
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
P12 R12 P12 R12 P12 R12 P12 R12
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
P14 R14 P14 R14 P14 R14 P14 R14
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
C T1 U1 T1 U1 T1 U1 T1 U1 C
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
T3 U3 T3 U3 T3 U3 T3 U3
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
T12 U12 T12 U12 T12 U12 T12 U12
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
T14 U14 T14 U14 T14 U14 T14 U14
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
FBA0_VREFC J14 A5 FBA0_VREFC J14 A5 FBA1_VREFC J14 A5 FBA1_VREFC J14 A5
VREFC VPP/NC#A5 VREFC VPP/NC#A5 VREFC VPP/NC#A5 VREFC VPP/NC#A5
U5 U5 U5 U5
VPP/NC#U5 VPP/NC#U5 VPP/NC#U5 VPP/NC#U5
A10 A10 A10 A10
FBA0_VREFD VREFD FBA0_VREFD VREFD FBA1_VREFD VREFD FBA1_VREFD VREFD
U10 U10 U10 U10
VREFD VREFD VREFD VREFD
SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP
H5GC2H24BFR-T2C-GP H5GC2H24BFR-T2C-GP H5GC2H24BFR-T2C-GP H5GC2H24BFR-T2C-GP
Muxless Muxless Muxless Muxless
1

1
C8301 C8302 C8303 C8304 C8305 C8306 C8307 C8308 C8309 C8310 C8311 C8312
2

2
Muxless Muxless Muxless Muxless Muxless Muxless Muxless Muxless Muxless Muxless Muxless Muxless

1D35V_VGA_S0 1D35V_VGA_S0

1
Muxless DY
R8302 R8303
549R2F-GP 549R2F-GP
1D35V_VGA_S0
FOR VRAM1/ VRAM2 R8301

2
B 931R2F-1-GP B
1 2 FBA0_VREFC FBA0_VREFD

Muxless

1
C8313
SC1U10V2KX-L1-GP
Muxless

C8314
SC1U10V2KX-L1-GP
Muxless

C8315
SC1U10V2KX-L1-GP
Muxless

C8316
SC1U10V2KX-L1-GP
Muxless

C8317
SC1U10V2KX-L1-GP
Muxless

C8318
SC1U10V2KX-L1-GP
Muxless

C8319
SC1U10V2KX-L1-GP
Muxless

C8320
SCD1U16V2KX-L-GP
Muxless

C8321
SCD1U16V2KX-L-GP
Muxless

C8322
SCD1U16V2KX-L-GP
Muxless

C8323
SCD1U16V2KX-L-GP
Muxless

C8324
SCD1U16V2KX-L-GP
Muxless

C8325
SC10U6D3V3MX-L-GP
Muxless

C8326
SC10U6D3V3MX-L-GP
Muxless

Muxless DY
1

R8304 R8305
1K33R2F-GP 1K33R2F-GP
2

2
FBA_VREF_R

CLOSE TO THE MEMORY 1D35V_VGA_S0 1D35V_VGA_S0

D
Q8301

1
Muxless DY
G
1D35V_VGA_S0
FOR VRAM3/ VRAM4 79,84 VRAM_VREF_CTL
R8306
549R2F-GP
R8307
549R2F-GP

2
LSK3541G1ET2L-GP R8308

S
84.03541.F31 931R2F-1-GP FBA1_VREFC FBA1_VREFD
C8327
SC1U10V2KX-L1-GP
Muxless

C8328
SC1U10V2KX-L1-GP
Muxless

C8329
SC1U10V2KX-L1-GP
Muxless

C8330
SC1U10V2KX-L1-GP
Muxless

C8331
SC1U10V2KX-L1-GP
Muxless

C8332
SC1U10V2KX-L1-GP
Muxless

C8333
SC1U10V2KX-L1-GP
Muxless

C8334
SCD1U16V2KX-L-GP
Muxless

C8335
SCD1U16V2KX-L-GP
Muxless

C8336
SCD1U16V2KX-L-GP
Muxless

C8337
SCD1U16V2KX-L-GP
Muxless

C8338
SCD1U16V2KX-L-GP
Muxless

C8339
SC10U6D3V3MX-L-GP
Muxless

C8340
SC10U6D3V3MX-L-GP
Muxless

2nd = 84.03K15.C31 1 2
Muxless
1

1
Muxless Muxless DY
R8309 R8310
2

1K33R2F-GP 1K33R2F-GP

2
A A
CLOSE TO THE MEMORY
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VRAM 5,6 (3/4)
Size Document Number Rev
Custom Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 83 of 105
5 4 3 2 1

Dr-Bios.com
5 4 3 2 1

1D35V_VGA_S0 1D35V_VGA_S0 1D35V_VGA_S0 1D35V_VGA_S0


A 1 OF 2 VRAM6A 1 OF 2 VRAM7A 1 OF 2 VRAM8A 1 OF 2

C5 B5 C5 B5 C5 B5 C5 B5
C10
VDD Normal VSS
B10 C10
VDD Mirror VSS
B10 C10
VDD Normal VSS
B10 C10
VDD Mirror VSS
B10
VDD VSS VDD VSS VDD VSS VDD VSS
D11 D10 D11 D10 D11 D10 D11 D10
VDD VSS VDD VSS VDD VSS VDD VSS
G1 G5 G1 G5 G1 G5 G1 G5
VDD VSS VDD VSS VDD VSS VDD VSS
G4 G10 G4 G10 G4 G10 G4 G10
VDD VSS VDD VSS VDD VSS VDD VSS
G11 H1 G11 H1 G11 H1 G11 H1
VDD VSS VDD VSS VDD VSS VDD VSS
G14 H14 G14 H14 G14 H14 G14 H14
VDD VSS VDD VSS VDD VSS VDD VSS
L1 K1 L1 K1 L1 K1 L1 K1
VDD VSS VDD VSS VDD VSS VDD VSS
L4 K14 L4 K14 L4 K14 L4 K14
VDD VSS VDD VSS VDD VSS VDD VSS
L11 L5 L11 L5 L11 L5 L11 L5
VDD VSS VDD VSS VDD VSS VDD VSS
L14 L10 L14 L10 L14 L10 L14 L10
VDD VSS VDD VSS VDD VSS VDD VSS
P11 P10 P11 P10 P11 P10 P11 P10
VDD VSS VDD VSS VDD VSS VDD VSS
D R5 T5 R5 T5 R5 T5 R5 T5 D
VDD VSS VDD VSS VDD VSS VDD VSS
R10 T10 R10 T10 R10 T10 R10 T10
VDD VSS VDD VSS VDD VSS VDD VSS
B1 A1 B1 A1 B1 A1 B1 A1
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
B3 A3 B3 A3 B3 A3 B3 A3
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
B12 A12 B12 A12 B12 A12 B12 A12
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
B14 A14 B14 A14 B14 A14 B14 A14
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
D1 C1 D1 C1 D1 C1 D1 C1
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
D3 C3 D3 C3 D3 C3 D3 C3
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
D12 C4 D12 C4 D12 C4 D12 C4
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
D14 C11 D14 C11 D14 C11 D14 C11
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
E5 C12 E5 C12 E5 C12 E5 C12
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
E10 C14 E10 C14 E10 C14 E10 C14
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
F1 E1 F1 E1 F1 E1 F1 E1
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
F3 E3 F3 E3 F3 E3 F3 E3
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
F12 E12 F12 E12 F12 E12 F12 E12
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
F14 E14 F14 E14 F14 E14 F14 E14
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
G2 F5 G2 F5 G2 F5 G2 F5
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
G13 F10 G13 F10 G13 F10 G13 F10
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
H3 H2 H3 H2 H3 H2 H3 H2
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
H12 H13 H12 H13 H12 H13 H12 H13
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
K3 K2 K3 K2 K3 K2 K3 K2
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
K12 K13 K12 K13 K12 K13 K12 K13
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
L2 M5 L2 M5 L2 M5 L2 M5
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
L13 M10 L13 M10 L13 M10 L13 M10
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
M1 N1 M1 N1 M1 N1 M1 N1
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
M3 N3 M3 N3 M3 N3 M3 N3
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
M12 N12 M12 N12 M12 N12 M12 N12
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
M14 N14 M14 N14 M14 N14 M14 N14
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
N5 R1 N5 R1 N5 R1 N5 R1
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
N10 R3 N10 R3 N10 R3 N10 R3
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
P1 R4 P1 R4 P1 R4 P1 R4
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
P3 R11 P3 R11 P3 R11 P3 R11
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
P12 R12 P12 R12 P12 R12 P12 R12
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
P14 R14 P14 R14 P14 R14 P14 R14
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
C T1 U1 T1 U1 T1 U1 T1 U1 C
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
T3 U3 T3 U3 T3 U3 T3 U3
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
T12 U12 T12 U12 T12 U12 T12 U12
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
T14 U14 T14 U14 T14 U14 T14 U14
VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ VDDQ VSSQ
FBB0_VREFC J14 A5 FBB0_VREFC J14 A5 FBB1_VREFC J14 A5 FBB1_VREFC J14 A5
VREFC VPP/NC#A5 VREFC VPP/NC#A5 VREFC VPP/NC#A5 VREFC VPP/NC#A5
U5 U5 U5 U5
VPP/NC#U5 VPP/NC#U5 VPP/NC#U5 VPP/NC#U5
A10 A10 A10 A10
FBB0_VREFD VREFD FBB0_VREFD VREFD FBB1_VREFD VREFD FBB1_VREFD VREFD
U10 U10 U10 U10
VREFD VREFD VREFD VREFD
SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP

SC820P50V2KX-1GP
H5GC2H24BFR-T2C-GP H5GC2H24BFR-T2C-GP H5GC2H24BFR-T2C-GP H5GC2H24BFR-T2C-GP
Muxless Muxless Muxless Muxless
1

1
C8401 C8402 C8403 C8404 C8405 C8406 C8407 C8408 C8409 C8410 C8411 C8412
2

2
Muxless Muxless Muxless Muxless Muxless Muxless Muxless Muxless Muxless Muxless Muxless Muxless

1D35V_VGA_S0
FOR VRAM1/ VRAM2 1D35V_VGA_S0 1D35V_VGA_S0

1
B Muxless DY B
C8413
SC1U10V2KX-L1-GP
Muxless

C8414
SC1U10V2KX-L1-GP
Muxless

C8415
SC1U10V2KX-L1-GP
Muxless

C8416
SC1U10V2KX-L1-GP
Muxless

C8417
SC1U10V2KX-L1-GP
Muxless

C8418
SC1U10V2KX-L1-GP
Muxless

C8419
SC1U10V2KX-L1-GP
Muxless

C8420
SCD1U16V2KX-L-GP
Muxless

C8421
SCD1U16V2KX-L-GP
Muxless

C8422
SCD1U16V2KX-L-GP
Muxless

C8423
SCD1U16V2KX-L-GP
Muxless

C8424
SCD1U16V2KX-L-GP
Muxless

C8425
SC10U6D3V3MX-L-GP
Muxless

C8426
SC10U6D3V3MX-L-GP
Muxless
Muxless R8402 R8403
1

549R2F-GP 549R2F-GP
R8401

2
931R2F-1-GP
2

1 2 FBB0_VREFC FBB0_VREFD

1
Muxless DY
R8404 R8405
1K33R2F-GP 1K33R2F-GP
CLOSE TO THE MEMORY

2
FBB_VREF_R
1D35V_VGA_S0
FOR VRAM3/ VRAM4
1D35V_VGA_S0 1D35V_VGA_S0

D
Q8401

1
C8427
SC1U10V2KX-L1-GP
Muxless

C8428
SC1U10V2KX-L1-GP
Muxless

C8429
SC1U10V2KX-L1-GP
Muxless

C8430
SC1U10V2KX-L1-GP
Muxless

C8431
SC1U10V2KX-L1-GP
Muxless

C8432
SC1U10V2KX-L1-GP
Muxless

C8433
SC1U10V2KX-L1-GP
Muxless

C8434
SCD1U16V2KX-L-GP
Muxless

C8435
SCD1U16V2KX-L-GP
Muxless

C8436
SCD1U16V2KX-L-GP
Muxless

C8437
SCD1U16V2KX-L-GP
Muxless

C8438
SCD1U16V2KX-L-GP
Muxless

C8439
SC10U6D3V3MX-L-GP
Muxless

C8440
SC10U6D3V3MX-L-GP
Muxless

Muxless DY
79,83 VRAM_VREF_CTL G
1

Muxless R8406 R8407


549R2F-GP 549R2F-GP
R8408
2

2
LSK3541G1ET2L-GP 931R2F-1-GP

S
84.03541.F31 1 2 FBB1_VREFC FBB1_VREFD
2nd = 84.03K15.C31
Muxless

1
Muxless DY
R8409 R8410
A CLOSE TO THE MEMORY 1K33R2F-GP 1K33R2F-GP A

2
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
VGA Power A
Size Document Number Rev
Custom Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 84 of 105
5 4 3 2 1

Dr-Bios.com
5 4 3 2 1
Add 3rd 0423
19V_DCBATOUT
19V_DCBATOUT
Config : D Config : C Config : B
VGA : N15P GX

1
EDP-Cont. 33.5 A 35 A 43 A C8501S C8502S C8503S
Muxless

C10U25V5KX-GP

C10U25V5KX-GP

C10U25V5KX-GP
EDP-Peak 51.5 A 40.89 A 80 A
Config : B

2
1

1
SCD1U25V2KX-L-GP
19V_DCBATOUT PU8502 2 PC8502 PC8503 PC8504

SC10U25V5KX-GP

SC10U25V5KX-GP
PR8222 27K ohm 39K ohm 20K ohm 3
PWR_VGA_CORE_UGATE1_R 1 4

2
EDP-Continuous : 49A PR8206 7.5K ohm 30K ohm 20K ohm 10
PWR_VGA_CORE_PHASE1 9
PR8208 0 ohm 3K ohm 2K ohm
PWR_VGA_CORE_LGATE1
7 DY DY DY
8 6

EDP-Peak : 76A PR8209 6.2K ohm 24K ohm 18K ohm 5


1

1
Muxless Muxless Muxless C8504 C8505 C8506

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
PT8504 PR8214 1.74K ohm 3K ohm 0 ohm
DY SE15U25VM-GP
2

CHECK SPEC

2
FDMS3600-02-RJK0215-COLAY-GP
79.15612.03L PC8223 5.6nF 1.8nF 2.7nF
D 1st = 84.00916.037 D

5V_S0
2nd = 84.03660.037
3rd = 075.06992.0073 1V_VGACORE_S0

PD change 0626 DY DY DY

1
PR8502 Mag. 0.36uH 7*7*4
2D2R3J-2-GP
DCR=1.8~2.3mohm

1
Muxless C8507 C8508
Idc=23A, Isat=32A

SC10U25V5KX-GP

SC10U25V5KX-GP
2
5V_S0

2
PL8501
VGA_PVCC_1
1 2

1
IND-D36UH-42-GP

1
PC8505
PR8503 SCD1U16V2KX-L-GP

2
PR8504
0R2J-L-GP Muxless DY DY
PC8506 PWR_VGA_CORE_UGATE1 2PWR_VGA_CORE_UGATE1_R

21
2 Phase PU8501
1 Add 3rd 0423
2 1PWR_VGA_CORE_TON_1 0R0603-PAD 19V_DCBATOUT
CHECK WITH WAYLER MORRIS

PVCC
SCD1U25V2KX-L-GP PWR_VGA_CORE_ISEN1 15 2
VCC/ISEN1 UGATE1
Muxless
PR8505 PR8506
Muxless
Muxless2D2R2F-GP 499KR2F-1-GP PR8507 PC8507

1
SCD1U25V2KX-L-GP
19V_DCBATOUT 1 2 1 2 PWR_VGA_CORE_TON 9 1 PWR_VGA_CORE_BOOT1 1 2 PWR_VGA_CORE_BOOT1_11 2 PU8503 2 PC8508 PC8509 PC8510
TON BOOT1

SC10U25V5KX-GP

SC10U25V5KX-GP
Muxless 0R0603-PAD 3
PWR_VGA_CORE_UGATE2_R 1 4

2
SCD1U25V2KX-L-GP
10
3D3V_VGA_S0 1 2 16
PGOOD PHASE1
24 PWR_VGA_CORE_PHASE1 Muxless PWR_VGA_CORE_PHASE2 9
PR8508 10KR2J-L-GP 7
Muxless PWR_VGA_CORE_LGATE2 8 6
5
17,24,86 DGPU_PWROK PWR_VGA_CORE_EN PWR_VGA_CORE_LGATE1
3
EN LGATE1
23 Muxless Muxless Muxless
請wayler SHOT PAD 都都都0 ohm 1 PR8509 2 15KR2F-GP
OCP setting
FDMS3600-02-RJK0215-COLAY-GP
PR8224=15K 'OCP = 102A
79 VGA_CORE_PSI
Poisent(13.3k) and hades setting different!!??
1st = 84.00916.037
2nd = 84.03660.037
1 PR8510 2 4 17 PWR_VGA_CORE_UGATE2 1 PR8511 2 PWR_VGA_CORE_UGATE2_R 3rd = 075.06992.0073
79 VGA_CORE_VID PSI UGATE2
0R0402-PAD-1-GP 0R0603-PAD
C C
1 2 PR8512 Mag. 0.36uH 7*7*4
DY PWR_VGA_CORE_VID 5 18 PWR_VGA_CORE_BOOT2 1 2
VID BOOT2 DCR=1.8~2.3mohm

PWR_VGA_CORE_BOOT2_1
PC8511 0R0603-PAD
SC1KP50V2KX-L-1-GP Idc=23A, Isat=32A
DY PL8502
PWR_VGA_CORE_RGND 1 2 PWR_VGA_CORE_VREF 8 19 PWR_VGA_CORE_PHASE2
PC8512 SCD1U16V2KX-L-GP VREF PHASE2
1 2
IND-D36UH-42-GP

1
PWR_VGA_CORE_REFIN 7 20 PWR_VGA_CORE_LGATE2
1

REFIN LGATE2 PC8513

SCD1U25V2KX-L-GP
PR8513

2
20KR2F-L-GP
PWR_VGA_CORE_REFADJ 6 11 PWR_VGA_CORE_VSNS Muxless
1

REFADJ VSNS
2

PR8514
20KR2F-L-GP
PR8515 PWR_VGA_CORE_ISEN2 14 10 PWR_VGA_CORE_RGND
2K2R2J-L1-GP TALERT#/ISEN2 RGND
2

1 2PWR_VGA_CORE_VREF_R 1V_VGACORE_S0

PWR_VGA_CORE_ISEN3 13 22 PWR_VGA_CORE_PWM3

1
TSNS/ISEN3 PWM3 PR8516
1

PC8514
SC2700P50V2KX-1-GP 100R2F-L3-GP 1V_VGACORE_S0
PWR_VGA_CORE_SS 12 25 Muxless
2

SS GND

2
PWR_VGA_CORE_RGND
1 2
PR8517 0R0402-PAD NVVDD_SENSE 76
470uF/2V, 7.5 x 4.5 x 2.1

1
PC8515 PT8501 PT8502 PT8503 PT8505
1

1
PC8516 DY ESR=9mohm
1

RT8813AGQW-GP PC8517 SC47P50V2JN-3GP


排排?

2
Ripple Current=3000 mA

ST470U2VDM-GP

ESR=9mohm
ST470U2VDM-GP

ESR=6mohm

ST470U2VDM-GP

ESR=6mohm

ST470U2VDM-GP
PR8518 SC47P50V2JN-3GP
2

2
18KR2F-GP SCD01U50V2KX-L-GP DY
2

DY 1 2 Muxless_N16EGR
PR8519 0R0402-PAD NVGND_SENSE 76
2

1
PWR_VGA_CORE_VREF_L PWR_VGA_CORE_SS PC8501 PR8520
B B
DY
PWR_VGA_CORE_RGND
1

SC47P50V2JN-3GP 100R2F-L3-GP PD change 0626


2
PC8518 Muxless
PR8521 SC1KP50V2KX-L-1-GP
1

2
0R0402-PAD
DY
2

5V_S0

PWR_VGA_CORE_RGND
1

PR8522
2D2R3J-2-GP PWR_VGA_CORE_BOOT3_1

3D3V_VGA_S0
3 Phase
2

PC8520
PR8501 PU8505 PR8523 3 Phase 1V_VGACORE_S0
10KR2J-L-GP VGA_PVCC_2 8 4 PWR_VGA_CORE_BOOT3 1 2 1 2 Mag. 0.36uH 7*7*4
PWR_VGA_CORE_EN VCC BOOT 0R0603-PAD SCD1U25V2KX-L-GP
1 2
DCR=1.8~2.3mohm
1

PWR_VGA_CORE_EN 87
Muxless PC8519 1 3 PWR_VGA_CORE_UGATE3 1 PR8525 2PWR_VGA_CORE_UGATE3_R Idc=23A, Isat=32A
1

PC8521 SCD1U16V2KX-L-GP EN UGATE 0R0603-PAD


2

PL8503
1 PR8524 2 DGPU_PWR_EN_D1 SCD1U25V2KX-L-GP
86 DGPU_PWR_EN 1 3 Phase PWR_VGA_CORE_PWM3 PWR_VGA_CORE_PHASE3
DY 5 2 1 2
2

PWM PHASE IND-D36UH-42-GP


3
0R2J-L-GP
1

2 6 7 PWR_VGA_CORE_LGATE3 3 Phase
PR8526 GND LGATE
DY
0R2J-L-GP
PD8501 Muxless 9
BAW56-5-GP 2 Phase GND
2

RT9610BZQW-GP
3 Phase Add 3rd 0423
19V_DCBATOUT

PWR_VGA_CORE_PHASE1 2 1 PWR_VGA_CORE_ISEN1

PR8527
10KR2J-L-GP PU8504
1

1
SCD1U25V2KX-L-GP
3 Phase 2 PC8522 PC8523 PC8524
A A
SC10U25V5KX-GP

SC10U25V5KX-GP

3
PWR_VGA_CORE_UGATE3_R 1 4
2

PWR_VGA_CORE_PHASE2 2 1 PWR_VGA_CORE_ISEN2 10
PWR_VGA_CORE_PHASE3 9
PR8528 7

Dr-Bios.com
10KR2J-L-GP PWR_VGA_CORE_LGATE3 8 6 <Core Design>
3 Phase 5
Muxless Muxless Muxless Wistron Corporation
PWR_VGA_CORE_PHASE3 2 1 PWR_VGA_CORE_ISEN3 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
FDMS3600-02-RJK0215-COLAY-GP
PD change 0622 Taipei Hsien 221, Taiwan, R.O.C.
PR8529 1st = 84.00916.037
10KR2J-L-GP 2nd = 84.03660.037 Title
3 Phase 3rd = 075.06992.0073
VGA Power B
3 Phase Size Document Number Rev
Custom
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 85 of 105

5 4 3 2 1
5 4 3 2 1

VID 19V_DCBATOUT PWR_VGA_DCBATOUT_1D35V


Logic-High = 0.75V
PG8601 兩兩兩兩?
Logic-Low = 0.3V 1 2
PR8601
5D1R2F-GP GAP-CLOSE-PWR-6-GP OPEN?
PWR_VGA1D35V_VID 2 1 PG8602
5V_S5
1 2

1
PC8601 Muxless
SC1U10V2KX-L1-GP GAP-CLOSE-PWR-6-GP
Muxless
MP change 0814

2
PWR_VGA_DCBATOUT_1D35V

OCP setting
PD change 0622 MuxlessMuxless Muxless
1D35V_VGA_S0

1
Add 3rd 0423 PC8608 PC8609 PC8607

SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

SCD1U25V2KX-L-GP
PWR_VGA1D35V_CS PWR_VGA1D35V_VDD 1 PR8602 2 5V_S5
3D3V_S5 0R0402-PAD

2
1
Muxless

1
PR8622 PC8602
D 267KR2F-GP D
SC1U10V2KX-L1-GP
1
Muxless

2
PR8606 PU8602 2

2
10KR2F-L1-GP 3
DY 1 4
10
2

PU8601 9
RT8231AGQW-GP 7

13

11

12
074.08231.0073 PR8603 PC8603 8 6
2D2R3F-L-GP SCD1U50V3KX-L-GP 5

VID

VDD
CS
PWR_VGA_DCBATOUT_1D35V
PWR_VGA1D35V_BOOT PWR_VGA1D35V_BOOT_A 1
Muxless Design Current : 14.2A
18 1 2 2
BOOT
PR8608 PWR_VGA1D35V_PG 10
PGOOD Muxless FDMS3600-02-RJK0215-COLAY-GP
OCP : 19.88A
620KR2F-GP
2 1 PWR_VGA1D35V_TON 9 17 PWR_VGA1D35V_HG 1st = 84.00920.037
TON UGATE
Muxless 2nd = 84.03664.037 Muxless 1D35V_VGA_S0
DGPU_CORE_PWROK 8 3rd = 075.06994.0073 PL8601
S5 IND-1UH-94-GP-U
1 PR8605 2 PWR_VGA1D35V_S3_EN 7 16 PWR_VGA1D35V_PH 1 2
0R0402-PAD S3 PHASE

TP8601 1PWR_VGA1D35V_VLDOIN 19 68.1R01B.10K


VLDOIN
2nd = 68.1R010.20I
PD change 0622 15 PWR_VGA1D35V_LG
LGATE Muxless
Close to output cap pin1, not

1
PT8601 PC8614
inside of the output cap

SE330U2VDM-L-GP

SCD1U25V2KX-L-GP
1 14

2
VTTGND PGND
PG8603
5 PWR_VGA1D35V_VDDQ 1 2
VDDQ 1D35V_VGA_S0
20 6 PWR_VGA1D35V_FB GAP-CLOSE-PWR-6-GP MP change 0814
VTT MuxlessFB
2
VTTSNS

VTTREF

1
PR8609
GND

GND

20KR2F-L3-GP

1
PC8606
R1 Muxless SC18P50V2JN-1-GP
21

1 PWR_1D35V_VTTREF 4

2
DY

R2

1
PR8610
PC8605 20KR2F-L3-GP
SCD033U16V2KX-GP
Muxless
Muxless Vout Setting
2

2
C Vout = Vref * ( 1 + R1/R2 ) C

= 0.675 * ( 1 + 20K / 20K)


= 1.35 V

VID vs Vref Table


VID Logic-High => Vref = 0.675 V
VID Logic-Low => Vref = 0.75 V
note. Vref can only be changed form
0.675v to 0.75v after power-on

PWR_DCBATOUT_PWR_VGA1D05V

1D05V_VGA_S0
MuxlessMuxless Muxless
1

PC8621 PC8622 PC8623


SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

SCD1U25V2KX-L-GP

PU8604
19V_DCBATOUT PWR_DCBATOUT_PWR_VGA1D05V
2

PG8620 PR8604 PC8604


1 2 2D2R3F-L-GP SCD1U50V3KX-L-GP

GAP-CLOSE-PWR-6-GP PWR_VGA1D05V_BOOT 1 PWR_VGA1D05V_BOOT_A Muxless


8 6 2 1 2
IN BS 1D05V_VGA_S0
Muxless Muxless
MP change 0814 PL8602
IND-1UH-94-GP-U
3D3V_S5 10 PWR_VGA1D05V_PH 1 2
LX
PR8607 DY 68.1R01B.10K
PWR_VGA1D05V_PG PWR_VGA1D05V_FB
Muxless Muxless Muxless Muxless Muxless
1 10KR2F-L1-GP
2 2 4 2nd = 68.1R010.20I
PG FB

1
PC8619 PC8618 PC8616 PC8617 PC8620

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SCD1U25V2KX-L-GP
PWR_VGA1D05V_ILIMT 3 7 PWR_VGA1D05V_BYP 1 PR8612 2
ILMT BYP 3D3V_S5
0R0402-PAD PG8621

2
DGPU_PWROK_R 1 GAP-CLOSE-PWR-3-GP
EN
PD change 0622

2
標標OPC SETTING 9
GND LDO
5 PWR_VGA1D05V_LDO
標標 SETTING
PD change 0622
1

SY8206DQNC-GP-U PC8627 PC8624 PWR_VGA1D05V_FB_A


SC2D2U10V3KX-1GP

74.08206.C73 SC1U10V2KX-L1-GP
Muxless
2

1
PWR_VGA1D05V_ILIMT 1 PR8614 2 PC8625

SC220P50V2KX-3GP
B 0R0402-PAD B

OCP setting PR8615

2
75KR2F-GP

2
PWR_VGA1D05V_FB
1

PR8616

100KR2F-L3-GP
2

3D3V_VGA_S0
U8604 Muxless
15 3D3V_S0 3D3V_AON_S0 3D3V_VGA_S0
GND
1 14
VIN1#1 VOUT1#14 PR8619
2
VIN1#2 VOUT1#13
13 NON-GC6
3 12 2 0R2J-L-GP
1
ON1 CT1 3D3V_AON_S0
5V_S0 4 11
DGPU_PWR_EN VBIAS GND VTT_CT_3VC_1
5 10
ON2 CT2 PG8606
3D3V_S0 6 9 GC6_20
VIN2#6 VOUT2#9 3D3V_VGA_OUT1 U8605
7 8 1 2
VIN2#7 VOUT2#8
Muxless
1

GAP-CLOSE-PWR-6-GP C8608 5 1 C8610


VIN VOUT
1

SC4D7U6D3V3KX-L-GP

TPS22966DPUR-GP C8609 2 SC1U10V2KX-L1-GP


1

GND
SC330P50V2KX-3GP

C8612 74.22966.093 MP change 0814 C8611 4 3 GC6_PWRCTL


2

VIN EN
SC1U10V2KX-L1-GP

SCD1U16V2KX-L-GP

2nd = 74.03523.A73 GC6_20


2

DY Muxless
2

Muxless AP2821KTR-G1-GP
74.02821.07F PD change 0622

79 GPIO5_GC6_PWR_EN 1 R8609 2
0R0402-PAD

A A
3D3V_S0

Dr-Bios.com
NON_GC6
R8601
1

PD change 0622 1 0R2J-L-GP


2
R8603 PD change 0622
10KR2F-L1-GP
Muxless D8601
1 R8604 2 DGPU_PWR_EN_G G 1 R8607 2 DGPU_PWROK_R 1
2

19 DGPU_PWR_EN# 0R0402-PAD 17,24,85 DGPU_PWROK 0R0402-PAD


D DGPU_PWR_EN 3 DGPU_CORE_PWROK
DGPU_PWR_EN 85 DGPU_CORE_PWROK 87 <Core Design>
S 17,79 GC6_FB_EN 2
1

Q8601
2N7002K-2-GP
BAT54C-12-GP R8608
100KR2J-4-GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
84.2N702.J31 GC6_20 GC6_20 Taipei Hsien 221, Taiwan, R.O.C.
2ND = 84.2N702.031
2

Muxless 75.00054.A7D Title


2nd = 075.00054.0B7D DISCRETE VGA POWER
Size Document Number Rev
Custom
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 86 of 105
5 4 3 2 1
5 4 3 2 1

1D05V_VGA_S0
GC6_20 Q8701
220R3F-1-GP 1 R8701 2 1D05V_VGA_S0_DIS 3 4
1V_VGACORE_S0
PWR_VGA_CORE_EN# 2 5 PWR_VGA_CORE_EN# GC6_20
D D
1 6 1V_VGA_CORE_S0_DIS 1 R8702 2
2N7002KDW-GP
84.2N702.A3F 220R3F-1-GP
2nd = 75.00601.07C
3rd = 075.01660.007C 3D3V_S0

GC6_20

2
R8705
100KR2J-4-GP

Q8703 GC6_20

1
85 PWR_VGA_CORE_EN PWR_VGA_CORE_EN G
C C
D PWR_VGA_CORE_EN#

S
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
3rd = 84.2N702.W31
SA做做做
GC6_20

1D35V_VGA_S0
GC6_20R8703 220R3F-1-GP 0227 Q8702 3D3V_S0
2 1 1D5V_VGA_S0_DIS 3 4
B B
DGPU_CORE_PWROK 2 5 3D3V_S0_DIS
86 DGPU_CORE_PWROK
R8704
1 6 1 2

2N7002KDW-GP 100KR2J-4-GP
84.2N702.A3F
2nd = 75.00601.07C GC6_20
3rd = 075.01660.007C

GC6_20
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Dr-Bios.com
Title

Size Document Number


Discharge Rev
A
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 87 of 105
5 4 3 2 1
5 4 3 2 1

PD change 0622
3D3V_S0
3D3V_S0
1 R9105 2
0R0402-PAD
D 3D3V_S5 D
R9106 DY
1 0R2J-L-GP
2
2

2
SCD1U16V2KX-L-GP

C9101 C9102 C9103 C9104


SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
TPM TPM TPM TPM
1

1
3D3V_S5 3D3V_S0
TPM
U9101

10 1
VDD XOR_OUT/SDA/GPIO0 CHECK WITH FAE

1
19 VDD GPIO1/SCL 2
R9103 24 6
10KR2J-L-GP VDD GPX/GPIO2
GPIO3/BADD 9
DY TPM_VSB 5 15
VSB CLKRUN#/GPIO4/SINT# PM_CLKRUN#_EC 17,24
7

2
PP

18,24,68 LPC_FRAME#_CPU DY 22 LFRAME#/SCS# TEST 8


C R9104 27 Delete 0227 C
18,24 INT_SERIRQ SERIRQ
1 0R2J-L-GP
2 LPCPD# 28 3
18 PM_SUS_STAT# LPCPD# NC#3
18 LPC_CLK_TPM 21 LCLK/SCLK NC#12 12
14,24,31,61,63,68,71,89 PLT_RST# 16 LRESET#/SPI_RST#/SRESET# NC#13 13

18,24,68 LPC_AD_CPU_P0 26 LAD0/MISO RESERVED#14 14


18,24,68 LPC_AD_CPU_P1 23 LAD1/MOSI
18,24,68 LPC_AD_CPU_P2 20 LAD2/SPI_IRQ# GND 4
18,24,68 LPC_AD_CPU_P3 17 LAD3 GND 11
GND 18
GND 25

NPCT650AAAWX-GP

071.00650.0B0W

ENG R9105 property 0505


B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title
TPM/NPCT650
Size Document Number Rev
A4
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 91 of 105
5 4 3 2 1
5 4 3 2 1

1 TP9901
6,23 XDP_PREQ# TPAD14-OP-GP

6,23 XDP_PRDY# 1 TP9902


TPAD14-OP-GP

D D

1 TP9903
17 ITP_PMODE TPAD14-OP-GP
1 TP9904
6 CFG3 TPAD14-OP-GP

6,23 PROC_TRST# 1 TP9905


TPAD14-OP-GP
1 TP9906
6,17 PROC_JTAG_TMS TPAD14-OP-GP
C C

1 TP9907
6,17 PROC_JTAG_TDO TPAD14-OP-GP
1 TP9908
6,17 PROC_JTAG_TDI TPAD14-OP-GP

B B

<Core Design>

Wistron Corporation
17 H_TCK 1 TP9910 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
TPAD14-OP-GP
A Taipei Hsien 221, Taiwan, R.O.C. A

Dr-Bios.com
Title

CPU_XDP
Size Document Number Rev
A
Newgate 1M
Date: Tuesday, August 18, 2015 Sheet 99 of 105
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Dr-Bios.com
Title

Table of Content
Size Document Number Rev
A
Newgate 1M
Date: Wednesday, August 12, 2015 Sheet 100 of 105
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Dr-Bios.com
Title

Change History
Size Document Number Rev
A
Newgate 1M
Date: Wednesday, August 12, 2015 Sheet 101 of 105
5 4 3 2 1
5 4 3 2 1

SKYLAKE H POWER UP SEQUENCE DIAGRAM


-7
Intel-Power Up Sequence AC
Adapter in
AD+

38

D AD_OFF_R SWITCH -4a D


RTC_AUX_S5 -3a
40
3D3V_S5
RTC_RST# 3V_5V_EN EN (3D3V_S5) DCBATOUT

(AC mode) 3D3V_AUX/5V_AUX 3D3V_AUX -5


3D3V_AUX
ECREST -2
RT6575D
3V_5V_POK 3V_5V_POK 1D0V_S5
5V_CHARGER_EN
PGOOD RT8231
DCBATOUT -2
3V_5V_EN AD+ SWITCH VIN
40 5V_AUX -5 1V_VCCCORE 1V_VCCSA 1V_VCCGT
5V_S5/3D3V_S5 5V_AUX 52
-4b
3V_5V_POK 5V_S5
5V_CHARGER_EN -3b
EN (5V_S5) 5V_CHARGER
PM_SLP_SUS 41

3D3V_SUS

RSMRST# 3V_5V_POK -2
-7
PM_SUSWARN# 3D3V_AUX SKYLAKE H
DC
BT+ ISL9519 CPU
Battery 1D0V_S5 3D3V_S5
AC_PRESENT 39 Charger -4b
5V_CHARGER_EN GT2
40
-6 GPC4 GPE0
7d
(AC mode) (DC mode) KBC_PWRBTN_EC#
AC_IN 3V_5V_EN PROCPWRGD
-4a
3V_5V_POK PLTRST#
KBC_PWRBTN#
1A GPE4 KBC
PM_PWRBTN# -1
KB9038 PM_RSMRST#
GPB7 Delay 10ms RSMRST#
GPD1
GPG6 PWRBTN# SKYLAKE
PM_PWRBTN# GPD0 PM_PWRBTN#
1B PM_SLP_S4#
PM_SLP_S4# PCH 2
2
MH170 PM_SLP_S3#
C PM_SLP_S3# GPI7 GPD5 24 C
PM_SLP_A# 4 8
4 SYS_PWROK 7a
Delay 100ms SYS_PWROK
PM_SLP_S4# PLTRST#
ALL_SYS_PWRGD VCCST_PWRGD

1V_VCCST
6a
VCCST_PWRGD 7c
2D5V_S3
7b PCH_PWROK

1D0V_S5
1D25V_S3 3D3V_S5

PM_SLP_S3#
2 3 4 3D3V_S0
5
0D95V_VCCIO PM_SLP_S4# 1V_VCCST PM_SLP_S3# 1D5V_S0
TPS22966
RT9025
DDR_PG_OUT
6a
1D5V_PWRGD 7c
40 ALL_SYS_PWRGD VCCST_PWRGD
53 6a
0D6V_S0 ALL_SYS_PWRGD LEFEL SHIFT
VR_EN
3D3V_S5/5V_S5 DCBATOUT DCBATOUT 6b
1D5V_S0
DCBATOUT
ALL_SYS_PWRGD
2 3 4 5
PM_SLP_S4# 2D5V_S3 PM_SLP_S3# 0D95V_VCCIO
VR_EN VIN
RT8231 TPS62134
6b VR_EN VCC_CORE
VCCST_PWRGD VR_ON OUTPUT
VR
VCC_CORE 51 52 TPS51622
DCBATOUT PGOOD
IMVP_PWRGD 3D3V_S5 5V_S5 IMVP_PWRGD
B B
PROCPWRGD PCH_PWROK
3b 4 5 7b
3a
PLTRST# 1D2V_S3 PM_SLP_S3# 3D3V_S5
PWR_2D5V_PG
RT8231 TPS22966 5V_S5

51 40

DGPU_PWR_EN#(Discrete only)

3D3V_VGA_S0(Discrete only)

VGA_CORE(Discrete only)

DGPU_PWROK(Discrete only)

1D5V_VGA_S0(Discrete only)

1D05V_VGA_S0(Discrete only)

1.05VTT_PWRGD 1D05V_VTT
3D3V_S0
B E
ALL_SYSTEM_PWRGD
DGPU_PWR_EN# TPS22966 3D3V_VGA_S0 DGPU_PWROK TPS22966 1D05V_VGA_S0
SWITCH 36 SWITCH 83
H_VR_EN
CPU CORE Power A D
+VCC_CORE <3ms
A A

CLK_CPU_BCLK
CLKIN_BCLK Stable

Dr-Bios.com
IMVP_PWRGD
DCBATOUT DCBATOUT
PCH_PWROK

VIN
C VIN
E
VGA_CORE 1D5V_VGA_S0 <Core Design>
OUTPUT OUTPUT
H_CPUPWRGD D Wistron Corporation
RT8812 D SY8208 F 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
To KBC GPI7 delay 99ms to PCH B 3D3V_VGA_S0 DGPU_PWROK
ALL_SYSTEM_PWRGD en PGOOD DGPU_PWROK en PGOOD 1D5V_VGA_PG Title
SYS_PWRGD
Power Sequence
Size Document Number Rev
PLT_RST# A1
Newgate 1M
Date: Wednesday, August 12, 2015 Sheet 102 of 105
5 4 2 1
5 4 3 2 1

Adapter DCBATOUT

+AD
TPS51631 TPS51716 TPS51716 RT8813A
D
TPCC8131 D

1V_CPU_CORE 1D35V_S3 0D675V_VREF_S0 1D05V_S0 1V_VGACORE_S0


TPCC8131

Battery Charger 3D3V_S0


HPA02224

TPS71225 TPS22966DPUR

C C

5V_S5 3D3V_S5 1D05V_VGA_S0 3D3V_AON_S0

TPS22966DPUR

SY6288DAAC SY6288DAAC G524B G524B SY6288DAAC TLV70215


5V_S0 3D3V_S0

B 5V_USB2 5V_USB1 3D3V_SUS 3D3V_TP_S3 3D3V_IOAC 1D5V_S0 B

For DS3 For Touch pad For IOAC

G524B G524B G524B

<Core Design>
Regulator LDO Switch 3D3V_VGA_S0 LCDVDD 3D3V_TP_S0
A Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
For GC6 Taipei Hsien 221, Taiwan, R.O.C.

Title
Power Block Diagram
Size Document Number Rev
Custom
Newgate 1M

Dr-Bios.com
Date: Wednesday, August 12, 2015 Sheet 103 of 105
5 4 3 2 1
5 4 3 2 1

PCH SMBus Block Diagram KBC SMBus Block Diagram


3D3V_S5 3D3V_S0

D 3D3V_TP_S3 D

3D3V_S0

DIMM1
SMB_CLK PCH_SMBCLK
SMBCLK
SMB_DATA PCH_SMBDATA
SCL TouchPad Conn.
SMBDATA SDA TPDATA EC_TP_DATA_C
PSDAT1 TPDATA
TPCLK EC_TP_CLK_C
3D3V_S5 PSCLK1 TPCLK
2N7002SPT

DIMM2 3D3V_TP_S3
PCH_SMBCLK 3D3V_S0
SCL
PCH_SMBDATA
SDA
SML1_CLK 3D3V_S0
SML1CLK 3D3V_AON_S0
SML1_DATA
C SML1DATA To KBC C

3D3V_S0 GSENSOR I2C1_DATA_TP I2C1_DATA_CPU


PCH
PCH_SMBCLK SML0_CLK_G I2C1_CLK_TP I2C1_CLK_CPU
SCL
PCH_SMBDATA SML0_DATA_G 3D3V_AUX_KBC
SDA

2N7002SPT
SMCLK0

NC
GPU SMDAT0
SML0CLK
NC 2N7002SPT SDA
SML0DATA
SCL
KBC Battery Conn.
BAT_SCL BAT_SCL_1
CLK_SMB
NPCE285 BAT_SDA BAT_SDA_1
DAT_SMB
PCH
SMBus address:16

B
PWR_CHG_CLK
BQ24780 B

SCL
3D3V_S0
PWR_CHG_DATA
SDA

3D3V_S5 SMBus address:12

DDI1_TBT_CLK_CPU
DDPB_CTRLCLK
DDI1_TBT_DATA_CPU ALPINE-RIDGE TPS65982ZQZR SML1_CLK
DDPB_CTRLDATA SMLCLK1 SCL
SMLDAT1
SML1_DATA
SDA
PCH

<Core Design>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

SMBUS BLOCK DIAGRAM


Size Document Number Rev
Custom
Newgate 1M
Date: Wednesday, August 12, 2015 Sheet 104 of 105

5 4 3 2 1

Dr-Bios.com
5 4 3 2 1

Thermal Block Diagram Audio Block Diagram


D D

SPK-OUT-L-
SPK-OUT-L+ SPEAKER
VD_IN1
THEM Resistor FOR CPU T8

SPK-OUT-R-
VD_IN2
THEM Resistor FOR SYSTEM SPK-OUT-R+ SPEAKER
KBC
KB9028Q OUT-L-

PURE_HW_SHUTDOWN# 3V/5V LINE2-L


OUT-L+ SPEAKER
ECRST# 2N7002 D
ECRST#_Q
EN
LINE2-R
AMP
S G PGOOD
ALC1001 OUT-R-
C
VR OUT-R+ SPEAKER
C

GPIO3D CODEC
GPIO15
ALC255
GPIO3C
GPIO12

GPIO14

GPIO13

LINE1-VREFO-L
FAN_TACH1

FAN_TACH1
FAN1_PWM

FAN1_PWM

LINE1-VREFO-R
FAN1_ADB

FAN2_ADB

LINE1-L
LINE1-R
MICIN
5V 5V

VIN VIN
HPOUT-L/PORT-T-L
FAN1 control IC FAN2 control IC HPOUT-R/PORT-T-R
B B

SPDIF-OUT/GPIO2 SPDIF
5V_FAN1_S0

5V_FAN2_S0

HP/LINE1_JD_JD1

FAN1 Conn. FAN2 Conn.


DMIC-CLK
DMIC-DATA
DMIC

<Core Design>

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Thermal /AUDIO Block Diagram
Size Document Number Rev
Custom
Newgate 1M

Dr-Bios.com
Date: Wednesday, August 12, 2015 Sheet 105 of 105

5 4 3 2 1

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