The MOS

Differential Pair

Figure 8.1: The basic MOS differential-pair configuration.

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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
 Operation with a
Common-Mode Input
Voltage

 Consider case when two gate terminals are joined

together.
 Connected to a common-mode voltage (VCM).
 vG1 = vG2 = VCM
 Q1 and Q2 are matched.
 Current I will divide equally between the two transistors.
 ID1 = ID2 = I/2, VS = VCM – VGS
 where VGS is the gate-to-source voltage.
Oxford University Publishing
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
 Operation with a
Common-Mode Input
Voltage I 1 ′W
(8.2) = kn (VGS − Vt )
2

2 2 L
(8.3) VOV = VGS − Vt
I 1 W 2
(8.4) = kn′ VOV
2 2 L
IW
(8.5) VOV =
kn′ L
−I
(8.6) vD1 = vD2 = VDD RD
2
V IR
(8.7) max (VCM ) = Vt + DD − D
2
(8.8) min(VCM ) = −VSS + VCS + Vt + VOV
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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
 Operation with a
Differential Input Voltage

 If vid is applied to Q1 and Q2 is grounded, following

conditions apply:
 vid = vGS1 – vGS2 > 0
 iD1 > iD2
 The opposite applies if Q2 is grounded etc.
 The differential pair responds to a difference-mode or
differential input signals.

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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
 Figure 8.4: The MOS differential pair
Operation with a
with a differential input signal vid
Differential Input Voltage applied.

I = 1  kn′ W  (vGS 1 − Vt )
2

2 L 
(8.9) vGS1 = Vt + 2I / kn′ (W / L)
(8.9) vGS1 = Vt + 2VOV
(8.10) max (vid ) = VGS1 + vS
(8.10) max (vid )= 2VOV

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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
 Operation with a
Differential Input Voltage

 Two input terminals connected to a suitable dc voltage

VCM.
 Bias current I of a “perfectly” symmetrical differential
pair divides equally.
 Zero voltage differential between the two drains (collectors).
 To steer the current completely to one side of the pair, a
difference input voltage vid of at least 21/2VOV (4VT for
bipolar) is needed.

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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
 Large-Signal
Operation

 Objective is to derive expressions for drain current iD1

and iD2 in terms of differential signal vid = vG1 – vG2.
 Assumptions:
 Perfectly Matched
 Saturation Region

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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
 Large-Signal
Operation

1 ′W
=
(8.11) i D1 kn (vGS 1 − Vt )2
 step #1: Expression drain 2 L
currents for Q1 and Q2. 1 W
(8.12) iD2 = kn′ (vGS 2 − Vt )
2

 step #2: Take the square roots 2 L

of both sides of both (8.11) −−−−−−−−−−−−−−−−−
and (8.12)
1 W
 step #3: Subtract (8.14) from (8.13) iD1 = kn′ (vGS1 − Vt )
2 L
(8.15) and perform
appropriate substitution. 1 ′W
kn (vGS 2 − Vt )
(8.14) iD2 =
 step #4: Note the constant- 2 L
current bias constraint. −−−−−−−−−−−−−−−−−
(8.15) vGS1 − vGS2 = vG1 − vG2 = vid
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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
 Large-Signal
Operation

 step #5: Simplify (8.15). (8.17) iD1 + iD2 = I

 step #6: Incorporate −−−−−−−−−−−−−−−−−−−−−−−
the constant-current 1 W 2
bias. (8.17) 2 iD1 iD2 = I − kn′ vid
2 L
 step #7: Solve (8.16) −−−−−− −−−−−−−−−−−−− −−−−
and (8.17) for the two 2
unknowns – iD1 and iD2. I  I vid   vid /2 
(8.23) i D1 = +    1−  
 Refer to (8.23) and 2  VOV   2   VOV 
(8.24). 2
I I  vid   vid /2 
(8.24) iD2 = −   1 −  
2  VOV  2 V
 OV 
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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
 Large-Signal
Operation

Figure 8.6: Normalized plots of the currents in a MOSFET differential pair. Note that
VOV is the overdrive voltage at which Q1 and Q2 operate when conducting drain
currents equal to I/2, the equilibrium situation. Note that these graphs are
universal and apply to any MOS differential pair
Oxford University Publishing
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
 Large-Signal
Operation

 Transfer characteristics of (8.23)

and (8.24) are nonlinear.
(8.25) iD1 ≈ I +  I v id
 
 Linear amplification is desirable 2  VOV  2
and vid will be as small as
(8.26) iD2 ≈ I −  I v id
 
possible.
2  VOV  2
 For a given value of VOV, the only
 I  v id
option is to keep vid/2 much (8.27) id ≈  
smaller than VOV.  VOV  2

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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
 Large-Signal
Operation

Figure 8.7: The linear range of operation of the MOS differential pair can be extended
byS. Sedra
operating
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Microelectronic Circuits by Adel the
and Kenneth C. Smithtransistor
(0195323033) at a higher value of VOV .
 Small-Signal Operation of
the MOS Differential
Pair

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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
 (8.28) vG1 = VCM + 1 vid
Differential Gain 2
= V − 1v
(8.29) vG2 CM id
2
−−−−−−−−−−−−−−−−−
 Two reasons single-ended 2ID 2(I /2) I
amplifiers are preferable: (8.30) g m = = =
VOV VOV VOV
 Insensitive to −−−−−−−−−−−−−−−−−
interference. vid
(8.31) vo1 = −gm RD
 Do not need bypass 2
coupling capacitors. (8.32) vo2 = +gm vid RD
2
−−−−−−−−−−−−−−−−−
(8.35) Ad = g R
m D
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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
 Differential Gain

 vi1 = VCM + vid/2 and vi2 = VCM – vid/2 causes a virtual

signal ground to appear on the common-source
(common-emitter) connection
 Current in Q1 increases by gmvid/2 and the current in Q2
decreases by gmvid/2.
 Voltage signals of gm(RD||ro)vid/2 develop at the two
drains (collectors, with RD replaced by RC).

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Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)
 The Differential
Half-Circuit

 Figure 8.9 (right): The

equivalent differential half-
circuit of the differential
amplifier of Figure 8.8.
 Here Q1 is biased at I/2 and is
operating at VOV.
 This circuit may be used to
determine the differential
voltage gain of the differential
amplifier Ad = vod/vid.

Oxford University Publishing

Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith (0195323033)