Assemblers

Chapter 2:
Assemblers
Mrs. Sunita M Dol (Aher),
Assistant Professor,
Computer Science and Engineering Department,
Walchand Institute of Technology, Solapur, Maharashtra
2. Assemblers
• Elements of Assembly Language Programming

• A simple Assembly Scheme
• Pass Structure of Assemblers
• Design of a two pass Assembler
• A Single Pass Assembler for IBM PC
8/4/2016 Mrs. Sunita M Dol, CSE Dept 2

2. Assemblers

• A simple Assembly Scheme

Assembly Language Programming
• An assembly language is a machine dependent,
low level programming language which is
specific to a certain computer system.
• Compared to machine language of computer, it
provides three basic features:
– Mnemonic operation codes
• Eliminates the need to memorize numeric operation code.
– Symbolic operands
• Symbolic names can be used.
– Data declaration
• Data can be declared in any form e.g. -5, 10.5 etc.

Assembly
Machine
Language Assembler
Language
Program
Figure: Assembler

• Statement Format
[Label] <Opcode> <operand spec> [<operand spec>….]
1. Label:- Is optional.
2. Opcode:- Symbolic opcode
3. Operand Spec:- <operand spec> has the following syntax
<symbolic name> [+<displacement>][(<index register>)]
e.g. AREA
AREA + 5
AREA (4)
AREA + 5(4)

• A Simple Assembly Language

– Each statement has two operands
• The first operand is always a register (AREG, BREG,
CREG and DREG)
• The second operand refers to a memory word.

Instruction Assembly Remarks
Opcode Mnemonic
00 STOP Stop Execution
01 ADD Op1  Op1+ Op2
02 SUB Op1  Op1 – Op2
03 MULT Op1  Op1* Op2
04 MOVER CPU Reg  Memory operand
05 MOVEM Memory  CPU Reg
06 COMP Sets Condition Code
07 BC Branch on Condition
08 DIV Op1  Op1/ Op2
09 READ Operand 2  input Value
10 PRINT Output  Operand2
Figure: Mnemonic Operation Codes

• Instruction Format
sign opcode register memory

operand operand
Figure: Instruction Format

• Assembly Language to Machine Language

– Find address of variables and labels.
– Replace Symbolic address by numeric address.
– Replace Symbolic opcode by machine opcode.
– Reserve storage for data.

START 101
READ N
MOVER BREG, ONE
MOVEM BREG, TERM
AGAIN MULT BREG, TERM
MOVER CREG, TERM
ADD CREG, ONE
MOVEM CREG, TERM
COMP CREG, N
BC LE, AGAIN
MOVEM BREG, RESULT
PRINT RESULT
STOP
N DS 1
RESULT DS 1
ONE DC ‘1’
TERM DS 1
END
Figure: Sample program to find n!
START 101
READ N 101) + 09 0 113
MOVER BREG, ONE 102) + 04 2 115
MOVEM BREG, TERM 103) + 05 2 116
AGAIN MULT BREG, TERM 104) + 03 2 116
MOVER CREG, TERM 105) + 04 3 116
ADD CREG, ONE 106) + 01 3 115
MOVEM CREG, TERM 107) + 05 3 116
COMP CREG, N 108) + 06 3 116
BC LE, AGAIN 109) + 07 2 104
MOVEM BREG, RESULT 110) + 05 2 114
PRINT RESULT 111) + 10 0 114
STOP 112) + 00 0 000
N DS 1 113)
RESULT DS 1 114)
ONE DC ‘1’ 115) + 00 0 001
TERM DS 1 116)
END
Variable Address
AGAIN 104
N 113
RESULT 114
ONE 115
TERM 116
Figure: After LC Processing

• Machine Code LC Opcode Register Address
101 09 0 113
102 04 2 115
103 05 2 116
104 03 2 116
105 04 3 116
106 01 3 115
107 05 3 116
108 06 3 113
109 07 2 104
110 05 2 114
111 10 0 114
112 00 0 000
113
114
115 00 0 001
116

START 101
READ X
READ Y
MOVER AREG, X
ADD AREG, Y
MOVEM AREG, RESULT
PRINT RESULT
STOP
X DS 1
Y DS 1
RESULT DS 1
END
Figure: Sample program to find X+Y
Opcode Register Memory

START 101 LC operand
READ X 101 + 09 0 108
READ Y 102 + 09 0 109
MOVER AREG, X 103 + 04 1 108
ADD AREG, Y 104 + 01 1 109
MOVEM AREG, RESULT 105 + 05 0 110
PRINT RESULT 106 + 10 0 110
STOP 107 + 00 0 000
X DS 1 108
Y DS 1 109
RESULT DS 1 110
END

Variable Address
X 108
Y 109
RESULT 110
Figure: After LC Processing

• Machine Code
LC Opcode Register Address
101 09 0 108
102 09 0 109
103 04 1 108
104 01 1 109
105 05 0 110
106 10 0 110
107 00 0 000
108
109
110
111
• Assembly Language Statement
– Imperative Statement.
• Indicates an action to be taken during execution of a
program.
• Eg: MOV, ADD, MULT, etc.
– Declaration Statement.
• To reserve memory for variable.
[Label] DS <constant> eg: X DS 5
[Label] DC ‘<value>’ eg: X DC ‘3’
– Assembler Directives
• Instructs the assembler to perform certain action during
assembly of a program.
START <constant>
END
• Literals and Constants
– Literal cannot be changed during program execution
– Literal is more safe and protected than a constant.
– Literals appear as a part of the instruction.
– e.g.
ADD AREG, =‘5’ => ADD AREG, FIVE

--------------------
FIVE DC ‘5’

• Assembler Directives
– START <constant> : The first word of the target
program by the assembler should be placed in the
memory with the address <constant>
e.g. START 100
– END [<operand spec>] : It indicates the end of

source program. The optional <operand spec>
indicates the address of instruction where the
execution of the program should begin.

• Advantages of Assembly Language
Opcode Register Memory
START 101 LC operand
READ X 101 + 09 0 109
READ Y 102 + 09 0 110
MOVER AREG, X 103 + 04 1 109
ADD AREG, Y 104 + 01 1 110
DIV AREG, TWO 105 + 08 2 112
STOP 108 + 00 0 000
X DS 1 109
Y DS 1 110
RESULT DS 1 111
TWO DC ‘2’ 112 + 00 0 002
END
2. Assemblers

• A Simple Assembly Scheme

A Simple Assembly Scheme
• Design Specification for an Assembler

– Four step approach
• Identify the information necessary to perform a task.
• Design a suitable data structure to record the information.
• Determine the processing necessary to obtain and maintain the
information.
• Determine the processing necessary to perform the task.

• Synthesis Phase
– Consider instruction MOVER AREG, X
START 101 LC
READ X 101 + 09 0 108
READ Y 102 + 09 0 109
MOVER AREG, X 103 + 04 1 108
ADD AREG, Y 104 + 01 1 109
STOP 107 + 00 0 000
X DS 1 108
Y DS 1 109
RESULT DS 1 110
END

• Synthesis Phase
– we must have the following information to synthesize the
machine instruction corresponding to this statement:
• Address of the memory word with which name X is
associated.
• Machine operation code corresponding to the mnemonic
MOVER.
– The first item of information depends on the source
program. Hence it must be available by the analysis
phase. The second item of information does not depend
on the source program

• Synthesis Phase
– we consider the use of two data structures during the
synthesis phase:
• Symbol table
• Mnemonics table

• Analysis Phase
– The primary function performed by the analysis phase is
the building of the symbol table.
– For this purpose it must determine the address with
which the symbolic names in a program are associated.
– To determine the address of any instruction, we must fix
the address of all program elements preceding it. This
function is called memory allocation.
– To implement memory allocation a data structure called
location counter is introduced.

• Analysis Phase
– It is initialized to the constant specified in the START
statement.
– The location counter is always made to contain the
address of the next memory word in the target program.

Mnemonic Table
Mnemonic Opcode length
ADD 01 1
SUB 02 1
Source Analysis Synthesis Target

Program Phase Phase Program
Symbol Table
Symbol Address Data access
AGAIN 104 Control access
N 113
Figure: Overview of Two Pass Assembler

• Analysis Phase
– Isolate the label, mnemonic opcode and operand fields
of a statement.
– If a label is present, enter the pair(symbol, <LC counter>)
in a new entry of the symbol table
– Check the validity of the mnemonic opcode through a
look-up in the mnemonic table.
– Perform LC processing i.e. update the value contained in
LC by considering the opcode and operands of the
statement.

• Synthesis phase
– Obtain the machine opcode corresponding to the
mnemonic from mnemonics table.
– Obtain address of a memory operand from the symbol
table.
– Synthesize a machine instruction or the machine form of
a constant, as the case may be.

2. Assemblers


Pass Structure of Assembler
• Two pass translation
– Two pass translation of an assembly language program
can handle forward references easily.
– LC processing is performed in the first pass and symbols
defined in the program are entered into the symbol table.
– The second pass synthesizes the target form using the
address information found in the symbol table.

• Two pass translation
– The first pass constructs an intermediate representation
of the source program for use by the second pass .
– This representation consists of two main components—
• data structures, e.g. the symbol table, and
• a processed form of the source program

Data Structures
Source Target
Pass I Pass II Program
Program
Data access
Intermediate Code Control access
Figure: Overview of Two Pass Assembler

• Single pass translation
– LC processing and construction of the symbol table
proceed as in two pass translation.
– The problem of forward references is tackled using a
process called backpatching.
– The operand field of an instruction containing a forward
reference is left blank initially.
– The address of the forward referenced symbol is put into
this field when its definition is encountered.

– The need for inserting the operand’s address at a later
stage can be indicated by adding an entry to the table of
incomplete instructions (TII).
– In TII, each entry is a pair
(<instruction address>,<symbol>)

– By the time the END statement is processed, the symbol
table would contain the addresses of all symbols defined
in the source program and TII would contain information
describing all forward references.
– The assembler can now process each entry in TII to
complete the concerned instruction.

• Single Pass Translation
– The problem of forward reference can be handled
using a technique called as back patching.
– The need for inserting the second operand’s address
at a later stage can be indicated by adding an entry to
the Table of Incomplete Instruction (TII)
– The entry in TII is a pair
(<instruction address>, <symbol>)

• Single Pass Translation Example
START 100
MOVER AREG, X
ADD BREG, ONE
ADD CREG, TEN
STOP
X DC ‘5’
ONE DC ‘1’
TEN DC ‘10’
END

START 100
MOVER AREG, X 100 04 1 ___
ADD BREG, ONE 101 01 2 ___
ADD CREG, TEN 102 06 3 ___
STOP 103 00 0 000
X DC ‘5’ 104
ONE DC ‘1’ 105
TEN DC ‘10’ 106
END
Instruction Symbol Making a Symbol Address
Address forward reference X 104
100 X ONE 105
101 ONE TEN 105
102 TEN
Figure : Symbol Table
Figure : TII (Table of Incomplete Instruction)
START 100
MOVER AREG, X 100 04 1 104
ADD BREG, ONE 101 01 2 105
ADD CREG, TEN 102 06 3 106
STOP 103 00 0 000
X DC ‘5’ 104
ONE DC ‘1’ 105
TEN DC ‘10’ 106
END

2. Assemblers

• Design of a Two Pass Assembler

Design of a Two Pass Assembler
• Pass I:-
1. Separate the symbol, mnemonic, opcode and
operand.
2. Build Symbol Table.
3. Perform LC Processing.
4. Construct Intermediate Representation.
• Pass II:-
1. Process IR to synthesize the target program.

• Advanced Assembler Directives
– ORIGIN:
• The syntax is
ORIGIN <address specification>
where address specification is an <operand spec> or
<constant>
• This directives indicates that LC should be set to the address
given by <address spec>.
• The ORIGIN is useful when the target program does not
consist of consecutive memory word.

1 START 200
2 MOVER AREG, =’5’ 200) + 04 1 211
3 MOVEM AREG, A 201) + 05 1 217
4 LOOP MOVER AREG, A 202) + 04 1 217
5 MOVER CREG, B 203) + 05 3 218
6 ADD CREG, =’1’ 204) + 01 2 212
7 …..
12 BC ANY, NEXT 210) + 07 6 214 Statement
13 LTORG number 18 sets
=’5’ 211) + 00 0 005 LC to the value
=’1’ 212) + 00 0 001 204 since the
14 ….. symbol LOOP is
15 NEXT SUB AREG, =’1’ 214) + 02 1 219 associated with
16 BC LT, BACK 215) + 07 1 202
17 LAST STOP 216) + 00 0 000
the address 202
18 ORIGIN LOOP+2
19 MULT CREG, B 204) + 03 3 218
20 ORIGIN LAST+1
21 A DS 1 217)
22 BACK EQU LOOP
23 B DS 1 218)
24 END
25 =’1’ 219)
Figure : An assembly language illustrating ORIGIN

– EQU:
• The syntax is
<symbol> ORIGIN <address specification>
where address specification is an <operand spec> or
<constant>
• The EQU statement defines the symbol to represent
<address spec>.
• No LC processing is implied.

1 START 200
2 MOVER AREG, =’5’ 200) + 04 1 211
3 MOVEM AREG, A 201) + 05 1 217
4 LOOP MOVER AREG, A 202) + 04 1 217
5 MOVER CREG, B 203) + 05 3 218
6 ADD CREG, =’1’ 204) + 01 2 212
7 …..
12 BC ANY, NEXT 210) + 07 6 214 Statement 22
13 LTORG introduces the
=’5’ 211) + 00 0 005 symbol BACK to
=’1’ 212) + 00 0 001 represent the
14 ….. operand LOOP.
15 NEXT SUB AREG, =’1’ 214) + 02 1 219
16 BC LT, BACK 215) + 07 1 202
17 LAST STOP 216) + 00 0 000
18 ORIGIN LOOP+2
19 MULT CREG, B 204) + 03 3 218
20 ORIGIN LAST+1
21 A DS 1 217)
22 BACK EQU LOOP
23 B DS 1 218)
24 END
25 =’1’ 219)

– LTORG:
• The LTORG statement permits a programmer to specify
where literals should be placed .
• By default, assembler places the literals after the END
statement.
• At every LTORG statement, as also at the END statement,
the assembler allocates memory to the literals of a literal
pool.
• The pool contains all literals used in the program since start
of the program or since the last LTORG statement.

1 START 200
2 MOVER AREG, =’5’ 200) + 04 1 211
3 MOVEM AREG, A 201) + 05 1 217 The literals =’5’
4 LOOP MOVER AREG, A 202) + 04 1 217 and =’1’ are
5 MOVER CREG, B 203) + 05 3 218
added to the
6 ADD CREG, =’1’ 204) + 01 2 212
7 …..
literal pool in the
12 BC ANY, NEXT 210) + 07 6 214 statement 2 and 6
13 LTORG respectively. The
=’5’ 211) + 00 0 005 first LTORG
=’1’ 212) + 00 0 001 statement
14 ….. allocates the
15 NEXT SUB AREG, =’1’ 214) + 02 1 219
addresses 211
16 BC LT, BACK 215) + 07 1 202
17 LAST STOP 216) + 00 0 000
and 212 to the
18 ORIGIN LOOP+2 values ‘5’ and ‘1’.
19 MULT CREG, B 204) + 03 3 218 A new literal pool
20 ORIGIN LAST+1 is now started.
21 A DS 1 217) The value ‘1’ is
22 BACK EQU LOOP put into this pool
23 B DS 1 218)
in statement 15.
24 END
25 =’1’ 219)

Design of a Two Pass
LC
Assembler
START 200
MOVER AREG, =‘5’ 200 +04 1 205
MOVEM AREG, X 201 +05 1 214
L1 MOVER BREG, =‘2’ 202 +04 1 206
ORIGIN L1+3
LTORG
205 +00 0 005
206 +00 0 002
NEXT ADD AREG,=‘1’ 207 +01 1 210
SUB BREG,=‘2’ 208 +02 2 211
BC LT, BACK 209 +07 1 202
LTORG
210 +00 0 001
211 +00 0 002
BACK EQU L1
ORIGIN NEXT+5
MULT CREG,=‘4’ 212 +03 3 215
STOP 213 +00 0 000
X DS 1 214
8/4/2016 END Mrs. Sunita M Dol, CSE Dept 215 +00 0 004 52
• Pass I uses the following data structures

1. Machine Opcode table (OPTAB)
2. Symbol Table (SYMTAB)
3. Literal Table (LITTAB)
4. Pool Table (POOLTAB)

• Pass-I Data Structures

– OPTAB
• OPTAB contains the fields
– Mnemonic opcode
– Class : the class indicate whether the opcode corresponding to
an imperative statement (IS), a declaration statement (DL) or
an assembler directives (AD).
– Mnemonic info: If an imperative statement, the mnemonic info
field contains the pair (machine opcode, instruction length) else
it contains the id of a routine to handle the declaration or
directive statement.
• A SYMTAB entry contains the fields address and length.
• A LITTAB entry contains the fields literal and address.

START 200 LC
MOVER AREG, =‘5’ 200 +04 1 205
MOVEM AREG, X 201 +05 1 214
L1 MOVER BREG, =‘2’ 202 +04 1 206
ORIGIN L1+3
LTORG
205 +00 0 005
206 +00 0 002
NEXT ADD AREG,=‘1’ 207 +01 1 210
SUB BREG,=‘2’ 208 +02 2 211
BC LT, BACK 209 +07 1 202
LTORG
210 +00 0 001
211 +00 0 002
BACK EQU L1
ORIGIN NEXT+5
MULT CREG,=‘4’ 212 +03 3 215
STOP 213 +00 0 000
X DS 1 214
END 215 +00 0 004

Assemblers

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Chapter 2:

• Elements of Assembly Language Programming

8/4/2016 Mrs. Sunita M Dol, CSE Dept 2

• Elements of Assembly Language Programming

8/4/2016 Mrs. Sunita M Dol, CSE Dept 3

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• A Simple Assembly Language

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Figure: Mnemonic Operation Codes

sign opcode register memory

Figure: Instruction Format

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• Assembly Language to Machine Language

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Figure: After LC Processing

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Opcode Register Memory

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Figure: After LC Processing

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ADD AREG, =‘5’ => ADD AREG, FIVE

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– END [<operand spec>] : It indicates the end of

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• Elements of Assembly Language Programming

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• Design Specification for an Assembler

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Source Analysis Synthesis Target

Figure: Overview of Two Pass Assembler

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• Elements of Assembly Language Programming

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Figure: Overview of Two Pass Assembler

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• Elements of Assembly Language Programming

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Figure : An assembly language illustrating ORIGIN

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Figure : An assembly language illustrating ORIGIN

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Figure : An assembly language illustrating ORIGIN

• Pass I uses the following data structures

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