Jeric N.

Sapaula
BSET 3A 2

Laboratory Exercise
Instructions:
1. Follow the wiring diagram shown for OR gate 1
2. Verify the input and output
3. The same instruction for OR gate 2, 3 and 4

1. Verify the output of the OR gate 1 by means of the truth table shown.
A1 B1 X1
0 0 0
0 1 1
1 0 1
1 1 1

2. Verify the output of the OR gate 2 by means of the truth table shown.
A2 B2 X2
0 0 0
0 1 1
1 0 1
1 1 1
 3. t 3. Verify the output of the OR gate 3 by means of truth table shown.
h A3 B3 X3
e 0 0 0
0 1 1
o 1 0 1
u 1 1 1
t
p
u
t

o
f

t
h
e

O
R

g
a
4. Verify the output of the OR gate 4 by means of the truth table shown.
t
A4 B4 X4
e
0 0 0

3 0 1 1
1 0 1

b 1 1 1

y A

m
e
a
n
s

o
f

t
h
Conclusion:
e
3 After testing all the gates of Integrated Circuit I conclude that it is working properly.
.