Microelectronic Engineering 116 (2014) 17–21

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Microelectronic Engineering
journal homepage: www.elsevier.com/locate/mee

Chemical mechanical planarization of patterned InP in shallow trench

isolation (STI) template structures using hydrogen peroxide–based silica
slurries containing oxalic acid or citric acid
John B. Matovu a,b, Patrick Ong b, Lieve G. Teugels b, Leonardus H.A. Leunissen b,c, S.V. Babu a,⇑
a
Department of Chemical and Biomolecular Engineering and the Center for Advanced Materials Processing, Clarkson University, Potsdam, NY 13699, USA
b
Interuniversity Microelectronics Center (IMEC), Kapeldreef 75, 3001 Heverlee, Belgium
c
Currently at Global Foundries, Dresden, Germany

a r t i c l e i n f o a b s t r a c t

Article history: The fabrication of an InGaAs n-channel in complementary metal oxide semiconductors (CMOS) requires
Received 16 October 2013 an intervening layer of Indium Phosphide (InP) that should be planarized using chemical mechanical
Accepted 19 November 2013 planarization (CMP) before deposition of the InGaAs layer. The InP CMP process has to provide good
Available online 27 November 2013
InP removal rates (RRs) (100–200 nm min–1), very low oxide loss, low dishing and minimal or no phos-
phine evolution. In this work, it is shown that aqueous slurries containing 3 wt% silica, 1 wt% hydrogen
Keywords: peroxide and 0.08 M oxalic acid or citric acid satisfy these requirements. Cross–sectional scanning elec-
Chemical mechanical polishing
tron microscope (SEM) images showed that InP in the shallow trench isolation structures was planarized
Planarization
Dishing
and scratches, slurry particles and smearing of InP on the wafers were absent. Additionally, wafers pol-
Oxide loss ished at pH 6 showed very low dishing values of about 12–15 nm, determined by cross–sectional SEM.
Selectivity Ó 2013 Elsevier B.V. All rights reserved.
Oxalic acid
Citric acid
Scanning electron microscope
Shallow trench isolation

1. Introduction
III–V materials such as InGaAs have been identified as potential
n-channel material candidates for future complementary metal
oxide semiconductor (CMOS) devices [1] because of their high
electron mobility. During the growth of such an InGaAs channel,
a buffer layer of indium phosphide (InP) is used since its lattice
constant matches that of InGaAs [1,2]. The InP buffer layer itself
is epitaxially grown on a thin Ge layer that is initially grown on re-
cessed Si in shallow trench isolation (STI) structures [12]. The over-
burden InP is planarized using chemical mechanical planarization
(CMP) to obtain a globally smooth surface and enable the growth
of a planar InGaAs layer [1,2]. The CMP of these InP structures re-
quires a CMP process that provides minimal dishing of InP in the
STI trenches, very low oxide loss (hence, InP to SiO2 removal rate
ratio of >10) and minimal or no phosphine evolution [3–5].
So far, no slurries that can fulfill these requirements have been
reported, though, recently Waldron et al. observed that acidic slur-
ries provided better planarization of InP in STI trenches than those
⇑ Corresponding author. Tel.: +1 315 268 2336; fax: +1 315 268 7615.
E-mail address: babu@clarkson.edu (S.V. Babu).
at basic pH [6]. However, acidic slurries are not suitable for InP pol-
ishing because of phosphine evolution [3–5].
We recently investigated the CMP of blanket InP films and the
associated evolution of phosphine and identified process conditions
that provide good removal rates and minimal or no formation of
phosphine [7]. Acidic pH values of silica slurries containing hydro-
gen peroxide yielded higher removal rates but were encumbered
with the evolution of high amounts of toxic phosphine [5,7–9].
Alkaline pH conditions when no other additives are present in
the slurry, resulted in minimal or no phosphine generation but also
low removal rates of <80 nm/min [7–9]. The addition of multifunc-
tional carboxylic acids (oxalic, tartaric, and citric acids) improved
the removal rates while maintaining minimal or no evolution of
phosphine in the pH range 6–12 [7]. Negligible dissolution rates
were observed for all these slurries, making them good candidates
for planarization of patterned InP structures. For ease of reference,
the slurry and process parameters that provided the best removal
rate and phosphine evolution results are shown in Table 1 and
were used here to evaluate their suitability for polishing of InP in
STI structures in 200 mm patterned wafers.
As mentioned above, there should be very low oxide loss after
polishing of InP in STI structures in order to have good electrical
performance [10]. Therefore, the slurries listed in Table 1 were

0167-9317/$ - see front matter Ó 2013 Elsevier B.V. All rights reserved.
http://dx.doi.org/10.1016/j.mee.2013.11.009
18 J.B. Matovu et al. / Microelectronic Engineering 116 (2014) 17–21

Table 1
Removal rate and phosphine evolution data obtained during blanket InP wafer polishing using hydrogen peroxide–based silica slurries containing oxalic or citric acid at pH 6, 8,
and 10 [7].

Slurry pH InP removal rates (nm min–1) Concentration of phosphine evolved (ppb)
0.08 M Oxalic acid + 3 wt.% silica + 1 wt.% H2O2 6 506 ± 15 15 ± 3
8 277 ± 56 Not detected
10 219 ± 63 No detected
0.08 M Citric acid + 3 wt.% silica + 1 wt.% H2O2 6 598 ± 56 47 ± 3
8 325 ± 53 Not detected
10 340 ± 11 Not detected

used here first to polish blanket films of high density plasma (HDP)
silicon dioxide (SiO2) wafers and identify conditions that lead to
low removal rates (RRs). The best conditions were subsequently
used to polish patterned wafers of InP.

2. Materials

2.1. Blanket high density plasma (HDP) SiO2 wafers

Blanket high density plasma (HDP) silicon dioxide films

(500 nm thick) on silicon substrates that were prepared at IMEC
were used. The HDP oxide was grown on Si wafers by chemical va-
por deposition (CVD) in an AMAT Centura tool at 700 °C.

2.2. 200 mm patterned InP–STI wafers

200 mm diameter patterned InP–STI wafers that were used in
this work were prepared at IMEC. A schematic for the InP process
flow is shown in Fig. 1. (not drawn to scale). The process is based
on an STI template [6]. In this template, the STI oxide filled
trenches have a depth of 330 nm, a width of about 900 to
1000 nm and the Si active regions have a width that ranges from
100 to 200 nm (cf. Fig. 1a.). After the STI process (Fig. 1a.), the Si
in the active areas of the STI template was etched using HCl vapor
and recessed for 50 nm below the STI oxide (see Fig. 1b.). Then a
thin Ge intervening layer (presence of this Ge film minimizes the
structural defects in the InP layers [1,6,11,12]) of 50 nm was
deposited (using GeH4 as a precursor in H2 as carrier gas) selec-
tively in this trench on Si (cf. Fig. 1c.), followed by baking at
720 °C in a H2 environment to remove the native oxide on Ge.
Then, InP was selectively grown on Ge in the STI template trenches
and on a narrow region above the trenches (see Fig. 1d.) using Aix-
tron close-coupled showerhead metal–organic vapor phase epitaxy
(MOVPE) systems. Trimethylindium (TMIn) and tertiarybutylphos-
phine (TBP) were used as precursors for In and P, respectively.
More details on the growth of the InP layer in STI structures can
be found elsewhere [1,6,11,12].
Figs. 2 and 3a and b show the cross sectional SEM images of the
STI structures with the InP deposited using the procedure de-
scribed above. Fig. 2. shows that InP growth is restricted to the
trench and on a narrow region around the trench (same as
Fig. 2. Cross sectional SEM images for wafers of InP in STI trenches before CMP
showing the InP overgrowth after deposition. InP is selectively grown in the STI
trenches and on a narrow region above the oxide. (Images taken at 14° tilt angle
and magnification of 20,000.)
structure in Fig. 1c.). Fig. 2a and b show the variations in the height
of the InP layer above the STI trench that ranges between 100 and
300 nm. The width of the STI trenches varies from 100 to 200 nm
separated by an oxide of about 900 to 1000 nm width (pattern den-
sities of 11–33%). Of these, the 134 nm structures (nominal width
of 150 nm) with a pattern density of about 11–15% that had very
uniform InP growth for this feature size were chosen to evaluate
post–CMP defects, dishing levels and oxide loss.
2.3. Slurry particles and additives
Dispersions of colloidal silica abrasives, Nexsil 35A, (30 wt% in
water), with an average particle diameter of 35 nm were obtained
from Nyacol Nanotechnologies. Hydrogen peroxide solution
(unstabilized, 30 wt% in water), and oxalic acid and citric acid, pur-
chased from Sigma–Aldrich, were used as additives in the polishing
slurry. All chemicals were used without further purification. The
concentrations of Nexsil 35A, hydrogen peroxide, and oxalic acid/
citric acid in the slurry were 3 wt%, 0.3 mol dm–3 (1 wt% of the
slurry) and 0.08 mol dm–3 (0.72 wt% for oxalic acid or 1.54
wt% for citric acid of the slurry), respectively.

Fig. 1. Process flow (not drawn to scale) for the deposition of the InP buffer layer for InGaAs n-channel showing (a) STI template comprising of SiO2 and active areas
containing silicon, (b) Selective Si etch in the active areas besides the SiO2 and Si recess below the oxide, (c) Selective Ge growth. (d) Selective InP growth in the trench and on
a narrow region above the oxide. This scheme was based on the report in ref. [6].
 J.B. Matovu et al. / Microelectronic Engineering 116 (2014) 17–21 19

Fig. 3. Cross sectional SEM images for wafers of InP in STI trenches before CMP showing the topography of the overburden InP after deposition at (a) 2° tilt angle and
magnification of 160,000 and (b) 2° tilt angle and magnification of 300,000. The trench film stack comprises of Ge (50 nm), and InP (330 nm) and InP step height above the
trench of about 100–300 nm.

The pH was adjusted from an initial value of 1.8 for the slurry same ASET–F5 tool. The difference in thickness from these metrol-
containing oxalic acid and 2.2 for the one containing citric acid ogy structures before and after polishing was used to calculate the
using potassium hydroxide. reported oxide loss.

3. Experimental methods 3.4. Cross sectional scanning electron microscope (SEM) images

3.1. InP chemical mechanical polishing
200 mm diameter patterned InP–STI wafers and blanket
200 mm diameter high density plasma (HDP) SiO2 wafers, de-
scribed above, were polished on an Applied Materials (AMAT) Mir-
ra polisher. The polishing was performed at 3.0 psi (20.7 kPa)
operating pressure, 80/72 rpm carrier/platen rotation speed, and
100 mL min–1 slurry flow rate. The patterned InP–STI wafers were
polished for 45 s while the blanket HDP oxide wafers were pol-
ished for 60 s using an IC1000 K–groove pad. In both cases, the
pad was conditioned insitu using a diamond grit conditioner for
all the experiments. In all cases, after polishing, a 1 min DI–water
buff was done and the wafers were cleaned with dilute SC1 (hydro-
gen peroxide, ammonia and water) to remove post–CMP residuals
and metal contamination and then dried. After drying, the wafers
underwent post–CMP inspection for defects, oxide loss and dishing
as will be described later in this section.
3.2. Phosphine measurements
Cross sectional scanning electron microscope (SEM) images
were obtained using an FEI XSEM Nova 200 instrument.
The cross section images were used to inspect the cross-section
topography before and after polishing, but only at pH 6, to estimate
the typical dishing values caused by the slurries during polishing.
4. Results and discussion
4.1. Evolution of toxic phosphine gas during polishing
No phosphine evolution was observed during polishing of InP in
STI structures in 200 mm patterned wafers using the slurries listed
in Table 1 at the three pH values of 6, 8, and 10. Except at pH 6,
these results are in agreement with those obtained during polish-
ing of blanket InP wafer coupons [7]. The lack of phosphine at pH 6
for the patterned InP wafers may be due to reduced surface cover-
age of the wafer (InP on the wafer is 20%) compared to a blanket
wafer.

Phosphine concentrations in the air above the InP–STI wafers

were measured using a Zellweger MDA Scientific CM4 Four Point
Continuous Gas Monitor (Honeywell) by connecting a gas collec-
tion tube to one of its four sampling ports. The headspace gas
was sampled at a location 6 cm above the pad and 15 cm from
the center of the wafer. The maximum concentration of phosphine
in air (v/v), measured during each polishing experiment, is re-
ported in parts per billion (ppb).

3.3. Estimation of HDP oxide removal rates and oxide loss in InP–STI
structures

The removal rates on blanket oxide wafers were estimated from

the difference in thickness measured using an Advanced Spectro-
scopic Ellipsometry Technology (ASET–F5) tool before and after
polishing. In the case of patterned InP–STI structures, the thickness
before and after polishing was measured on special metrology Fig. 4. Removal rates of blanket HDP oxide in a slurry containing 3 wt% silica,
structures that were built specifically for this purpose using the 1 wt.% H2O2 and 0.08 M oxalic acid or citric acid at pH 6, 8, and 10, respectively.
20 J.B. Matovu et al. / Microelectronic Engineering 116 (2014) 17–21
Fig. 5. Selectivities of blanket InP to blanket HDP oxide in a slurry containing 3 wt.%
silica, 1 wt.% H2O2 and 0.08 M oxalic acid or citric acid at pH 6, 8, and 10,
respectively.
Fig. 6. Oxide loss in patterned InP–STI structures polished with a slurry containing
3 wt.% silica, 1 wt.% H2O2 and 0.08 M oxalic acid or citric acid at pH 6, 8, and 10,
respectively.
4.2. Blanket oxide RRs and selectivity with InP
The InP–STI CMP process requires a slurry that polishes InP at
much higher rate than the silicon dioxide with a selectivity of
Fig. 7. Cross sectional SEM images for wafers of InP in STI trenches after CMP with an aqueous slurry containing 3 wt.% silica, 1 wt.% hydrogen peroxide and 0.08 M oxalic acid
at pH 6 at (a) –14° tilt angle and magnification of 60,000 and (b) 2° tilt angle and magnification of 60,000.
exceeding 10 [3,4] to minimize oxide loss. Hence, the slurries de-
scribed in Table 1 that were optimized to polish InP films were
used to evaluate the HDP oxide removal rates. Fig. 4. shows the
HDP oxide removal rates for a slurry containing 3 wt% silica,
1 wt% hydrogen peroxide and 0.08 M oxalic acid or citric acid at
pH 6, 8, and 10, respectively. The removal rates of HDP oxide are
<30 nm for both slurries and, in both cases, the removal rates at
pH 10 are slightly higher than those at pH 6 and 8 possibly due
to increased silicon dioxide dissolution with increasing pH [13,14].
Fig. 5. shows the selectivities of InP to HDP oxide at the three pH
values. The selectivities surpass the above specification of exceed-
ing 10 and suggest that these slurries would be suitable candi-
dates for planarization of InP–STI structures.
4.3. Post–CMP oxide loss in patterned InP–STI structures
To ensure good electrical performance, the CMOS devices made
from InP–STI structures should have very low loss [10]. Fig. 6
shows the oxide loss from patterned InP–STI structures obtained
with the six slurry candidates. The oxide loss is less than 20 nm
at pH 6 and 8. However, oxide loss for both oxalic acid and citric
acid at pH 10 is a little higher than that at pH 6 and 8. These results
are in agreement with the removal rates obtained on blanket oxide
wafers described in the preceding section.
4.4. Post–CMP cross sectional SEM inspection for determination of
dishing
The wafers polished with two slurries, one with oxalic acid and
citric acid both at pH 6, were chosen to determine the extent of
dishing of InP in the STI trenches. Two cross sectional SEM images
are shown for each slurry in Figs. 7 and 8 and these should be com-
pared with Figs. 2 and 3. Figs. 7a and 8a show that InP in the STI
trenches is well planarized with no visible defects or scratches,
no slurry particles and no smearing of InP on the wafers. These re-
sults are in agreement with top view SEM images at other pH val-
ues of 6, 8, and 10 that showed good planarization and no
appearances of scratches, slurry particles and InP smearing (data
not shown). Figs. 7b and 8b show that about 15 and 12 nm of InP
dishing resulted from the slurries containing oxalic acid and citric
acid, respectively, both at pH = 6. These slurries provide low dish-
ing values, low oxide loss and no phosphine evolution, the major
requirements for an effective InP–STI CMP process in the fabrica-
tion of an InGaAs n-channel and, hence, are very good candidates
for InP–STI chemical mechanical planarization.
 J.B. Matovu et al. / Microelectronic Engineering 116 (2014) 17–21
Fig. 8. Cross sectional SEM images for wafers of InP in STI trenches after CMP with an aqueous slurry containing 3 wt.% silica, 1 wt.% hydrogen peroxide and 0.08 M citric acid
at pH 6 (a) –14° tilt angle and magnification of 24,000 and (b) 2° tilt angle and magnification of 150,000.
5. Conclusion
Aqueous slurries containing 3 wt.% silica, 1 wt.% hydrogen per-
oxide and 0.08 M oxalic acid or citric acid at pH 6, 8, and 10 (ini-
tially developed for blanket InP film polishing, and found to
provide good removal rates, negligible dissolution rates and no
phosphine evolution) have been used to polish blanket high den-
sity plasma (HDP) silicon dioxide (SiO2) films to ensure that they
yield low oxide loss. In addition, these slurries were evaluated
for their suitability for planarization of patterned InP in shallow
trench isolation structures. All the slurry combinations at the
respective pH values yielded low SiO2 removal rates during polish-
ing of blanket oxide wafers and, hence, provided the desired re-
moval rate selectivity with InP of >10 and low oxide loss during
patterned InP–STI wafer polishing. The oxide loss was <20 nm at
pH 6 and 8 and <30 nm min–1 at pH 10. The planarized surface
showed no scratches, no slurry particles and no smearing of InP.
Additionally, very low dishing values of InP in the STI trenches
were obtained (15 and 12 nm for the slurry containing oxalic acid
and citric acid, respectively, both at pH 6), a requirement for good
planarization of InP in STI trenches. There was no generation of
phosphine during polishing in all cases.
Acknowledgments
This work was done within IMEC’s industrial affiliation program
on sub-22 nm CMOS technologies. IMEC thanks their partners for
the support of these activities.
21
References
[1] G. Wang, M.R. Leys, N.D. Nguyen, R. Loo, G. Brammertz, O. Richard, H. Bender, J.
Dekoster, M. Meuris, M.M. Heyns, M. Caymax, J. Electrochem. Soc. 157 (11)
(2010) H1023–H1028.
[2] T. Orzali, G. Wang, N. Waldron, C. Merckling, O. Richard, H. Bender, W.-E.
Wang, M. Caymax, J. Electrochem. Soc. 159 (4) (2012) H455–H459.
[3] P. Ong, L. Witters, N. Waldon,L. H. A. Leunissen, Ge and III/V-CMP for
Integration of High Mobility Channel Materials. Presented at the Semicon,
China, 2011.
[4] P. Ong, L. Witters, N. Waldon, L.H.A. Leunissen, ECS Trans. 34 (1) (2011) 647–
652.
[5] P. Ong, Environmental and Health Risks due to CMP of III/V Materials,
Presented at the 26th CMP Users Meeting, Fraunhofer Institute for Silicon
Technology ISIT, Germany, 2011.
[6] N. Waldron, G. Wang, G.N.D. Nguyen, T. Orzali, C. Merckeling, G. Brammertz, P.
Ong, G. Winderickx, G. Hellings, G. Eneman, M. Caymax, M. Meuris, N.
Horiguchi, A. Thean, ECS Trans. 45 (2012) 115–128.
[7] J.B. Matovu, P. Ong, L.H.A. Leunissen, S. Krishnan, S.V. Babu, Ind. Eng. Chem.
Res. 52 (31) (2013) 10664–10672.
[8] S. Peddeti, P. Ong, L.H.A. Leunissen, S.V. Babu, ECS J. Solid State Sci. Technol. 1
(4) (2012) P184–P189.
[9] Peddeti, S. Chemical mechanical polishing of Ge and InP for microelectronic
applications (Ph. D. Thesis) Clarkson University, New York, July 2011.
[10] International Technology Roadmap for Semiconductors, Front End Processes,
2011 Edition, 33.
[11] G. Wang, M. Leys, R. Loo, O. Richard, H. Bender, G. Brammertz, N. Waldron, W.-
E. Wang, J. Dekoster, M. Caymax, M. Seefeldt, M.M. Heyns, J. Electrochem. Soc.
158 (6) (2011) H645–H650.
[12] G. Wang, M.R. Leys, N.D. Nguyen, R. Loo, G. Brammertz, O. Richard, H. Bender, J.
Dekoster, M. Meuris, M.M. Heyns, M. Caymax, J. Cryst. Growth 315 (2011) 32–
36.
[13] G.W. America, R. Srinivasan, S.V. Babu, in Chemical Mechanical Polishing–
Fundamentals and Challenges 1999.
[14] S.V. Babu, S. Danyluk, M. Krishnan, M. Tsujimura, Materials Research
Proceeding, vol. 14, Warrendale, Pennyslvania, 2000, PV 566.