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    Vlsi Lab 13 (Open Ended)

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    Frosty2 Leaf
    The document describes an open-ended lab experiment to design a comparator circuit using logic gates. The circuit must output C if A > B, E if A < B, and D if A = B. The student is provided hints on using XOR and XNOR gates to compare voltages. The student's circuit design and timing diagram are shown, utilizing XOR, XNOR, and AND gates. In conclusion, the student notes the circuit implements a comparator logic equation and was designed and tested using Dsch simulation software with buttons as inputs and lights as outputs.

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    Vlsi Lab 13 (Open Ended)

    Uploaded by

    Frosty2 Leaf
    33 views5 pages
    The document describes an open-ended lab experiment to design a comparator circuit using logic gates. The circuit must output C if A > B, E if A < B, and D if A = B. The student is provided hints on using XOR and XNOR gates to compare voltages. The student's circuit design and timing diagram are shown, utilizing XOR, XNOR, and AND gates. In conclusion, the student notes the circuit implements a comparator logic equation and was designed and tested using Dsch simulation software with buttons as inputs and lights as outputs.

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    vlsi lab report

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    vlsi lab 13 (open ended)

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    The document describes an open-ended lab experiment to design a comparator circuit using logic gates. The circuit must output C if A > B, E if A < B, and D if A = B. The student is provided hints on using XOR and XNOR gates to compare voltages. The student's circuit design and timing diagram are shown, utilizing XOR, XNOR, and AND gates. In conclusion, the student notes the circuit implements a comparator logic equation and was designed and tested using Dsch simulation software with buttons as inputs and lights as outputs.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
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    33 views5 pages

    Vlsi Lab 13 (Open Ended)

    Uploaded by

    Frosty2 Leaf
    The document describes an open-ended lab experiment to design a comparator circuit using logic gates. The circuit must output C if A > B, E if A < B, and D if A = B. The student is provided hints on using XOR and XNOR gates to compare voltages. The student's circuit design and timing diagram are shown, utilizing XOR, XNOR, and AND gates. In conclusion, the student notes the circuit implements a comparator logic equation and was designed and tested using Dsch simulation software with buttons as inputs and lights as outputs.

    Copyright:

    © All Rights Reserved
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    of 5

    AIR UNIVERSITY

    DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING

    EXPERIMENT NO 13

    Lab Title: Open-Ended Lab

    Student Name: Hassan Riaz Khan Reg. No: 190382

    Objective: To design a comparator circuit of 2x4 Mux.

    LAB ASSESSMENT:

    Excellent Good Average Satisfactory Unsatisfactory


    Attributes
    (5) (4) (3) (2) (1)
    Ability to Conduct
    Experiment
    Ability to assimilate the
    results
    Effective use of lab
    equipment and follows the
    lab safety rules

    Total Marks: Obtained Marks:

    LAB REPORT ASSESSMENT:


    Excellent Good Average Satisfactory Unsatisfactory
    Attributes
    (5) (4) (3) (2) (1)

    Data presentation

    Experimental results

    Conclusion

    Total Marks: Obtained Marks:

    Date: Signature:
    OPEN ENDED LAB

    Tasks:
    Design a circuit using AND/OR/NOT/NAND gates with following characteristics:

    • if A > B then only C should be on.

    • if A < B then only E should be on.

    • if A = B then only D should be on.

    Note: There are more than one way through which you can solve this problem, cheating or
    copying cases will be dealt according to AU Policy.

    Hints:
    In electronics, X is a device that compares two voltages or currents and outputs a digital signal
    indicating which is larger. X consists of a specialized high-gain differential amplifier.
    They are commonly used in devices that measure and digitize analog signals, such as analog-
    digital convertors.

    This circuit can be implemented using XOR and XNOR gates connected with and gates.
    Circuit:

    When A is 1 and B is 0, C will be at output:

    When A is 0 and B is 1, E will be at output:


    When A is 0 and B is 0, D will be at output:

    When A is 1 and B is 1, D will be at output:


    Timing Diagram:

    Conclusion:
    In this lab, we have implemented a logic equation, which is essentially a comparator equation.
    We designed this using XOR and XNOR gates. When both inputs are the same, the output of the
    XNOR gate is 1. On the other hand, if either of the inputs is 1 (indicating that the first input is
    greater than the other, or vice versa), then one of the outputs of both AND gates of XOR is set to
    1. To construct this circuit, we utilized the Dsch software and employed buttons as inputs and
    lights as outputs.

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