SIMULATION OF A PHASE LOCK LOOP USING MATLAB SIMULINK

Introduction:
A phase-locked loop (PLL) is an electronic circuit used to synchronize the phase and
frequency of an input signal with respect to a reference signal. PLLs are commonly used in
communication systems, where the quality of the transmitted signal depends on its phase and
frequency accuracy.
Designing the PLL:
Components used: Three phase source, three phase voltage current measurement, Alpha Beta
Zero to dq0, abc to Alpha-Beta Zero, PID controller, integrator, Fcn, SUM, Constant, To and
From Blocks, powergui, scope, Demux and Mux.
The components were assembled in Simulink as shown below.
The three phase power source was set to a voltage of 400v and a frequency of 50Hz.

The three phase voltage current measurement was set to measure current only.
The abc to Alpha-Beta-Zero block performs a Clarke transform on a three-phase abc signal.
The Alpha-Beta-Zero to abc block performs an inverse Clarke transform on the αβ0 components.
The powergui block allows you to choose one of these methods to solve your
circuit: Continuous, which uses a variable-step solver from Simulink. Discretization of the
electrical system for a solution at fixed time steps. Continuous or discrete phasor solution.
The controller we used was the PI (proportional integral controller which help improve the
accuracy of the system to 100%.
The scope was used to observe the output wave forms at each stage.

The first step in designing a PLL is to select the loop filter. The loop filter is used to shape the
PLL's closed-loop response and to filter out any noise or jitter present in the input signal. In this
example, we will use a second-order low-pass filter as the loop filter.
Next, we need to design the phase detector. The phase detector compares the phase of the input
signal with the phase of the reference signal and generates a control voltage proportional to the
phase difference.
After that, we need to design the voltage-controlled oscillator (VCO). The VCO generates an
output signal whose frequency and phase can be controlled by an input voltage. In this example,
we will use an integrator-based VCO.
Once we have designed all the individual components of the PLL, we can combine them into a
complete system in MATLAB Simulink.

Simulation and Analysis:

After designing the complete system, we can simulate it in MATLAB Simulink to test its
performance. We can observe various parameters, such as input frequency, input amplitude,
noise level, and loop bandwidth, to evaluate the system's performance under different operating
conditions.
Below in the simulation of the input phase-phase voltage and time response

INPUT VOLTAGE TIME RESPONSE

We can also analyze the system's response using various performance metrics, such as phase
margin, gain margin, settling time, and overshoot. These metrics will help us ensure that the
system meets the desired specifications and is robust enough to tolerate variations in the input
signals and environment.
From the above time response curve, we can notice that the system is a second order with a fast
step response.
Vapha and the active component align in phase with each other as shown on the figure
below,with magnitude 1.
Also Vbeta and reactive component align are also in phase with magnitude 1 so are called unit
vectors
 ACTIVE AND VALPHA BETA AND VBETA

We can also observe that Vbeta abd Valpha have a 90degrees phase difference with magnitude
the same as original AC waveform as shown on the diagram below.

VBETA ABD VALPHA

Conclusion:
In this report, we have shown how to design a phase-locked loop using MATLAB Simulink. We
have discussed the various components of the PLL, such as the loop filter, phase detector, and
VCO, and how to combine them into a complete system. We have also demonstrated how to
simulate and analyze the system's performance using different simulation parameters and
metrics.