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Fadali-Steady-state Error and Error Constants
Fadali-Steady-state Error and Error Constants
EXAMPLE 3.9
Consider the block diagram of Figure 3.16 with the transfer functions
Kp 1
GðsÞ 5 ; Gd ðsÞ 5 ; CðzÞ 5 Kc
s11 s
Find the steady-state response of the system to an impulse disturbance of strength A.
Solution
We first evaluate
Kp A 1 1
GðsÞGd ðsÞDðsÞ 5 5 Kp A 2
sðs 1 1Þ s s11
1 2 e2T
GZAS ðzÞ 5 Kp
z 2 e2T
From (3.39), we obtain the sampled output
z z
Kp A 2
z 2 1 z 2 e2T
YðzÞ 5
1 2 e2T
1 1 Kc Kp 2T
z2e
To obtain the steady-state response, we use the final value theorem
yðNÞ 5 ðz21ÞYðzÞz51
Kp A
5
1 1 Kc Kp
Thus, as with analog systems, increasing the controller gain reduces the error due to the
disturbance. Equivalently, an analog amplifier before the point of disturbance injection
can increase the gain and reduce the output due to the disturbance and is less likely
to saturate the DAC. Note that it is simpler to apply the final value theorem without simpli-
fication because terms not involving (z 2 1) drop out.
system from which the nature of the error constant can be inferred. All results are
obtained by direct application of the final value theorem.
From Figure 3.14, the tracking error is given by
RðzÞ
EðzÞ 5
1 1 GZAS ðzÞCðzÞ
(3.40)
RðzÞ
5
1 1 LðzÞ
The limit exists if all (z 2 1) terms in the denominator cancel. This depends on
the reference input as well as on the loop gain.
To examine the effect of the loop gain on the limit, rewrite it in the form
NðzÞ
LðzÞ 5 ; n$0 (3.42)
ðz21Þn DðzÞ
where N(z) and D(z) are numerator and denominator polynomials, respectively,
with no unity roots. The following definition plays an important role in determin-
ing the steady-state error of unity feedback systems.
The loop gain of (3.42) has n poles at unity and is therefore type n. These
poles play the same role as poles at the origin for an s-domain transfer function
in determining the steady-state response of the system. Note that s-domain poles
at zero play the same role as z-domain poles at e0.
Substituting from (3.42) in the error expression (3.41) gives
ðz21Þn11 DðzÞRðzÞ
eðNÞ 5
zðNðzÞ1ðz21Þn DðzÞÞ z51
(3.43)
ðz21Þn11 Dð1ÞRðzÞ
5
Nð1Þ1ðz21Þn Dð1Þ z51
Next, we examine the effect of the reference input on the steady-state error.
3.9 Steady-state error and error constants 77
where Kv is the velocity error constant. The velocity error constant is thus given by
1
Kv 5 ðz21ÞLðzÞ (3.49)
T z51
78 CHAPTER 3 Modeling of Digital Control Systems
From (3.49), the velocity error constant is zero for type 0 systems, finite
for type 1 systems, and infinite for type 2 or higher systems. The corresponding
steady-state error is
8
>
>N; n50
<T
eðNÞ 5 ðz21ÞLðzÞ ; n 5 1 (3.50)
>
>
: z51
0 n$2
EXAMPLE 3.10
Find the steady-state position error for the digital position control system with unity feedback
and with the transfer functions
Kðz 1 aÞ Kc ðz 2 bÞ
GZAS ðzÞ 5 ; CðzÞ 5 ; 0 , a; b; c , 1
ðz 2 1Þðz 2 bÞ z2c
KKc ðz 1 aÞ
LðzÞ 5 CðzÞGZAS ðzÞ 5
ðz 2 1Þðz 2 cÞ
The system is type 1. Therefore, it has zero steady-state error for a sampled step input and
a finite steady-state error for a sampled ramp input given by
T T 12c
eðNÞ 5 5
ðz21ÞLðzÞz51 KKc 1 1 a
Clearly, the steady-state error is reduced by increasing the controller gain and is also
affected by the choice of controller pole and zero.