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    Bal-Ot, Chester Dave A. - Lab 3.2

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    Chester Dave Bal-ot
    The document describes the design and implementation of a 2-bit binary multiplier circuit. It includes: 1) A truth table showing the inputs and outputs of the circuit. 2) The use of Karnaugh maps and equations to optimize the circuit design. 3) A schematic diagram of the circuit design using AND and XOR gates. 4) Images of the circuit implementation in TinkerCAD showing the outputs for all possible 2-bit inputs. 5) A conclusion that binary multiplication is similar to decimal multiplication and that the circuit design can be expanded to more bits.

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    Bal-Ot, Chester Dave A. - Lab 3.2

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    Chester Dave Bal-ot
    2 views12 pages
    The document describes the design and implementation of a 2-bit binary multiplier circuit. It includes: 1) A truth table showing the inputs and outputs of the circuit. 2) The use of Karnaugh maps and equations to optimize the circuit design. 3) A schematic diagram of the circuit design using AND and XOR gates. 4) Images of the circuit implementation in TinkerCAD showing the outputs for all possible 2-bit inputs. 5) A conclusion that binary multiplication is similar to decimal multiplication and that the circuit design can be expanded to more bits.

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    Bal-ot, Chester Dave A._Lab 3.2

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    The document describes the design and implementation of a 2-bit binary multiplier circuit. It includes: 1) A truth table showing the inputs and outputs of the circuit. 2) The use of Karnaugh maps and equations to optimize the circuit design. 3) A schematic diagram of the circuit design using AND and XOR gates. 4) Images of the circuit implementation in TinkerCAD showing the outputs for all possible 2-bit inputs. 5) A conclusion that binary multiplication is similar to decimal multiplication and that the circuit design can be expanded to more bits.

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    2 views12 pages

    Bal-Ot, Chester Dave A. - Lab 3.2

    Uploaded by

    Chester Dave Bal-ot
    The document describes the design and implementation of a 2-bit binary multiplier circuit. It includes: 1) A truth table showing the inputs and outputs of the circuit. 2) The use of Karnaugh maps and equations to optimize the circuit design. 3) A schematic diagram of the circuit design using AND and XOR gates. 4) Images of the circuit implementation in TinkerCAD showing the outputs for all possible 2-bit inputs. 5) A conclusion that binary multiplication is similar to decimal multiplication and that the circuit design can be expanded to more bits.

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    Republic of the Philippines

    BATANGAS STATE UNIVERSITY


    BatStateUAlangilan
    Alangilan, Batangas City
    College of Engineering, Architecture and Fine Arts
    https://batstate-u.edu.ph/, Tel. No. (043) 425-0139 loc. 118/2121

    Laboratory 3.2

    Designing a Combinational Circuits

    Name:Chester Dave A. Bal-ot


    Section: BSEE-3108

    Objectives:
    • Create and simulate a 2-bit multiplier design using basic gates.
    • Implement the design using TinkerCAD

    Materials:
    • Power Supply
    • Breadboard
    • LED lights x4
    • 220Ω Resistor x4
    • DIP Switch SPST x 4
    • Integrated Circuit
    - Quad AND Gate x 2
    - Quad XOR Gate x1

    Design:

    I. TRUTH TABLE

    INPUTS OUTPUTS
    A1 A0 B1 B0 P0 P1 P2 P3
    0 0 0 0 0 0 0 0
    0 0 0 1 0 0 0 0
    0 0 1 0 0 0 0 0
    0 0 1 1 0 0 0 0
    0 1 0 0 0 0 0 0
    0 1 0 1 0 0 0 1
    0 1 1 0 0 0 1 0
    0 1 1 1 0 0 1 1
    1 0 0 0 0 0 0 0
    1 0 0 1 0 0 1 0
    1 0 1 0 0 1 0 0
    1 0 1 1 0 1 1 0
    1 1 0 0 0 0 0 0
    1 1 0 1 0 0 1 1
    1 1 1 0 0 1 1 0
    1 1 1 1 1 0 0 1
    Republic of the Philippines
    BATANGAS STATE UNIVERSITY
    BatStateUAlangilan
    Alangilan, Batangas City
    College of Engineering, Architecture and Fine Arts
    https://batstate-u.edu.ph/, Tel. No. (043) 425-0139 loc. 118/2121

    II. KARNAUGH MAP & EQUATIONS


    Republic of the Philippines
    BATANGAS STATE UNIVERSITY
    BatStateUAlangilan
    Alangilan, Batangas City
    College of Engineering, Architecture and Fine Arts
    https://batstate-u.edu.ph/, Tel. No. (043) 425-0139 loc. 118/2121

    III. CIRCUIT DESIGN

    FIGURE: The schematic diagram for the 2-BIT BINARY MULTIPLIER CIRCUIT.
    Republic of the Philippines
    BATANGAS STATE UNIVERSITY
    BatStateUAlangilan
    Alangilan, Batangas City
    College of Engineering, Architecture and Fine Arts
    https://batstate-u.edu.ph/, Tel. No. (043) 425-0139 loc. 118/2121

    IV. IMPLEMENTATION:

    FIGURE : 2-BIT BINARY MULTIPLIER CIRCUIT

    0000 INPUT

    0001 INPUT
    Republic of the Philippines
    BATANGAS STATE UNIVERSITY
    BatStateUAlangilan
    Alangilan, Batangas City
    College of Engineering, Architecture and Fine Arts
    https://batstate-u.edu.ph/, Tel. No. (043) 425-0139 loc. 118/2121

    0010 INPUT

    0011 INPUT
    Republic of the Philippines
    BATANGAS STATE UNIVERSITY
    BatStateUAlangilan
    Alangilan, Batangas City
    College of Engineering, Architecture and Fine Arts
    https://batstate-u.edu.ph/, Tel. No. (043) 425-0139 loc. 118/2121

    0100 INPUT

    0101 INPUT
    Republic of the Philippines
    BATANGAS STATE UNIVERSITY
    BatStateUAlangilan
    Alangilan, Batangas City
    College of Engineering, Architecture and Fine Arts
    https://batstate-u.edu.ph/, Tel. No. (043) 425-0139 loc. 118/2121

    0110 INPUT

    0111 INPUT
    Republic of the Philippines
    BATANGAS STATE UNIVERSITY
    BatStateUAlangilan
    Alangilan, Batangas City
    College of Engineering, Architecture and Fine Arts
    https://batstate-u.edu.ph/, Tel. No. (043) 425-0139 loc. 118/2121

    1000 INPUT

    1001 INPUT
    Republic of the Philippines
    BATANGAS STATE UNIVERSITY
    BatStateUAlangilan
    Alangilan, Batangas City
    College of Engineering, Architecture and Fine Arts
    https://batstate-u.edu.ph/, Tel. No. (043) 425-0139 loc. 118/2121

    1010 INPUT

    1011 INPUT
    Republic of the Philippines
    BATANGAS STATE UNIVERSITY
    BatStateUAlangilan
    Alangilan, Batangas City
    College of Engineering, Architecture and Fine Arts
    https://batstate-u.edu.ph/, Tel. No. (043) 425-0139 loc. 118/2121

    1100 INPUT

    1101 INPUT
    Republic of the Philippines
    BATANGAS STATE UNIVERSITY
    BatStateUAlangilan
    Alangilan, Batangas City
    College of Engineering, Architecture and Fine Arts
    https://batstate-u.edu.ph/, Tel. No. (043) 425-0139 loc. 118/2121

    1110 INPUT

    1111 INPUT
    V

    An example of a 2-BIT BINARY MULTIPLIER CIRCUIT with inputs 1111 gives an


    output of 1001 respectively.
    Republic of the Philippines
    BATANGAS STATE UNIVERSITY
    BatStateUAlangilan
    Alangilan, Batangas City
    College of Engineering, Architecture and Fine Arts
    https://batstate-u.edu.ph/, Tel. No. (043) 425-0139 loc. 118/2121

    V. FINDINGS AND CONCLUSION:

    A binary multiplier is a virtual circuit that multiplies binary values and produces a bring about
    virtual electronics. Students train multiplication of decimals through calculating, shifting, and
    including partial products, that's much like the manner used to multiply binary values.
    Multiplying binary numbers is executed in a comparable way. Long multipliers multiply through
    zero or 1, making decimal multiplication an awful lot less complicated due to the fact the made
    of zero and 1 equals zero or the identical number, respectively. For the fact table, I indexed all
    the values from the simulation (see video below) in conjunction with the corresponding outputs.
    Karnaugh maps and equations can then be created primarily based totally at the circuit and
    simulation designs. The fabric used withinside the TinkerCAD simulation circuit become applied
    to layout the circuit. The simulation is a bit difficult to complete, however in case you apprehend
    the labels and different connections, you may be OK. Because the AND and XOR Gates
    multiply and multiply to every gate they enter, output may be controlled. Conclusion: Depending
    at the circuit, there are reputable outputs including 3-bit, 4-bit, and so on. As a result, the better
    the bit, the greater gates and outputs are produced.

    IV. VIDEO SIMULATION LINK:

    https://drive.google.com/file/d/1vIt3POhaaSEUos5Pf7H6h0srXSzjPb8F/view?usp=sharing

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