HW SW Codesign WiSe 2223 IC

You might also like

Download as pdf or txt
Download as pdf or txt
You are on page 1of 19

Hardware-Software-Codesign

Prof. Dr. Chmielewski / Prof. Dr.


HW-SW-Codesign 2022-22 page 1
Brutscheck
1. Basic Knowledge
2. Number and Codes
- Conversion from / into dual numbers
- Positiv / negative number

Exercises
DT1: Which value Zdec has the decimal number with the given digits c0=9, c1=3,
c3=1?
DT 2: Which value Zdec has the octal number 247octal ?
DT 3: Which value Zdec has the binary number 1010110101110101 b ?
DT 4: Which is the minimal and maximal value of a 12 bit binary number?
DT 5: Which binary number ist equal to decimal value 238 dec ?
DT 6: Add the binary number 10010111b und 10101011b

Prof. Dr. Chmielewski / Prof. Dr.


HW-SW-Codesign 2022-23 page 2
Brutscheck
1. Basic Knowledge
3. Calculating switching functions / Minimisation
- Rules
- Normal forms
- Graphical and mathematical minimization

Exercises
DT7: Simplify the following switching functions (using mathematical
minimisation). Draw the circuit of each function!

ya  x2  x1  x0    x2  x1  x0 
yb  x2  x1  x0    x2  x1  x0    x2  x1  x0    x2  x1  x0 

Prof. Dr. Chmielewski / Prof. Dr.


HW-SW-Codesign 2022-23 page 3
Brutscheck
1. Basic Knowledge
DT8: The adjacent truth table is given.
- Show the disjunctive und conjunctive normal form.
- Draw the Karnaugh diagram.
- Determine the minimised switching function.

Prof. Dr. Chmielewski / Prof. Dr.


HW-SW-Codesign 2022-23 page 4
Brutscheck
1. Basic Knowledge
DT10: The Karnaugh diagrams are given. Show the minimised equation in
disjunctive and conjunctive form. Highlight the appropriate blocks.

Prof. Dr. Chmielewski / Prof. Dr.


HW-SW-Codesign 2022-23 page 5
Brutscheck
2. VHDL-Tutorial
Combinational logic design – Component Instantiations

Exercise:
A 2-to-1-Multiplexer (MUX) should be designed using
different components (figure on the right).

Draw the structure of the 2-to-1-MUX using AND, OR and


NOT gates.

Prof. Dr. Chmielewski / Prof. Dr.


HW-SW-Codesign 2022-23 page 6
Brutscheck
1. Basic Knowledge
4. Typical combinational logic (MUX, DEMUX, BCD-to-Decimal-Converter,
Adder, Comparator etc.)
- Control, selective
- Code converter
- Arithmetic function
DT 11: A switching function f(a2, a1, a0) is given, can be seen in the following truth
table and should be realised with the shown multiplexer. Investigate the wiring
of the inputs Ii und xi of the multiplexer.
a2 a1 a0 f

0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 1
Prof. Dr. Chmielewski / Prof. Dr.
HW-SW-Codesign 2022-23 page 7
Brutscheck
1. Basic Knowledge
DT12: Investigate a code converter from octal code into Gray code. The inputs x2,
x1, x0 and the outputs
y2, y1, y0 are given.

x2 x1 x0 y2 y1 y0
0 0 0 0 0 0
0 0 1 0 0 1
0 1 0 0 1 1
0 1 1 0 1 0
1 0 0 1 1 0
1 0 1 1 1 1
1 1 0 1 0 1
1 1 1 1 0 0

Prof. Dr. Chmielewski / Prof. Dr.


HW-SW-Codesign 2022-23 page 8
Brutscheck
1. Basic Knowledge
5. Sequential logic (D-FF, JK-FF etc.)
DT13:
Complete the following truth table for static (not clocked) RS-Fliflop, JK-Flipflop
and D-Flipflop

DT14:
Complete the timing diagram for the output Q of a RS-Flipflop.

Prof. Dr. Chmielewski / Prof. Dr.


HW-SW-Codesign 2022-23 page 9
Brutscheck
1. Basic Knowledge
DT15:
Complete the timing diagram of the output Q for a clocked D-Latch (clock is active
for H-level).

DT16:
Complete the timing diagram of the output Q for a rising edge driven D-Flipflop.

Prof. Dr. Chmielewski / Prof. Dr.


HW-SW-Codesign 2022-23 page 10
Brutscheck
1. Basic Knowledge
DT17:
Complete the timing diagram of the output Q for a clock edge driven JK-Master-
Slave-Flipflop (master clock is active for 0/1-transistion, output is delayed at 1/0-
transition).

DT18:
Draw the symbols of exercises DT14 to DT17.

Prof. Dr. Chmielewski / Prof. Dr.


HW-SW-Codesign 2022-23 page 11
Brutscheck
1. Basic Knowledge
Field effect transistor, CMOS-inverter, Tristate

A1: Determine the logic function y = f (x4, x3, x2, x1, x0) which is represented by the
following circuit (positive logic).

Prof. Dr. Chmielewski / Prof. Dr.


HW-SW-Codesign 2022-23 page 12
Brutscheck
1. Basic Knowledge
A2: Investigate the logic function y = f (x1, x0) which is reprented by the following
circuit (positive logic).

Prof. Dr. Chmielewski / Prof. Dr.


HW-SW-Codesign 2022-23 page 13
Brutscheck
1. Basic Knowledge
A3: Draw a CMOS-NAND with 3 inputs.
A4: Draw a CMOS-NOR with 3 inputs.

Prof. Dr. Chmielewski / Prof. Dr.


HW-SW-Codesign 2022-23 page 14
Brutscheck
1. Basic Knowledge
Moore, Mealey, state diagram, output
function
x
A12:
Determine a sequential circuit using D-Flipflops,
which is represented by the following state
0 1
diagram. x m
The given states 0 to 3 should correspond to m
i r
dual coded outputs (21/20) of the flipflops e

imm
x
Q1/Q0

er
The input signal X controls the transition of the
state to to the following clock.
x
3 2
a) Determine the table of automaton Z = f(Z, +

X).
b) Draw the K-diagrams for the flipflop
(Q1+/Q0+).
c) Determine the minimised equatoions D = Q+
= f (Q, X). Prof. Dr. Chmielewski / Prof. Dr.
HW-SW-Codesign 2022-23 page 15
Brutscheck
1. Basic Knowledge
PAL, PLA, PROM, GAL

A6:
Three boolean function
f0, f1 and f2 should be implemented
into a PLA. Highlight the connections
using the following drawing.

f0  x0 ,x1 ,x2 ,x3  x0x3  x0 x1x2x3


f1  x0 ,x1 ,x2 ,x3  x0x1 x2x3  x0x1x2x3  x0 x1x2x3


f2  x0 ,x1 ,x2 ,x3    x0  x1  x2  x2  x3  x0  x2  x3  
Prof. Dr. Chmielewski / Prof. Dr.
HW-SW-Codesign 2022-23 page 16
Brutscheck
1. Basic Knowledge
A7: The two boolean functions f0 and f1 should be implemented into a PAL. Highlight
the connections using the following drawing.

f0  x0 ,x1 ,x2 ,x3  x0 x1 x2 x3  x0x1 x2 x3  x0 x1 x2 x3  x0x1 x2x3  x0 x1x2x3  x0x1x2x3


f1  x0 ,x1 ,x2 ,x3  x0 x1 x2 x3  x0x1 x2x3  x0 x1x2x3  x0x1x2 x3

Prof. Dr. Chmielewski / Prof. Dr.


HW-SW-Codesign 2022-23 page 17
Brutscheck
1. Basic Knowledge
C1: Which basic components are needed for a microcontroller and how they are
interacting to each other?

C2: Which different sources of Resets are known to you and how they are working?

C3: What is the function of a timer in a microcontroller? Please give 2 application


examples.

C4: What is the result of the following arithmetic operation?


x = (5 << 2) & 3 & 0x00

Prof. Dr. Chmielewski / Prof. Dr.


HW-SW-Codesign 2022-23 page 18
Brutscheck
1. Basic Knowledge
C5: What is the function and the result of the following C-Program?

Which problem may happen?

Prof. Dr. Chmielewski / Prof. Dr.


HW-SW-Codesign 2022-23 page 19
Brutscheck

You might also like