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Full Soft-Switching Ultra-High Gain DC/DC

Converter Using Three-Winding Coupled-Inductor


Sara Hasanpour Mojtaba Forouzesh Yam P. Siwakoti
Department of Electrical Engineering, Department of Electrical and Computer Faculty of Engineering and Information
2021 12th Power Electronics, Drive Systems, and Technologies Conference (PEDSTC) | 978-1-6654-0366-5/20/$31.00 ©2021 IEEE | DOI: 10.1109/PEDSTC52094.2021.9405852

Ramsar Branch, Islamic Azad Engineering Technology


University, Queen’s University University of Technology Sydney
Ramsar, Iran Kingston, Canada Sydney, Australia
hassanpour.58.sh@gmail.com m.forouzesh@queensu.ca yam.siwakoti@uts.edu.au

Abstract— This paper presents a new type of non-isolated In recent years, to improve the performance of the step-
single-switch step-up DC/DC converter with continuous input up converters in a simple and effective way, Coupled-
current, low voltage stress, and soft-switching performance, and Inductors (CI) are also broadly employed. In these
modular scalability. To achieve an ultra-high voltage gain converters, by adjusting the winding turn’s ratio of the CI, a
without a large duty cycle, a Three-Winding Coupled-Inductor
wider range of voltage gain can be achieved [6]. However,
(TWCI) along with a unit of Voltage Multiplier Cell (VMC) and
Voltage Multiplier Rectifier (VMR) are employed. The energy the voltage spike over the active switching devices in CI-
stored in the leakage inductor is recycled by a regenerative based topologies can be limited using an active or passive
clamp capacitor, limiting the maximum voltage stress across the clamp circuit [7-8]. It is noteworthy that the highest gain
single power switch. Besides, Zero Current Switching (ZCS) at converters usually suffer from low conversion efficiency,
the turn-on time of the power switch is achieved, and by which is caused by high voltage spikes, hard-switching
applying a Quasi-Resonance (QR) operation, the switch turn-off performance, and diode reverse recovery issues. To
current is also reduced significantly. With the help of the overcome these problems, utilizing the resonant tank in these
leakage inductor of the TWCI, all diodes can operate under the circuits can be more profitable [7 and 9].
ZCS condition, which eliminates the reverse recovery losses in
In many recent research studies, the main focus has been
the proposed converter. Therefore, the introduced circuit can
provide an ultra-high voltage gain under high efficiency. on proposing modified DC-DC structures of step-up
Steady-state analysis, comprehensive comparisons with other converters based on CI with soft-switching performance. In
related converters, and design considerations are discussed. the CI-based step-up converters presented in [10-15], using
Finally, a 160 W sample prototype with 200 V output voltage is VMs analog with CI, high voltage conversion is obtained.
implemented to justify the theoretical analysis's correctness. Even though the full soft-switching operation for all
switching components, these converters suffer from high
Keywords— step-up DC-DC converters, Three-Winding input current ripple, which limits their applications. Several
Coupled-Inductor, ZCS performance, voltage multiplier types of single-switch high-gain converters with a
I. INTRODUCTION regenerative lossless passive clamp circuit are suggested in
[16-22]. In these converters, the CI's leakage inductor helps
High step-up DC/DC converters with high voltage gain to create a QR performance along with soft-switching
ratio play an essential role in many applications such as operation without any additional auxiliary components,
renewable energy sources (fuel cells, photovoltaic), electric which leads to significant alleviation of the switching power
traction, automobiles, street lighting, and some medical losses and the reverse recovery problem. However, the
equipment. In these sorts of applications, step-up converters mentioned converters cannot be capable of providing a wide
act as an interfacing circuit to convert the low input DC range of voltage gain. A semi-quadratic step-up DC-DC
voltage (typically <50 V) to the desired high output DC converter based on the cascading connection of boost and
voltage. There are some critical requirements to have an buck-boost is presented in [23]. Although this converter can
appropriate performance for the mentioned applications, such offer an ultra-high voltage gain, the use of two active
as high voltage conversion ratio, low voltage stress, high switches without leveraging a soft-switching performance is
efficiency, and continuous input current [1-2]. the main downside of this converter. Moreover, a zero-
Theoretically, the traditional boost converter is capable of voltage-transition high step-up DC/DC converter with
providing a high voltage gain. However, in practice, because continuous input current is presented in [24]. However, the
of the voltage gain ratio limitation, even extremely large duty use of two switches with different pulse gate is the main
cycles cannot help achieve a high voltage gain due to the demerit of this converter. In [25-27], using a Three Winding
increased power loss. This specifically leads to a dramatic CI (TWCI), a wider range of voltage gain can be achieved by
increase in switching power dissipations and output diode adjusting the secondary and tertiary windings turn ratios. In
reverse recovery issues, which force the practical conversion these converters, with the help of a regenerative clamp
gain to be limited (e.g. lower than 5) [3]. Due to these circuit, the leakage energy of the TWCI is recycled.
drawbacks, the investigation of modified converters with Moreover, the leakage inductor helps to alleviate the reverse
improved key performance indicators is necessary. To recovery loss of the converters. Nevertheless, despite the high
achieve high voltage gain without increasing the large duty voltage gain in these converters, the resonance performance
ratio, some voltage boosting techniques such as voltage lift, is not appropriately implemented to further improve the
Voltage Multiplier (VM) cells, switched-capacitors or efficiency.
switched-inductors, and also combining different techniques A new structure of full soft-switching ultra-high gain
have been studied [2 - 5]. DC/DC converter based on TWCI with high efficiency is

978-1-6654-0366-5/21/$31.00 ©2021 IEEE

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proposed in this paper to solve the problems mentioned
above. The outstanding advantages of the suggested topology
are high voltage gain, continuous input current with low
ripple, and low voltage stress along with full soft-switching
performance for all switching devices as well as modular
scalability. Using VMR and VMC units as a modular
structure and TWCI allows the presented circuit to reach an
ultra-high voltage conversion ratio without needing high
turn’s ratios of TWCI, which leads to reduced magnetic
component size. In addition to the ZCS condition, employing Fig. 1. The proposed DC-DC converter.
a QR performance alleviate the switching and reverse
recovery power losses significantly.
This paper is organized as follows: the proposed circuit
configuration and its steady-state analysis are described in
Sections II and III. Performance comparison of the proposed
converter and other topologies is given in Section IV. Section
V provides design considerations. The experimental results of
a sample prototype are shown in section VI. Finally, the
conclusions are presented in Section VII.
II. CIRCUIT DESCRIPTION OF THE PROPOSED CONVERTER
The proposed converter is shown in Fig. 1. This converter
is comprised of a TWCI, a single power switch (S), an input
inductor (Lin), a VMR (D1, D2, C1, C2, and N2), and a VMC
(D3, D4, C4, C5, and N3). The turn numbers of the primary,
secondary, and tertiary of the TWCI are N1: N2: N3,
respectively. Combining two types of voltage multipliers,
including VMC and VMR, made the proposed converter
capable of increasing the voltage gain by adjusting the
respective turn ratios of the TWCI. In this converter, to
further enhance the voltage gain capability while reducing the
component voltage stresses, more units of VMR and VMC
can be placed in the circuit as a modular structure. However,
for easier analysis, a single unit of VMs is considered in this
paper. Furthermore, the switch voltage stress is restrained by
a regenerative passive clamp capacitor Cc. In the proposed
circuit, due to applying a QR operation among Lk and the
middle capacitors, the current shapes of the switch and the Fig. 2. Typical waveforms of the proposed converter.
diodes D1, D2, D4, and Do change as a sinusoidal function,
which decreases the switch turn-off loss and eliminates the
diodes reverse recovery issue. To simplify the circuit
analysis, the following assumptions are made as:
1) The switching devices are seen as ideal.
2) All capacitors are large enough, so their voltages
are considered to be constant.
3) The TWCI is modeled as an ideal transformer with
a magnetizing inductor (LM) and a leakage inductor (Lk) with
the turn’s ratios of n21=N2/N1 and n31=N3/N1. (a)
Fig. 2 depicts the key waveforms of the proposed
converter, which are broken down into six operational modes.
The equivalent circuits for each operating mode are also
shown in Fig. 3 and Fig. 4.
Mode 1 [t0-t1]: At t=t0, the switch S begins to conduct
under ZCS condition. As shown in Fig. 3(a), Diode D3 is
conducting, and other diodes are in turn off state. In this
mode, Lin and Lm start to be charged from the input voltage
(Vin) and the capacitor C1, respectively. Thus, their current
increase linearly. Because of the leakage inductor on the
secondary side of the TWCI, the diode D3 turns off with a (b)
slow slip, with minimum reverse recovery loss. Fig. 3. The operation modes of the converter, (a) Mode 1, (b) Mode 2.
Mode 2 [t1-t2]: In this mode, the switch S remains on.
Moreover, at t=t1, the diodes D1, D2, and D4 began to turn on

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discharges Cc's energy. Because of this QR performance, the
switch S, diodes D1, D2, and D4, and also Lk changes in a
sinusoidal form. Consequently, the power switch’s current is
decreased in the minimum value at the end of this mode,
which alleviates its turn-off dissipation. The resonant
frequency of Mode 2 (fR2) is obtained as follows:
( ‖ )
= = . (1)

Where parameter γ and β are defined as:


(a) γ= + + + (2)
β= + (3)
As shown in Fig. 2, to reach the minimum turn-off loss
for the power switch, the resonant time (TR) should be less or
equal to the pulse width of the switch S ( ≤ . !" ). The

# $% = &'
following equations are given in this time:

# ( =# −# *
(4)

# = # += - # (
(5)

# . = # / − # − # − -+ # (
(6)

012 = 0' − 0 3 + 04.


(b) (7)
(8)
Mode 3 [t2-t3]: This mode begins when the current of the
diode D4 reaches zero naturally in sinusoidal form. The
capacitors C2 and C3 received energy from Lm. This transient
mode ended when the current passed through VMR’s diodes
(D1 and D2) decrease to zero under the ZCS.
Mode 4 [t3-t4]: In this transient mode, the switch S
remains on, while all diodes are turned off. According to Fig.
4 (b), the currents of Lk and Lm are identical. During this
mode, the capacitor C1 is charged from the capacitor Cc. The

01 = 0' − 0 (
(c)
power switch’s current is expressed as follows:
(9)
Mode 5 [t4-t5]: At the beginning of this mode, the power
switch S is turned off. The voltage stress on the single power
switch is restricted to a small value by conducting the clamp
LM

diode Dc. Also, the current of D3 and Do start to turn on at


N1

ZCS condition. Moreover, the capacitors Co and C5 start to


charge from the energy saved in Lin, Lm, C1, and C2.
LK

Consequently, iLin and iLM decrease linearly. At the end of this


mode, the current passed through the clamp diode Dc reaches
zero naturally with a low reverse recovery issue. The
following equations can be expressed in this mode:
# ' = &' −& *
(d)
(10)
#(= &5 (11)
& / =& 5 +& +& +& ++- # ( (12)
&6 = & / + & . + -+ # ( (13)
Mode 6 [t5-t6]: In this time interval, D3 and Do remain on.
The capacitors Co and C5 charge the same as the previous
mode. The QR performance between Lk and middle
capacitors of the proposed converter leads to a sinusoidal
increase in the output diode current.
Mode 7 [t5-t6]: At t5, Do turns off with a very low slope.
(e) The capacitor C3 receives energy from the magnetic devices
Fig. 4. The operation modes of the converter, (a) Mode 3, (b) Mode 4, along with C2 and C3, the same as Mode 6.
(c) Mode 5, (d) Mode 6, (e) Mode 7.
under ZCS condition. Lin and Lm received energy the same as III. STEADY-STATE PERFORMANCE ANALYSIS
the previous mode. Also, the capacitor C5 transfers its energy The voltages of Cc and C1 can be found by applying the
to C4. During this mode, a tank resonant, including Lk and volt-second law on Lin and Lm as follows:
middle capacitors, is created in the form of QR, which

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&5=
789
4
(14)
& =
4789
4
(15)
where D is the duty cycle of the switch S. By substituting (13)
and (14) into (5) and the use of (6), the voltage of the

& = & + = - &'


capacitors C2 and C3 is calculated as:
(16)
By substituting (14)-(16) into (12), the capacitor C5
voltage is calculated as:
&/=
:4: ( 4)
4
(17)
In respect to operating Mode II and using (7), (15), and Fig. 5. Voltage gain curves versus the duty cycle showing the behavior
of the voltage gain as a function of the duty cycle for several n21 and n31.
(16), the voltage of C4 is derived as:
&.=
: : ( 4) where M is the ideal voltage gain of the proposed converter.
4
(18)
From Mode 4, the switch current value in turn-off time along
Finally, substituting (14), (17)-(18) into (13), the voltage with the maximum stress current passing through Dc, which
gain of the proposed converter in CCM is obtained as: is decreased by the help of the QR, is obtained as:
; = =
7< :4: (+ 4):
012 = 04*_EFGH = (; − -21 + 1)A6
VW6XX
( 789 4
(19) (29)
From Equation (19), the voltage gain can be adjusted in a I. PERFORMANCE COMPARISON
wide range by adjusting three parameters including n31, and
n21, and D. Ideal voltage gains of the presented converter as a To verify the merits of the proposed converter, an
function of duty cycle and different values of n21 and n31 are analytical comparison is carried out with its non-isolated
depicted in Fig. 5. It can be seen that an ultra-high voltage counterparts, which is given in Table I.
conversion ratio can be achieved in low duty cycles by using Fig. 6 shows the voltage gain comparison of the converters
reasonable turn ratios for the TWCI. Due to the stronger referred to in Table II at turn ratios n21=1.5 and n31=0.5
effect of the secondary winding turn ratio on the voltage gain, (n=n21+n31=2). As can be seen, just the proposed converter
using a larger value of n21 (related to VMR) compared to n31 and converters in [24] and [5] can provide a higher voltage
(related to VMC) leads to less wire consumption in the gain than the other converters. However, the use of the two
TWCI. switches with different gate pulses and the use of more
A. Voltage and Current Stresses components are the main disadvantages of the converter in
[24]. Also, input current with large ripple limits the
From (14) and (19), the drain-source voltage across the applications of the converter [5]. From Fig. 7, the lower
switch S and the voltage stress across the diode Dc are voltage stress of the main switch of the proposed converter in
obtained as follows:
&41 = &4* = 89 =
7 7<
4 :4: (+ 4):
(20)
Besides, the maximum repetitive peak reverse voltage
across D1, D2, D3, D4, and Do are given as:
&4 = &4 = &6
: ( : ( 4))
( : )( :4: (+ 4): )
(21)
&4+ = &6
:
:4: (+ 4):
(22)
&4= = &4. = &6
: :
:4: (+ 4):
(23)
According to equations (20)-(23), the voltage stresses
across the semiconductor devices are lower than the output
voltage.
By applying the ampere-second balance law for the Fig. 6. The voltage gain comparison of the converters that are referred to in
Table I.

< 0 ( >= (- − 1)AB


capacitors, the average current value of Lm is given as:
(24)

0.5TR≈D.TS, the peak current of D1, D2, and D4 are estimated


Where Io represents the output load current. Assuming

as:
04 _EFGH = 04 _EFGH = 04.IJK = A6
4
(25)
Furthermore, the maximum current value of the diode Do
is given as:
04 _EFGH ≈ A6
. L
.( 4)
(26)
From (8), and (25), the current peak value of the power
switch is computed as follows:
01 (t) ≈ (; − - +1)A6 + (2- + -+ + 1) A6 sin(R S)
Fig. 7. Comparison of the normalized voltage stress across the main power
4
(27)
01_EFGH = [; − - + 1 + (2- + -+ + 1) A ]
switch of the converters that are referred to in Table I.

4 6
(28)

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TABLE I. PERFORMANCE COMPARISON OF THE PROPOSED CONVERTER WITH OTHER RELATED CONVERTERS.
No. of
Converter Soft-
Components Voltage Stress Reverse Eff.
Voltage Stress Switching
Voltage Gain L.I. on Main Power Recovery 100 W
Topology on Output Diodes (Switch)
C.R Switch Loss (60 kHz)
S/D/C/CI+L
4 + -(2 − ) − &6 (-(2 − ) − )&6
(1 − ) 4 + -(2 − ) − 4 + -(2 − ) −
[5] 1/8/8/12w +0 No - Medium 93.6%
(2 + )- &6 (- − 1)&6
(1 − ) (2 + )- (2 + )-
[14] 2/6/6/12W+0 No ZVS Very Low 96.8%
1 + 2-(1 − ) &6 2-(1 − )&6
(1 − ) 1 + 2-(1 − ) 1 + 2-(1 − )
[15] No
2/6/6/12W +1 ZVS+ZCS Very Low 97%
1 + + -(2 − ) &6 (1 + -)&6
(1 − ) 1+ + -(2 − ) 1+ + -(2 − )
[16] 1/4/5/12w +1 Yes ZCS+QR Very Low 97.0%
1 + -(1 + ) &6 (1 + -)&6
(1 − ) 1 + -(1 + ) 1 + -(1 + )
[17] 1/4/5/12w +1 Yes ZCS+QR Very Low 96.8%
2(1 + -) &6 1 + 2-(1 − )&6

(1 − ) 2(1 + -) 2(1 + -)
[18] 1/5/6/12w +1 Yes ZCS Low 96.4%
-+2 &6 (1 + -)&6
(1 − ) -+2 -+2
[19] 1/3/4/12w +1 Yes ZCS+QR Very Low 96.8%
- + -+ + 1 &6 (- + -+ )&6
(1 − ) - + -+ + 1 - + -+ + 1
Yes
[21] 1/5/6/13W +1 ZVS+ZCS Very Low 96.2%
2(- + -+ ) + 3 &6 (1 + -2 + -3)&\
(1 − ) 2(- + -+ ) + 3 2(-2 + -3) + 3
[24] 2/6/7/13W +1 Yes ZVT Low 96.1%
Proposed 2+ + - (3 − ) + -+ &6 (- + -+ + 1)&6 96.8%
(1 − ) 2+ + - (3 − ) − -+ 2 + + -2 (3 − ) − -3
1/6/7/13W +1 Yes ZCS+QR Very Low
Converter
S=Switch, D=Diode, C=Capacitor, CI =Coupled-Inductor, L=inductor, L.I.C.R= Low Input Current Ripple, Eff=Efficiency

comparison with other converters makes it possible to select improve the performance of the converter and further reduce
a switch with lower RDS(on), which reduces the conduction losses, values of these capacitors C1 and Cc are also calculated
losses. Moreover, the soft-switching operation for all as:
switching components of the proposed converter removes the
switching losses and improves the efficiency even in high i = !1
( ‖ )
(37)
switching frequencies.
IV. DESIGN PROCEDURE OF THE KEY ELEMENTS V. EXPERIMENTAL RESULTS
A. Input and Magnetizing Inductors Design To verify the theoretical analysis of the proposed topology,
The minimum value of Lin is designed to guarantee the a 160 W prototype is built and tested in the laboratory. The
CCM performance can be achieved as: parameters of the prototype circuit are summarized in Table
]' > 89
7 .4 II. Thanks to the low voltage stress across the single power
∆_89.XL
(30)
Where ∆A' and fs denote the allowable current ripple and
switch, a MOSFET with a very low RDS(on) (i.e. IRFP4310) is
chosen for the sample prototype.
switching frequency, respectively. Also, the magnetizing Fig. 8 (a) shows the input and the leakage inductors
inductor of the TWCI can be found as:
]( > `a
7 .4
current along with the output voltage in the time domain.
∆_`b .XL
(31) From this figure, the input current of the proposed converter
where ∆A ( is the allowable current ripple. It should be is continuous with an optimal current ripple. From Fig. 8 (b),
noted that considering a small value of ∆A ( increases wire the single power MOSFET turns on at ZCS condition with
consumption and ohmic loss. low voltage stress (VDS ≈ 40 V). Also, due to QR
performance, the switch turn-off current is reduced due to the
B. Capacitors Selection sinusoidal shape, which decreases the switching power loss.
To keep the output voltage in constant value, the output Regarding Fig.8 (c) and Fig. 9 (a)-(b), the ZCS condition at
capacitance can be found using the following equation: the turn-off moment can be realized in the current of all
c6 =
47<de
converter diodes, which removes the diode reverse recovery
` .∆7 < .XL
(32)
issue. Moreover, the peak reverse voltage across the diodes
where ΔVCo represents the maximum voltage ripple. The
D1&2, D3, D4, Dc, and Do are 40 V, 90 V, 110 V, and 110 V,
proper values of the capacitors C1-C5 and Co can be expressed
as follows: respectively, which are much lower than the output DC
c = `89
' .( f) voltage (250 V). Also, due to Do turns-on and turns-off with
∆7 .XL
(33) the low current slope (as a sinusoidal form), the DC output
c = c+ = g g<
(' :' )( f)
voltage is regulated without any voltage spike and noise at
∆7 .XL
(34)
c. = c/ = g
' (f) the switching transitions, which is another merit of the
∆7 .X
(35)
L proposed converter.
c* =
('`b :'g )( f) The measured efficiency of the proposed converter versus
∆7 h .XL
(36)
output variations at Vo= 250 V under different input voltages
Furthermore, regarding Mode II and equations (1)-(3), to

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20 V and 25 V is illustrated in Fig. 10. The overall efficiency
of the presented topology at full load condition (20 V / 250 V
and 160 W) is about 96.4%.
Table II: PARAMETERS OF PROTOTYPE SETUP.
Parameter Values
Output Power (Pout) 160 W
Input Voltage (Vin) 24 V
Output Voltage (Vout) 250 V
Switching Frequency (fs) 55 kHz
Capacitors C5, C2 and C3 47 µF / 250 V
Capacitors C4 4.7 µF / 250 V
Capacitors C1 47 µF / 160 V
Capacitor Cc 3.3 µF / 100 V
Capacitor Co 100 µF / 250 V
IRFP4310 / RDS(on)=5.6 mΩ
(a)
Power Switch
Input Inductors Lin 160 µH / T184-52
Magnetizing Inductor of the CL (Lm) 180 µH
Turn Ratios of the TWCI (N1:N2:N3) (24:24:12) / EE42/21/20
Merged Leakage Inductance LK 4.4 µH
Diodes Dc, D1 and D2 SR360 (VF (Max)=0.7 V)
Diodes D4 and D3 MUR420 (VF (Max)=0.88 V)

(b)
Fig. 9. Experimental results of the proposed topology, (a) diodes D4 and
Dc (b) diode D3

(a)

Fig. 10. Experimentally measured efficiencies versus output powers with


different input voltages.

From this figure, by decreasing the voltage gain from 10 to 8


at Vin=25 V, the maximum efficiency can be as high as
96.8%.
VI. CONCLUSION
This paper proposes a new high step-up full soft-
(b) switching DC-DC converter. An ultra-high voltage gain can
be achieved with the help of a three winding coupled inductor
along with a voltage multiplier. A regenerative passive clamp
capacitor reduces the voltage stress across the single power
switch and recycles the energy stored in the leakage inductor
of the TWCI. High efficiency, ultra-high voltage gain,
continuous input current with low ripple, low voltage
stresses, and soft-switching performance (ZCS along with
QR) for all switching devices (single power switch and
diodes) are the merits of the presented topology. In the
proposed converter, the three-wire structure of the converter
has led to the presence of series leakage inductors with diodes
in all modes, which has eliminated the problem of reverse
(c) recovery in all diodes. The steady-state analysis in CCM
Fig. 8. Experimental results of the proposed topology, (a) input and condition and the performance comparison with some other
leakage inductors current, (b) MOSFET S, and (c) diodes Do and D1&2. similar converters presented. The experimental results show
a good agreement with the theoretical analysis. All soft-
switching points of the components demonstrated in the

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experimental waveforms, which verified the high-power [20] M. Amirbande, K. Yari, M. Forouzesh and A. Baghramian, "A novel
single switch high gain DC-DC converter employing coupled inductor
conversion efficiency.
and diode capacitor," in IEEE Proc. Power Electronics and Drive
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