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    ZHANG Aoqian
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    This document provides solutions to three homework problems involving digital logic circuits: 1. It presents the truth tables and logic diagrams for a half subtractor and full subtractor. 2. It lists implementing a T flip-flop using a J-K flip-flop as the second problem. 3. The third problem involves realizing a logic function using only 2-input NAND gates, and drawing the circuit diagram. 4. The last problem is to draw a timing diagram.

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    This document provides solutions to three homework problems involving digital logic circuits: 1. It presents the truth tables and logic diagrams for a half subtractor and full subtractor. 2. It lists implementing a T flip-flop using a J-K flip-flop as the second problem. 3. The third problem involves realizing a logic function using only 2-input NAND gates, and drawing the circuit diagram. 4. The last problem is to draw a timing diagram.

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    14 views3 pages

    Homework3 Solutions

    Uploaded by

    ZHANG Aoqian
    This document provides solutions to three homework problems involving digital logic circuits: 1. It presents the truth tables and logic diagrams for a half subtractor and full subtractor. 2. It lists implementing a T flip-flop using a J-K flip-flop as the second problem. 3. The third problem involves realizing a logic function using only 2-input NAND gates, and drawing the circuit diagram. 4. The last problem is to draw a timing diagram.

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    Homework 3(SME102 – Assignment 5) Solutions

    1. Implement a binary subtractor. Draw out the truth table and design the
    logic circuit.

    A Half Subtractor:

    A B D Bout
    0 0 0 0
    0 1 1 1
    1 0 1 0
    1 1 0 0
    D= A ⨁ B
    Bout= A ' B

    A Full Subtractor:

    Bin: borrow in Bout: borrow out

    A B Bin D Bout
    0 0 0 0 0
    0 0 1 1 1

    0 1 0 1 1

    0 1 1 0 1

    1 0 0 1 0

    1 0 1 0 0

    1 1 0 0 0

    1 1 1 1 1
    D= A ⨁ B ⨁ B ¿
    '
    Bout= A ( B +B ¿ ) + B B¿

    2. Implement a T Flip-Flop using J-K Flip Flop.

    3. Show how you would realize the logic function:

    using only 2-input NAND gates. Draw a labeled circuit diagram.


    4. Draw the timing diagram:

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