Microprocessor and

Interfacing
Ch2_lec4_ I/0 Interface

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 Introduction to I/O Interface
 There are two different methods of interfacing I/O to the
microprocessor is:
 Isolated I/O
 Memory-mapped I/O.

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 Isolated I/O
 The most common I/O transfer technique used in the
Intel microprocessor.

 The term isolate describes how the I/O locations are

isolated from the memory system in a separate I/O
address space.

 The addresses for isolated I/O devices, called ports.

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 Memory Mapped I/0
 Unlike isolated I/O, memory-mapped I/O does not use
the IN, INS, OUT, and OUTS instructions. Instead, it uses
any instruction that transfers data between the
microprocessor and memory.

 A memory-mapped I/ O device is treated as a memory

location in the memory map.

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Types of I/O Interfacing
Isolated I/O Memory Mapped I/O

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 Basic Input Characteristics
 The basic input device is a set of three-state buffer.

 When the microprocessor executes an IN instruction,

the I/O port address is decoded to generate the logic 0
on SEL .

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Basic Input Characteristics

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 Basic Output Characteristics
 The basic output interface receives data from the
microprocessor and must usually hold it for some
external device.

 When the OUT instruction executes, the data from AL or

AX are transferred to the latch via the data bus.

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Basic Output Characteristics

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The Programmable Peripheral Input-
Output Port (8255)
 The programmable peripheral input-output port (8255)
is designed for use with Intel's 8-bit, 16-bit and higher
capability microprocessor.
 It has 24 input/output lines which may be individually
programmed in two groups of twelve lines each, or
three groups of eight lines.
 The two groups of I/O pins are named as Group A and
Group B.

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The Programmable Peripheral Input-
Output Port (8255)
 Group A contains an 8-bit port A along with a 4-bit port
C upper.
 Group B contains an 8-bit port B and a 4-bit port C
lower.
 The port C upper and port C lower can be used in
combination as an 8-bit port C.
 The 8-bits data bus buffer is controlled by the
read/write control logic.

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8255 Internal Architecture

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 8255 Internal Architecture
 PA7 – PA0: These are eight port A lines that act as
either latched output or buffered input lines depending
upon the control word loaded into the control word
register.
 PC7 – PC4: They may act as either output latches or
input buffers lines. This port can also be used for
generation of handshake lines in mode1 or mode2.
 PC3 – PC0: They may act as either output latches or
input buffers lines. This port can also be used for
generation of handshake lines in model or mode 2.

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 8255 Internal Architecture
 PB7 – PB0: These are eight port B lines that act as
either latched output or buffered input lines depending
upon the control word loaded into the control word
register.
RD: This is the input line driven by the microprocessor
and should be low to indicate read operation, to 8255.
WR: This is the input line driven by the microprocessor.
A low on this line indicates write operation.

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 8255 Internal Architecture
 CS: This is a chip select line. If this line goes low, it
enables the 8255 to respond to RD and WR signals,
otherwise RD and WR signals are neglected.
 A1 – A0: These are the address input lines and driven
by the microprocessor.
 D7 – D0: These are the data bus lines which can carry
data or control word to/from the microprocessor.
 RESET: A logic high on this line clears the control word
register of 8255. All ports are set as input ports by
default after reset.
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 8255 Internal Architecture
 These lines (A1 - A0) with RD , WR and CS form the
following operations for 8255.

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 Mode of Operation of 8255
 There are two modes of operation of 8255:-
 Bit Set-Reset mode (BSR).
 I/O mode

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 Bit Set-Reset Mode (BSR)
 In BSR mode only port C (PC0 - PC7) can be used to
set or reset its individual port bits, and BSR does not
affect the function of port A and port B.

 Bit B7 of the CWR is set to zero to make 8255

function in a BSR mode

 Any of the 8-bits of port C can be set or reset

depending on B0 of the control word.

 The bit to be set or reset is selected by bit select

flags B3, B2, and B1 Kassahun
of the CWR.
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Bit Set-Reset Mode (BSR)

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 I/O - Mode
 Under the I/O mode of operation, further there are
three modes of operation of 8255 so as to support
different applications:-
✗
Mode 0
✗
Mode 1
✗
Mode 2.

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 Mode 0 (Basic I/O Mode)
 This mode provides simple input and output
capability using each of the three ports.
 Data can simply be read from and written to the
input and output ports respectively, after
appropriate initialization.

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 Mode 0 (Basic I/O Mode)
 The salient features of this mode are:-
✗
Two B-bit ports (port A and port B) and two 4-bit
ports (port C upper and lower) are available. The
two 4-bit ports can be combined and used as a
third 8-bit port.
✗
Any port can be used as an input or output port.
✗
Output ports are latched. Input ports are not
latched (bits do not wait until the next clock
cycle ).
✗
Ports do not have handshake interrupt capability
 All these modes can be selected by programming a
register internal to 8255, known as control word
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register (CWR).
 Mode 1
 The salient features of this mode are:-
✗
Handshake signals are exchanged between the
microprocessor and peripherals for data transfer.

✗
Port A and Port B function as 8-bit I/O Ports

✗
Each port (A and B) uses 3 lines from Port C as
handshake signals; the remaining lines can be
used for I/O functions

✗
I/P and O/P data are latched
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✗
Interrupt logic is supported
 Mode 2
 The salient features of this mode are:-
✗
It is used to transfer between two computers or
disks

✗
PORT A: bidirectional port

✗
PORT B: either in mode 0 or mode 1

✗
PORT A uses 5 signals from port C as handshake
signals; remaining 3 lines can be used as simple
I/O or handshake signals for PORT B.
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Control Word Register Format

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 Example
 Interface an 8255 with 8086 to work as an I/O port.
Initialize port A as output port, port B as an input port,
and port C as output port. Port A address should be 07
40H.
 Write a program to sense switch positions SWO - SW7
connected at Port B. The sensed pattern is to be
displayed on port A, to which 8 LEDs are connected,
while the port C lower displays number of switches out
of the total eight switches.

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Example

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Example

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 Example
MOV DX, 0746H YY: ROL AL
MOV AL, 82H JNC XX
OUT DX, AL INC BL
SUB DX, 0004H XX: DEC CH
IN AL, DX JNZ YY
SUB DX, 0002H MOV AL, BL
OUT DX, AL ADD DX, 0004H
MOV BL, 00H OUT DX, AL
MOV CH, 08H HLT
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 Exercise
 Write a program to accept an input 8-bit data from
port number 125H and store the data to memory
address of 51000H.

 Solution:
MOV DX, 125H
IN AL, DX
MOV BX, 5000H
MOV DS, BX
MOV [1000H], AL Kassahun Tamir 30
 Exercise
 Write a program to display an output 16-bit data to
port number 25H from a memory address of
51000H.

 Solution:
MOV AX, 5000H
MOV DS, AX
MOV AX, [1000H]
MOV DX, 25H
OUT DX, AX Kassahun Tamir 31
Questions?

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