Class-E LCCL for Capacitive Power Transfer

System
Yusmarnita Yusop Huzaimah Husin
Faculty of Electronics & Computer Engineering Faculty of Electronics & Computer Engineering
Universiti Teknikal Malaysia Melaka Universiti Teknikal Malaysia Melaka
Melaka, Malaysia Melaka, Malaysia
yusmarnita@utem.edu.my huzaimah@utem.edu.my

Shakir Saat Sing Kiong Nguang

Faculty of Electronics & Computer Engineering Department of Electrical & Computer Engineering
Universiti Teknikal Malaysia Melaka The University of Auckland
Melaka, Malaysia New Zealand
shakir@utem.edu.my sk.nguang@auckland.ac.nz

Zamre Ghani
Faculty of Electronics & Computer Engineering
Universiti Teknikal Malaysia Melaka
Melaka, Malaysia
zamre@utem.edu.my

Abstract—This paper presented the design of a capacitive in linear or/and rotating modes, which gives rise to flexibility,
power transfer (CPT) system by implementing a Class-E mobility, and safety for the supplying loads. Thereafter, the
inverter due to its high efficiency, which in theory can reach high frequency AC energy is safely converted by the AC-to-
close to 100% performance. However, the Class-E inverter is DC converter to meet the requirements stated by the load
highly sensitive to its circuit parameters under the scenario of
having small capacitance at the coupling plate. As a solution, an
parameters, and predominantly a diode rectifier with
additional capacitor can be integrated into the Class-E inverter capacitive filter will be used as the AC-to-DC converter.
for increased coupling capacitance for a better performance.
TRANSMITTER UNIT RECEIVER UNIT
Both simulation and experimental investigations were carried
out to verify the high efficiency CPT system based on Class-E
inverter with additional capacitor. The outcome of the DC Resonant Power Rectifier
investigation exhibited 96% of overall DC-DC power transfer Power Converter Load
(ac/dc)
efficiency with 0.97 W output at 1MHz operating frequency. Supply (dc/ac)

Keywords—Class-E Inverter, Zero Voltage Switching (ZVS),

Energy
Capacitive Power Transfer
Medium Transfer

Fig. 1. Block Diagram of WPT System

I. INTRODUCTION The popular technique to achieve WPT are based on

In the recent years, there has been an increasing interest in
the development of wireless power transfer (WPT)
technology [1],[2] and [3], where the application is to transfer
power from a source to a load without any ohmic contact, in
other word, without any direct contact. Figure 1 illustrates the
basic building blocks of a WPT system, where the blocks
consisted of primary side DC-to-AC resonant power
converter that converts DC into high frequency AC energy.
Following that, the AC energy is transferred to the secondary
side receiver via the energy medium transfer. It is important
to know that the secondary side is not electrically connected
to the primary side, therefore both sides can be freely moved
magnetic, which offers several benefits acting as a conducting
alternative, including inherent galvanic isolation, and
convenient and autonomous power transfer capability. As
mentioned above, WPT operates based on magnetic
principles, giving rise to certain limitations. Firstly, magnetic
fields cannot penetrate through metals [1], in other word, the
WPT cannot be used in situations where there is a metal
barrier between power sources and loads. Secondly, special
shielding mechanisms are required to prevent electromagnetic
interference along with high efficiency magnetic cores to
achieve a better coupling factor, whereby both increases the
converter size and the cost, consequently reducing the
mechanical robustness [4]. As a result, to overcome these

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limitations, CPT technique is used due its nature of applying II. PROPOSED CPT SYSTEM
electric field, which inherently can penetrate through any Figure 2 depicts the design topology of the proposed CPT
metal shielding environment. Apart from that, the CPT is also system, where the topology consists of a transmitter, coupling
cheaper to construct and with possibility of a flexible design plates, and receiver. At the transmitter side, a class-E inverter
of the coupling plate. is adapted to provide AC excitation to the resonant tank,
In the past, CPT was reported for a variety of applications, followed by the receiver side implementing a full-bridge
including biomedical systems [5], biosignal instrumentation rectifier to provide DC voltage to the load. Most importantly,
systems [6], wireless charger for robot [7], LED lamps [8], the Class-E ZVS conditions have to be met and a precise LC
electric vehicles [9], and slip ring replacement for wound matching network needs to be in place to achieve highly
field synchronous machines [10]. The existing CPT system efficient power transfer mechanism.
can be categorized by the power converter and compensation
network topologies. In terms of the power converter, the TRANSMITTER UNIT RECEIVER UNIT
transmitter power converter topologies for the CPT system Forward Plate
can be further categorized into two segments, namely L L
Class-E High
resonant full-bridge and half bridge, and resonant push-pull Frequency
converters. Both segments demonstrated drawbacks of C C Rectifier Load
Inverter
requiring additional semiconductor components, complicated (D=50%)
gate drivers, and the underlying board layout. These Return Plate
drawbacks often induced higher cost and lower reliability,
especially for high power and high frequency applications, Fig. 2. Block Diagram of Proposed CPT System
simply because the unit price for the power semiconductor
components is usually high. In a commercial perspective for A. Transmitter Unit
industrial applications, converters are strongly required to be Figure 3 illustrates the basic Class-E inverter, which
cost effective, reliable, efficient, and easy to control. consists of inductor choke to reduce the ripple current and to
As an overall solution, this paper proposes a CPT system concurrently provide a constant current from the power
that operates based on Class-E topology, which only consists supply. The structure of the Class-E inverter is very
of one active switch. By utilizing converter with single active straightforward and only requires a single metal-oxide
switch, the cost of CPT system development can be semiconductor field-effect transistor (MOSFET) with a shunt
significantly reduced. Furthermore, according to [11], [12], capacitor to remove any unwanted harmonics. The shunt
[13] and [14], Class-E type amplifier is the most suitable capacitor is connected in parallel with the series R-L-C load
candidate for WPT system due to its high operating efficiency network that is configured to a specific frequency to achieve a
that reached, in theory, 100% performance [15]. constant current flow from the supply source and as well as
Breaking down the contributions of the present art, the converts the digital input signal into a stable sinusoidal output
following statements will provide further details: with zero DC offset. Apart from that, the efficiency of Class-E
1) The proposed art herein focuses on designing a CPT
system based on Class-E inverter topology. The DC- LF L C2
DC efficiency is at 96%, powered with 12V dc, and
operates at a frequency of 1MHz to produce a stable
Vdc
sinusoidal signal across the load. Furthermore, the Vgs Q1 C1 RL
Class-E inverter is designed with LCCL matching
network for maximum power transfer.
2) The operating principles and design processes of the Fig. 3. Block Diagram of Proposed CPT System
proposed CPT system are briefly discussed, where
most importantly the performances are analysed by
applying ZVS condition, input power and output
power, and efficiency.
The rest of the paper is organized as follows, section 2
presents the proposed CPT system by covering the transmitter
unit, coupling capacitor, and receiver unit design
requirements. Section 3 discusses the design process and
circuit equations required to develop the proposed CPT
system. The simulation and experimental results are shown in
Section 4 and the conclusions are drawn in section 5.

Fig. 4. Switch Voltage and Current for ZVS Condition [15]

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amplifier can be further improved by reducing the transistor
switching losses, where MOSFET is turned ON when the
drain voltage returns to zero, consequently reduces the turn
ON loss of ZVS. Another factor is that the drain voltage is
raised from zero at the period of switching ON, which allows
for slight returning without losing the efficiency. As shown in
Fig. 4, the two states of the inverter demonstrates the status of
the voltage and current during the switching window. This
activity of fast switching offers a stable sinusoidal wave to the
capacitive coupling with high efficiency.
It is important to understand that the basic Class-E
resonant circuit shown in Fig. 3 does not have a matching
capability. In order to transfer a specified amount of output
power, Po at a specified DC voltage, Vdc, the load resistance,
RL must be configured at a value determined by (1). Therefore,
strictly, an impedance matching circuit is required to match a
source and a destination impedances via an appropriate load
resistance. The purpose of the LC matching network, as shown
in Fig. 5, is to convert the load resistance or impedance into
the required impedance to produce a desired output power at
the specified supply voltage and the required operating
frequency, f. According to (1), Vdc, Po, and RL are
interdependent variables. In many applications, the load
resistance exists, however it will be different from the value
synthesized based on (1). Therefore, there is a need for a
matching circuit that provides an impedance transformation.
2
8Vdc
(ʌ 2 + 4 )Po
RL =
LF L C3 L
B A
Idc
VDC
Q1 C1 C2 RL C1
Vgs
(a) (b)
Fig. 5. Class-E with LC Matching Network Circuit
B. Coupling Capacitance
As depicted in Fig. 2, two series capacitors, namely C31
(forward plate) and C32 (return plate), are defined as the
functions of the coupling plates. The capacitance value of
these capacitors can be calculated by applying (2), where d is
the distance between plates, A is the area of the plate,
the permittivity in vacuum, and ε r is the relative permittivity
of the dielectric material between the two conductive
coupling plates.
Aε 0 ε r
C=
d 4) All circuit elements are ideal.
The capacitance of the both forward and return capacitors
will proportionally vary when the distance varies. Thus, C31
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and C32 can be combined into a single capacitor for
simplification, resulting in:
C31 × C32
C3 = (3)
C31 + C32
In some cases, the coupling capacitance can be insignificant,
hence making the operation of a Class-E inverter to be highly
sensitive to its circuit parameters. Therefore, adding an
additional capacitor in the class-E inverter, as shown in Fig.
5(a), will enable variability of the coupling capacitance and
directly improves the circuit performance. For simplification,
the coupling and additional capacitors, and the load resistor
can be assumed as impedance factor, as depicted in Fig. 5(b).
C. Receiver Unit
Figure 6 illustrates the schematic of the receiver unit
within the proposed CPT system. The role of the receiver unit
is to regulate the received power and drive the load as per
demand. The building blocks of the receiver unit are based on
full-bridge rectifier and LC matching network. In this
perspective, the full bridge rectifier converts AC signal into
DC voltage, followed up by coupling the voltage into LC
matching network will result in maximum power transfer with
high DC-DC efficiency.
LF L1 C3 Lm
Idc
(1)
VDC Q1 C1 C2 Cm RL
Vgs
B
Fig. 6. Class-E with LCCL Matching Network Circuit
Z
III. CPT SYSTEM DESIGN EQUATIONS
In order to enable a fundamental approach in designing the
proposed CPT system, the assumption and design equations
are provided in this section.
A. Assumptions
The analysis of the Class-E inverter (Fig. 6) is carried out
under the following assumptions:
1) The MOSFET and diode form an ideal switch with
on-resistance being zero, off-resistance being
infinity, and switching times being zero.
ε 0 is 2) The choke inductance is high enough so that its AC
component will be much lower than the DC
component of the input current.
3) The load quality factor, QL of the L-C2-RL series-
resonant circuit are high enough so that the current
through the resonant circuit is sinusoidal.
(2)
B. Circuit Equations IV. SIMULATION AND EXPERIMENTAL RESULT
The parameters of the circuit shown in Fig. 6 are derived The design example of the proposed CPT system and
from the following expressions: experiment results will be described in this section. The
system design is carried out based on the specifications
The series resistance is: provided in Table 1, where MATLABTM is used as the
2 2 platform to build the proposed design (Fig. 7). The validity of
8V dc V dc
Rs the proposed concept has been verified by conducting a
(π 2 + 4)Po
= = 0.5768 (4)
Po laboratory experiment. The experimental configuration of the
end-to-end CPT system is carried out with discrete
The reactance of shunt capacitor is: components on a printed circuit board (PCB), as shown in
1 Fig.8. The components are chosen to match the simulated
X C1 = ≈ 5.4466 R S (5) system as closely as possible. For the capacitive coupling
ωC1
structure, the capacitive interface is implemented with circle
The reactance of the resonance inductor is: PCB plate capacitors that are separated by a 0.2mm air gap.
The coupling plate surface is then sprayed by using a clear
X L = ωL = QL Rs (6) spray to ensure that the transmitter and receiver plate are not
electrically connected. The radius of the plate is 2.5cm and
The reactance of resonance of capacitor is:
size is 0.0020m2. Therefore, two parallel plate are required to
XC =
1
(
≈ Q L − 1.1525 )Rs (7) TABLE I. SYSTEM SPECIFICATIONS AND CIRCUIT PARAMETERS
ȦC
System Specification Circuit Parameter
The minimum choke inductance is: Parameter Design Value Parameter Design Value
§π 2 · Po 1W C1 352pF
Rs
L f (min) = 2 ¨ + 1¸ (8)
¨ 4 ¸ f
f 1MHz C2 40pF
© ¹ Vcc 12V C3 177pF
D 50% Cm 2920pF
The coupling capacitance is:
QL 10 Lf(min) 576uH
1
C3 = (9) RL 125Ω L1 132.2uH
2 RP Lm 7.3uH
R s [(Q L − 1.1525) + 1] 20Ω
ȦR s L −1
RL
LF L1 C31 Lm
The transmitter matching capacitance is: D1 D3
2 Idc
Rs [(Q L − 1.1525) + 1] C
Q L − 1.1525 − −1 VDC C1 Cm
RL Vgs Q1 C2
RL
C2 = (10) C32
2
ȦRs [(Q L − 1.1525) + 1]
D2 D4
The impedance of receiver matching capacitor is:
Rs R p
X Cm = (11) Fig. 7. Simulation Circuit Constructed in MATLAB
X1
The impedance of receiver matching inductor is:
X Lm = Rs R p − ( R p ) 2 (12)

The power efficiency can be calculated from the input power

and output power:
2
Po Vo
η= = (13)
Pi R LVCC I dc

Fig. 8. Experimental Setup

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achieve a capacitance of 354pF.
Similarly, the components used in the experimental
framework are chosen to match the design as closely as
possible for high precision. All the voltage and current values
of the simulated CPT system are measured in order to analyze
the performance of the developed CPT system according to
ZVS condition, input power, output power, and DC-DC
efficiency. The DC voltage and current values are collected by
using Sanwa CD771 Digital Multimeter, while all the AC
waveforms are measured by the Agilent Technologies DSO-X
2012A 100MHz oscilloscope. The analyses of the results
obtained from simulation and experiment is discussed in the
following section.
A. Zero Voltage Switching
Figure 9 presents the waveforms recorded according to
ZVS conditions. For the simulation results, Vds is 43V, which
is approximately three times larger than VCC. Meanwhile for
the experimental configuration, the DC input voltage, Vcc is
set at 16.9 V, which is 4.9 V higher than the theoretical input
voltage, this is to assure that the 1W input power is achieved.
As a result, the experimental value for the maximum voltage
across the MOSFET during the turn off period is Vds(peak) =
62.5V, which is 8.76% lower than the theoretical value.
However, both figures of Fig. 9 proved that the ZVS condition
has been satisfied since there is no overlapping factor in time
between the MOSFET drain voltage and gate voltage.
B. Dc-DC Efficiency
The DC-DC efficiency is calculated by using (14), where
Fig. 10 and Fig. 11 exhibit the measurement results of the
input power and output power, respectively. The simulation
value of the DC input power is, Pi(dc) can be calculated by
using Pi(dc) = Vcc x Idc = 12 x 0.083 = 1W. On the other hand,
the DC output power, Po(dc) can be calculated by using Po(dc) =
VRL x IRL = 4.45 x 0.225 = 0.98W. Therefore, in terms of
efficiency, it is clear that the simulation circuit produced 98%
of efficiency, which is slightly lower than the calculated value.
For the experimental case, the DC input power is, Pi(dc) =
Vcc x Idc = 16.9 x 0.06 = 1.014W, and the DC output power
is, Po(dc) = (VRL)2/RL = (4.41)2/20 = 0.97W. Therefore, this
result indicated that the proposed system is able to transfer
0.97W via the 20Ω load with an efficiency of 96% at a
working distance of 0.2mm. Both the simulation and the
experiment results are consistent with the theoretical
derivations.
Idc = 0.083A

Vds(peak) = 43V Vdc = 12V

(a) Simulation
Vgs = 10V

(a) Simulation

Vds(peak) = 62.5V

Vgs = 9.8V

(b) Experiment
Fig. 10. Measurement Value for Input Power

(b) Experiment
Fig. 9. Waveforms of ZVS Conditions

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VRL = 4.45V
IRL = 0.225A
(a) Simulation
Vo = 4.41V
(b) Experiment
Fig. 11. Measurement Value for Output Power
V. CONCLUSION
This paper had proposed a CPT system with combined
Class-E inverter and LC matching network along with the
detailed design procedures. The proposed CPT system
achieved high power transfer efficiency at high frequency,
which is due to the overall system satisfied the ZVS
conditions. Both simulation and experimental measurements
were consistent with the theoretical predictions, which proved
the effectiveness of the proposed CPT system as well the
validity of the design procedures. Based on the reported
laboratory measurements, 96% efficiency is achieved for the
overall power transfer with 0.97 W output power, which
operated at 1MHz and at 0.2mm working distance. The
proposed system can be also applied in rotary applications,
such as the fluid bearing capacitors and the rotating capacitors.
ACKNOWLEDGMENT
This research was supported by the Universiti Teknikal
Malaysia Melaka (UTeM) [RAGS/1/2014/TK03/FKEKK/
B00062] and Malaysian Ministry of Education [FRGS/2/
2014/TK03/FKEKK/03/F00243] grants.
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