®

TARGET : GATE 2024/2025

academy S i nc e 20 0 4

Analog Electronics
(Brahmastra Plus)
Topic : Operational Amplifier DPP : 06

..Common Data for Q.1 & Q.2..

Three inverting amplifiers, each with R2  150k and R1  15k are connected in cascade. Each op-amp has a
low-frequency gain of A0  5104 and a unity-gain bandwidth of fT  1.5 MHz . Where resistance R2 is used as
a feedback resistor.
Question 1
The value of low-frequency closed-loop gain of the overall system is _________(rounded upto two
decimal places).
Question 2
The value of the -3 dB frequency (in Hz) overall system is_________(rounded upto two decimal places).

..Common Data for Q.3 to Q.5..

An inverting amplifier circuit has a voltage gain of -25. The op-amp used in the circuit has a low-frequency
voltage gain of 5104 and a unity-gam bandwidth of 1 MHz.
Question 3
The value of dominant pole frequency (in Hz) of the op-amp is_________(rounded upto two decimal
places).
Question 4
The value of small-signal bandwidth. f3dB (in kHz) of the inverting amplifier is_________(rounded upto
two decimal places).
Question 5
The value of magnitude of the closed-loop voltage gain at 0.5 f3dB is_________(rounded upto two
decimal places).
Question 6
An audio amplifier system, using a non-inverting op-amp circuit, needs to have a small-signal bandwidth
of 20 kHz. The open-loop low-frequency voltage gain of the op-amp is 105 and the unity-gain bandwidth
is 1 MHz. The value of maximum closed-loop voltage gain that can be obtained for these specifications
is_________(rounded upto two decimal places).
Question 7
If an op-amp has a slew-rate of 5 V/s is. The value of full-power bandwidth (in kHz) for a peak output
voltage of 5 V is_________(rounded upto two decimal places).
 2 GATE ACADEMY®

Question 8
An op-amp with a slew rate of 8 V/s is driven by a 250 kHz sine wave. The value of maximum output
amplitude (in volt) at which slew-rate limiting is reached is_________(rounded upto two decimal places).
Question 9
An amplifier system is to be designed to provide an undistorted 10 V peak sinusoidal signal at a frequency
of f  12 kHz . The value of minimum slew rate (in V/s) required for the amplifier is _________(rounded
upto two decimal places).
Question 10
Consider the circuit shown in below, the value of common mode rejection ratio of the circuit
is_________(rounded upto two decimal places).
+ +
Vd V0  8 V V0  12 mV
– –
Vi1  0.5 mV Vi1  1 mV
Vi 2   0.5 mV Vi2  1 mV

Fig. Differential mode operation Fig. Common mode operation

Question 11

Consider the circuit shown in below figure. The value of ratio of resistance ( R2 /R1 ) is required for
oscillation of the circuit is ________ (rounded upto one decimal place).
R2

R1

v0

R L
L R

Question 12

The value of output voltage (in mV) of an op-amp for input voltages of Vi1  150 V and Vi 2  140 V .
The amplifier has a differential gain of Ad = 4000 and value of CMRR is 100_________(rounded upto
two decimal places).
Question 13
Consider a non-inverting amplifier shown in below figure, the value of output voltage (in volt) of the
circuit is_________(rounded upto two decimal places).
 3 GATE ACADEMY®

33k R f  330 k
V1  0.2 V

22k
V2   0.5 V
V0
12k
V3  0.8 V

Question 14

Consider a circuit shown in below figure, the value of voltage 'V2  V3 ' (in volt) of the circuit
is_________(rounded upto two decimal places).
200k

20k

V2

V1  0.2 V V3

200k

10 k

Question 15
Consider a circuit shown in below figure, the value of output voltage (in volt) of the circuit
is_________(rounded upto two decimal places).
100k
V1  0.1V 20k

10k V0
400 k
20k
 4 GATE ACADEMY®

Question 16
Consider a circuit shown in below figure, the value of output voltage (in volt) of the circuit
is_________(rounded upto two decimal places).
600 k
300 k
15k
25 mV

30 k
30 k
20 mV + V0
+

15 k

Question 17
The value of total offset voltage (in mV) for the circuit shown in below figure, for an op-amp with
specified values of input offset voltage VIO  6 mV and input offset current I IO  120 nA
is_________(rounded upto two decimal places).
200 k

2 k
VI
V0
+

2 k

Question 18
For an op-amp having a slew rate of SR  2.4 V/μs , the value of maximum closed-loop voltage gain that
can be used when the input signal varies by 0.3 V in 10  sec is_________(rounded upto two decimal
places).
Question 19
The value of cutoff frequency (in kHz) of a first-order low-pass filter shown in below figure
is_________(rounded upto two decimal places).
10k 10k

2.2k V0
Vin

0.05 F
 5 GATE ACADEMY®

Question 20
The value of cutoff frequency (in kHz) of a low-pass filter shown in below figure is_________(rounded
upto two decimal places).
10k 10k

20 k 20k V0
Vin

0.02 F 0.02 F

Question 21
Consider the circuit shown in below figure, the value of the sum of the lower and upper cutoff frequencies
(in kHz) of the band pass filter is_________(rounded upto two decimal places).
4.1k 4.1k 20k 20k

20k
0.05 F V0
Vin

10k 0.02 F

Question 22

Consider the circuit shown in below figure, given parameters of circuit are R1  1 k , R2  10 k ,
RA  1 M , RB  10 k , vIN  1 V , and vx  0.1 V , the value of open-loop gain of the Op-amp ‘ AO ’
is_________(rounded upto two decimal places).
R1 Vx R2

RA
VIN +
–
RB VOU T
 6 GATE ACADEMY®

..Common Data for Q.22 & Q.23..

A particular op-amp has parameter AO  10 and

5
rin  1 M . If R2  19 k and R1  1 k
I in

vin Rin v rin

V0

A0v
R2

R1

Question 23
The value of closed-loop gain of the circuit is_________(rounded upto two decimal places).
Question 24
The value of input resistance (in M  ) is_________(rounded upto two decimal places).
Question 25
An op-amp has an open-loop gain of 2 104 and a dominant open-loop breakpoint at 12Hz. A non-
inverting amplifier is made with R2  270 k and R1  5.6 k where R2 is the feedback resistor. The
value of bandwidth (in kHz) of the closed-loop amplifier is_________(rounded upto two decimal places).
Question 26
Consider the circuit shown in below Figure, the output of Op-Amp is V0 when switch ‘S’ is open and the
1

output of Op-Amp is V02 , when switch ‘s’ is closed. The value of sum of voltage V01  V02  (in volt) is
________. (Rounded upto two decimal place)
R1  5k R2  50k
V1  1V

V0

R3  10k R4  10k
S

Question 27
Consider is low pass active filter shown in below figure, the value of the gain at 100 kHz is _________.
(Rounded upto two decimal place)
10 k
Vin
V0
1000 pF

100k
10k
 7 GATE ACADEMY®

Question 28
Consider the circuit shown in below figure which is work as a active filter, which option is correct.
R4

C1 C2 V0

R3
R1
Vin
C3 R2

(A) Low pass filter (B) Band pass filter

(C) Band stop filter (D) All pass filter
Question 29
Consider the second-order low-pass filter circuit shown in below figure, if the filter were to have cut-off
frequency of 10 kHz, Q-factor of 0.707. The value of capacitor C2 (in nF) is ________. (Rounded upto
two decimal place)
C1  1.126 nF

R3  20 k

R1  10 k V0
Vin
R2  20 k
C2

Question 30
The relaxation oscillator circuit shown in below figure, operates on a power supply voltage of 15 V .
Given that the op-amp has positive and negative saturation output voltage of 13 A and 13 A
respectively. The value of frequency (in kHz) of the output wave form is _________. (Rounded upto two
decimal place)
RF  10 k

V0
C  0.01 F

R2  10 k

R1  47 k
 8 GATE ACADEMY®

Question 31
Given figure shown in below an Op-Amp based constant current source. The value of resistor R in ohms 
, so that a current of 25 mA flows through the Light Amplification by stimulated emission of radiation
(LASER) diode is _______. (Rounded upto two decimal place)
15 V

15 V

2.5 V
15 V

Laser diode

Question 32
Consider the circuit shown in below figure is a low pass filter circuit. The value of cut-off frequency and
the gain value at four times the cut-off frequency are respectively.
R  10k
Vin
V0
C  1000 pF

R1  100k
R2  10 k

(A) 15.7 kHz, 8.8 dB (B) 15.9 kHz, 8.8 dB

(C) 15.1 kHz, 8.8 dB (D) 15.9 kHz, 8.9 dB
Question 33

For the comparator circuit shown in below figure, diodes D1 and D2 have forward-biased voltage drop
equal to 0.7 V each. What is the state of LED-1 and LED-2 (whether ON or OFF) when the switch SW-1
is in position-A?
SW  1
A
V R1

V V0
B
D1 D2

LED  1 LED  2

(A) LED-1 ON, LED-2 OFF (B) LED-1 ON, LED-2 ON

(C) LED-1 OFF, LED-2 ON (D) LED-1 OFF, LED-2 OFF
 9 GATE ACADEMY®

Question 34
Consider the circuit shown in below figure, Given that the Op-Amp is ideal and R2 / R1  5 The
mathematical operation performed by the amplifier circuit is.
R1 R2

R2
R1

Vs
1
V0
Vs2

(A) Subtractor (B) Multiplier

(C) Adder (D) Divider
Question 35
Consider a transfer characteristics of some op-amp circuit. It could possibly be
V0

VSAT

Vi
0

VSAT

(A) an inverting comparator (B) a non-inverting comparator

(C) an inverting amplifier with hysteresis (D) a non-inverting amplifier with hysteresis
Question 36
For the Op-Amp circuit shown in below figure, the value of sum of resistance R1 and R2 (in kHz) such
that output voltage of Op-Amp is v0  5va  3vb _________. (Rounded upto two decimal place)
250 k

R1
va
R1 v0
vb

R2

Question 37
Consider the circuit shown in below figure. The value of ratio of resistance ( R2 /R1 ) is required for
oscillation of the circuit is ________ (rounded upto one decimal place).
 10 GATE ACADEMY®

R2

R1

v0

C R
R C

Question 38
Consider the circuit shown in below figure, the value of output voltage V0 t  (in mV) at t  2 msec is
_________. (Rounded upto two decimal place)
1 F

R1  250 k
1 u t  V
v0 t 
1 u t V
R2  500 k

Question 39
Consider the circuit shown in below figure, the value of the current ' I L ' (in mA) is __________. (Rounded
upto two decimal place)
RF  100 k

vin  2 V RL
R1  10 k v2
IL
R2  50 k

..Common Data for Q.40 to Q.42..

For the amplifier circuit shown in below figure,

RS  50 k v0

RL  1 k
vi

Question 40
The value of ideal closed-loop voltage gain is ________. (Rounded upto two decimal place)
 11 GATE ACADEMY®

Question 41
The actual value of closed-loop voltage gain if the open-loop gain is Aod  150,000 ________. (Rounded
upto two decimal place)
Question 42
The value open-loop gain such that actual closed-loop gain is within 1 percent of the ideal value
is________. (Rounded upto two decimal place)
Question 43
Consider the circuit shown in below figure. The output current of the op-amp is 1.2 mA and the transistor
current gain is   75 . The value of resistance R (in  ) is_________. (Rounded upto two decimal)
25 V

10 V +

Question 44
Consider the adjustable gain difference amplifier circuit shown in below figure. Variable resistor RV is
used to vary the gain. The value of output voltage V0 , as a function of VI1 and VI2 , is given by
R1 R2 R2
VI1

V0
VI2
R1
RV

R2 R2

2 R2  R2  2 R2  R2 
(A) V0  1 VI  VI1 
r1  RV  2
(B) V0  1 VI  VI1 
r1  RV  2
2R  R  2R  R 
(C) V0  2 1  2  VI1  VI2  (D) V0  2 1  2  VI1  VI2 
r1  RV  r1  RV 
Question 45
Consider the circuit shown in below figure. Assume ideal op-amp are used. The input voltage is
VI  0.5sin t . The value of the ratio of the voltage  VOB  is ________. (Rounded upto two decimal
 VOC 
place)
 12 GATE ACADEMY®
40 k

12 k

12 k
+
+
VOB
–

V0
30 k
Vi
12 k
–
12 k
+
VOC
–

..Common Data for Q.46 & Q.47..

Consider the circuit shown in below Figure, is a first-order low-pass active filter.
C 2  1 F

R2  10 k
R1  1 k
Vi
V0

Question 46
The value of DC voltage of the circuit is __________. (Rounded upto two decimal place)
Question 47
The value of frequency (in Hz) the magnitude of the voltage gain a factor of 2 less that the DC value
is known as 3  dB frequency is ___________. (Rounded upto two decimal place)

..Common Data for Q.48 & Q.49..

Consider the circuit shown in below Figure, is a first-order low-pass active filter.
C2

R2
R1
Vi
V0

Question 48
 13 GATE ACADEMY®

The value of sum of the resistance ' R1  R2 ' (in k ) such that input resistance is 20 k and the low
frequency gain is 15 , and 3 dB frequency is 5 kHz ________. (Rounded upto two decimal place)
Question 49
The value of capacitance C2 (in pF) such that input resistance is 20 k and the low frequency gain is
15 , and 3 dB frequency is 5 kHz ________. (Rounded upto two decimal place)
Question 50
In the circuit shown in below figure, assume that Q1 and Q2 are identical transistors. The value of output
voltage V0 (in volt) is ________. (Rounded upto two decimal place)
Q1 Q2

R1  10 k R2  20 k
V1  10 V V2  20 V

333 k

20 k

V0
20 k

333 k

..Common Data for Q.51 to Q.54..

Because of a manufacturing error, the open-loop gain of each op-amp in the circuit in Figure, is only AOL  100 .
The open-loop input and output resistance are Ri  10 k and R0  1 k , respectively.
1 k
Rif 100 

1 k
100 Rof
V01 V02
VI

Question 51
The value of input resistance Rif (in  ) is ___________. (Rounded upto two decimal place)
Question 52
The value of Output resistance R0 f (in  ) is ___________. (Rounded upto two decimal place)
 14 GATE ACADEMY®

Question 53
The value of Actual closed loop gain of the circuit is ___________. (Rounded upto two decimal place)
Question 54
The value of the ratio of Actual closed loop gain to the ideal closed loop gain is ___________. (Rounded
upto two decimal place)
Question 55

An inverting amplifier has parameters R2  150 k and R1  15 k . Bias current of 2 A are leaving
each Op-Amp terminal, otherwise Op-Amp is ideal. The value of output voltage (in volt) if the input
voltage is 20 mV is _______. (Rounded upto one decimal place)

..Common Data for Q.56 to Q.57..

For the circuit shown in below figure, the Op-Amp are ideal except that the Op-Amps have bias current if
I B  3 A entering each op-amp terminal.
50 k

10 k
V02

V01

RA 20 k

VI
20 k
V03

RB

Question 56

The value of sum of voltage ‘ V01  V02  V03 ’ (in Volt) for which input voltage VI  0 and resistance
RA  RB  0 is _________. (Rounded upto two decimal place)
Question 57

The values of sum of resistance  RA  RB  (in k ) for input bias current compensation is
_____________. (Rounded upto two decimal place)

..Common Data for Q.58 & Q.60..

Consider the band pass filter shown in below Figure, given that circuit parameters,
C  0.1 F, R1  85 k, R2  R3  300 , R4  3 k and R5  30 k .
 15 GATE ACADEMY®

R1

R1

C
C
R4 R5
Vi R2
R5

V0

Question 58
The value of magnitude of maximum voltage gain AV (max) of the circuit is _________. (Rounded upto two
decimal place)
Question 59
The value of frequency to (in kHz) at which AV (max) occurs is ________. (Rounded upto two decimal
place)
Question 60
The value of 3  dB frequency (in kHz) is ___________. (Rounded upto two decimal place)
Question 61
Consider circuit shown in below Figure, the value of cut-off frequency (in rad / sec ) of the circuit is.
R2

R1 C

V0
Vi

1 1
(A) (B)
R2C R1C
R2
(C) R1C (D)
R1
Question 62
Consider circuit shown in below Figure, the value of cut-off frequency (in rad / sec ) of the circuit is.
C R2

R1

V0
Vi
 16 GATE ACADEMY®

1 1
(A) (B)
R2C R1C
R2
(C) R1C (D)
R1
Question 63
The circuit shown in below figure, is a band pass filter. If R1  10 k . The value of resistance R2 (in k
) such a that magnitude of the midband gain is 50 and the cutoff frequency are 200 Hz and 5 kHz is
___________. (Rounded upto two decimal place)
C2

R1 C1 R2
Vi
V0

Question 64
The saturated output voltage are VP for the Schmitt trigger shown in below Figure. If
VP  12 V, VREF  10 V and R3  10 k , The value of sum of resistance ‘ R1  R2 ’ (in kHz) such that
switching point is VS  5 V and the hysteresis width is 0.2 V is _________. (Rounded upto two decimal
place)
Vi
V0
R1

R2
R3

VREF

..Common Data for Q.65 & Q.66..

Consider the circuit shown in below figure, given that the reverse breakdown Zener voltage is VZ  5.6V and the
forward diode voltage is V  0.6 V .

V0
Vi
20 k

DZ1 DZ2

Question 65
 17 GATE ACADEMY®

The plot of the voltage transfer characteristics of the comparator circuit is assuming the open-loop gain in
infinite.
(A) if the saturated output voltage is VP  6.2V, then the circuit behave as a comparator.

(B) if the saturated output voltage is VP  6.2V, then the circuit behave as a comparator.

(C) if the saturated output voltage is VP  6.2V, then the output will flip to either  VP or VP and the
input no control.
(D) if the saturated output voltage is VP  6.2V, then the output will flip to either  VP or VP and the
input no control.
Question 66
The plot of the voltage transfer characteristics of the comparator circuit is assuming the open-loop gain in
infinite and input voltage is 2.5 V.
(A) Circuit work as a comparator as long as V01  8.7 V and V02  – 3.7 V otherwise input has no control.
(B) Circuit work as a comparator as long as V01  8.7 V and V02  – 3.7 V otherwise input has no control.
(C) Circuit work as a comparator as long as V01  8.7 V and V02  – 3.7 V otherwise input has no control.
(D) Circuit work as a comparator as long as V01  8.7 V and V02  – 3.7 V otherwise input has no control.
Question 67
Consider the circuit shown in below figure. The value of ratio of resistance ( R2 /R1 ) is required for
oscillation of the circuit is ________ (rounded upto one decimal place).
R2

R1

v0

R C
C R

..Common Data for Q.68 & Q.69..

Consider the Schmit trigger shown in below Figure. The saturated output voltage of the op-amp are VH  10 V
and VL  10 V . Assume the diode turn-on voltage is 0.7 V. The range of the input voltage is 2  VI  2 V .
 18 GATE ACADEMY®

R3  75 k 
I R3
R1  25 k 
R2  20 k 
V0
VI IR 2
D1 D2

ID ID2
1

Question 68
The value of hysteresis voltage is ________. (Rounded upto two decimal place)
Question 69
The value of sum of current ' I D1  I D2  I R2  I R3 ' (in mA) if input voltage is 2 V is __________. (Rounded
upto two decimal place)
Question 70
The parameters of the transistor shown in below figure are   80 and VEB  on   0.6 V . The Zener diode
is ideal with VZ  6.8V and the op-amp is ideal. The value of load current ‘ I L ’ (in mA) is ____________.
(Rounded upto two decimal place)

V  20

R2  5 k 
+
VZ D1
–
Q

V0
IL
R1  10 k  RL

..Common Data for Q.71 to Q.74..

The inverting op-amp shown in below figure has parameters R1  25 k , R2  100 k and Aod  5103 . The
input voltage is from an ideal voltage source whose value is VI  1.0000V .
 19 GATE ACADEMY®

R2

R1
Vi
V0

Aod V2  V1 

Question 71
The value of closed-loop voltage gain of the circuit is ________. (Rounded upto two decimal place)
Question 72
The value of actual output voltage (in volt) of the circuit is ________. (Rounded upto two decimal
place)
Question 73
What is the percentage difference between the actual output voltage and the ideal output voltage is
________. (Rounded upto two decimal place).
Question 74
What is the voltage (in mV) at the inverting terminal of the op-amp is ________. (Rounded upto two
decimal place).

..Common Data for Q.75 & Q.76..

An op-amp with an open-loop gain of Aod  7 10 is to be used in an inverting op-amp circuit. Let
3
R2  100 k
and R1  10 k . If the output voltage is V0  7 V .
Question 75
The value of input voltage (in volt) is ________. (Rounded upto two decimal place).
Question 76
The voltage (in mV) at the inverting terminal of the op-amp is ________. (Rounded upto two decimal
place).

..Common Data for Q.77 & Q.78..

For the ideal inverting op-amp circuit with T-network, shown in figure, the circuit parameters are
R1  10 k, R2  R3  50 k , and R4  5 k .
 20 GATE ACADEMY®

R2 R3

R4

R1
Vi
V0

Question 77
The value of closed-loop voltage gain is ________. (Rounded upto two decimal place)
Question 78
The value of resistance R4 (in k ) to produce a voltage gain is -100 ________. (Rounded upto two
decimal place)
Question 79
If the inverting input terminal of an operational amplifier is grounded and a sinusoidal voltage waveform
is applied at the non-inverting input terminal, the output will be
(A) Square wave (B) Triangular wave
(C) Half-wave rectified sine wave (D) Full-wave rectified sine wave
Question 80
A comparator circuit is used to
(A) mark the instant when an arbitrary waveform attains some reference level.
(B) switch off a circuit when output becomes zero.
(C) switch on and off a circuit alternately at a particular rate.
(D) mark the instant when the input voltage becomes constant.
Question 81
In the bistable circuit shown, the ideal Op-Amp has saturation levels of  5 V . The value of R1
(in k ) that gives a hysteresis width of 500 mV is _____.

Question 82
In the Schmitt trigger circuit shown in fig. Find upper threshold point.
 21 GATE ACADEMY®

(A) 1 V (B) 2 V (C) 4 V (C) 3 V

Question 83
The components in the circuit shown below are ideal. If the op-amp is in positive feedback and the input
voltage Vi is a sine wave of amplitude 1 V, the output voltage V0 is
1k

1V 1k 5V
0 Vi
1V V0

5 V

(A) a constant of either +5V or –5V. (B) a non-inverted sine wave of 2 V amplitude.
(C) an inverted sine wave of 1 V amplitude. (D) a square wave of 5 V amplitude.
Question 84
Figure shows a Schmitt trigger circuit and the corresponding hysteresis characteristics. The values of VTL
and VTH are

(A) VTL  3.75 V, VTH  3.75 V (B) VTL  1 V, VTH  5 V

(C) VTL  5 V, VTH  1 V (D) VTL  5 V, VTH  5 V
Question 85
The input-output characteristic of a Schmitt trigger has a hysteresis band of  0.1 V. If the input voltage
is 5sin(1000 t ), the delay between the corresponding zero cross-over points of the output and input
signals is
(A) 6.37 s (B) 0.02 s (C) 63.7 s (D) 2.0 s
Question 86
 22 GATE ACADEMY®

The saturation voltage of the ideal Op-Amp shown below is ±10 V. The output voltage V0 of the following
circuit in the steady-state is

(A) Square wave of period 0.55 ms (B) Triangular wave of period 0.55 ms
(C) Square wave of period 0.25 ms (D) Triangular wave of period 0.25 ms
Question 87
In the circuit shown in the figure, the switch S has been in position 1 for a long time. It is then moved to
position 2. Assume the Zener diodes to be ideal. The time delay between the switch moving to position 2
and the transition in the output voltage V0 is

(A) 5.00 ms (B) 8.75 ms (C) 10.00 ms (D) 13.75 ms

Question 88
In the circuit shown below, all Op-Amps are ideal. The current I  0 A when the resistance R  ________
k .

Question 89
The circuit given uses ideal opamps. The current I (in A) drawn from the source v s is (up to two decimal
places) ______.
 23 GATE ACADEMY®

Question 90
The potential difference between the input terminals of an op amp may be treated to be nearly zero, if
(A) The two supply voltages are balanced.
(B) The output voltage is not saturated.
(C) The op amp is used in a circuit having negative feedback.
(D) There is a dc bias path between each of the input terminals and the circuit ground.
Question 91
In the ideal Op-Amp circuit given in the adjoining figure, the value of R f is varied from 1k to 100k .
The gain G  (V0 / Vi ) will

(A) remain constant at + 1 (B) remain constant at – 1

(C) vary as (Rf /10,000) (D) vary as (1 Rf /10,000)
Question 92
In the circuit given below, the OP-AMP is ideal. The output voltage V0 in volt is ________.

Question 93
In the circuit given below, the OP-AMP is ideal. The value of current I L in microampere is ______
 24 GATE ACADEMY®

Question 94
In the circuit of the figure, V0 is

(A) – 1 V (B) 2 V (C) + 1 V (D) + 15 V

Question 95
The Op-Amp of the circuit shown in the below figure has a unity gain frequency of 1 MHz.
The cut-off frequency of the feedback amplifier is

(A) 100 kHz (B) 1 MHz (C) 10 MHz (D) 90 MHz

Question 96
In the circuit shown in below figure, if Vi  sin t , the voltage V0 is

  1   1    
(A) 2 sin  t   (B) sin  t   (C) sin  t   (D) 2 sin  t  
 4 2  4 2  4  4
Question 97
 25 GATE ACADEMY®

If the input signal ei applied to the Op-Amp of the circuit shown in the given figure is sinusoidal of
maximum value 1 mV and of 1 kHz frequency, then the magnitude of the peak value of the output voltage
waveform would be

(A) 1.59 mV (B) 6.28 mV (C) 159 mV (D) 628 mV

Question 98
A unit positive step is applied at the input of the circuit shown in the figure. After 20 seconds, the output
V0 will be

(A) + 20 V (B) + 10 V (C) – 10 V (D) – 20 V

Question 99
The voltage gain versus frequency of an Op-Amp is shown in the given figure. The gain bandwidth of the
Op-Amp is

(A) 200 Hz (B) 200 MHz (C) 200 KHz (D) 2 MHz
Question 100
Assume that the Op-Amp of the figure is ideal. If Vi is a triangular wave, then V0 will be
 26 GATE ACADEMY®

(A) square wave (B) triangular wave (C) parabolic wave (D) sine wave
Question 101
In the circuit shown in the given figure, V0 is given by [IES EC 2001]

   
(A) sin  t   (B) sin  t 
4 
(C) sint (D) cost
 4 
Question 102
In the figure, assume the Op-Amp to be ideal. The output V0 of the circuit is

t
(A) 10cos(100t) (B) 10 cos(100 ) d 
0
t
d
(C) 104  cos(100 )d (D) 104 cos(100 )
0 dt
Question 103
For the circuit shown, with an ideal operational amplifier, the maximum phase shift of the output Vout
with reference to the input Vin is

(A) 00 (B) 900 (C)  900 (D)  180

0

Question 105
The circuit in below figure is a
 27 GATE ACADEMY®

1 1
(A) band-pass filter with lower cut-off l  and higher cut-off H  .
R1 C1 R2 C2
1 1
(B) band-reject filter with lower cut-off l  and higher cut-off H  .
R1 C1 R2 C2
1 1
(C) band-pass filter with lower cut-off l  and higher cut-off H  .
R2 C2 R1 C1
1 1
(D) band-reject filter with lower cut-off l  and higher cut-off H  .
R2 C2 R1 C1
Question 106
The Op-Amp circuit shown in the figure is filter. The type of filter and its cut-off frequency are
respectively

(A) High pass, 1000 rad/sec. (B) Low pass, 1000 rad/sec.
(C) High pass, 10000 rad/sec. (D) Low pass, 10000 rad/sec.
. Statement for Linked Answer Questions 107 and 108 .
Consider the Op-Amp circuit shown in the figure.

Question 107
The transfer function V0 (s) / Vi (s) is
 28 GATE ACADEMY®

1  sRC 1  sRC 1 1
(A) (B) (C) (D)
1  sRC 1  sRC 1  sRC 1  sRC
Question 108
If Vi  V2 sin(t ) and V0  V2 sin(t  ) , then the minimum and maximum values of  (in radians) are
respectively
  
(A) and (B) 0and
2 2 2

(C)  and0 (D) and 0
2
Question 109
A low-pass filter with a cut-off frequency of 30 Hz is cascaded with a high-pass filter with a cut-off
frequency of 20 Hz. The resultant system of filters will function as
(A) an all-pass filter (B) an all-stop filter
(C) a band stop (band-reject) filter (D) a band-pass filter
Question 110
The circuit shown is a

1 1
(A) low pass filter with f3dB  rad/s (B) high pass filter with f3dB  rad/s
( R1  R2 ) C R1 C
1 1
(C) low pass filter with f3dB  rad/s (D) high pass filter with f3dB  rad/s
R1 C ( R1  R2 ) C
Question 111
In the circuit shown, the need of the resistor RF is

(A) To increase the overall gain (B) To stabilize the circuit

(C) To increase input impedance (D) To prevent saturation
 29 GATE ACADEMY®

Question 112
A 5 mV, 1 kHz sinusoidal signal is applied to the input of an Op-Amp integrator for which R  100kΩ
and C=1μF . The output voltage (in mV) is

(A)
1
cos  2000 t 1 (B) cos  2000 t 1
40

(C) 
1
cos  2000 t 1 (D)  cos  2000 t 1
40
Question 113
In the low-pass filter shown in the figure, for a cut-off frequency of 5 kHz, the value of R2 (in k ) is ________.

Question 114
In the figure shown, assume the Op-Amp to be ideal. Which of the alternatives gives the correct bode
V ()
plots for the transfer function 0 ?
Vi ()

(A)
 30 GATE ACADEMY®

(B)

(C)

(D)

Question 115
s 2  bs  c
The filter whose transfer function is of the form G(s)  is
s 2  bs  c
(A) A high-pass filter (B) A low-pass filter
(C) An all-pass filter (D) A band-reject filter
Question 116
The circuit shown below an example of a
 31 GATE ACADEMY®

(A) low pass filter (B) band pass filter (C) high pass filter (D) notch filter
Question 117
For the given low pass circuit shown in the figure, the cut-off frequency in Hz will be___________.

Question 118
Consider the circuit shown below

The correct frequency response of the circuit is

(A) (B)
 32 GATE ACADEMY®

(C) (D)

Question 119
With the ideal operational amplifier, the circuit shown in figure. The output voltage V0 is

(A) V0  2V1dt  4V2  5V3 (B) V0  2V1dt  2V2  4V3

(C) V0  2V1dt  3V2  5V3 (D) V0  V1dt  4V2  5V3

Question 120
The following circuit has R  10k , C  10 F The input voltage is a sinusoidal at 50Hz with an rms
value of 10 V. under ideal conditions, the current is from the source is

[
(A) 10 mA leading by90 20 mA leading by900
0
(B)

(D) 10 mA lagging by90

0 0
(C) 10mA leading by90
Question 121
d 2V dV
In the following circuit, the output ‘V’, follows an equation of the form  a   bV  f (t ) . The
dt 2 dt
value of a, b and f (t ) are respectively
 33 GATE ACADEMY®

1 1 , f (t )  1 1  1  et
2R2C 2  RC 
(A) a  , b
2RC 2R2C 2

1 1 , f (t )  1 1  1  et
R2C 2  RC 
(B) a  , b
2RC 2R2C 2

1 1 , f (t )  1 1  1  et
2R2C 2  RC 
(C) a  , b
RC 2R2C 2

1 1 , f (t )  1 1  1  et
2R2C 2  RC 
(D) a  , b
2RC 2R2C 2
Question 122
The circuit of given figure, uses an ideal Op-Amp for small positive values of Vin the circuit works as

(A) A half-wave rectifier (B) A differentiator

(C) A logarithmic amplifier (D) An exponential amplifier
Question 123
The Op-Amp circuit shown in the below figure can be used for

(A) addition (B) subtraction

 34 GATE ACADEMY®

(C) both addition and subtraction (D) multiplication

Question 124
In the Op-Amp circuit shown below, Vi  0 and i  I0ekV . The output V0 will be proportional to

(A) Vi (B) Vi (C) ekVi

(D) ln(kVi )
Question 125
In the Op-Amp circuit shown, assume that the diode current follows the equation I  I s exp(V / VT ). For
Vi  2V, V0  V01, and for Vi  4V, V0  V02 . The relationship between V01 and V02 is

(A) V02  2 V01 (B) V02  e V01

2

(C) V02 V01 ln 2 (D) V01 V02  VT ln 2

Question 126
The block diagrams types of half wave rectifiers are shown in the figure. The transfer characteristics of
the rectifiers are also shown within the block.

It is desired to make full wave rectifier using above two half-wave rectifiers. The resultant circuit will be
(A) (B)
 35 GATE ACADEMY®

(C) (D)

Question 127
The Circuit shown in the given figure can be used as a

(A) Rectifier (B) Voltage to frequency converter

(C) Frequency to voltage converter (D) Logarithmic Amplifier
Question 128
In the circuit shown below, the input voltage Vin is positive. The current (I ) - voltage (V ) characteristics
V

of the diode can be assumed to be I  I 0e VT

VT is the thermal
under the forward bias condition, where
voltage and I 0 is the reverse saturation current. Assuming an ideal op- amp, the output voltage Vout of
the circuit is proportion to
1k
I
Vin 
 Vout

Vin
V  2Vin VT 2
(A) log e  in  (B) (C) e (D) Vin
 2VT 
Question 129
In the circuit shown in the figure, assuming ideal diode characteristics with zero forward resistance and
0.7 V forward drop, the average value of V0 when the input waveform as shown, is
 36 GATE ACADEMY®

(A) – 0.7 V (B) – 1.0 V (C) – 2.0 V (D) – 2.7 V

. Statement for Linked Answer Questions 130 and 131 .

A regulated power supply, shown in figure below, has an unregulated input (UR) of 15 volts and generates a
regulated output Use the component values shown in the figure.

Question 130
The power dissipation across the transistor Q1 shown in the figure is
(A) 4.8 Watts (B) 5.0 Watts
(C) 5.4 Watts (D) 6.0 Watts
Question 131
If the unregulated voltage increases by 20%, the power dissipation across the transistor Q1 is
(A) increase by 20% (B) increase by 50%
(C) remains unchanged (D) decreases by 20%
Question 132
Which one of the following conditions would give V0  0 in the circuit shown in the figure?

(A) R  R1  R2 (B) R  R2 / R1 (C) R  R2  R1 (D) R  R1 || R2

Question 133
 37 GATE ACADEMY®

In the inverting Op-Amp circuit shown below

The resistance Rg is chosen as R1 R2 is order to

(A) increase gain (B) reduce offset voltage
(C) reduce offset current (D) increase CMRR
Question 134
In the circuit shown, the Op-Amp has finite input impedance, infinite voltage gain and zero input offset
voltage. The output voltage Vout is

(A)  I 2 ( R1  R2 ) (B) I 2 R2
(C) I1R2 (D) I1 ( R1  R2 )
Question 135
For the Op-Amp shown in the figure, the bias currents are Ib1  450nA and Ib 2  350nA .The values of
the input bias current ( I B ) and the input offset current (I f ) are

(A) I B  800nA, I f  50nA (B) I B  800nA, I f  100nA

(C) I B  400nA, I f  50nA (D) I B  400nA, I f  100nA
Question 136
In the circuit given below, each input terminal of the OP-AMP draws a bias current of 10 nA. The effect
due to these input bias currents on the output voltage V0 will be zero, if the value of R chosen in kilo-ohm
is_________
 38 GATE ACADEMY®

Question 137
In the figure shown input offset voltage of the operational amplifier is 2 mV. The output DC-error voltage
is

(A) 0 (B) 2 mV (C) 11 mV (D) 22 mV

Question 138
In the case of the circuit shown in the figure,Vi 0  10 mV dc maximum, the maximum possible output
offset voltage V00 caused by the input offset voltage Vi 0 with respect to ground is

(A) 60 mV dc (B) 110 mV dc (C) 130 mV dc (D) 150 mV dc

Question 139
If a differential amplifier has a gain of 20,000 and CMRR = 80 dB, its common mode gain is
(A) 2 (B) 1 (C) 1/2 (D) 0
Question 140
If the differential voltage gain and the common mode voltage gain of a differential amplifier are 48 dB
and 2 dB respectively, then its common mode rejection ratio is
(A) 23 dB (B) 25 dB (C) 46 dB (D) 50 dB
Question 141
An Op-Amp has a differential gain of 103 and a CMRR of 100. The output voltage of the Op-Amp with
inputs of 120μV and 80μV will be
 39 GATE ACADEMY®

(A) 26 mV (B) 41 mV (C) 100 mV (D) 200 mV

Question 142
For a given Op-Amp, CMRR  105 and differential gain  105 . What is the common mode gain of the
Op-Amp?
(A) 1010 (B) 2 105 (C) 105 (D) 1
Question 143
The operational amplifier shown in the circuit below has a slew rate of 0.8 Volts/ s . The input signal is
0.25 sin(t) . The maximum frequency of input in kHz for which there is no distortion in the output is

(A) 23.84 (B) 25.0 (C) 50.0 (D) 46.60

Question 144
An amplifier using an Op-Amp with a slew-rate SR  1 V/ sec has a gain of 40 dB. If this amplifier has
to faithfully amplify sinusoidal signals from 10 to 20 kHz, without introducing any slew-rate induced
distortion, then the input signal level must not exceed.
(A) 795 mV (B) 395 mV (C) 79.5 mV (D) 39.5 mV
Question 145
The Slew rate is the rate of change of output voltage of an operational amplifier when a particular input is
applied. What is that input?
(A) Sine wave input (B) Ramp input (C) Pulse input (D) Step input
Question 146
An operational amplifier has a slew rate of 2 V/sec. If the peak output is 12 V, what will be the power
bandwidth?
(A) 36.5 kHz (B) 26.5 kHz (C) 22.5 kHz (D) 12.5 kHz
Question 146
An operational amplifier is connected in voltage follower configuration. Input given to this circuit is
3sin103t . The slew rate of operational amplifier is
3
(A) 6π×10 V/μsec (B) 3π×103 V/μsec
3 3
(C) 15π×10 V/μsec (D) π×10 V/μsec
Question 147
An Op-Amp has slew rate of 5 V/ sec . The largest sine wave output voltage possible at a frequency of
1 MHz is
5 5
(A) 10πV (B) 5 V (C) V (D) V
π 2π
 40 GATE ACADEMY®

Question 148
The slew rate of an Op-Amp is 0.5 V/micro sec. The maximum frequency of a sinusoidal input of 2V rms
that can be handled without excessive distortion is
(A) 3 kHz (B) 30 kHz (C) 200 kHz (D) 2 MHz
Question 149
An op-amp that is powered from a ± 5V supply is used to build a non-inverting amplifier having a gain of
15. The slew rate of the op-amp is 0.5106 V/s. For a sinusoidal input with amplitude of 0.3 V, the
maximum frequency (in kHz) up to which it can be operated without any distortion is (up to 1 decimal
place) ______.
(A) 7 kHz (B) 20 kHz
(C) 7 MHz (D) 20 MHz
Question 150
Consider the following statement. Dominant-pole frequency compensation in an Op-Amp.
1. Increases the slew-rate of the Op-Amp
2. Increases the stability of the Op-Amp
3. Reduces the bandwidth of the Op-Amp
4. Reduces the CMRR of the Op-Amp
Which of the statements given above are correct?
(A) 1 and 3 only (B) 1, 2 and 4
(C) 1 and 2 only (D) 2 and 3 only
Question 151
Consider the following circuit

What is the function of diode D2 in the above circuit?

(A) To avoid saturation of the Op-Amp
(B) To provide negative feedback when the input is positive
(C) To reduce reverse breakdown voltage of D1
(D) As a buffer
Question 152
The output voltage V0 in the circuit in below figure is
 41 GATE ACADEMY®

R2 R2 R2
(A)
R2
V (B) V (C) V (D) V
R R1 R1 R 1   
Question 153
An integrator circuit is shown in below figure. The Op-Amp is of type 741 and has an input offset current
ios of 1 μA . C is 1μF and R is 1 M  . If the input Vi is a 1 kHz square wave of 1 V peak to peak, the
output V0 , under steady state condition, will be

(A) a square wave of 1 V peak to peak (B) a triangular wave of 1 V peak to peak
(C) positive supply voltage + Vcc (D) negative supply voltage – Vcc
Question 154
If the value of the resistance R in the following figure is increased by 50 %, then voltage gain of the
amplifier shown in the figure will change by

(A) 50 % (B) 5 % (C) – 50 % (D) negligible amount

Question 155
Assuming ideal opamp, the RMS voltage (in mV) in the output V0 only due to the 230 V, 50 Hz
interference is (upto one decimal place) _________.
 42 GATE ACADEMY®

Question 156
For a given sinusoidal input voltage, the voltage waveform at point P of the clamper circuit shown in
figure will be

(A) (B)

(C) (D)

Question 157
For the given sinusoidal input to the circuit as shown in the figure below, the voltage waveform at point
P of the clamper circuit is
 43 GATE ACADEMY®

(A) (B)

(C) (D)

Question 158
The differential amplifier, shown in the figure, has a differential gain of Ad  100 and common mode gain
of Ac  0.1. If V1  5.01 V and V2  5.00V , then V0 in volt (up to one decimal place) is ______.
 44 GATE ACADEMY®

Answer Key :
1. – 999.34 2. 706.64 3. 20 4. 40 5. 22.36
6. 50 7. 159 8. 5.09 9. 0.754 10. 666.7
11. 2.0 12. 45.8 13. – 16.5 14. 2.2 15. – 11.5
16. 6.4 17. 630 18. 80 19. 1.45 20. 0.397
21. 0.716 22. 8978.90 23. 19.99 24. 5001 25. 50.26
26. – 9.00 27. 1.73 28. C 29. 2.24 30. 2.133
31. 500.00 32. B 33. A 34. A 35. A
36. 100.00 37. 2 38. – 4.00 39. 0.6 40. 1
41. 0.99 42. 99.9 43. 109.6 44. A 45. – 1.73
46. – 10 47. 15.91 48. 320 49. 106 50. 0
51. 99.1 52. 18.4 53. 1.0 54. 0.65 55. – 0.5
56. 0.21 57. 18.33 58. 28.30 59. 5.30 60. 10.611
61. A 62. B 63. 524 64. 610.17 65. A, C
66. A 67. 2 68. 0.35 69. 0 70. 1.34
71. – 3.99 72. – 3.99 73. 0.10 74. 0.799 75. – 0.7011
76. – 1.00 77. – 60 78. 2.78 79. A 80. C
81. 1 82. B 83. A 84. D 85. A
86. A 87. A 88. 9 89. 1 90. C
91. A 92. –1 93. 100 94. D 95. A
96. A 97. D 98. D 99. C 100. A
101. A 102. A 103. D 104. A 105. A
106. A 107. C 108. D 109. B 110. B
111. A 112. 3.1 - 3.3 113. A 114. C 115. A
116. 15 - 16 117. C 118. A 119. A 120. D
121. C 122. D 123. D 124. D 125. B
126. D 127. C 128. B 129. D 130. B

131. D 132. C 133. C 134. C 135. D

136. 20 137. D 138. B 139. A 140. C

141. B 142. D 143. A 144. C 145. D

146. B 147. D 148. B 149. 17.69 150. C
151. C 148. A 154. A 154. D 155. D

156. D 157. D 158. 1.5