1

3/21/2023
EE3410E POWER ELECTRONICS

DC/DC Coverters
Dr. Nguyen Kien Trung
Dept. of IA, School of EE
Advance Power Electronic Systems Laboratory (APES Lab.)
 Outlines
• General introduction
• Pulwidth modulation
• Non-isolated DC/DC converters
• Isolated DC/DC converters

3/21/2023 3
 General introduction
𝑖𝑎𝑐 𝑖𝑑𝑐
DC
+ 𝑣𝑎𝑐 𝑣𝑑𝑐
−
DC

DC loads
DC source DC/DC converters Electronic circuit,
DC 𝜇-grid, Non-isolated/Isolated, DC motors,
Storage battery, Unidirectional/bidirectional, Inverter systems,
Electric vehicle, Forward/Flyback –based, Electrochemical plating
Solar PV arrays, Buck/Boost – typed, technology, electrolysis,
Rectifier outputs, PWM/Resonant, arc welding,…
etc. etc. Battery, etc.
3/21/2023 4
 DC/DC converters standards
• Safety standards: IEC60950-1
• Electrical insulation (minimum clearance and creepage)
• Electric strength (isolation voltage)
• Thermal insulation

• Load regulation (<2%)

𝑉𝑜,𝑚𝑖𝑛𝐿𝑜𝑎𝑑 − 𝑉𝑜,𝑚𝑎𝑥𝐿𝑜𝑎𝑑
%𝐿𝑜𝑎𝑑 𝑟𝑒𝑔𝑢𝑙𝑎𝑡𝑖𝑜𝑛 = × 100%
𝑉𝑜,𝑛𝑜𝑚𝐿𝑜𝑎𝑑

• Line regulation (< 0.05 %/V)

Δ𝑉𝑜
%𝐿𝑖𝑛𝑒 𝑟𝑒𝑔𝑢𝑙𝑎𝑡𝑖𝑜𝑛 = × 100%
Δ𝑉𝑖 × 𝑉𝑜

3/21/2023 5
 DC/DC converters standards
• EMI/EMC for MME under 600 Vdc
• EN 55032 or CISPR 32 → Emission requirements
• EN 55035 or CISPR 35 → Immunity requirements
• Size: (refer to DOSA)
• full-brick: 4.6x2.4x0.5 in3
• half-brick: 2.3x2.4x0.5 in3
• 1/4-brick: 2.3x1.45x0.5 in3
• 1/8-brick: 2.3x0.9x0.5 in3
• 1/16-brick: 1.3x0.9x0.5 in3

• RoHS (Restriction
of Hazardous Substances)

3/21/2023 https://www.sunpower-uk.com/glossary/power-brick/
6
 Pulse Width Modulation (PWM) Ud

Ton Ud
K
+ E

E Ud Rd
0
t
- T

Principle of Pulse width modulation

1 𝑇𝑥 𝑇𝑜𝑛
𝑈𝑑 = න 𝐸𝑑𝑡 = 𝐸
𝑇 0 𝑇
= 𝐸. 𝐷

D: Duty cycle
0≤D≤1

3/21/2023 7
 Classification
• Based on isolation
Isolation

Non-isolated Isolated
DC/DC DC/DC

Forward- Flyback-
Conventional Multi-phase Z-source Multiport
based based
DC/DC Interleaved DC/DC DC/DC
DC/DC DC/DC
- Buck, Boost, Buck/Boost - Forward DC/DC
- SEPIC, Split-PI, Cuk - Push-pull DC/DC
- Multi-phase Buck, Boost - Half-bridge DC/DC
- etc. - Full-bridge phase shift DC/DC
- Half-bridge LLC resonant DC/DC
3/21/2023 8
 Classification
• Based on switching types
Switching types

Hard-switched Soft-switched
DC/DC DC/DC

- Buck, Boost, Buck/Boost - Synchronous Boost converter with

- SEPIC, Split-PI, Cuk
- Multi-phase Buck, Boost
- Push-pull DC/DC
- Flyback DC/DC
3/21/2023
low boost inductance
- Full-bridge phase shift DC/DC
- Half-bridge LLC resonant DC/DC
- Dual-Active-Bridge DC/DC
9
EE3410E POWER ELECTRONICS
NON-ISOLATED DC/DC CONVERTERS

BUCK CONVERTERS
Dr. Nguyen Kien Trung
Dept. of IA, School of EE
Advance Power Electronic Systems Laboratory (APES Lab.)
 Buck converters: circuit diagram

• Structure
𝐿
A A
𝑖𝐿
𝐶 𝑅
𝑣𝐴 𝑣𝑜

DC Switching Output DC
source network filter load
Equivalent
Circuit diagram circuit
3/21/2023 11
 Buck converters: CCM operation

• CCM operation 𝐴

• S ON
𝑑𝑖𝐿
𝑣𝐿 = 𝐿 = 𝑣𝑖𝑛 − 𝑣𝑜
𝑑𝑡
𝑑𝑣𝑜 𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
𝑖𝐶 = 𝐶 = 𝑖𝐿 − 𝑖𝑜
𝑑𝑡

• Flux linkage
𝐷𝑇
𝜆𝑃 = න 𝑣𝐿 𝑑𝑡
0
= 𝑉𝑖 − 𝑉𝑜 𝐷𝑇 (𝑉𝑠)
3/21/2023 12
 Buck converters: CCM operation

• CCM operation 𝐴

• S OFF
𝑑𝑖𝐿
𝑣𝐿 = 𝐿 = −𝑣𝐷 − 𝑣𝑜
𝑑𝑡 𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
𝑑𝑣𝑜
𝑖𝐶 = 𝐶 = 𝑖𝐿 − 𝑖𝑜
𝑑𝑡
• Flux linkage
𝑇
𝜆𝑁 = න 𝑣𝐿 𝑑𝑡
𝐷𝑇
= −𝑉𝐷 − 𝑉𝑜 1 − 𝐷 𝑇 (𝑉𝑠)
3/21/2023 13
 Buck converters: CCM operation
• At steady state 𝐴

→ flux linkage is balanced

𝜆𝑃 + 𝜆𝑁 = 0
⇒ 𝑉𝑜 = 𝑉𝑖 𝐷 − 𝑉𝐷 1 − 𝐷
• If (𝑉𝐷 ≪ 𝑉𝑜 ) 𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
⇒ 𝑉𝑜 ≈ 𝑉𝑖 𝐷
where D ∈ [0, 1]
• Since D < 1 ➔ 𝑉𝑜 is
always smaller than 𝑉𝑖 ➔
Buck operation

3/21/2023 14
 Buck converters: CCM operation
• Another point of view 𝐴
𝑑 𝑖𝐿
𝑣𝐿 = 𝐿
𝑑𝑡
= 𝐷 𝑉𝑖 − 𝑉𝑜 + 1 − 𝐷 −𝑉𝐷 − 𝑉𝑜
where:
𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
𝑣𝐿 : average inductor voltage;
𝑖𝐿 : average inductor current
• At steady state:
➔ 𝑖𝐿 is constant
➔ 𝑑 𝑖𝐿 /𝑑𝑡 = 0
➔ 𝑉𝑜 = 𝑉𝑖 𝐷 − 𝑉𝐷 1 − 𝐷
3/21/2023 15
 Buck converters: CCM operation
• RMS and AVG currents 𝐴
2
1 Δ𝐼
𝐼𝑆,𝑟𝑚𝑠 = 𝐼𝑜 𝐷 1+
12 𝐼𝑜
2
1 Δ𝐼
𝐼𝐷,𝑟𝑚𝑠 = 𝐼𝑜 1 − 𝐷 1 + 𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
12 𝐼𝑜
𝐼𝐷,𝑎𝑣𝑔 = 𝐼𝑜 1 − 𝐷

• Reverse voltage
𝑉𝑟,𝑆 = 𝑉𝑖 + 𝑉𝐷
𝑉𝑟,𝐷 = 𝑉𝑖 − 𝑅𝑑𝑠𝑂𝑁 𝐼𝑚𝑖𝑛

3/21/2023 16
 Buck converters: CCM operation
• Current ripple
𝑑𝑖𝐿
S ON → 𝐿 = 𝑉𝑖 − 𝑉𝑜
𝑑𝑡
assumes current linearity Ripple versus Noise
Δ𝐼𝐿 𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
𝐿 = 𝑉𝑖 − 𝑉𝑜
𝐷𝑇
𝑉𝑖 − 𝑉𝑜
⇒ Δ𝐼𝐿 = 𝐷
𝑓𝐿
𝑉𝑜
= (1 − 𝐷)
𝑓𝐿
➔higher frequency → lower ripple
➔larger inductance → lower ripple
3/21/2023 17
 Buck converters: CCM operation
𝐴
Voltage ripple
• Charge to capacitor
𝑡2
1 Δ𝐼𝐿 𝑇
Δ𝑄 = න 𝑖𝑐 𝑑𝑡 = ⋅ ⋅
𝑡1 2 2 2
• Notes that:
Δ𝑄 = Δ𝑉𝑐 ⋅ 𝐶
Δ𝐼𝐿 𝑉𝑜
⇒ Δ𝑉𝑐 = = 2 1−𝐷
8𝑓𝐶 8𝑓 𝐿𝐶
➔higher frequency → lower ripple
➔larger inductance → lower ripple
➔larger capacitance → lower ripple Current Ripple and Voltage ripple
3/21/2023 18
 Buck converters: CCM operation
𝐴
Voltage ripple
• Total voltage ripple
Δ𝑉𝑜 = Δ𝑉𝑐 + Δ𝐼𝐿 ⋅ 𝐸𝑆𝑅
• Capacitor loss
2
⇒ Δ𝑃𝑐 = 𝐼𝑐,𝑟𝑚𝑠 ⋅ 𝐸𝑆𝑅
Δ𝐼𝐿2
= ⋅ 𝐸𝑆𝑅
12
➔lower ESR cap. → lower loss
➔Larger inductance → lower loss
➔ ceramic cap., film cap. are
prefered Current Ripple and Voltage ripple
3/21/2023 19
 Buck converters: CCM operation
Inductor
•Structure
• Core
• Windings
• Types
• DC inductors
• AC inductors
• Key parameters
• Inductance
• Idc, Isat (Bsat)
• Permeability
3/21/2023 20
 Buck converters: CCM operation
𝐴
Inductor: copper loss
• Inductor current
𝑖𝐿 = 𝐼𝑜 + Δ𝑖𝐿
• Inductor copper loss 𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
2
2
Δ𝐼𝐿
⇒ Δ𝑃𝐶𝑢 = 𝐼𝑜 ⋅ 𝐷𝐶𝑅 + ⋅ 𝐴𝐶𝑅
12
➔DCR: DC resistance
➔ACR: AC resistance → depends
on skin effects, proximity effects,
etc.
➔ Best practice: ACR/DCR = 1
3/21/2023 21
 Buck converters: CCM operation

Inductor: saturation Δ𝐵
𝜇𝑟 𝜇0 =
• Inductance:
Δ𝐻

𝜇0 𝜇𝑟 𝐴𝑐 2
𝐿= 𝑁
𝑀𝑃𝐿 𝐻=
4𝜋𝑁𝐼
𝑀𝑃𝐿
• Permeability 𝜇𝑟 depends
on working condition B-H curve of Buck converter
• Ferrite core has limited
saturation flux density
• Near 𝐵𝑠𝑎𝑡 → 𝜇𝑟 ↓ → 𝐿 ↓
→ Δ𝐼𝐿 ↑ Current waveform when
3/21/2023 saturation occurs 22
 Buck converters: CCM operation

Inductor: core loss

• Steinmetz equation
𝑚 𝑛 ⋅𝑉
Δ𝑃𝑓𝑒 = 𝑘 ⋅ 𝐵𝑎𝑐,𝑝𝑘 ⋅ 𝑓𝑠𝑤 𝑒
where 𝑘, 𝑚, 𝑛 depends on the core
material.
E.g: EPCOS N87 (k,m,n) = (5e-5, 2.16, 1.13) Core loss vs Peak AC flux density

• Flux density
𝑑𝐵 𝑑𝐼𝐿
𝑉𝐿 = 𝑁𝐴𝑐 =𝐿
𝑑𝑡 𝑑𝑡
𝐿 Δ𝐼𝐿 𝑉𝑜
⇒ 𝐵𝑎𝑐,𝑝𝑘 = ⋅ = 1−𝐷
𝑁𝐴𝑐 2 𝑁𝑓𝐴𝑐
➔ trade-off between 𝐵 and 𝑓 for
best core lost
Perm. vs DC bias
3/21/2023 23
 Buck topology variation
𝐴
• Question: How to
drive the FET? Gate
driver
• Buck with high side FET
• Good voltage sensing
• Good current sensing Buck conv. with high side FET
• Poor driving ability

• Buck with low side FET

• Good driving design
• Poor current sensing
• Poor voltage sensing
Buck conv. with low side FET
3/21/2023 24
 Remaining questions
𝐴
1. Inductor design?
2. Output cap. selection? Gate
driver
3. Switching frequency?
4. Gate drive design?
𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
5. Diode selection?
6. MOSFET selection?
7. Hard-switch
characteristics?
8. Switch current sensing?
9. Inductor current sensing?
10. Output voltage sensing?
3/21/2023 25
 Buck converters: DCM operation

• DCM operation 𝐴

𝑑𝑖𝐿
𝑣𝐿 = 𝐿 = 𝑣𝑖𝑛 − 𝑣𝑜
S ON 𝑑𝑡
𝑑𝑣𝑜
𝑖𝐶 = 𝐶 = 𝑖𝐿 − 𝑖𝑜 𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
𝑑𝑡
𝑑𝑖𝐿
𝑣𝐿 = 𝐿 = −𝑣𝑜
S OFF 𝑑𝑡
𝑑𝑣𝑜
𝑖𝐶 = 𝐶 = 𝑖𝐿 − 𝑖𝑜
𝑑𝑡
𝑑𝑖𝐿
𝑣𝐿 = 𝐿 =0
DCM 𝑑𝑡
𝑑𝑣𝑜
𝑖𝐶 = 𝐶 = −𝑖𝑜
𝑑𝑡
3/21/2023 26
 Buck converters: DCM operation
DCM operation 𝐴
• Average inductor voltage
𝑑 𝑖𝐿
𝑣𝐿 = 𝐿
𝑑𝑡
= 𝐷 𝑉𝑖 − 𝑉𝑜 − 𝐷′ 𝑉𝑜 𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
where: D = ton/T
D’ = toff/T
• At the steady state
𝑑 𝑖𝐿
𝐿 =0
𝑑𝑡
𝐷
⇒ 𝑉𝑜 = ′
𝑉𝑖
𝐷+𝐷
DCM ➔ 𝑫 + 𝑫′ < 𝟏
3/21/2023 27
 Buck converters: DCM operation
DCM operation DCM operation
𝐴
• Peak inductor current • Peak inductor current
𝑉𝑖 − 𝑉𝑜 𝑉𝑜 ′ 𝑉𝑖 − 𝑉𝑜 𝑉𝑜 ′
⇒ 𝐼𝑝𝑘 = 𝐷= 𝐷 ⇒ 𝐼𝑝𝑘 = 𝐷= 𝐷
𝑓𝐿 𝑓𝐿 𝑓𝐿 𝑓𝐿
• Output current • Output current
𝐼𝑝𝑘 𝐼𝑝𝑘
𝐼𝑜 = 𝐷 + 𝐷′ 𝐼𝑜 = 𝐷 + 𝐷′
2 2
• Solve for 𝐷 and 𝐷′ • Solve for voltage gain 𝑀
𝑉𝑜 2𝑓𝐿 𝑉𝑖
𝑉𝑜 2
𝐷= ⋅ ⋅ 𝑀= =
𝑉𝑖 𝑅 𝑉𝑖 − 𝑉𝑜 𝑉𝑖 8𝑓𝐿
1+ 1+
𝑅𝐷2
𝑉𝑖 − 𝑉𝑜 2𝑓𝐿 𝑉𝑖
𝐷′ = ⋅ ⋅
𝑉𝑖 𝑅 𝑉𝑖 − 𝑉𝑜
3/21/2023 28
 Buck converters: DCM operation
DCM operation 𝐴
• CCM – DCM boundary
𝐷 + 𝐷′ ≤ 1
2𝑓𝐿 𝑉𝑖
⇒ ⋅ ≤1 𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
𝑅 𝑉𝑖 − 𝑉𝑜
𝑓𝐿 𝑉𝑖 − 𝑉𝑜
⇒ ≤
𝑅 2𝑉𝑖
𝒇𝑳 𝟏
⇒ ≤ 𝟏−𝑴
𝑹 𝟐
➔ DCM depends on load,
frequency and inductance
➔ ZCS is always achieved
3/21/2023 29
 Synchronous Buck converters
• Similar to Buck CCM
• Low side diode ⇒ MOSFET
→ lower loss
→ bootstrap drive
• Dead-time is required
→ avoid shoot-through
• Small 𝐿 → high current
ripple → possibility of ZVS
→ low switching loss but
high RMS current
• Bidirectional operation
3/21/2023 30
EE3410E POWER ELECTRONICS
NON-ISOLATED DC/DC CONVERTERS

BOOST CONVERTERS
Dr. Nguyen Kien Trung
Dept. of IA, School of EE
Advance Power Electronic Systems Laboratory (APES Lab.)
 Boost converters: CCM

• CCM operation
𝑑𝑖𝐿
𝑣𝐿 = 𝐿 = 𝑣𝑖𝑛
S ON 𝑑𝑡
𝑑𝑣𝑜
𝑖𝐶 = 𝐶 = −𝑖𝑜
𝑑𝑡
𝑑𝑖𝐿 𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
𝑣𝐿 = 𝐿 = 𝑣𝑖𝑛 − 𝑣𝑜
S OFF 𝑑𝑡
𝑑𝑣𝑜
𝑖𝐶 = 𝐶 = 𝑖𝐿 − 𝑖𝑜
𝑑𝑡
• Average model
𝑑 𝑖𝐿
𝐿 = 𝑣𝑖𝑛 − 1 − 𝐷 𝑣𝑜
𝑑𝑡
𝑑 𝑣𝑜 𝑣𝑜
𝐶 = 1 − 𝐷 𝑖𝐿 −
𝑑𝑡 𝑅
3/21/2023 32
 Boost converters: CCM
• At steady state
𝑑 𝑖𝐿
𝐿 = 𝑣𝑖𝑛 − 1 − 𝐷 𝑣𝑜 = 0
𝑑𝑡
𝑑 𝑣𝑜 𝑣𝑜
𝐶 = 1 − 𝐷 𝑖𝐿 − =0
𝑑𝑡 𝑅 𝑆𝑜𝑓𝑓
𝑆𝑜𝑛
𝑣𝑖𝑛
𝑣𝑜 =
⇒ 1−𝐷
𝑣𝑜 1
𝑖𝐿 = ⋅
𝑅 1−𝐷

• Since 𝐷 < 1
➔ 𝑣𝑜 > 𝑣𝑖𝑛
➔ Boost operation
3/21/2023 33
 Boost converters
• Voltage gain
𝑉𝑖𝑛
𝑉𝑜 =
1−𝐷
𝑉𝑜 1
⇒ =
𝑉𝑖 1 − 𝐷
• D = 0 ~ 0.5 → linear
• D = 0.5 ~ 1 → hyperpolic
• Best performance:
➔ 1.0 < Gain < 2.0
• In practice, ➔ Gain < 4.0
Voltage gain characteristics
3/21/2023 34
 Boost converters: CCM

• RMS and AVG

currents
2
1 Δ𝐼
𝐼𝑆,𝑟𝑚𝑠 = 𝐼𝐿 𝐷 1+
12 𝐼𝐿
𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
2
1 Δ𝐼
𝐼𝐷,𝑟𝑚𝑠 = 𝐼𝐿 1−𝐷 1+
12 𝐼𝐿
𝐼𝐷,𝑎𝑣𝑔 = 𝐼𝐿 1−𝐷

• Reverse voltage
𝑉𝑟,𝑆 = 𝑉𝑜 − 𝑉𝐷
𝑉𝑟,𝐷 = 𝑉𝑜 − 𝑅𝑑𝑠𝑂𝑁 𝐼𝑆
3/21/2023 35
 Boost converters: CCM

• Current ripple
𝑑𝑖𝐿
S ON: 𝑣𝐿 = 𝐿 = 𝑣𝑖
𝑑𝑡
• Ignoring resistance:
𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
𝐷𝑉𝑖
Δ𝐼𝐿 =
𝑓𝐿
• High 𝑓 or large 𝐿
→ low ripple
• High 𝐷 → large gain →
high ripple

3/21/2023 36
 Boost converters: CCM

• Current ripple
𝐷𝑉𝑖
Δ𝐼𝐿 =
𝑓𝐿
• Assummes lossless 𝑅
=3
converter 𝑓𝐿
𝑅
=2
Δ𝐼𝐿 𝑅 𝑓𝐿
= 𝐷 1−𝐷 2 𝑅
𝐼𝐿 𝑓𝐿 𝑓𝐿
=1

➔ There is a maximum
relative current ripple

Relative current ripple

3/21/2023 37
 Boost converters: CCM

• Voltage ripple
𝐷𝑇
S ON: Δ𝑄𝑁 = න 𝑖𝑐 𝑑𝑡
0
𝐷𝑇
𝑣𝑜
=න 𝑑𝑡 = Δ𝑉𝑐 ⋅ 𝐶
0 𝑅
• Solve for Δ𝑉:
𝐷𝑉𝑜 Δ𝑉𝑐 𝐷
Δ𝑉𝑐 ≈ ⇒ =
𝑓𝑅𝐶 𝑉𝑜 𝑓𝑅𝐶
• High 𝑓 or large 𝐶 → low ripple
• High 𝐷 → high ripple
Output voltage ripple
3/21/2023 38
 Boost converters: DCM operation

• Three switching states

𝑑𝑖𝐿
𝑣𝐿 = 𝐿 = 𝑣𝑖
S ON 𝑑𝑡
D OFF 𝑑𝑣𝑜
𝑖𝐶 = 𝐶 = −𝑖𝑜
𝑑𝑡 𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
𝑑𝑖𝐿
𝑣𝐿 = 𝐿 = 𝑣𝑖 − 𝑣𝑜
S OFF 𝑑𝑡
D ON 𝑑𝑣𝑜
𝑖𝐶 = 𝐶 = 𝑖𝐿 − 𝑖𝑜
𝑑𝑡
𝑑𝑖𝐿
𝑣 =𝐿 =0
S OFF 𝐿 𝑑𝑡
D OFF 𝑑𝑣𝑜
𝑖𝐶 = 𝐶 = −𝑖𝑜
𝑑𝑡 D’T

3/21/2023 39
 Boost converters: DCM operation
• Large signal model
𝑑 𝑖𝐿
𝐿 = 𝐷 + 𝐷′ 𝑣𝑖 − 𝐷′ 𝑣𝑜
𝑑𝑡
𝑑 𝑣𝑜 ′
𝑣𝑜
𝐶 = 𝐷 𝑖𝐿 −
𝑑𝑡 𝑅 𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
• At the steady state
𝑑 𝑖𝐿 ′
𝑉𝑖
𝐿 =0 𝐷 = 𝐷
𝑑𝑡 𝑉𝑜 − 𝑉𝑖
⇒
𝑑 𝑣𝑜 𝑉𝑜
𝐶 =0 = 𝐷′ 𝐼𝐿
𝑑𝑡 𝑅
• AVG inductor current
𝐼𝐿,𝑝𝑘 ′
𝐷𝑉𝑖
𝐼𝐿 = 𝐷+𝐷 = ⋅ 𝐷 + 𝐷′
2 2𝑓𝐿 D’T

3/21/2023 40
 Boost converters: DCM operation
• AVG inductor current
𝐼𝐿,𝑝𝑘 𝐷𝑉 𝐷 2𝑉 𝑉𝑜
′ 𝑖 ′ 𝑖
𝐼𝐿 = 𝐷+𝐷 = ⋅ 𝐷+𝐷 = ⋅
2 2𝑓𝐿 2𝑓𝐿 𝑉𝑜 − 𝑉𝑖
Multiplies by 𝑉𝑖
2
𝐷2 𝑉𝑖2 𝑉𝑜 𝑉𝑜2 𝑉𝑜 𝑉𝑜 𝑅
𝑉𝑖 𝐼𝐿 = ⋅ = ⇒ − − ⋅ 𝐷2 = 0
2𝑓𝐿 𝑉𝑜 − 𝑉𝑖 𝑅 𝑉𝑖 𝑉𝑖 2𝑓𝐿
2𝑅 2
𝑉𝑜 1 + 1 + 𝑓𝐿 ⋅ 𝐷
⇒ =
𝑉𝑖 2
2
𝐷2 𝑉𝑖2
𝑉𝑜 𝑉𝑜2 2𝑓𝐿 𝑉𝑜 𝑉𝑜
𝑉𝑖 𝐼𝐿 = ⋅ = ⇒𝐷= ⋅ −
2𝑓𝐿 𝑉𝑜 − 𝑉𝑖 𝑅 𝑅 𝑉𝑖 𝑉𝑖

3/21/2023 41
 Boost converters: DCM operation
• DCM condition:
′
𝑉𝑖
𝐷+𝐷 ≤1 ⇒𝐷+ 𝐷≤1
𝑉𝑜 − 𝑉𝑖
𝑉𝑖 1
⇒𝐷 ≤1− =1−
𝑉𝑜 𝑀
In DCM:
2
2𝑓𝐿 𝑉𝑜 𝑉𝑜 2𝑓𝐿 2
1
𝐷= ⋅ − ⇒ ⋅ 𝑀 −𝑀 ≤1−
𝑅 𝑉𝑖 𝑉𝑖 𝑅 𝑀
2
2𝑓𝐿 𝑀−1
⇒ ⋅𝑀 𝑀−1 ≤
𝑅 𝑀
𝒇𝑳 𝑴 − 𝟏
⇒ ≤
𝑹 𝟐𝑴𝟑
3/21/2023 42
 Boost converters: Remaining questions
• How to drive the FET?
• Why voltage gain > 1?
• Inductor design?
• Output cap. selection?
• Voltage stress?
• FET selection?
• SBD or SiC Diode or …?
• CCM ⇔ DCM?
• Current sensing?
• Voltage sensing?
Typical control system of
• Applications? a Boost converter
3/21/2023 43
 Synchronous Boost converters
• Similar to Boost CCM
• High side diode ⇒ MOSFET
→ lower loss
→ bootstrap drive
• Dead-time is required
→ avoid shoot-through
• Small 𝐿 → high current
ripple → possibility of ZVS
→ low switching loss but
high RMS current
• Bidirectional operation
Typical waveform
3/21/2023 44
EE3410E POWER ELECTRONICS
NON-ISOLATED DC/DC CONVERTERS

BUCK-BOOST CONVERTERS
Dr. Nguyen Kien Trung
Dept. of IA, School of EE
Advance Power Electronic Systems Laboratory (APES Lab.)
 Buck-Boost converters: CCM

• CCM operation
𝑑𝑖𝐿
𝑣𝐿 = 𝐿
= 𝑣𝑖
S ON 𝑑𝑡
𝑑𝑣𝑜 𝑣𝑜
𝑖𝐶 = 𝐶 =−
𝑑𝑡 𝑅
𝑑𝑖𝐿 𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
𝑣𝐿 = 𝐿 = 𝑣𝑜
S OFF 𝑑𝑡
𝑑𝑣𝑜 𝑣𝑜
𝑖𝐶 = 𝐶 = −𝑖𝐿 −
𝑑𝑡 𝑅
• Average model
𝑑 𝑖𝐿
𝐿 = 𝐷𝑉𝑖 + 1 − 𝐷 𝑉𝑜
𝑑𝑡
𝑑 𝑣𝑜 𝑉𝑜
𝐶 = − 1 − 𝐷 𝑖𝐿 −
𝑑𝑡 𝑅
3/21/2023 46
 Buck-Boost converters: CCM
• At steady state
𝑑 𝑖𝐿
𝐿 = 𝐷𝑉𝑖 + 1 − 𝐷 𝑉𝑜 = 0
𝑑𝑡
𝑑 𝑣𝑜 𝑉𝑜
𝐶 = − 1 − 𝐷 𝑖𝐿 − = 0
𝑑𝑡 𝑅
𝑉𝑜 −𝐷
⇒𝑀= =
𝑉𝑖𝑛 1−𝐷
− 𝑉𝑜
⇒ 𝑖𝐿 =
𝑅 1−𝐷
• Buck zone:
𝐷 < 0.5 → 𝑀 ∈ [0, 1]
• Boost zone
𝐷 > 0.5 → 𝑀 ∈ [1, −∞]
Voltage gain characteristics
3/21/2023 47
 Buck-Boost converters: CCM

• RMS and AVG

currents
2
1 Δ𝐼
𝐼𝑆,𝑟𝑚𝑠 = 𝐼𝐿 𝐷 1+
12 𝐼𝐿
𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
2
1 Δ𝐼
𝐼𝐷,𝑟𝑚𝑠 = 𝐼𝐿 1−𝐷 1+
12 𝐼𝐿
𝐼𝑠,𝑎𝑣𝑔 = 𝐼𝐿 𝐷
𝐼𝐷,𝑎𝑣𝑔 = 𝐼𝐿 1 − 𝐷

• Reverse voltage
𝑉𝑟,𝑆 = ⋯
𝑉𝑟,𝐷 = ⋯
3/21/2023 48
 Buck-Boost converters: CCM

• Current ripple
𝑑𝑖𝐿
S ON: 𝑣𝐿 = 𝐿 = 𝑣𝑖
𝑑𝑡
• Assumes lossless:
𝐷𝑉𝑖 𝐷 − 1 𝑉𝑜 𝑆𝑜𝑛 𝑆𝑜𝑓𝑓
Δ𝐼𝐿 = =
𝑓𝐿 𝑓𝐿
• Voltage ripple
𝑡2
S ON: Δ𝑄𝑃 = න 𝑖𝑐 𝑡 𝑑𝑡 = Δ𝑉𝑐 ⋅ 𝐶
𝑡1
• Solve for Δ𝑉:
𝐷𝑉𝑜 Δ𝑉𝑐 𝐷
Δ𝑉𝑐 ≈ ⇒ =
𝑓𝑅𝐶 𝑉𝑜 𝑓𝑅𝐶
3/21/2023 49
 Buck-Boost converters: DCM

• Voltage gain
𝑅 2𝑓𝐿
𝑀=𝐷 ⇒𝐷=𝑀
2𝑓𝐿 𝑅
• CCM-DCM boundary 𝑆𝑜𝑛 𝑆𝑜𝑓𝑓

2𝑓𝐿
𝐷𝐵 = 1 −
𝑅
• Voltage ripple:
𝐷𝑉𝑜 Δ𝑉𝑐 𝐷
Δ𝑉𝑐 ≈ ⇒ =
𝑓𝑅𝐶 𝑉𝑜 𝑓𝑅𝐶

3/21/2023 50
EE3410E POWER ELECTRONICS
ISOLATED DC/DC CONVERTERS

FLY-BACK CONVERTERS
Dr. Nguyen Kien Trung
Dept. of IA, School of EE
Advance Power Electronic Systems Laboratory (APES Lab.)
 Flyback = Isolated Buck-Boost converters

Non-isolated Buck-Boost Inductor ➔ Transformer

converter

Change the polarity of the

secondary side transformer Move the FET to the low side
3/21/2023 52
 Flyback converters: CCM operation
D
Voltage gain:
𝑉𝑜 𝐷
=
S
𝑉𝑖 𝑛(1 − 𝐷)

Fly-back converter

S ON, D OFF
𝑉𝐿𝑚 = 𝑉𝑖

S OFF, D ON
𝑉𝐿𝑚 = −𝑛𝑉𝑜

3/21/2023 Typical waveform 53

 Flyback converters: CCM operation
D
Voltage gain:
𝑉𝑜 𝐷
=
S
𝑉𝑖 𝑛(1 − 𝐷)

Fly-back converter

Gain characteristics
3/21/2023 Typical waveform 54
 Flyback converters: CCM operation
D
• Current ripple
𝑑𝑖𝐿
S ON: 𝑉𝐿𝑚 = 𝐿𝑚 = 𝑉𝑖
𝑑𝑡 S
𝑛𝑉𝑜
Δ𝐼𝐿𝑚 = 1−𝐷 Fly-back converter
𝑓𝑠 𝐿𝑚
• Voltage ripple
𝐷𝑇
𝑣𝑜
S ON: Δ𝑄𝑁 = න 𝑑𝑡 = Δ𝑉𝑐 ⋅ 𝐶
0 𝑅
𝐷𝑉𝑜 Δ𝑉𝑐 𝐷
Δ𝑉𝑐 ≈ ⇒ =
𝑓𝑅𝐶 𝑉𝑜 𝑓𝑅𝐶

3/21/2023 Output voltage ripple 55

 Flyback converters: DCM operation
D
Volt-second balance:
𝑉𝑖 𝐷𝑇 = 𝑛𝑉𝑜 𝐷′ 𝑇
𝐷
S ⇒𝑀=
𝑛𝐷′
Fly-back converter
S ON, D OFF
𝑉𝐿𝑚 = 𝑉𝑖

S OFF, D ON
𝑉𝐿𝑚 = −𝑛𝑉𝑜

S OFF, D OFF
𝑉𝐿𝑚 = 0

3/21/2023 Typical waveform 56

 Flyback converters: DCM operation
D
Voltage gain:

𝑉𝑜 𝐷 𝑅
S 𝑀= =
𝑉𝑖 𝑛 2𝑓𝐿𝑚
Fly-back converter

CCM – DCM boundary

𝐷𝐵 𝐷𝐵 𝑅
𝑀= =
𝑛 1 − 𝐷𝐵 𝑛 2𝑓𝐿𝑚
Solve for 𝐷𝐵 :

2𝑓𝑠 𝐿𝑚
𝐷𝐵 = 1 −
𝑅
3/21/2023 57
 Flyback converters: DCM operation
D
• Current ripple
𝑑𝑖𝐿
S ON: 𝑉𝐿𝑚 = 𝐿𝑚 = 𝑉𝑖
𝑑𝑡 S
𝑛𝑉𝑜
Δ𝐼𝐿𝑚 = 1−𝐷 Fly-back converter
𝑓𝑠 𝐿𝑚
• Voltage ripple
𝐷′ 𝑇
𝑣𝑜
S ON: Δ𝑄𝑃 = න 𝑑𝑡 = Δ𝑉𝑐 ⋅ 𝐶
0 𝑅
𝐷𝑉𝑜 Δ𝑉𝑐 𝐷
Δ𝑉𝑐 ≈ ⇒ =
𝑓𝑅𝐶 𝑉𝑜 𝑓𝑅𝐶

3/21/2023 Output voltage ripple 58

 Flyback converters: Challenges

Challenges
• Transformer? Or inductor?
• CCM or DCM?
• Voltage spike on FET?
• RCD snubber design? Fly-back with lossless snubber
• Lossless snubber?
• Soft-switching flyback?
• Secondary synch. rec.?
• Isolated feedback?
• Primary control?
• Multi-output? Fly-back with Active Clamp and ZVS
3/21/2023 59
EE3410E POWER ELECTRONICS
ISOLATED DC/DC CONVERTERS

HALF-BRIDGE CONVERTERS
Dr. Nguyen Kien Trung
Dept. of IA, School of EE
Advance Power Electronic Systems Laboratory (APES Lab.)
 Half-bridge DC/DC converter diagram

• Structure
𝐿
A
𝑖𝐿
𝐶 𝑅
𝑣𝐴 𝑣𝑜

DC Switching Xfor Rect- Output DC

source network mer ifier filter load
Equivalent
Circuit diagram circuit
3/21/2023 61
 HB DC/DC converters: CCM

• PWM
Modulation

• Voltage gain:
𝑉𝑜 𝐷
𝑀= =
𝑉𝑖 𝑛
(D < 0.5)
3/21/2023 HB DC/DC with PWM 62
 HB DC/DC converters: DCM

• HB DC/DC with
PWM

•Voltage gain:
1
𝑀=
4𝑓𝐿
𝑛 1+ 1+
𝑅𝐷2
(D < 0.5) HB DC/DC CCM with PWM
3/21/2023 63
 HB DC/DC converters: challenges

Challenges
• Transformer design?
• Inductor design?
• Selection of Cc?
• CCM or DCM?
• High-side FET drive?
• Hard-switched or Soft-
switched? Resonant?
• Secondary synch. rec.?
• Isolated feedback?
• Applications? HB DC/DC with different rec. types
3/21/2023 64
 Transformers: a brief intro
•Magnetizing mechanism 1
𝑉𝑝 → 𝐼𝑚 → Φ → 𝑉𝑠 → 𝐼𝑠 𝐼𝑚 = න𝑣𝑝 𝑑𝑡 ;
𝐿𝑚
𝐿𝑚 𝐼𝑚
Φ= ;
𝑁1
𝑑Φ
𝑣𝑝 = 𝑁1 ;
𝑑𝑡
𝑑Φ
𝑣𝑠 = 𝑁2 ;
𝑑𝑡
𝑣𝑠
Two winding transformer 𝑖𝑠 =
𝑅𝑠
3/21/2023 65
EE3410E POWER ELECTRONICS
ISOLATED DC/DC CONVERTERS

FULL-BRIDGE CONVERTERS
Dr. Nguyen Kien Trung
Dept. of IA, School of EE
Advance Power Electronic Systems Laboratory (APES Lab.)
 Full-bridge converter

• Modulation method
• PWM
• Phase shift (PSM)
S1 S4 S1

S2 S3 S2

FB DC/DC with PWM FB DC/DC with PSM

3/21/2023 67
 Full-bridge converter: CCM

• FB DC/DC
with PWM

•Voltage gain:
𝑉𝑜 2𝐷
𝑀= =
𝑉𝑖 𝑛
(D < 0.5)
FB DC/DC CCM with PWM
3/21/2023 68
 Full-bridge converter: DCM

• FB DC/DC
with PWM

•Voltage gain:
2
𝑀=
4𝑓𝐿
𝑛 1+ 1+
𝑅𝐷2

(D < 0.5)
FB DC/DC CCM with PWM
3/21/2023 69
 FB DC/DC converters: challenges

Challenges
• Transformer design?
• Inductor design?
• Modulation method?
• CCM or DCM?
• High-side FET drive?
• Soft-switching range?
• Resonant variant?
• Secondary synch. rec.?
• Dual-Active-Bridge?
• Applications? HB DC/DC with different rec. types
3/21/2023 70
EE3410E POWER ELECTRONICS
ISOLATED DC/DC CONVERTERS

RESONANT CONVERTERS
Dr. Nguyen Kien Trung
Dept. of IA, School of EE
Advance Power Electronic Systems Laboratory (APES Lab.)
 General principle circuit

• Switch network: Convert DC to • General principle circuit.

AC: half-bridge or full-bridge
• Resonant tank network: LC,
LCC, LLC
• Rectifier, AC-DC: Diode rec. or
synchronous rec.
• Output low pass filter: C or LC
• Switching frequency up to MHz • ZVS: Zero voltage switching
to reduce the weight and size of
• ZCS: Zero current switching
converter.

3/21/2023 72
 Fundamental harmonic approximation
1. Switch network: Convert DC to • Voltage waveform
AC.

4U g
• Output voltage: us ( t ) =  sin ( nst )
 n=1,3,5,...
• Current waveform.
Fundamental: 4U g
u s1 ( t ) = sin st = U s1 sin st


• Output current: is ( t ) = I s sin (st − s )

• Input current: I = 2 i dt = 2  I sin ( −  ) d
T /2 s

g  s
Ts 0
 s1  s
0

2
= I s1 cos s


3/21/2023 73
 Fundamental harmonic approximation

2. Rectifier: Convert AC to DC. • Key waveform.

• Input current: iR ( t ) = I R sin (st − R ) • Fundamental of input voltage:

• Output current:
 + R
2 2
I=  I R1 sin ( −  R ) d = I R1
  4Uo
 R
uR1 ( t ) = sin (st − R )

• Equivalent resistance load:
u R1 ( t ) 8 U o
Re = =
iR1 ( t )  2 I

3/21/2023 74
 Fundamental harmonic approximation

3. Resonant tank. • Block diagram.

• Transfer function:
U R1 ( s )
= H (s)
U s1 ( s )
• Voltage ratio:
U R1
= H ( s ) s = j
U s1 s

• Current relationship:

U R1 1
I R1 = = H ( s ) s= j U s1
Re Re s

3/21/2023 75
 Fundamental harmonic approximation

4. Voltage scale factor: • Equivalent block diagram of

M = Uo/Ug. resonant converter.
Uo
M= = H ( s ) s= j
Ug s

• Voltage scale factor depends on

switching frequency fs,
independent with load. This is
fundamental characteristic of
resonant converters.

3/21/2023 76
 Series resonant converter

M = H ( s ) s= j =
1 • Fundamental harmonic
equivalent model of SR
2
1 
s

1 + Qe2  − F 
F  converter.
• F=fs/fo

• . Re Re
H (s) = =
Z i ( s ) R + sL + 1
e
sC
s
Qeo
= 2
s  s 
1+ + 
Qeo  o 
1 L R
o = ; Ro = ; Qe = o
LC C Re

3/21/2023 77
 Parallel resonant converter

• Output LC filter, current is flat. • Fundamental harmonic

Then the input current is square equivalent model of SP
waveform. converter.
• Fundamental harmonic:
4I
iR1 ( t ) = sin (st − R )

• Resonant tank output voltage:
uR1 ( t ) = U R1 sin (st − R )
• Equivalent load resistance:

u R1 ( t )  U R1
Re = =
iR1 ( t ) 4I

2
Re = R  1, 2337 R
8

3/21/2023 78
 Parallel resonant converter
• Fundamental harmonic
equivalent model of SP
converter

Zo ( s ) 1
H (s) = Zo ( s ) = sL Re
sL sC

8 Zo ( s ) 8 1
M = = 2
 2
sL s = j   s 
s
2
s
1+ + 
Qeo  o  s = js

8 1
=
2  
2

(1 − F 2 ) +  QF 
 e

3/21/2023 79
 LLC resonant converter

• Switch network can be half- • LLC resonant converter.

bridge or full-bridge.
• Resonant tank is CrLr. In series
with transformer which has
magnetizing inductor Lm.
• Equivalent resistance load

8
Re = R
2

8n 2
Rac = n Re =2
R
 2 Cr Lr

n:1
LM
Re
Máy biến áp lý
tưởng

3/21/2023 80
 LLC resonant converter

•  = Lr/Lm ; • Voltage scale factor:

• Z = L Series impedance;
o
r M=Ug/Uo
Cr
 2 LmCr Rac
Zo  2 Zo M=
• Q= Quality factor.
=  2   2 
Re 8R j 1 − 2  Lm + Rac 1 − 2 
  
• At p, M = Mmax.  o   p 

• At fs = fo = o/2, M = 1

.
M = f ( f s , , Q )
• Where:

1 1
o = ; p =
Lr Cr ( Lm + Lr ) Cr

3/21/2023 81
 LLC resonant converter

3/21/2023 82
 LLC resonant converter
• ZCS: Zero current switching
• Condition: fs < fo
• Soft turn-off
• Hard turn-on:
• High peak current due to the
diode recovery current.
• Switching voltage: uDS = Ug.
• High switching power loss
.

3/21/2023 83
 LLC resonant converter
• ZVS: Zero Voltage Switching
• Condition: fs > fo
• Soft turn-on
• Hard turn-off:
• No peak current/peak voltage
• Low switching power loss
.

3/21/2023 84
 Problems
1. A buck converter has Vi = 22 ~ 32 VDC, Vo = 14 VDC, Io = 0.2~2
A, and fs = 40 kHz. Find the minimum inductance L required to
maintain the converter operation in the continuous conduction
mode.
2. A buck PWM converter has Vi = 10 ~ 14 Vdc, Vo= 5 Vdc, Io= 0.2~1
Adc, fs = 200 kHz, L = 100 μH, C = 100 μF, and rC = 20 mΩ. Find the
ripple voltage Vr and (Vr/Vo) × 100%.
3. A buck converter operating in CCM has a MOSFET whose rDS =
0.025 Ω. The load current is Io = 10 Adc. Determine the MOSFET
conduction loss at D = 0.1, 0.5 and 0.9.
4. A buck converter operating in CCM has a diode whose RD = 0.025
Ω and VD0 = 0.3 V. The load current is Io = 10 A. Determine the diode
conduction loss at D = 0.1, 0.5 and 0.9.
5. A buck converter has the following specifications: Vi = 4–6 V, Vo =
3 V, Io = 0–5 A, fs = 250 kHz, and Vr/Vo ≤ 2%. Assume η = 0.9. Find
L, C, and rC.
3/21/2023 85
 Problems
1. A boost PWM converter has the following data: VI = 125–350 V,
VO = 380 V, PO = 6.8–68 W, and fs = 50 kHz. Compute the voltage
and current stresses of the transistor and the diode.
2. A boost PWM converter has the following data: VI = 8–16 V, VO =
24 V, IO = 0.2–2 A, and fs = 200 kHz. Calculate the minimum
inductance required for the converter operation in CCM. Assume η =
90%.
3. A boost PWM converter employs a power MOSFET with an on-
resistance rDS = 0.02 Ω. The load current is IO = 10 A. Calculate the
transistor conduction loss at D = 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8,
and 0.9.
4. Design a boost PWM converter with the following specifications:
Vimin = 90 2 V, Vimax = 240 2 V, VO = 400 V, IO = 0.2–2 A, Vr/VO ≤
1%, rL = 2.5 Ω, rDS = 1 Ω, RF = 25 mΩ, VF = 0.7 V, rC = 50 m Ω, and fs
= 50 kHz. Find L, C, and total conduction loss.
3/21/2023 86
 THANKS
FOR
ATTENTIONS

3/21/2023 87