19/12/2022 ---->

CH-4:- Combinational Logic Design

Half Adder/subtractor
Full Adder/subtractor
Code convertor (gray to binary and binary to
gray)Seven segment display

20/12/2022 ---->

BCD to seven segment converter/Seven

segment to BCD converter Analysis
Procedure
Property Generator and checker
Parity checker

21/12/2022 ---->
CH-5:- Combinational Logic Design with MSI and LSI

2/4-Bit parallel Adder

2/4-Bit parallel Subtractor
2/4-Bit parallel Adder/Subtractor
Magnitude Comparator
BCD Adder
Decoder

22/12/2022 ---->
 Function Implementation using Decoder
Encoders
Multiplexer and Demultiplexer
Function Implementation using Multiplexer and
Demultiplexer

23/12/2022 ---->

FUNCTION
RECURSIVE FUNCTION

24/12/2022 ---->

POINTER
STRUCTURE AND UNION

25/12/2022 ---->

CSS
JAVASCRIPT

26/12/2022 ---->

BOOTSTRAP
WEBHOSTING

27/12/2022 ---->
CH-6:- Sequential Circuits

R-S flip-flop(using nor gates)

R-S flip-flop(using Nand gates gates)

28/12/2022 ---->

DE CH-6 REMAINING TOPICS

29/12/2022 ---->

ANY BACKLOG FROM FUTHER TOPICS

30/12/2022 ---->

CH-2 :- Partial Differentiation And Its Application

Taylor’s Expansion for two variable Function

Taylor’s series
Error and Approximation

CH-3:- Integral Calculus

Reduction Formula

31/12/2022 ---->

Beta and Gamma Function

 Relation between Beta and Gamma Function
Eulus Formula

CH-4:- Multiple Integral

Double integration with respect to.

01/01/2023 ---->

Change of order of integration

Transformation of variables by Jacobian only
for double integration
Change into polar coordinates in double integrals only
Triple integral.

REVISION OF CALCULUS