Application Guide Volume I AG2000-05

Improvements to the Loss-of-Potential (LOP)

Function in the SEL-321
Jeff Roberts and Ralph Folkers

INTRODUCTION
Loss-of-Potential (LOP) logic must operate faster than distance or directional elements for true
LOP conditions while not operating for system fault conditions. New ELOP setting options of
the SEL-321 Relay enable new LOP logic which meets both of these operational criterion while
simplifying the relay setting task. The purpose of this guide is to describe the new LOP logic and
to identify applications where you should consider changing from the traditional LOP logic to the
new LOP logic.
Because this new LOP function operates in less than one-half cycle, distance element security is
much less dependent on the supervisory overcurrent elements. These overcurrent elements may
be set to their minimum pickup if desired. (Always check that the minimum overcurrent
thresholds are set below minimum fault levels to ensure correct distance relay operation.) If the
intended application has high load with a low power factor (e.g., pf ≤ 0.9), use the
load-encroachment feature of the relay for additional LOP security during high-load conditions.

Loss-of-Potential Detection Logic Purpose

Many protective relays and control devices include LOP logic to detect the loss of one or more
incoming ac potential circuits. Fuses or molded case breakers protect the power system voltage
transformers (vts) against short circuits in the secondary wiring (external to the vts). In those
applications using fuses to protect the vt secondary circuits, one, two, or all three fuses can blow
and remove the ac potential from the relay. In the case of molded case circuit breakers, all three
potentials are removed from the relay at once regardless of the type of load-side short circuit. For
this reason, protective relays should include LOP logic which detects the loss of all three potential
inputs.
Molded case breaker (MCB) protection without LOP detection logic is commonplace in many
existing applications where older technology relays use negative-sequence voltage. The
reasoning for this MCB preference was twofold: 1) someone could not accidentally leave one
fuse out of service, and 2) if a short circuit did develop on the vt secondary, the MCB removed all
three potentials. In both cases the magnitude of negative-sequence voltage (V2) is zero. Since
these older relays require a minimum amount of V2 to operate, the loss of all three phase
potentials effectively blocks their operation. This same minimum V2 threshold also limited their
fault resistance coverage [1].

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 LOP detection logic is required in relays using ac voltages as inputs to distance, directional, or
control logic where LOP can cause false logic outputs. These false outputs can result in an
undesirable trip.
Let us look at a negative-sequence directional element used for supervising distance elements and
sensitive ground overcurrent elements. This directional element uses all three phase voltages to
calculate V2 (V2 = 1/3 • [Va + a2 • Vb + a • Vc]), where a = 1∠120° and a2 = 1∠-120°). Under
normal operating conditions V2 is approximately zero. This same quantity is non-zero for
unbalanced faults (phase-to-phase, phase-to-phase-to-ground, and ground faults). The protective
relay uses the V2 magnitude and phase angle in conjunction with negative-sequence current I2
(I2 = 1/3 [Ia + a2 • Ib + a • Ic]) to make forward and reverse directional decisions. It is important
for the directional decision to be independent of load flow magnitude or direction. This is a very
desirable trait of negative-sequence directional elements. In the case of a single blown vt fuse,
the loss of the associated ac voltage input to the negative-sequence voltage calculation results in a
false negative-sequence voltage. This false sequence voltage can cause the directional element to
give an incorrect directional decision for a subsequent power system fault occurring on a phase
not associated with the blown potential fuse. The missing phase voltage can cause distance
elements to undesirably operate for out-of-section faults if the fault is on the same phase as that of
the missing voltage.
Until the potential is restored, there is no corrective action that the relay can make except to
declare an LOP condition and either block directional elements or force a directional declaration.
Before making either a block or forced directional decision, the relay must first detect an LOP
condition.

SEL-321-1/-2 RELAY LOP SETTING OPTIONS

The SEL-321-1/-2 Relay LOP setting options are listed below. Note that the last three setting
options are the new setting options:
ELOP =N Previous LOP logic for monitoring only. LOP declarations do not block
protection functions (see Figure 1).
=Y Previous LOP logic enabled to block protective elements and forces
directional declarations to forward (i.e., distance elements are blocked,
51N/67N and 51Q/67Q elements are non-directional).
= Y1 Enables the new LOP logic. LOP declarations block all distance and
directional element declarations.
= Y2 Enables the new LOP logic. LOP declarations block distance elements
and defaults directional declarations to forward.
= N1 Enables the new LOP logic for monitoring purposes only. LOP
declarations do not block protection functions.

2 SEL Application Guide 2000-05 Date Code 20000927

DESCRIPTION OF TRADITIONAL LOSS-OF-POTENTIAL (LOP) LOGIC
Figure 1 shows the traditional LOP logic which detects one, two, or three blown potential fuses.
This logic is based upon detecting negative-sequence voltage in the absence of negative-sequence
current.
ELOP = Y
(setting)
50QF 50Q
Relay
50QR (setting) Word
LOPD Bits
ILOP
59QL 0 CYC S Q
LOP
59PL
R
50M
RESET has
Priority over
SET
SPO

Figure 1: Traditional LOP Logic

The logic in Figure 1 discriminates between faults (which may reduce voltage magnitudes to
nearly zero) and loss-of-potential. Note that the voltage and current thresholds are user settable
and require some degree of setting coordination. The following equation shows the LOP
detection logic in Boolean form:
SET LOP1 = [NOT(50QF + 50QR) * 59QL] Detects the presence of negative-sequence
voltage in the absence of negative-sequence
current.
+ [NOT(59PL) * NOT(50M)] Detects the absence of positive-sequence
voltage in the absence of current above the
50M setting.
Where:
50QF Low-set, negative-sequence overcurrent detector2
50QR Low-set, negative-sequence overcurrent detector2
50M Medium-set, phase overcurrent element
59QL Low-set, negative-sequence overvoltage detector
59PL Low-set, positive-sequence overvoltage detector
* Logical AND
+ Logical OR
Note 1: If ELOP = Y, ILOP (Internal Loss-of-Potential) follows the state of LOP.
Note 2: The relay uses these fault detectors for the negative-sequence directional element
supervision.

Date Code 20000927 SEL Application Guide 2000-05 3

 For one or two blown fuses, the relay asserts LOP when the measured negative-sequence voltage
exceeds the 59QL setting and the negative-sequence current is below the 50QF and 50QR settings
for longer than the LOPD time delay.
For three blown vt fuses, the relay asserts LOP when the measured positive-sequence voltage is
below the 59PL and the medium-set phase overcurrent detector (50M) is deasserted.
Determine how the relay uses loss-of-potential detection with the ELOP setting. The previous
ELOP settings and their results were:
N Relay sets LOP (and not ILOP) when LOP conditions are present. Distance and
directional elements are not blocked. Set the LOP element in a SELOGIC® control
equation to indicate LOP for local or remote annunciation. An asterisk (*) is placed in
the LOP column of the relay event report.
Y Relay sets LOP and ILOP elements when a loss-of-potential condition is present.
Distance elements are blocked and directional elements default forward (i.e.,
directional elements set to pickup in the forward direction act as non-directional
elements while reverse direction elements are blocked). Set the LOP element in a
SELOGIC control equation to alarm for LOP conditions.
The 50QF, 50QR, and 59QL elements must be set above the normal expected system unbalance.
The 50M pickup setting value requires that the element must never be picked up for load current,
yet also be set below the minimum fault current level for which the relay is required to trip.

DESCRIPTION OF IMPROVED LOP LOGIC

The new LOP logic addresses the weaknesses of traditional LOP detection in some systems.
(Note that these weaknesses are not present in all applications.) In addition, this new logic does
not require you to set the LOP logic thresholds.

Improved LOP Logic Operating Principle

The new logic is based upon measuring a decrease in the magnitude of positive-sequence voltage
without a simultaneous change (magnitude or angle) in either the positive-sequence or the
zero-sequence currents. Figure 2 gives an overview of the improved LOP logic.

4 SEL Application Guide 2000-05 Date Code 20000927

 |V1| |I1|
START Yes
decreasing? changing?
1
2

No

No

∠ I1
Yes
changing?

No

|I0|
Yes
changing?

No
Yes

∠ I0 Declare
END Yes No
changing? LOP
5

Figure 2: Improved LOP Logic Process Overview

The following text gives additional description of the steps in Figure 2:

1. Magnitude of positive-sequence voltage is decreasing.
Measure positive-sequence voltage magnitude (called |V1(k)|, where k represents the
present processing interval result) and compare it to |V1| from one power system cycle
earlier (called |V1(k - 1 cycle)|). If |V1(k)| ≤ 0.9 • |V1(k - 1 cycle)|, then assert LOP if all of the
conditions in the next steps are satisfied. This is the decreasing delta change in
V1 (-∆|V1| > 10%) shown as an input in the logic diagram of Figure 8.
2. Positive-sequence current magnitude not changing.
Measure positive-sequence current magnitude (|I1(k)|) and compare it to |I1(k - 1 cycle)| from
one cycle earlier. If this difference is greater than 10% of nominal current, the
condition measured is not an LOP even if Step 1 and the conditions in the next steps
are met. This input is labeled as ∆|I1| > 10% in Figure 8.

Date Code 20000927 SEL Application Guide 2000-05 5

 3. Positive-sequence current angle is not changing.

Measure positive-sequence current angle (∠I1k) and compare it to ∠I1(k - 1 cycle) from one
cycle earlier. If this difference is greater than 5°, then the condition measured is not an
LOP even if Steps 1 and 2 and the conditions in the next steps are met. This input is
labeled as ∆∠I1 > 5° in Figure 8. If |I1| < 0.05 • INOM, this angle check does not block
LOP.
4. Zero-sequence current magnitude is not changing.
Measure zero-sequence current magnitude (|I0k|) and compare it to |I0(k - 1 cycle)| from one
cycle earlier. If this difference is greater than 10% of nominal, the condition measured
is not an LOP even if all other conditions are met. This input is labeled as ∆|I0| > 10%
in Figure 8.
5. Zero-sequence current angle is not changing.

Measure zero-sequence current angle (∠I0k) and compare it to ∠I0(k - 1 cycle). If this
difference is greater than 5°, the condition measured is not an LOP even if all other
conditions are met. This input is labeled as ∆∠I0 > 5° in Figure 8. For security this
declaration requires that |I0| be greater than 1.6% of INOM to override an LOP
declaration.
If the criteria identified in all five steps listed above is met, the improved LOP logic declares an
LOP condition. This LOP condition is reset when balanced voltages at near “nominal” levels are
restored to the relay. The factory default setting for nominal secondary voltage is 57 VL-N
(100 VL-L). To change the nominal voltage, set the LPVNOM setting in the calibration access
level to match your application. The setting range for LPVNOM is 30–100 VL-N secondary.

WHEN TO CONSIDER SETTING ELOP = Y1

(BLOCK DISTANCE AND DIRECTIONAL ELEMENTS)
In the SEL-321 Relay, you enable or disable LOP detection via the ELOP setting. The previous
ELOP setting options were Y or N. These setting options are still available if you wish to
maintain your existing setting philosophy. Setting ELOP = Y1 (Y2 or N1) enables the new,
patented method of blown potential fuse detection. In addition to the superior performance, this
new method has the additional benefit of reducing setting complexity.
The following case studies describe applications where you should consider enabling the new
LOP logic by setting ELOP = Y1.

CASE 1. Weak Source and Heavy Load Flow

The most onerous system condition to discriminate between faults and LOP conditions is one
where the end-of-line fault duty is below load. The traditional LOP logic work-around for this
has been to adjust the positive-sequence voltage threshold such that the phase overcurrent
element (50M in Figure 1) picks up for a fault where the 59PL element is dropped out. However,
you may not be able to achieve a suitable positive-sequence voltage threshold when transmission
lines are electrically short, heavily loaded, and the positive-sequence source impedance behind
the relay location is weak. Figure 3 shows a system single line diagram of an application that
illustrates this problem.

6 SEL Application Guide 2000-05 Date Code 20000927

 SOURCE S SOURCE R
LINE 1
52-1 52-2

Relay 1 Relay 2

m=0 m=1

Source S: ZS1 = 16.2 Ω ∠ 88.2°

Source R: ZR1 = 0.10 Ω ∠ 90.0°

Line 1: ZL1 = 1.10 Ω ∠ 84.8°

Figure 3: System Single-Line Diagram

Table 1 lists the positive-sequence voltage and current values seen by Relay 1 for the three
system conditions in Figure 3:
1. Maximum load with no fault,
2. Three-phase fault at m = 0,
3. Three-phase fault at m = 1.

Table 1: Positive-Sequence V and I for Load-In and Three-Phase Faults at m = 0 and 1

System Condition Positive-sequence I (I1) Positive-sequence V (V1)

Load–no fault 3.92 A ∠+151.00° 63.93 V ∠-3.54°
3-Phase Faults at m = 1 3.88 A ∠-148.95° 4.33 V ∠-64.7°
3-Phase Faults at m = 0 4.15 A ∠-149.21° 0.00 V ∠undefined°

From Table 1, we see that the maximum load condition requires you to set the 50M element
pickup greater than 3.92 A secondary (in the traditional LOP scheme). Given a typical setting
margin of 10%, this dictates setting 50M > 4.31 A secondary. For the three-phase fault values
shown in Table 1, the 50M element never picks up for forward faults. Referring back to Figure 1,
the three-phase LOP sets when the 59PL and 50M elements are both dropped out. Because 50M
is never picked up in this application, and a three-phase fault at m = 0 gives us V1 = 0 V, we see
that you cannot set 59PL low enough to avoid setting ILOP for a three-phase fault immediately in
front of the relay. In this situation the traditional LOP blocks the phase distance and directionally
controlled phase overcurrent elements. Another tripping solution for the fault at m = 0 would be
to use non-directional phase overcurrent elements since these elements do not rely on voltage
quantities. However, this solution is spoiled by the fact that the phase-current magnitude for
faults behind the relay location (reverse faults) is greater than that for faults in front of the relay
location (forward faults). Non-directional elements do not give fault direction discrimination for
this application and therefore cannot be used for tripping without further qualification such as a
time delay.
The traditional loss-of-potential logic must be disabled for applications such as the one just
described.

Date Code 20000927 SEL Application Guide 2000-05 7

CASE 2. Equal Line and Source Strengths, Mid-line Fault, No Load Flow

For the fault shown in the Figure 4, no fault current flows through the healthy line due to the
equal sources (equal voltages at both line ends) and the fault placement. With the traditional LOP
logic, the healthy line relays measure negative-sequence voltage and no negative-sequence
current for unbalanced faults. These measurements undesirably set the traditional LOP logic
during a midline fault. This traditional LOP logic then prevents the relays on Line 1 from
tripping if the fault evolves from Line 2 to Line 1. If the fault evolves before the LOPD timer
expires, the traditional LOP logic does not set and the undesirable LOP latching does not occur.
If the fault does not evolve to Line 1, the traditional LOP logic resets when the relay is presented
with balanced phase voltages.
The new LOP logic does not latch for any of these scenarios. During the fault on Line 2, the
relays on the healthy line measure a decrease in positive-sequence voltage while neither the
positive-sequence or zero-sequence current magnitudes or angles change (no load case). For this
situation, LOP asserts but is not latched for 60 cycles. This 60-cycle delay is adequate time for
the relaying on the faulted line to detect the fault and trip the associated breakers. Please note
that this is a special case where both lines have the same impedance and the source strengths on
either line end are exactly equal. In a traditional LOP scheme, LOP latches (based on
negative-sequence voltage with no negative-sequence current) for the relays on the unfaulted
line with no opportunity to reset if the fault evolves to Line 1.

BUS S BUS R
LINE 2
52-3 52-4

SOURCE S SOURCE R
Relay 3 Relay 4
Fault
m = 0.5
LINE 1
52-1 52-2

Relay 1 Relay 2

Figure 4: Single-Line Diagram of Mid-Line Fault

CASE 3. Single Source, Remote Fault, No Load

For the fault shown in Figure 5, very little or no current flows in three of the four breakers shown.
Let us assume the protection scheme is using a communications-assisted tripping scheme.
The traditional LOP logic sets at Relays 2–4. Setting the traditional LOP forces the relay
directional declarations to forward. This declaration makes all forward reaching negative-
and zero-sequence directional elements non-directional–67Q2 and 67N2, respectively. After
Breaker 1 opens, the fault current redistributes and flows through both lines. The desired
breaker for tripping in this case is Breaker 2. However, since Relays 2–4 measure fault current
magnitudes above their 67N2/Q2 element thresholds, and these elements are non-directional, the
communication tripping scheme trips the healthy line breakers. If the line relaying is not using
communications-assisted tripping, Line 2 does not trip if the scheme is properly time coordinated.

8 SEL Application Guide 2000-05 Date Code 20000927

 However, such time coordination is very difficult to achieve when you consider all possible
source and line configurations.
The new LOP logic does not latch for the scenario described above. For the fault shown, all
relays measure a decrease in positive-sequence voltage magnitude. Relays 2–4 may measure no
significant change in positive- or zero-sequence current magnitude or angle. Again, LOP asserts
but is not latched for 60 power system cycles to permit time for the relaying and breaker closest
to the fault to trip. Once the fault current redistributes, the current change detectors of the new
LOP logic reset any LOP declaration and restore directionality to the protection scheme.
Again, with the traditional LOP logic, an LOP declaration automatically defaults the directional
decision forward. This declaration can create security issues for communications-assisted
tripping schemes for out-of-section faults following an LOP declaration. Selecting ELOP = Y1
now blocks any directional declarations. We recommend this be used in any scheme where an
incorrect directional declaration would lead to a false trip.

BUS S BUS R
LINE 2
52-3 52-4

SOURCE S
Relay 3 Relay 4

LINE 1
52-1 52-2

Relay 1 Relay 2
Fault

Figure 5: Single-Line Diagram for One Source Systems (or Weak Source at Bus R)

Case 4: Crossed Connectors

One onerous event, which causes vt secondary fuses to blow, is when someone drops a metal tool
across two fuses (see Figure 6). If only one fuse blows, the relay is still presented with full phase
voltage on all three fuses. However, two of these phase voltages presented to the relay are the
same. LOP logic which only checks the magnitude of each phase voltage presented to the relay
cannot detect this condition. Both the traditional and the improved LOP logic detect this
condition and assert LOP. The new LOP logic detects a drop in positive-sequence voltage
without a corresponding change in positive- or zero-sequence current thereby causing ILOP to
set.

Date Code 20000927 SEL Application Guide 2000-05 9

 A B C
Fuses

To Relay

blown

vt

Figure 6: Phase-to-Phase Fault on the Load Side of VT Fuses

Recall that it is very desirable for the LOP logic not to set for system fault conditions. Figure 7
shows an application example where a tower bypass jumper fails and drops the B-Phase
conductor onto the lower A-Phase conductor. The protection scheme tripped Breakers 1 and 2 for
the initial fault. Reclosing Breaker 1 does not create a fault condition, as Breaker 2 must close to
complete the short circuit of phases A and B.
If the relaying scheme at Breaker 2 uses line side vts, closing Breaker 1 does not set ILOP as this
action causes an increase in positive-sequence voltage. For this scenario, the traditional LOP
scheme sets when Breaker 2 is open due to the presence of negative-sequence voltage without
negative sequence current. Setting LOP for this event is undesirable as it prevents the distance
and directional protective elements from tripping high-speed upon closing Breaker 2. With bus
side vts, closing Breaker 2 does cause a drop in positive-sequence voltage but the increase in
current prevents ILOP from setting.

Crossed Conductors
A

Open Phase

Breaker 1 Breaker 2

Figure 7: Tower By-Pass Jumper Failure Causes an A-B Phase Fault

10 SEL Application Guide 2000-05 Date Code 20000927

Date Code 20000927
ELOP = Y1
ILOP
2
60
-∆|V1| > 10% LOP
1 CYC S Q
0
3
OSB
3PO R
SPO

Reset has Priority

∆∠I1 > 5° 4 0 5

Figure 8: Improved LOP Logic Diagram

∆|I1| > 10% 60
CYC
∆∠I0 > 5°
∆|I0| > 10%

SEL Application Guide 2000-05

|VA| > 0.9 • VNOM
|VB| > 0.9 • VNOM
|VC| > 0.9 • VNOM
6 1 8
1
CYC
|V1| > 0.88 • VNOM
|V0| < 0.088 • VNOM 0
LOP (last interval)
3PO
7
SPO

11
Improved LOP Logic Diagram

Refer to Figure 8 for the location of the Logic Points described below.
Logic Point ! This point is a logical one when |V1| is less than 90% of |V1| one cycle earlier.
This comparator threshold of 0.9 is appropriate for speed and security. The
LOP logic must be fast enough to detect blown fuses and issue an LOP block
before any protective elements which use voltages in their trip decision can
operate. The higher the threshold compare, the quicker that Logic Point 1
asserts for blown potential fuse conditions. However, a higher threshold risks
false LOP declarations. The magnitude of V1 must be greater than 5 V to
enable -∆|V1| detection.
The plots shown in Figure 9 and Figure 10 illustrate the need for rapid LOP declarations when the
protected line is carrying full load. Figure 9 shows the positive-sequence voltage and current
magnitudes (secondary quantities), respectively. For our example, we presented the relay with
69.4 V secondary, and the nominal secondary current of 5 A ∠-33.8° before removing all phase
voltages. In this application, we set the Zone 1 reach to 80% of a 15.6 Ω secondary line: Z1P =
12.48 Ω.
Notice from the upper plot of Figure 9 that the positive-sequence voltage drops to 90% of 69.4 V
(62.82 V) in approximately one quarter cycle or two relay processing intervals. The -∆|V1|
criterion is satisfied before Cycle 0.25.
Positive-Sequence Voltage Magnitude
80

69.4 V
Secondary Volts

70

62.82 V
60

50
-.5 0 .5 1 1.5 2 2.5

Positive-Sequence Current Magnitude

6

4
Secondary Amps

0
-2 -1 0 1 2 3 4 5 6 7 8 9
Cycles

Figure 9: Voltage and Current Plots for a Three-Phase LOP Condition

12 SEL Application Guide 2000-05 Date Code 20000927

 Figure 10 plots the minimum phase distance element reach required for the relay to just pickup
for the given voltage and current presented to the relay. For example, for the pre-LOP condition
shown in Figure 10 (Cycle 0), the minimum reach required for a phase distance element to pickup
is 22.5 ohms secondary. Every processing interval the relay compares the calculated minimum
reach against the scalar threshold reach settings for Zones 1–4. When the calculated minimum
reach is less than the set reach for a particular zone, the relay declares that zone of distance
protection picked up.
From Figure 10, notice that all three phase-to-phase distance element minimum reach calculations
cross the Zone 1 threshold after the LOP event. The AB phase distance element is the first phase
distance element to cross the Zone 1 threshold at 0.5 cycles. Recall from Figure 9 that the
improved LOP logic picked up before Cycle 0.25 and blocked the distance elements’ output.
Phase Distance Reach Calculation Results—AB: Solid +; BC: Large Dash x; CA: Small Dash *
25

20
Reach Required to Detect Fault

15 Zone 1
Threshold

10 AB BC
CA

0
-.5 0 .5 1 1.5 2 2.5
Cycles

Figure 10: Distance Element Operating Speed Slower Than LOP Logic Speed

For LOP conditions which occur during heavy load and high-load angles, the distance elements
operate faster than for heavy load conditions with unity power factor. In these instances, the LOP
logic is still faster than the distance elements. As an additional measure of security, we
recommend that you enable and set the Load-Encroachment (LE) logic. The LE logic uses the
magnitude and angle of the measured positive-sequence impedance (Z1). The LE logic drops out
when one of the following two conditions are satisfied:
Criterion 1. |Z1| is less than the LE magnitude (ZLF for load-out, ZLR for load-in).
Criterion 2. NLAF < ∠Z1° < PLAF, where PLAF defines the upper load angle boundary
for forward load and NLAF defines the negative load angle boundary for
reverse load.
Figure 11 plots positive-sequence impedance magnitude vs. time for a three-phase LOP condition
and load of 5 A ∠30°. In this example, Criterion 1 was the condition met to dropout the LE
element. Notice from Figure 11 that the LE element drops out at 0.375 cycles. The new LOP
logic pickup time is unaffected and asserts before Cycle 0.25. Thus, enabling the LE logic
ensures a secure margin between asserting the improved LOP logic output and the pickup of the
distance elements.

Date Code 20000927 SEL Application Guide 2000-05 13

 Logic Point " This logic point is true if Logic Point 1 is true, there is not a three-pole or
single-pole open condition (3PO = 0 and SPO = 0), there has been no change
in positive- or zero-sequence current phase angle or magnitude, and the LOP
system has not reset via Logic Point 8. After Logic Point 2 is true, the delta
positive-sequence voltage input can deassert without Logic Point 2 dropping
out as it is sealed-in via the logical OR gate shown as an input to the four
input AND gate.
15

14

13
Z1 Magnitude (Ohms)

Load-Encroachment
12
Magnitude Threshold

11

10

8
-.5 0 .5 1 1.5 2 2.5
Cycles

Figure 11: Positive-Sequence Impedance Magnitude Decreases for Three-Phase LOP

During High Power Factor Load Conditions

The instantaneous output of Logic Point 2 is routed to the LOP and ILOP logic points via the OR
gate of Logic Point 3. Please note that the instantaneous output does not latch LOP or ILOP to
account for the case of no-load breaker opening operations where line-side vts are used. In this
situation, the ∆I logic (Logic Point 5) always gives a logical zero output. To address the concern
of giving a false sealed-in ILOP, we use the output of the 3PO and SPO logic in the seal-in
circuit. If we do get a false ILOP (due to slow SPO and 3PO conditions related to breaker
auxiliary contact speed), it is not sealed-in and is squelched by 3PO or SPO becoming a logical
one. Relay Word bit 3PO is the output of a time-delayed pickup (TDPU), instantaneous dropout
timer. The 60-cycle time delay of Logic Point 2 ensures that any false LOP condition is
squelched by either the assertion of 3PO or SPO for the situation described, or the output of Logic
Point 5 for the cases described below. The LOP output is also a bit in the Relay Word for you to
use for control and monitoring purposes. In the relay setting procedure, you may disable the loss-
of-potential logic by setting ELOP (Enable Loss-of-Potential) = N1. The ELOP = N1 setting
option permits easy testing and commissioning of the relay in cases where this LOP logic may
block protection element operation.
Logic Point # This logic point is the output of a two input OR gate. One input is from the
undelayed Logic Point 2, and the other is from the output of the S/R flip-flop.
The output of the S/R flip-flop, Q, is a logical one when the S and not the R
input asserts. If both the S and R inputs assert simultaneously, then the R
input has priority and Q is not true.

14 SEL Application Guide 2000-05 Date Code 20000927

 Logic Point $ This logic point is the output of the change in positive-sequence and zero-
sequence current angle and magnitude check. This check is included for
supervision of Logic Point 1. The reason for including this check is simple: if
the magnitude of the positive-sequence voltage decreases and the magnitude
or angle of the positive-sequence or zero-sequence current is not changing,
then the event detected could be a loss-of-potential condition.
Logic Point % This logic point is the output of an instantaneous pickup, time-delayed-
dropout (TDDO) timer. Logic Point 5 is a logical one when there is or has
been a change in magnitude and/or angle of the positive-sequence current (I1)
or zero-sequence current (I0) during the last second. The reason for including
this 60-cycle dropout is to ensure that the logic does not give an LOP
indication for line breaker openings (the current magnitude may drop to zero
very rapidly for light load conditions yet the voltage magnitudes must
decrease from full voltage to zero for line-side voltage transformer
applications).

LOP Reset Logic

Logic Point & The purpose of this logic is to reset the ILOP and LOP logic once valid
three-phase voltages are restored to the relay. A valid voltage condition is
one where |V1| > 88% of the LPVNOM setting, the magnitude of the
zero-sequence voltage (V0) is less than 9% of LPVNOM, the magnitude of
positive-sequence voltage is not decreasing, and that the magnitude of each
phase voltage is greater than 90% of LPVNOM. To ensure that this condition
is not transient, the logic requires balanced voltage conditions be present for
one cycle.
Logic Point ' This logic resets the LOP logic when the breaker is judged open by the single-
pole or three-pole open logic and there was not an LOP condition during the
last processing interval. If the relay detects a LOP condition, you must restore
balanced three phase voltages to the relay to reset LOP. This new LOP logic
does not give a nuisance alarm when the breaker is open and the application
uses line-side vts.
Logic Point ( This logic point is the output of a two-input logical OR gate. One input is a
one cycle delayed Logic Point 6. The others are the single-pole and three-pole
open logic. The status of this logic point is routed to the RESET input of the
LOP S/R flip-flop. When Logic Point 8 is true, ILOP and LOP are both reset.

New Loss-of-Potential Detection Logic Tests

Test 1. Closing into a Three-Phase Fault

1.a. Line-side vts: For the situation of a bolted fault with zero volts on all three phases, both V1
now and V1 from one cycle earlier are zero. Since this delta voltage is <10%
of VNOM secondary, the ILOP cannot set.
There are multiple security guards for this situation. However, the ultimate
security guard is the fact that the current magnitude is changing by more than
10% when the breaker is first closed. Note that Logic Point 5 has a 60-cycle
dropout time such that the relay blocks LOP for one second after the breaker
is closed into a fault.

Date Code 20000927 SEL Application Guide 2000-05 15

 1.b. Bus-side vts: For the situation of a bolted fault with zero volts on all three phases, V1 drops
from nominal voltage to zero and the V1 ratio check matches that of a true
three-phase LOP.

To avoid setting ILOP for this situation, the logic relies upon the ∆I
magnitude and angle checks. The only situation where the ∆I check is not
sufficient is when there is no current. This scenario is found in weak-source
applications and also replicates the case where an operator transfers the
potential source to a deenergized bus from a live bus.
Again, the ultimate security guard is the fact that the current magnitude is
changing by more than 10% when the breaker is first closed.

Test 2. Breaker Opening Load (Non-Faulted) Conditions

2.a. Line-side vts: For the situation of normal load interruption, where the voltage is decreasing
to zero volts on all three phases, V1(k) is zero while V1(k - 1 cycle) is non-zero for
one cycle after the breaker opens. This V1 ratio check matches that of a true
three-phase loss-of-potential.

Again, the ∆I magnitude and angle checks avoid setting ILOP for this
situation. Here we know the current magnitude is decreasing, so the ∆I1
logic asserts to block setting ILOP. The 60-cycle time-delayed-dropout timer
blocks ILOP to ensure that there is not a race condition between the |V1| ratio
check logic and the ∆I detection logic (Logic Point 5). In the case of no-load
breaker opening operations, the ∆I logic gives a logical zero output. To
address the concern of giving a false ILOP, the relay uses the output of the
3PO logic in the four input AND gate labeled as 6. If the 3PO logic point
does not assert before 1 asserts (due to slow 52a contacts), the ILOP
declaration is only transient because it is not sealed-in for 60 cycles.
2.b. Bus-side vts: This situation is simple because |V1| increases or remains the same. In
addition, the ∆I logic gives additional security except in the case where there
is no load. Again, in the case of no-load, the ∆I logic gives a logical zero
output. To address any concern of giving a false ILOP, we again use the
output of the 3PO logic as discussed above.

Test 3. Breaker Opening Under Fault Conditions

3.a. Line-side vts: See 2.a. The logic does not give a false ILOP as fault conditions which cause
a drop in |V1| are associated with ∆I conditions.
3.b. Bus-side vts: See 2.a. The logic does not give a false ILOP as fault conditions which cause
a drop in |V1| are associated with ∆I conditions.

FUSES REMOVED WHILE THE BREAKER IS OPEN

The new logic presented in this guide is very effective in detecting when a fuse or molded case
breaker operates and all breaker poles are closed. This new LOP logic is not designed to detect
LOP conditions while the breaker is open. If you wish to address this contingency, you simply
create an alarm point using the existing phase voltage elements and the SELOGIC control
equations.

16 SEL Application Guide 2000-05 Date Code 20000927

SUMMARY
This new loss-of-potential detection logic has the following major advantages:
1. Using the ratio of the present positive-sequence voltage to that of a cycle earlier, and
supervising this ratio with ∆|I1|, ∆∠I1, ∆|I0|, and ∆∠I0 offers LOP protection for the
majority of power system applications. These applications include those where the
end-of-line fault current magnitude is below the load current magnitude.
2. Eliminates the need for internal or external potential transfer logic (PTXFR) as a
mechanism to giving protection security.
3. Solves the problem of race conditions between the pickup of a blocking loss-of-
potential output and an instantaneous protection element.
4. Does not require user settings.
5. Overcurrent supervision elements 50PP and 50G can be set below minimum fault
current (or even to minimum setting) without concern of being above maximum
load. Some users may prefer the zone 1 elements still be set above load as a
redundant security check. If the application has heavy load flow, we encourage you
to set and use the patented Load-Encroachment logic.

REFERENCES
[1.] Jeff Roberts, Edmund O. Schweitzer, III, Renu Arora, and Ernie Poggi, “Limits to the
Sensitivity of Ground Directional and Distance Protection,” 50th Annual Georgia Tech
Protective Relaying Conference, Atlanta, GA, May 1–3, 1996.

FACTORY ASSISTANCE
The employee-owners of Schweitzer Engineering Laboratories are dedicated to making electric
power safer, more reliable, and more economical.
We appreciate your interest in SEL products, and we are committed to making sure you are
satisfied. If you have any questions, please contact us at:
Schweitzer Engineering Laboratories
2350 NE Hopkins Court
Pullman, WA USA 99163-5603
Tel: (509) 332-1890
Fax: (509) 332-7990
We guarantee prompt, courteous, and professional service.
We appreciate receiving any comments and suggestions about new products or product
improvements that would help us make your job easier.

All brand or product names appearing in this document are the trademark or registered trademark of their respective holders.

Schweitzer Engineering Laboratories, SELOGIC, Connectorized, Job Done, and are registered trademarks of Schweitzer Engineering Laboratories.

Copyright © SEL 2000 (All rights reserved) Printed in USA.

Improvements to the Loss-of-Potential (LOP)

Function in the SEL-321 SEL Application Guide 2000-05 Date Code 20000927

Date Code 20000927 SEL Application Guide 2000-05 17