Dell Latitude E6430 Compal LA-7781P Schematics

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COMPAL CONFIDENTIAL
MODEL NAME : QAL80
1 1
PCB NO : LA-7781P (DA60000OP10)

BOM P/N : 4319EK31L01
GPIO MAP: E4_VC_GPIO_map_rev_1.1
2
Dalmore 14 UMA 2
@ Ivy Bridge + Panther POINT
2012-02-24
REV : 1.0 (A00)
@ : Nopop Component
CONN@ : Connector Component
3 3
MB Type BOM P/N
ATG TPM L51 1@ 5@
ATG Non-TPM L52 2@ 5@
TPM L01 1@
Non-TPM L02 2@
4 4
MB PCB DELL CONFIDENTIAL/PROPRIETARY

Part Number Description
DA60000OP10 PCB 0LD LA-7781P REV1 M/B UMA Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Cover Sheet
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 1.0
LA-7781
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PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Date: Friday, February 24, 2012 Sheet 1 of 61
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Block Diagram
Memory BUS (DDR3) DDRIII-DIMM X2
1333/1600 MHz BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
Ivy Bridge PAGE 12-13
1 1
rPGA CPU
On IO board Touch Screen
PAGE 22
CRT CONN VGA For MB/DOCK
Video Switch BT 4.0 PAGE 40
PAGE 6-11
VGA PI3V713-AZLEX
PAGE 23
FDI DMI2 Camera Trough Cable
Lane x 8 Lane x 4
VGA
HDMI CONN DPB SATA Repeater
INTEL USB SATA
PS8513B
PAGE 25 E-SATA
PAGE 36
DPC USB 2.0 Port
DOCKING PORT DPD Panther Point-M PAGE 36
USB3.0
PAGE 37 BGA USB3.0/2.0
DAI
LVDS CONN LVDS PAGE 35
2 2
PAGE 22 USB3.0
USB2.0 [3,6]
PI5USB1457A USB USB3.0/2.0+PS
SATA5 PAGE 14-21 PAGE 35
Power Share PAGE 35
DOCK LAN
USB3.0 [4] SDXC/MMC Card Reader PCIE x1
PAGE 32 OZ600FJ0 PAGE 32 USB Port Intel Lewisville
PCI Express BUS 100MHz on IO board
82579LM
HD Audio I/F
PCI Express BUS 100MHz
PAGE 30
Option
SPI S-ATA 0/1 6GB/s, S-ATA 2/3/4/5 3GB/s
PCIE3 PCIE5 PCIE2 PCIE1
DOCK LAN
LAN SWITCH
EXPRESS 1/2 Mini Card 1/2 Mini Card Full Mini Card China TCM1.2 LPC BUS PI3L720 PAGE 30
33MHz INT.Speaker
Card PP WLAN WWAN SSX44B HDA Codec
W25Q64CVSSIG 92HD93 PAGE 28
PAGE 34 PAGE 33 PAGE 33 PAGE 33 PAGE 31
PAGE 14
USB10 USB8 USB4 USB5 64M 4K sector PAGE 28
3
Combo Jack RJ45 3
USH W25Q32BVSSIG HDD

Smart Card TDA8034HN PAGE 14 PAGE 26 MDC on IO board
BCM5882 32M 4K sector
CPU XDP Port DAI
To Docking side
RFID Fingerprint FFS LNG3DM RJ11
FP_USB USB7 PAGE 26
PCH XDP Port CONN on IO board Dig.
USH Module
MIC
WiFi ON/OFF PCIE4 E-Module Trough LVDS Cable
SMSC SIO PAGE 27
DC/DC Interface BC BUS
ECE5048
PAGE 38
LED SMSC KBC

4
MEC5055 4
Discrete TPM
Thermal PWM FAN PAGE 39 AT97SC3204 PAGE 31
GUARDIAN III DELL CONFIDENTIAL/PROPRIETARY
PAGE 22
EMC4021 Compal Electronics, Inc.
PAGE 22 Title
UMA Block Diagram
TP CONN KB CONN Size Document Number Rev
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PAGE 40 PAGE 40 1.0
LA-7781
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5 4 3 2 1
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POWER STATES
Signal SLP SLP SLP SLP ALWAYS M SUS RUN CLOCKS
USB PORT# DESTINATION
State S3# S4# S5# A# PLANE PLANE PLANE PLANE
0 JUSB1 (Right side Top)
S0 (Full ON) / M0 HIGH HIGH HIGH HIGH ON ON ON ON ON
1 JUSB2 (Right side Bottom)
D D
S3 (Suspend to RAM) / M3 LOW HIGH HIGH HIGH ON ON ON OFF OFF
2 JESA1 (Right side ESATA)
S4 (Suspend to DISK) / M3 LOW LOW HIGH HIGH ON ON OFF OFF OFF
3 DOCKING
S5 (SOFT OFF) / M3 LOW LOW LOW HIGH ON ON OFF OFF OFF
4 WLAN
S3 (Suspend to RAM) / M-OFF LOW HIGH HIGH LOW ON OFF ON OFF OFF
5 WWAN
S4 (Suspend to DISK) / M-OFF LOW LOW HIGH LOW ON OFF OFF OFF OFF
PCH
6 DOCKING
S5 (SOFT OFF) / M-OFF LOW LOW LOW LOW ON OFF OFF OFF OFF
7 USH->BIO
8 JMINI3(Flash)
PM TABLE
9 JUSB (Left side)
+PWR_SRC_S +3.3V_SUS +5V_RUN +3.3V_M +3.3V_M
C
SATA DESTINATION C
+5V_ALW +1.5V_MEM +3.3V_RUN +1.05V_M +1.05V_M
10 Express card
+3.3V_ALW_PCH +1.8V_RUN (M-OFF)
power SATA 0 HDD
+3.3V_RTC_LDO +1.5V_RUN
plane 11 Bluetooth
+0.75V_DDR_VTT
SATA 1 ODD/ E3 Module Bay
+VCC_CORE
12 Camera
+1.05V_RUN_VTT
SATA 2 NA
+1.05V_RUN
State 13 LCD Touch
SATA 3 NA
S0 ON ON ON ON ON SATA 4 ESATA 0 BIO

USH
S3 ON ON OFF ON OFF SATA 5 Dock 1 NA
S5 S4/AC ON OFF OFF ON OFF
B
S5 S4/AC don't exist OFF OFF OFF OFF OFF PCI EXPRESS DESTINATION B
need to update Power Status and PM Lane 1 MINI CARD-1 WWAN

Table
Lane 2 MINI CARD-2 WLAN
Lane 3 Express card
Lane 4 E3 Module Bay (USB3)
UMA DP/HDMI Port Connetion Lane 5 1/2vMINI CARD-3 PCIE
Port B MB HDMI Conn Lane 6 MMI
Port C Dock DP port 2 Lane 7 10/100/1G LOM
A
Port D Dock DP port 1 Lane 8 None A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Index and Config.
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PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-7781
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MODC_EN
SIO_SLP_S3#
EN_INVPWR FDC654P
+BL_PWR_SRC
(Q21)
MCARD_WWAN_PWREN
D D
MCARD_MISC_PWREN
ADAPTER
SI3456BDV SI3456BDV
1.05V_0.8V_PWROK (Q27) (Q30)
ISL95836
+VCC_GFXCORE
(PU700)
SI3456 SI3456
+PWR_SRC
+5V_HDD +5V_MOD (Q42) (Q40)
BATTERY
ALWON
+3.3V_FLASH +3.3V_WWAN
C RT8205 C
+5V_ALW
CHARGER (PU100)
+3.3V_ALW
1.05V_VTTPWRGD
AUX_EN_WOWL
SIO_SLP_S3#
PCH_ALW_ON
SIO_SLP_LAN#
SIO_SLP_A#
SIO_SLP_S3#
SIO_SLP_S3#
SUS_ON
RT8207
TPS51212 TPS51212
ISL95836 (PU200)
SY8033 TPS51461
(PU700) (PU500) (PU400) SI3456 SI3456 S13456 SI3456 TPS22966 SI3456
(PU300) (PU600)
DDR_ON
B (Q38) (Q49) (Q54) (Q34) (U78) (Q58) B

1.05V_0.8V_PWROK
0.75V_DDR_VTT_ON
CPU_VTT_ON
SIO_SLP_A#
+1.5V_MEM
+1.8V_RUN +VCC_SA +3.3V_WLAN +3.3V_ALW_PCH +3.3V_SUS +3.3V_LAN +3.3V_M

SIO_SLP_S3# SIO_SLP_S3#
+VCC_CORE +1.05V_RUN_VTT +1.05V_M
Pop option
SIO_SLP_S3# AO4728 NTGS4141N
(QC3) (Q59)
+3.3V_M +3.3V_RUN +5V_RUN
SI4164 Pop option
A (Q63) A
+1.5V_CPU_VDDQ +1.5V_RUN +0.75V_DDR_VTT DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
+1.05V_RUN +1.0V_LAN BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Power Rail
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
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PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-7781
5 4 3 2 1
5 4 3 2 1
2.2K
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SMBUS Address [0x9a]
2.2K
+3.3V_ALW_PCH
H14 MEM_SMBCLK 202
2N7002
C9 MEM_SMBDATA 200 DIMMA SMBUS Address [A0]
2N7002
2.2K
202
PCH
D
2.2K
+3.3V_LAN 200 DIMMB
SMBUS Address [A4] D
C8 LAN_SMBCLK 28
G12 LAN_SMBDATA 31 LOM SMBUS Address [C8]

M16 E14 53
XDP1 SMBUS Address [TBD]
2.2K 51
SML1_SMBDATA
SML1_SMBCLK
+3.3V_ALW_PCH
2.2K 53
51 XDP2
A5 B6 2.2K SMBUS Address [TBD]
3A 3A
2.2K +3.3V_ALW SMBUS Address
10K
APR_EC: 0x48
B4 DOCK_SMB_CLK 127
1A SPR_EC: 0x70
129 MSLICE_EC: 0x72 10K
+3.3V_RUN
1A A3 DOCK_SMB_DAT DOCKING
USB: 0x59
AUDIO: 0x34 4
SLICE_BATTERY: 0x17 6 G Sensor
2.2K SMBUS Address [3B]
SLICE_CHARGER: 0x13
C
+3.3V_ALW C
2.2K
B5 LCD_SMBCLK 30
1B WWAN
A4 LCD_SMDATA 32 SMBUS Address [TBD]
1B
2.2K
KBC 2.2K
+3.3V_ALW
100 ohm 7
1C A56 PBAT_SMBCLK
6 BATTERY SMBUS Address [0x16]
1C B59 PBAT_SMBDAT 100 ohm
CONN
2.2K
+3.3V_ALW
2.2K
A50 M9
1E USH_SMBCLK
B53 L9 USH SMBUS Address [0xa4]
1E USH_SMBDAT
B B
2.2K
+3.3V_SUS
2.2K
MEC 5065 7
2B A49 CARD_SMBCLK
8 Express card SMBUS Address [TBD]
2B B52 CARD_SMBDAT
2.2K
+3.3V_ALW
2.2K
B50 9
1G CHARGER_SMBCLK
A47 8 Charger
1G CHARGER_SMBDAT SMBUS Address [0x12]
2.2K
+3.3V_ALW
2.2K
B7 BAY_SMBDAT 29
2D
30 E3 Module Bay
A A7 BAY_SMBCLK SMBUS Address [0xd2] A
2D

Title
SMBUS TOPOLOGY
Size Document Number Rev
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1.0
LA-7781
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WWW.AliSaler.Com (1)PEG_RCOMPO (H22) use 4mil connect to PEG_ICOMPI, then use 4mil connect to RC2.
(2)PEG_ICOMPO use 12mil connect to RC2
JCPU1I
T35 VSS161 VSS234

F22
T34 VSS162 VSS235
F19
+1.05V_RUN_VTT T33 E30
VSS163 VSS236
T32 VSS164 VSS237
E27
T31 VSS165 VSS238
E24
1
T30 VSS166 VSS239
E21
RC2 T29 E18
VSS167 VSS240
24.9_0402_1%~D T28 VSS168 VSS241
E15
D D
T27 VSS169 VSS242
E13
JCPU1A T26 E10
2
PEG_COMP VSS170 VSS243
PEG_ICOMPI J22 P9 E9
VSS171 VSS244
J21 P8 E8
DMI_CRX_PTX_N0 PEG_ICOMPO VSS172 VSS245
<16> DMI_CRX_PTX_N0 B27 H22 P6 E7
DMI_CRX_PTX_N1 DMI_RX#[0] PEG_RCOMPO VSS173 VSS246
<16> DMI_CRX_PTX_N1 B25
DMI_RX#[1] PEG Compensation P5 VSS174 VSS247
E6
DMI_CRX_PTX_N2 A25 P3 E5
<16> DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 DMI_RX#[2] VSS175 VSS248
<16> DMI_CRX_PTX_N3 B24 K33 P2 E4
DMI_RX#[3] PEG_RX#[0] VSS176 VSS249
M35 N35 E3
DMI_CRX_PTX_P0 PEG_RX#[1] VSS177 VSS250
<16> DMI_CRX_PTX_P0 B28 L34 N34 E2
DMI_CRX_PTX_P1 DMI_RX[0] PEG_RX#[2] VSS178 VSS251
<16> DMI_CRX_PTX_P1 B26 J35 PEG_ICOMPI and RCOMPO signals should be shorted and routed N33 E1
<16> DMI_CRX_PTX_P2 A24 J32 with - max length = 500 mils - typical impedance = 43 mohms N32 D35
B23 H34 D32
DMI
<16> DMI_CRX_PTX_P3 DMI_RX[3] PEG_RX#[5] PEG_ICOMPO signals should be routed with - max length = 500 mils N31 VSS181 VSS254
PEG_RX#[6] H31 - typical impedance = 14.5 mohms N30 D29
DMI_CTX_PRX_N0 VSS182 VSS255
<16> DMI_CTX_PRX_N0 G21 G33 N29 D26
DMI_CTX_PRX_N1 DMI_TX#[0] PEG_RX#[7] VSS183 VSS256
<16> DMI_CTX_PRX_N1 E22 G30 N28 D20
<16> DMI_CTX_PRX_N2 F21 F35 N27 D17
<16> DMI_CTX_PRX_N3 D21 E34 N26 C34
DMI_TX#[3] PEG_RX#[10] VSS186 VSS259
E32 M34 C31
DMI_CTX_PRX_P0 PEG_RX#[11] VSS187 VSS260
<16> DMI_CTX_PRX_P0 G22 D33 L33 C28
DMI_CTX_PRX_P1 DMI_TX[0] PEG_RX#[12] VSS188 VSS261
<16> DMI_CTX_PRX_P1 D22 D31 L30 C27
<16> DMI_CTX_PRX_P2 F20 B33 L27 C25
<16> DMI_CTX_PRX_P3 C21 C32 L9 C23
PCI EXPRESS* - GRAPHICS

DMI_TX[3] PEG_RX#[15] VSS191 VSS264
L8 C10
VSS192 VSS265
J33 L6 C1
PEG_RX[0] VSS193 VSS266
L35 L5 B22
PEG_RX[1] VSS194 VSS267
K34 L4 B19
<16>
<16>
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
A21
H19
FDI0_TX#[0]
FDI0_TX#[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
H35
H32
L3
L2
VSS195
VSS196
VSS197
VSS VSS268
VSS269
VSS270
B17
B15
<16> FDI_CTX_PRX_N2 FDI_CTX_PRX_N2 E19 G34 L1 B13
FDI_CTX_PRX_N3 FDI0_TX#[2] PEG_RX[5] VSS198 VSS271
<16> FDI_CTX_PRX_N3 F18 G31 K35 B11
<16> FDI_CTX_PRX_N4 B21 F33 K32 B9
FDI1_TX#[0] PEG_RX[7] VSS200 VSS273
Intel(R) FDI
C FDI_CTX_PRX_N5 C
<16> FDI_CTX_PRX_N5 C20 F30 K29 B8
<16> FDI_CTX_PRX_N6 D18 E35 K26 B7
<16> FDI_CTX_PRX_N7 E17 E33 J34 B5
FDI1_TX#[3] PEG_RX[10] VSS203 VSS276
PEG_RX[11] F32 J31 B3
VSS204 VSS277
PEG_RX[12] D34 H33 B2
FDI_CTX_PRX_P0 VSS205 VSS278
<16> FDI_CTX_PRX_P0 A22 E31 H30 A35
FDI_CTX_PRX_P1 FDI0_TX[0] PEG_RX[13] VSS206 VSS279
<16> FDI_CTX_PRX_P1 G19 C33 H27 A32
<16> FDI_CTX_PRX_P2 E20 B32 H24 A29
<16> FDI_CTX_PRX_P3 G18 H21 A26
FDI_CTX_PRX_P4 FDI0_TX[3] VSS209 VSS282
<16> FDI_CTX_PRX_P4 B20 M29 H18 A23
FDI_CTX_PRX_P5 FDI1_TX[0] PEG_TX#[0] VSS210 VSS283
<16> FDI_CTX_PRX_P5 C19 M32 H15 A20
<16> FDI_CTX_PRX_P6 D19 M31 H13 A3
<16> FDI_CTX_PRX_P7 F17 L32 H10
FDI1_TX[3] PEG_TX#[3] VSS213
PEG_TX#[4] L29 H9
FDI_FSYNC0 VSS214
<16> FDI_FSYNC0 J18 K31 H8
FDI_FSYNC1 FDI0_FSYNC PEG_TX#[5] VSS215
<16> FDI_FSYNC1 J17 K28 H7
FDI1_FSYNC PEG_TX#[6] VSS216
PEG_TX#[7] J30 H6
FDI_INT VSS217
<16> FDI_INT H20 J28 H5
FDI_INT PEG_TX#[8] VSS218
PEG_TX#[9] H29 H4
FDI_LSYNC0 VSS219
<16> FDI_LSYNC0 J19 G27 H3
FDI_LSYNC1 FDI0_LSYNC PEG_TX#[10] VSS220
<16> FDI_LSYNC1 H17 E29 H2
FDI1_LSYNC PEG_TX#[11] VSS221
PEG_TX#[12] F27 H1
VSS222
(1) EDP_COMPIO use 4mil trace to RC1 PEG_TX#[13] D28 G35
VSS223
PEG_TX#[14] F26 G32
(2) EDP_ICOMPO use 12mil to RC1 VSS224
PEG_TX#[15] E25 G29
EDP_COMP VSS225
A18 eDP_COMPIO G26
VSS226
A17 eDP_ICOMPO PEG_TX[0] M28 G23
VSS227
B16 eDP_HPD# PEG_TX[1] M33 G20
VSS228
PEG_TX[2] M30 G17
VSS229
PEG_TX[3] L31 G11
VSS230
C15 eDP_AUX PEG_TX[4] L28 F34
VSS231
D15 eDP_AUX# PEG_TX[5] K30 F31
B VSS232 B
PEG_TX[6] K27 F29
VSS233
J29
eDP
PEG_TX[7]
C17 eDP_TX[0] PEG_TX[8] J27
F16 eDP_TX[1] PEG_TX[9] H28
C16 eDP_TX[2] PEG_TX[10] G28
G15 eDP_TX[3] PEG_TX[11] E28
PEG_TX[12] F28
C18 eDP_TX#[0] PEG_TX[13] D27
E16 eDP_TX#[1] PEG_TX[14] E26
D16 eDP_TX#[2] PEG_TX[15] D25
F15 TYCO_2013620-3_IVYBRIDGE
eDP_TX#[3]
TYCO_2013620-3_IVYBRIDGE
DP Compensation
+1.05V_RUN_VTT
1
RC1
24.9_0402_1%~D
A A
2
EDP_COMP
eDP_COMPIO and ICOMPO signals should be shorted near
balls and routed with typical impedance <25 mohms
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Ivy Bridge (1/6)
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Follow DG Rev0.71 SM_DRAMPWROK topology +1.5V_CPU_VDDQ +3.3V_ALW_PCH
+1.05V_RUN_VTT
+1.05V_RUN_VTT +1.05V_RUN_VTT
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
+3.3V_ALW_PCH
1
CC156 0.1U_0402_25V6K~D 1 1
1
1 2 RC12
CC65
CC66
200_0402_1%~D @ RC124 JXDP1
5
UC2 1K_0402_5%~D 1 2
2 2 XDP_PREQ#_R GND0 GND1 CFG16
1 B 3 4 CFG16 <9>
P
<39,40> RUNPWROK
2
RUNPWROK_AND OBSFN_A0 OBSFN_C0
4 1 2 PM_DRAM_PWRGD_CPU XDP_PRDY# 5 6 CFG17 CFG17 <9>
2
O RC28 130_0402_1%~D OBSFN_A1 OBSFN_C1
+3.3V_ALW_PCH 1 2 2
A 7 GND2 GND3
8
2
RC18 200_0402_1%~D SYS_PWROK_XDP XDP_OBS0 9 10 CFG0_R CFG0_R <9>
74AHC1G09GW_TSSOP5~D RC64 @ XDP_OBS1 OBSDATA_A0 OBSDATA_C0 CFG1_R
<16> PM_DRAM_PWRGD Place near JXDP1 11 12 CFG1_R <9>
3
39_0402_5%~D OBSDATA_A1 OBSDATA_C1
13 GND4 GND5
14
D XDP_OBS2 CFG2 D
15 OBSDATA_A2 OBSDATA_C2
16 CFG2 <9>
XDP_OBS3 17 18 CFG3 CFG3 <9>
1 1
OBSDATA_A3 OBSDATA_C3
19 GND6 GND7
20
D CFG10 CFG8
<9> CFG10 21 OBSFN_B0 OBSFN_D0
22 CFG8 <9>
2 QC1 @ <9> CFG11 CFG11 23 24 CFG9 CFG9 <9>
<11,42> RUN_ON_CPU1.5VS3# OBSFN_B1 OBSFN_D1
G SSM3K7002FU_SC70-3~D 25 26
XDP_OBS4 GND8 GND9 CFG4
S 27 28 CFG4 <9>
3
XDP_OBS5 OBSDATA_B0 OBSDATA_D0 CFG5_R
29 30 CFG5_R <9>
OBSDATA_B1 OBSDATA_D1
The resistor for HOOK2 should beplaced 31 32
XDP_OBS6 GND10 GND11 CFG6
such that the stub is very small on CFG0 net 33
34 CFG6 <9>
XDP_OBS7 35 36 CFG7 CFG7 <9>
37 38
INTEL suggest RC64 and QC1 NO stuff by default H_CPUPWRGD H_CPUPWRGD_XDP GND12 GND13 CLK_XDP
1 2 39 40
PWRGOOD/HOOK0 ITPCLK/HOOK4
<14,16> SIO_PWRBTN#_R
@ RC51
@RC5 2 1K_0402_5%~DCFD_PWRBTN#_XDP 41
HOOK1 ITPCLK#/HOOK5
42 CLK_XDP#
@RC6
@ RC6 0_0402_5%~D 43 44
CFG0_R XDP_HOOK2 VCC_OBS_AB VCC_OBS_CD XDP_RST#_R
1 2 45
HOOK2 RESET#/HOOK6
46
+1.05V_RUN_VTT @RC7
@ RC71 2 1K_0402_5%~D SYS_PWROK_XDP 47 48 XDP_DBRESET#
<16,39> SYS_PWROK HOOK3 DBR#/HOOK7
@RC9
@ RC9 0_0402_5%~D 49 50
DDR_XDP_SMBDAT_R1 GND14 GND15 XDP_TDO
<12,13,14,15,27,34> DDR_XDP_WAN_SMBDAT 1 2 51 52
H_THERMTRIP# SDA TD0
1 2 <12,13,14,15,27,34> DDR_XDP_WAN_SMBCLK
@ RC1251 2 0_0402_5%~D DDR_XDP_SMBCLK_R1 53 54 XDP_TRST#_R
@ RC126 56_0402_5%~D @ RC127 0_0402_5%~D SCL TRST# XDP_TDI
55 56
H_CATERR# XDP_TCLK_R TCK1 TDI XDP_TMS_R
1 2 57 58
@ RC128 49.9_0402_1%~D TCK0 TMS
59 60
H_PROCHOT# GND16 GND17
1 2
RC44 62_0402_5%~D JCPU1B SAMTE_BSH-030-01-L-D-A CONN@
Follow check list 0.5 A28 CPU_DMI 1 2

BCLK CLK_CPU_DMI <15>
C26 A27 CPU_DMI# @ RC13 1 2 0_0402_5%~D
<18> H_SNB_IVB# PROC_SELECT# BCLK# CLK_CPU_DMI# <15>
@ RC15 0_0402_5%~D XDP_RST#_R
MISC
CLOCKS
1 2 PLTRST_XDP# <17>
PXDP@ RC8 1K_0402_5%~D
C C
<39> CPU_DETECT# AN34
SKTOCC# CPU_DPLL
A16 1 2
DPLL_REF_CLK CPU_DPLL# RC16 1
A15 2 1K_0402_5%~D +1.05V_RUN_VTT
DPLL_REF_CLK# RC17 1K_0402_5%~D
CLK_XDP
H_CATERR# AL33
Remove DPLL Ref clock (for eDP only) 1
@ RC48
2
0_0402_5%~D @ RH107
1 2
0_0402_5%~D
CLK_CPU_ITP <15>
CATERR# CLK_XDP# 1 2 CLK_CPU_ITP# <15>
@ RH106 0_0402_5%~D
D
DDR3_DRAMRST#_CPU
THERMAL
<40> PECI_EC AN33 R8 3 1 DDR3_DRAMRST# <12>
PECI SM_DRAMRST#
QC2
VR1 TOPOLOGY DDR3 Max 500mils BSS138W-7-F_SOT323-3~D
MISC
G
<9> CLK_XDP_ITP 1 2
2
1
<40,51,52> H_PROCHOT# 1 2 H_PROCHOT#_R AL32 AK1 SM_RCOMP0 @ RH109 0_0402_5%~D
RC57 56_0402_5%~D PROCHOT# SM_RCOMP[0] SM_RCOMP1 RC50
A5 <9> CLK_XDP_ITP# 1 2
SM_RCOMP[1] SM_RCOMP2 DDR_HVREF_RST
Close to JCBU1 A4 4.99K_0402_1%~D RH108
@RH108
@ 0_0402_5%~D
SM_RCOMP[2]
<22> H_THERMTRIP# 1 2 H_THERMTRIP#_R AN32 SM_RCOMP2 --> 15mil 1
2
@ RC129 0_0402_5%~D THERMTRIP#
SM_RCOMP1/0 --> 20mil CC177
0.047U_0402_16V4Z~D
2
AP29 XDP_PRDY#
PRDY# XDP_PREQ# XDP_PREQ#_R
AP27 1 2
PREQ# @ RE27 0_0402_5%~D
AR26 XDP_TCLK 1 2 XDP_TCLK_R 1 2
TCK <15> DDR_HVREF_RST_PCH
AR27 XDP_TMS @ RE28 1 2 0_0402_5%~D XDP_TMS_R @ RC46 0_0402_5%~D
H_PM_SYNC TMS
AM34 AP30 XDP_TRST# @ RE29 1 2 0_0402_5%~D XDP_TRST#_R <40> DDR_HVREF_RST_GATE 1 2
PWR MANAGEMENT
<16> H_PM_SYNC
JTAG & BPM
PM_SYNC TRST# @ RE30 0_0402_5%~D @ RC47 0_0402_5%~D DDR_HVREF_RST <12>

AR28 XDP_TDI_R 1 2 XDP_TDI
TDI
TDO
AP26 XDP_TDO_R @ RE31 1 2 0_0402_5%~D XDP_TDO M3 control
1 2 VCCPWRGOOD_0_R AP33 @ RE32 0_0402_5%~D
B <18> H_CPUPWRGD UNCOREPWRGOOD B
RC25
@RC25
@ 0_0402_5%~D
AL35 XDP_DBRESET#_R 2 1 XDP_DBRESET# XDP_DBRESET# <14,16>

PM_DRAM_PWRGD_CPU DBR# @ RC26 0_0402_5%~D
V8
SM_DRAMPWROK
AT28 XDP_OBS0_R 1 2 XDP_OBS0
BPM#[0] XDP_OBS1_R 0_0402_5%~D XDP_OBS1
BPM#[1]
AR29 @ RC30 1 2 PU/PD for JTAG signals
AR30 XDP_OBS2_R @ RC31 1 2 0_0402_5%~D XDP_OBS2
PCH_PLTRST#_R BPM#[2] XDP_OBS3_R @ RC33 0_0402_5%~D XDP_OBS3 +3.3V_RUN
AR33 AT30 1 2
RESET# BPM#[3] XDP_OBS4_R @ RC34 0_0402_5%~D XDP_OBS4
AP32 1 2
BPM#[4] XDP_OBS5_R @ RC36 0_0402_5%~D XDP_OBS5
AR31 1 2
BPM#[5] XDP_OBS6_R @ RC37 0_0402_5%~D XDP_OBS6 XDP_DBRESET#RC19 2
AT31 1 2 1 1K_0402_5%~D
BPM#[6] XDP_OBS7_R @ RC38 0_0402_5%~D XDP_OBS7
AR32 1 2
BPM#[7] @ RC39 0_0402_5%~D
+1.05V_RUN_VTT
For ESD concern, please put near CPU
XDP_TMS RC27 2 1 51_0402_1%~D
XDP_TDI_R RC29 2 1 51_0402_1%~D
XDP_PREQ# @ RC32 2 1 51_0402_1%~D

Buffered reset to CPU +3.3V_RUN VCCPWRGOOD_0_R
+1.05V_RUN_VTT SM_RCOMP2 XDP_TDO_R RC35 2 1 51_0402_1%~D
SM_RCOMP1
1
0.1U_0402_25V6K~D
SM_RCOMP0
1 RC130
1
140_0402_1%~D
200_0402_1%~D
75_0402_1%~D
RC4
25.5_0402_1%~D
10K_0402_5%~D XDP_TCLK RC40 2 1
1
1
CC140
51_0402_1%~D
RC42
RC43
RC45
XDP_TRST# RC41 2 1
2
2 51_0402_1%~D
UC1
2
1 5
2
2
A NC VCC A
<14,17> PCH_PLTRST# 2
A PCH_PLTRST#_BUF
3 GND Y
4 1 2 PCH_PLTRST#_R
RC10 43_0402_5%~D Avoid stub in the PWRGD path
SN74LVC1G07DCKR_SC70-5~D while placing resistors RC25 & RC130
Open drain buffer
Title
Ivy Bridge (1/6)
WWW.AliSaler.Com
1.0
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com
JCPU1D
JCPU1C
AE2 M_CLK_DDR2
D <13> DDR_B_D[0..63] SB_CK[0] M_CLK_DDR2 <13> D
AB6 M_CLK_DDR0 AD2 M_CLK_DDR#2
<12> DDR_A_D[0..63] SA_CK[0] M_CLK_DDR#0 M_CLK_DDR0 <12> DDR_B_D0 SB_CLK#[0] DDR_CKE2_DIMMB M_CLK_DDR#2 <13>
AA6 M_CLK_DDR#0 <12> C9 R9 DDR_CKE2_DIMMB <13>
DDR_A_D0 SA_CLK#[0] DDR_CKE0_DIMMA DDR_B_D1 SB_DQ[0] SB_CKE[0]
C5 SA_DQ[0] SA_CKE[0] V9 DDR_CKE0_DIMMA <12> A7
SB_DQ[1]
DDR_A_D1 D5 DDR_B_D2 D10
DDR_A_D2 SA_DQ[1] DDR_B_D3 SB_DQ[2]
D3 SA_DQ[2]
C8
SB_DQ[3]
DDR_A_D3 D2 DDR_B_D4 A9 AE1 M_CLK_DDR3
DDR_A_D4 SA_DQ[3] M_CLK_DDR1 DDR_B_D5 SB_DQ[4] SB_CK[1] M_CLK_DDR#3 M_CLK_DDR3 <13>
D6 AA5 M_CLK_DDR1 <12> A8 AD1 M_CLK_DDR#3 <13>
DDR_A_D5 SA_DQ[4] SA_CK[1] M_CLK_DDR#1 DDR_B_D6 SB_DQ[5] SB_CLK#[1] DDR_CKE3_DIMMB
C6 AB5 M_CLK_DDR#1 <12> D9 R10 DDR_CKE3_DIMMB <13>
DDR_A_D6 SA_DQ[5] SA_CLK#[1] DDR_CKE1_DIMMA DDR_B_D7 SB_DQ[6] SB_CKE[1]
C2 V10 DDR_CKE1_DIMMA <12> D8
DDR_A_D7 SA_DQ[6] SA_CKE[1] DDR_B_D8 SB_DQ[7]
C3 G4
F10 F4
F8 F1 AB2
DDR_A_D10 SA_DQ[9] DDR_B_D11 SB_DQ[10] SB_CK[2]
G10 AB4 G1 AA2
DDR_A_D11 SA_DQ[10] SA_CK[2] DDR_B_D12 SB_DQ[11] SB_CLK#[2]
G9 AA4 G5 T9
DDR_A_D12 SA_DQ[11] SA_CLK#[2] DDR_B_D13 SB_DQ[12] SB_CKE[2]
F9 W9 F5
F7 F2
G8 G2
G7 J7 AA1
DDR_A_D16 SA_DQ[15] DDR_B_D17 SB_DQ[16] SB_CK[3]
K4 AB3 J8 AB1
DDR_A_D17 SA_DQ[16] SA_CK[3] DDR_B_D18 SB_DQ[17] SB_CLK#[3]
K5 AA3 K10 T10
DDR_A_D18 SA_DQ[17] SA_CLK#[3] DDR_B_D19 SB_DQ[18] SB_CKE[3]
K1 W10 K9
J1 J9
J5 J10
DDR_A_D21 SA_DQ[20] DDR_B_D22 SB_DQ[21] DDR_CS2_DIMMB#
J4 K8 AD3 DDR_CS2_DIMMB# <13>
DDR_A_D22 SA_DQ[21] DDR_CS0_DIMMA# DDR_B_D23 SB_DQ[22] SB_CS#[0] DDR_CS3_DIMMB#
J2 AK3 DDR_CS0_DIMMA# <12> K7 AE3 DDR_CS3_DIMMB# <13>
DDR_A_D23 SA_DQ[22] SA_CS#[0] DDR_CS1_DIMMA# DDR_B_D24 SB_DQ[23] SB_CS#[1]
K2 AL3 DDR_CS1_DIMMA# <12> M5 AD6
DDR_A_D24 SA_DQ[23] SA_CS#[1] DDR_B_D25 SB_DQ[24] SB_CS#[2]
M8 AG1 N4 AE6
DDR_A_D25 SA_DQ[24] SA_CS#[2] DDR_B_D26 SB_DQ[25] SB_CS#[3]
N10 AH1 N2
DDR_A_D26 SA_DQ[25] SA_CS#[3] DDR_B_D27 SB_DQ[26]
N8 N1
N7 M4
DDR_A_D28 SA_DQ[27] DDR_B_D29 SB_DQ[28] M_ODT2
M10 N5 AE4 M_ODT2 <13>
DDR_A_D29 SA_DQ[28] M_ODT0 DDR_B_D30 SB_DQ[29] SB_ODT[0] M_ODT3
M9 AH3 M_ODT0 <12> M2 AD4 M_ODT3 <13>
C DDR_A_D30 SA_DQ[29] SA_ODT[0] M_ODT1 DDR_B_D31 SB_DQ[30] SB_ODT[1] C
N9 AG3 M1 AD5
DDR SYSTEM MEMORY B

SA_DQ[30] SA_ODT[1] M_ODT1 <12> SB_DQ[31] SB_ODT[2]
DDR_A_D31 M7 AG2 DDR_B_D32 AM5 AE5
SA_DQ[31] SA_ODT[2] SB_DQ[32] SB_ODT[3]
DDR SYSTEM MEMORY A
DDR_A_D32 AG6 AH2 DDR_B_D33 AM6
DDR_A_D33 SA_DQ[32] SA_ODT[3] DDR_B_D34 SB_DQ[33]
AG5 AR3
AK6 AP3
AK5 AN3 DDR_B_DQS#[0..7] <13>
DDR_A_D36 SA_DQ[35] DDR_B_D37 SB_DQ[36] DDR_B_DQS#0
AH5 DDR_A_DQS#[0..7] <12> AN2 D7
DDR_A_D37 SA_DQ[36] DDR_A_DQS#0 DDR_B_D38 SB_DQ[37] SB_DQS#[0] DDR_B_DQS#1
AH6 C4 AN1 F3
DDR_A_D38 SA_DQ[37] SA_DQS#[0] DDR_A_DQS#1 DDR_B_D39 SB_DQ[38] SB_DQS#[1] DDR_B_DQS#2
AJ5 G6 AP2 K6
AJ6 J3 AP5 N3
AJ8 M6 AN9 AN5
AK8 AL6 AT5 AP9
AJ9 AM8 AT6 AK12
AK9 AR12 AP6 AP15
DDR_A_D44 SA_DQ[43] SA_DQS#[6] DDR_A_DQS#7 DDR_B_D45 SB_DQ[44] SB_DQS#[7]
AH8 AM15 AN8
DDR_A_D45 SA_DQ[44] SA_DQS#[7] DDR_B_D46 SB_DQ[45]
AH9 AR6
AL9 AR5
AL8 AR9 DDR_B_DQS[0..7] <13>
DDR_A_D48 SA_DQ[47] DDR_B_D49 SB_DQ[48] DDR_B_DQS0
AP11 DDR_A_DQS[0..7] <12> AJ11 C7
DDR_A_D49 SA_DQ[48] DDR_A_DQS0 DDR_B_D50 SB_DQ[49] SB_DQS[0] DDR_B_DQS1
AN11 D4 AT8 G3
DDR_A_D50 SA_DQ[49] SA_DQS[0] DDR_A_DQS1 DDR_B_D51 SB_DQ[50] SB_DQS[1] DDR_B_DQS2
AL12 F6 AT9 J6
AM12 K3 AH11 M3
AM11 N6 AR8 AN6
AL11 AL5 AJ12 AP8
AP12 AM9 AH12 AK11
AN12 AR11 AT11 AP14
DDR_A_D56 SA_DQ[55] SA_DQS[6] DDR_A_DQS7 DDR_B_D57 SB_DQ[56] SB_DQS[7]
AJ14 AM14 AN14
DDR_A_D57 SA_DQ[56] SA_DQS[7] DDR_B_D58 SB_DQ[57]
AH14 AR14
AL15 AT14 DDR_B_MA[0..15] <13>
AK15 DDR_A_MA[0..15] <12> AT12
DDR_A_D60 SA_DQ[59] DDR_B_D61 SB_DQ[60] DDR_B_MA0
AL14 AN15 AA8
DDR_A_D61 SA_DQ[60] DDR_A_MA0 DDR_B_D62 SB_DQ[61] SB_MA[0] DDR_B_MA1
AK14 AD10 AR15 T7
B DDR_A_D62 SA_DQ[61] SA_MA[0] DDR_A_MA1 DDR_B_D63 SB_DQ[62] SB_MA[1] DDR_B_MA2 B
AJ15 W1 AT15 R7
DDR_A_D63 SA_DQ[62] SA_MA[1] DDR_A_MA2 SB_DQ[63] SB_MA[2] DDR_B_MA3
AH15 W2 T6
SA_DQ[63] SA_MA[2] DDR_A_MA3 SB_MA[3] DDR_B_MA4
W7 T2
SA_MA[3] DDR_A_MA4 SB_MA[4] DDR_B_MA5
V3 T4
V2 T3
SA_MA[5] DDR_A_MA6 DDR_B_BS0 SB_MA[6] DDR_B_MA7
W3 <13> DDR_B_BS0 AA9 R2
DDR_A_BS0 SA_MA[6] DDR_A_MA7 DDR_B_BS1 SB_BS[0] SB_MA[7] DDR_B_MA8
<12> DDR_A_BS0 AE10 W6 <13> DDR_B_BS1 AA7 T5
DDR_A_BS1 SA_BS[0] SA_MA[7] DDR_A_MA8 DDR_B_BS2 SB_BS[1] SB_MA[8] DDR_B_MA9
<12> DDR_A_BS1 AF10 V1 <13> DDR_B_BS2 R6 R3
DDR_A_BS2 SA_BS[1] SA_MA[8] DDR_A_MA9 SB_BS[2] SB_MA[9] DDR_B_MA10
<12> DDR_A_BS2 V6 W5 AB7
SA_BS[2] SA_MA[9] DDR_A_MA10 SB_MA[10] DDR_B_MA11
AD8 R1
V4 T1
SA_MA[11] DDR_A_MA12 DDR_B_CAS# SB_MA[12] DDR_B_MA13
W4 <13> DDR_B_CAS# AA10 AB10
DDR_A_CAS# SA_MA[12] DDR_A_MA13 DDR_B_RAS# SB_CAS# SB_MA[13] DDR_B_MA14
<12> DDR_A_CAS# AE8 AF8 <13> DDR_B_RAS# AB8 R5
DDR_A_RAS# SA_CAS# SA_MA[13] DDR_A_MA14 DDR_B_WE# SB_RAS# SB_MA[14] DDR_B_MA15
<12> DDR_A_RAS# AD9 V5 <13> DDR_B_WE# AB9 R4
DDR_A_WE# SA_RAS# SA_MA[14] DDR_A_MA15 SB_WE# SB_MA[15]
<12> DDR_A_WE# AF9 V7
SA_WE# SA_MA[15]
A A
Title
Ivy Bridge (1/6)
WWW.AliSaler.Com
1.0
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com CFG Straps for Processor
CFG2
1
@RC51
@ RC51
1K_0402_5%~D
2
D JCPU1E D
AH27 @ T39
@T39 PAD~D
CFG0 VCC_DIE_SENSE
<7> CFG0_R 1 2 AK28
CFG[0] VSS_DIE_SENSE AH26
@ RE36
1 20_0402_5%~D CFG1 AK29 PEG Static Lane Reversal - CFG2 is for the 16x
<7> CFG1_R CFG2 CFG[1]
@ RE34 0_0402_5%~D AL26
<7> CFG2
CFG3 CFG[2]
<7> CFG3 AL27
CFG4 CFG[3]
<7> CFG4 AK26
CFG[4] RSVD28 L7 @ T1 PAD~D 1:(Default) Normal Operation; Lane #
1 2 CFG5 AL29 AG7 @ T2 PAD~D CFG2
<7> CFG5_R
@ RE35 0_0402_5%~D CFG6 AL30
CFG[5] RSVD29
AE7 @ T3 PAD~D
definition matches socket pin map definition
<7> CFG6 CFG7 CFG[6] RSVD30
<7> CFG7 AM31
CFG[7] RSVD31 AK2 @T4
@ T4 PAD~D 0:Lane Reversed
CFG8 AM32
<7> CFG8
CFG9 CFG[8]
AM30 W8 @T5
@ T5 PAD~D
<7> CFG9
CFG10 CFG[9] RSVD32
CFG
<7> CFG10 AM28
CFG11 CFG[10] CFG4
<7> CFG11 AM26
@ T9 PAD~D CFG12 CFG[11] @ T6 PAD~D
AN28 AT26
CFG[12] RSVD33
1
@ T10 PAD~D CFG13 AN31 AM33 @ T7 PAD~D
+VCC_GFXCORE @ T12 PAD~D CFG14 CFG[13] RSVD34 @ T8 PAD~D @ RC52
@RC52
AN26 AJ27
@ T14 PAD~D CFG15 CFG[14] RSVD35 1K_0402_5%~D
AM27
CFG16 CFG[15]
<7> CFG16 AK31
VAXG_VAL_SENSE CFG17 CFG[16]
1 2 <7> CFG17 AN29
2
@RC122
@ RC122 49.9_0402_1%~D CFG[17]
1
T8 @ T11 PAD~D
@ RC69 RSVD37 @ T13 PAD~D
J16
VAXG_VAL_SENSE RSVD38 @ T15 PAD~D
100_0402_1%~D AJ31 H16
VSSAXG_VAL_SENSE VAXG_VAL_SENSE RSVD39 @ T16 PAD~D
AH31 VSSAXG_VAL_SENSE G16
VCC_VAL_SNESE RSVD40
AJ33 Display Port Presence Strap
2
VSS_VAL_SNESE VCC_VAL_SENSE
AH33 VSS_VAL_SENSE
1 2 VSSAXG_VAL_SENSE
C C
@RC123
@ RC123 49.9_0402_1%~D 1 : Disabled; No Physical Display Port
PAD~D T22 @ AJ26 RSVD5 RSVD_NCTF1
AR35 @ T17 PAD~D CFG4 attached to Embedded Display Port
AT34 @T18
@ T18 PAD~D
RSVD_NCTF2 @ T19 PAD~D
AT33
RESERVED
RSVD_NCTF3
RSVD_NCTF4 AP35 @ T20
@T20 PAD~D 0 : Enabled; An external Display Port device is
AR34 @ T21 PAD~D
RSVD_NCTF5 connected to the Embedded Display Port
PAD~D T28 @ F25
PAD~D T29 @ RSVD8
F24
PAD~D T30 @ RSVD9 CFG6
F23
PAD~D T31 @ RSVD10 @T23
@ T23 PAD~D
D24 RSVD11 B34
PAD~D T33 @ RSVD_NCTF6 @ T24 PAD~D CFG5
G25 A33
PAD~D T35 @ RSVD12 RSVD_NCTF7 @T25
@ T25 PAD~D
G24 RSVD13 A34
RSVD_NCTF8
1
+VCC_CORE PAD~D T36 @ E23 B35 @ T26 PAD~D
PAD~D T37 @ RSVD14 RSVD_NCTF9 @T27
@ T27 PAD~D @ RC54 @ RC53
D23 C35
PAD~D T38 @ RSVD15 RSVD_NCTF10 1K_0402_5%~D 1K_0402_5%~D
C30
VCC_VAL_SNESE PAD~D T40 @ RSVD16
1 2 A31
RC120
@RC120
@ 49.9_0402_1%~D PAD~D T41 @ RSVD17
B30
2
PAD~D T42 @ RSVD18
B29
RSVD19
1
PAD~D T43 @ D30 AJ32 @ T32 PAD~D

@ RC71 PAD~D T44 @ RSVD20 RSVD51 @ T34 PAD~D
B31 AK32
PAD~D T45 @ RSVD21 RSVD52
100_0402_1%~D A30
PAD~D T46 @ RSVD22
C29
RSVD23
2
BCLK_ITP AN35 CLK_XDP_ITP <7>

1 2 VSS_VAL_SNESE PAD~D T47 @ J20 AM35
RSVD24 BCLK_ITP# CLK_XDP_ITP# <7>
RC121
@RC121
@ 49.9_0402_1%~D PAD~D T48 @ B18 PCIE Port Bifurcation Straps
RSVD25
11: (Default) x16 - Device 1 functions 1 and 2 disabled

PAD~D T52 @ J15 AT2 @ T49 PAD~D
B RSVD27 RSVD_NCTF11 B
RSVD_NCTF12
AT1 @ T50 PAD~D CFG[6:5] 10: x8, x8 - Device 1 function 1 enabled ; function 2
AR1 @T51
@ T51 PAD~D
RSVD_NCTF13 disabled
01: Reserved - (Device 1 function 1 disabled ; function
B1 @ T53
@T53 PAD~D
2 enabled)
KEY
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
TYCO_2013620-3_IVYBRIDGE CFG7
1
@ RC56
@RC56
1K_0402_5%~D
2
PEG DEFER TRAINING
1: (Default) PEG Train immediately

CFG7 following xxRESETB de assertion
0: PEG Wait for BIOS for training
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Ivy Bridge (1/6)
WWW.AliSaler.Com
LA-7781
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com JCPU1F POWER

+1.05V_RUN_VTT
+VCC_CORE
53A
AG35
8.5A
VCC1
AG34 VCC2 VCCIO1
AH13
AG33 VCC3 VCCIO2
AH10
AG32 VCC4 VCCIO3
AG10
D D
AG31 VCC5 VCCIO4
AC10
AG30 VCC6 VCCIO5
Y10
AG29 VCC7 VCCIO6
U10
AG28 VCC8 VCCIO7
P10
AG27 VCC9 VCCIO8
L10
AG26 J14
VCC10 VCCIO9
AF35 J13
VCC11 VCCIO10
AF34 J12
VCC12 VCCIO11
AF33 J11
VCC13 VCCIO12
AF32 H14
VCC14 VCCIO13
AF31 H12
VCC15 VCCIO14
AF30 H11
VCC16 VCCIO15
AF29 G14
VCC17 VCCIO16
AF28 G13
VCC18 VCCIO17
AF27 G12
VCC19 VCCIO18
AF26 F14
PEG AND DDR

VCC20 VCCIO19
AD35 F13
VCC21 VCCIO20
AD34 F12
VCC22 VCCIO21
AD33 F11
VCC23 VCCIO22
AD32 E14
VCC24 VCCIO23
AD31 E12
VCC25 VCCIO24
AD30 VCC26
AD29 E11
VCC27 VCCIO25
AD28 D14
VCC28 VCCIO26
AD27 D13
VCC29 VCCIO27
AD26 D12
VCC30 VCCIO28
AC35 D11
VCC31 VCCIO29
AC34 C14
VCC32 VCCIO30
AC33 C13
VCC33 VCCIO31
AC32 C12
VCC34 VCCIO32
AC31 C11
VCC35 VCCIO33
AC30 B14
C VCC36 VCCIO34 C
AC29 B12
VCC37 VCCIO35
AC28 A14
VCC38 VCCIO36
AC27 A13
VCC39 VCCIO37
AC26 A12
VCC40 VCCIO38 +1.05V_RUN_VTT
AA35 A11
VCC41 VCCIO39
AA34 VCC42
AA33 J23
VCC43 VCCIO40
1
AA32 VCC44
AA31 Note: Place the PU resistors close to CPU RC60
VCC45 75_0402_1%~D
AA30 VCC46 RC61 close to CPU 300 - 1500mils
AA29 VCC47
AA28
2
VCC48
AA27 VCC49
AA26 H_CPU_SVIDALRT# 1 2
VCC50 VIDALERT_N <51>
Y35 RC61 43_0402_5%~D
VCC51
Y34
CORE SUPPLY
VCC52
Y33 VCC53
Y32 VCC54
Y31 VCC55
Y30 +1.05V_RUN_VTT
VCC56
Y29 VCC57
Y28 CAD Note: Place the PU
VCC58
1
Y27 VCC59 resistors close to CPU
Y26 RC63 RC63 close to CPU 300 - 1500mils
VCC60 130_0402_1%~D
V35 VCC61
V34 AJ29 H_CPU_SVIDALRT#
VCC62 VIDALERT# VIDSCLK Iccmax current changed for PDDG Rev0.7
SVID
V33 AJ30 VIDSCLK <51>
2
VCC63 VIDSCLK VIDSOUT
V32 VCC64 VIDSOUT AJ28 VIDSOUT <51>
V31 VCC65 CPU Power Rail Table
V30 VCC66
V29 VCC67 H_CPU_SVIDALRT# must be routed between the S0 Iccmax
V28 Voltage Rail Voltage Current (A)
B
V27
VCC68 VIDSOUT and VIDSCLK lines to reduce cross B
VCC69
V26 VCC70
talk. 18 mils spacing to others.
U35 VCC71
VCC 0.65-1.3 53
U34
VCC72
U33
VCC73
U32
VCC74
VCCIO 1.05 8.5
U31
VCC75
U30
VCC76
U29
VCC77
VAXG 0.0-1.1 26
U28
VCC78
U27
VCC79
U26
VCC80
VCCPLL 1.8 3
R35 +VCC_CORE
VCC81
R34
VCC82
R33
VCC83
VDDQ 1.5 5
1
R32
VCC84 @ RC75 RC66
R31
VCC85 Place RC66, RC70, RC75 near CPU
R30 100_0402_1%~D 100_0402_1%~D VCCSA 0.65-0.9 6
VCC86
R29 1 2
VCC87
R28
2
VCC88 VCCSENSE_R
R27 AJ35 1 2 +1.5V_MEM 1.5 12-16 *
SENSE LINES
VCC89 VCC_SENSE VCCSENSE <51>

R26 AJ34 VSSSENSE_R @ RC67 1 20_0402_5%~D
VCC90 VSS_SENSE VSSSENSE <51>
P35 @ RC68 0_0402_5%~D
VCC91
P34 2 1 +1.05V_RUN_VTT
VCC92
1
P33 RC98 10_0402_1%~D
VCC93 VTT_SENSE RC70
P32
VCC94 VCCIO_SENSE
B10 VTT_SENSE <49> * Description
P31 A10 VSSIO_SENSE_R VSSIO_SENSE_R <49> 100_0402_1%~D
VCC95 VSS_SENSE_VCCIO
P30
VCC96
5A to Mem controller(+1.5V_CPU_VDDQ)
P29 5-6A to 2 DIMMs/channel
2
VCC97
1
10_0402_1%~D
P28
VCC98 2-5A to +1.5V_RUN & +0.75V_DDR_VTT
P27
RC133
VCC99
P26
A VCC100 A
2
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Ivy Bridge (1/6)
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com +1.5V_CPU_VDDQ Source

+1.5V_MEM QC3 +1.5V_CPU_VDDQ
+3.3V_ALW2 +PWR_SRC_S AO4304L_SO8
8 1
10U_0603_6.3V6M~D
7 2
1
@
20K_0402_5%~D
6 3 1
+1.5V_MEM +V_DDR_SMREF +1.5V_CPU_VDDQ
CC135
RC73
RC72 5 JCPU1H
1
330K_0402_5%~D
RC74
1K_0402_1%~D
1K_0402_1%~D
1 2 AT35 AJ22
4
VSS1 VSS81
1
100K_0402_5%~D 2 @ RC134
@RC134
@ 0_0402_5%~D AT32 AJ19
2
D RUN_ON_CPU1.5VS3 VSS2 VSS82 D
AT29 AJ16
RC80
RC84
@ QC5
@QC5 +V_SM_VREF_CNT VSS3 VSS83
AT27 AJ13
2
VSS4 VSS84
0.022U_0402_25V7K~D
NTR4503NT1G_SOT23-3~D AT25 AJ10
VSS5 VSS85
DMN66D0LDW-7_SOT363-6~D
AT22 AJ7
2
VSS6 VSS86
1
QC4B
1M_0402_5%~D
1 1 3 AT19 AJ4
VSS7 VSS87
RC143
RUN_ON_CPU1.5VS3# 5 AT16 AJ3
VSS8 VSS88
CC136
1K_0402_1%~D
1K_0402_1%~D
AT13 AJ2
VSS9 VSS89
1
@ AT10 AJ1
4
2 VSS10 VSS90
AT7 AH35
RC81
RC78
2
VSS11 VSS91
6
2
<16,27,35,39,42,47> SIO_SLP_S3# 1 2 AT4 AH34
@RC82
@ RC82 0_0402_5%~D VSS12 VSS92
AT3 AH32
QC4A VSS13 VSS93
AR25 AH30
2
DMN66D0LDW-7_SOT363-6~D VSS14 VSS94
<40> CPU1.5V_S3_GATE 1 2 2 AR22 AH29
@RC79
@ RC79 0_0402_5%~D VSS15 VSS95
AR19 AH28
VSS16 VSS96
AR16 AH25
1
RUN_ON_CPU1.5VS3 VSS17 VSS98
AR13 AH22
VSS18 VSS99
AR10 AH19
VSS19 VSS100
RUN_ON_CPU1.5VS3# <7,42> AR7 AH16
VSS20 VSS101
AR4 AH7
VSS21 VSS102
AR2 AH4
VSS22 VSS103
AP34 AG9
VSS23 VSS104
AP31 AG8
VSS24 VSS105
AP28 AG4
VSS25 VSS106
AP25 AF6
VSS26 VSS107
AP22 AF5
VSS27 VSS108
AP19 AF3
+VCC_GFXCORE VSS28 VSS109
AP16 AF2
VSS29 VSS110
AP13 AE35
VSS30 VSS111
AP10 AE34
POWER VSS31 VSS112
1
AP7 AE33
+VCC_GFXCORE RC99 @ RC76 VSS32 VSS113
AP4 AE32
VSS33 VSS114
JCPU1G 100_0402_1%~D 100_0402_1%~D AP1
VSS34 VSS115 AE31
C C
1 2 AN30
VSS35 VSS116 AE30
33A AN27 AE29
2
VSS36 VSS117
AT24 AK35 AN25 AE28
VAXG1 VAXG_SENSE VCC_AXG_SENSE <51> VSS37
VSS VSS118
SENSE
LINES
AT23 AK34 VSS_AXG_SENSE <51> AN22 AE27
VAXG2 VSSAXG_SENSE VSS38 VSS119
AT21 AN19 AE26
VAXG3 VSS39 VSS120
1
AT20 AN16 AE9
VAXG4 RC100 VSS40 VSS121
AT18 AN13 AD7
VAXG5 VSS41 VSS122
AT17 100_0402_1%~D AN10 AC9
VAXG6 VSS42 VSS123
AR24 AN7 AC8
VAXG7 +V_SM_VREF_CNT VSS43 VSS124
AR23 AN4 AC6
2
VAXG8 VSS44 VSS125
AR21 +V_SM_VREF should AM29 AC5
VAXG9 VSS45 VSS126
AR20 VAXG10 have 10 mil trace width AM25
VSS46 VSS127 AC3
AR18 AL1 AM22 AC2
VAXG11 SM_VREF VSS47 VSS128
AR17 AM19 AB35
VAXG12 VSS48 VSS129
AP24 AM16 AB34
VAXG13 VSS49 VSS130
AP23
AP21
VAXG14 VREF AM13
AM10
VSS50 VSS131 AB33
AB32
VAXG15 +DIMM0_1_VREF_CPU VSS51 VSS132
AP20 B4 +DIMM0_1_VREF_CPU AM7 AB31
VAXG16 SA_DIMM_VREFDQ +DIMM0_1_CA_CPU VSS52 VSS133
AP18 D1 +DIMM0_1_CA_CPU AM4 AB30
VAXG17 SB_DIMM_VREFDQ VSS53 VSS134
AP17 AM3 AB29
VAXG18 CC1782 VSS54 VSS135
AN24 1 0.1U_0402_10V7K~D AM2 AB28
VAXG19 +1.5V_CPU_VDDQ VSS55 VSS136
AN23 AM1 AB27
VAXG20 VSS56 VSS137
AN21 AL34 AB26
VAXG21 VSS57 VSS138
AN20 CC1792 1 0.1U_0402_10V7K~D AL31 Y9
VAXG22 VSS58 VSS139
AN18 VAXG23 6A AL28
VSS59 VSS140 Y8
AN17
5A AL25 Y6
DDR3 -1.5V RAILS
VAXG24 VSS60 VSS141

AM24 AF7 CC1492 1 0.1U_0402_10V7K~D +1.5V_MEM AL22 Y5
VAXG25 VDDQ1 VSS61 VSS142
GRAPHICS
AM23 AF4 AL19

VSS62 VSS143 Y3
VAXG26 VDDQ2
AM21 AF1 AL16 VSS63 VSS144 Y2
VAXG27 VDDQ3
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
330U_D2_2VM_R6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
AM20 AC7 1 1 1 1 1 1 1 CC1502 1 0.1U_0402_10V7K~D AL13 W35
VAXG28 VDDQ4 VSS64 VSS145
AM18 AC4 AL10
VSS65 VSS146 W34
VAXG29 VDDQ5
CC161
CC163
CC166
CC165
CC167
CC162
CC164
AM17 AC1 + AL7 W33
B VAXG30 VDDQ6 VSS66 VSS147 B
AL24 Y7 AL4
VSS67 VSS148 W32
VAXG31 VDDQ7 2 2 2 2 2 2
AL23 Y4 AL2 VSS68 VSS149 W31
VAXG32 VDDQ8 2
AL21 Y1 AK33 VSS69 VSS150 W30
VAXG33 VDDQ9
AL20 U7 AK30 VSS70 VSS151 W29
VAXG34 VDDQ10
VAXG35 VDDQ11
VAXG36 VDDQ12
AK24 P7 AK22 VSS73 VSS154 W26
VAXG37 VDDQ13
AK23 P4 AK19 VSS74 VSS155 U9
VAXG38 VDDQ14
AK21 P1 AK16 VSS75 VSS156 U8
VAXG39 VDDQ15
AK20 AK13 VSS76 VSS157 U6
VAXG40
VAXG41
VAXG42
AJ24 AK4 VSS79 VSS160 U2
VAXG43
AJ23 AJ25 VSS80
VAXG44
2 +DIMM0_1_VREF_CPU
1
@ RC96 1K_0402_5%~D
AJ21
AJ20
VAXG45 6A
VAXG46
1 2 +DIMM0_1_CA_CPU AJ18
@ RC97 1K_0402_5%~D VAXG47
AJ17 M27 +VCC_SA
VAXG48 VCCSA1
10U_0603_6.3V6M~D
330U_D2_2VM_R6M~D
AH24 M26 TYCO_2013620-3_IVYBRIDGE
VAXG49 VCCSA2
SA RAIL
AH23 L26
VAXG50 VCCSA3
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
AH21 J26 1 @ 1 1 1 1
VAXG51 VCCSA4
AH20 J25
VAXG52 VCCSA5
CC169
CC171
CC172
CC168
CC170
AH18 J24 +
VAXG53 VCCSA6
AH17 H26
VAXG54 VCCSA7 2 2 2 2
H25
VCCSA8 2
H23 BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
1.8V RAIL
VCCSA_SENSE VCCSA_SENSE <50>

A 1.5A PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. A
B6 added VCCSA_VID_0 to Power page
+1.8V_RUN VCCPLL1
330U_D2_2.5VM_R6M~D
A6 C22 VCCSA_VID_0 <50>

VCCPLL2 VCCSA_VID[0]
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
MISC
1 1 1 1 A2 C24 VCCSA_VID_1 <50>

VCCPLL3 VCCSA_VID[1]
CC176
CC173
CC174
CC175
2 2 2
2 VCCIO_SEL
A19
@
@RC140
RC140
1 2
0_0402_5%~D
VCCP_PWRCTRL <49> Compal Electronics, Inc.
Title
Ivy Bridge (1/6)
WWW.AliSaler.Com
1.0
LA-7781
5 4 3 2 1
5 4 3 2 1
JDIMM1 H=5.2
WWW.AliSaler.Com +V_DDR_REFA_M3
+V_DDR_REF
1
@ RD7
1
@ RD1
2
0_0402_5%~D
2
0_0402_5%~D
+DIMM1_VREF_DQ
+1.5V_MEM
JDIMM1 CONN@
+1.5V_MEM 2-3A to 1 DIMMs/channel
1 2
VREF_DQ VSS DDR_A_D4
3 VSS DQ4 4
0.1U_0402_25V6K~D
DDR_A_D0 5 6 DDR_A_D5
DQ0 DQ5 +1.5V_MEM
2.2U_0402_6.3V6M
DDR_A_D1 7 8
DQ1 VSS DDR_A_DQS#0
1 1 9 VSS DQS0# 10
CD1
CD2
11 12 DDR_A_DQS0
DM0 DQS0
13 VSS VSS 14
1
2 2 DDR_A_D3 DQ2 DQ6 DDR_A_D7 RD27
17 DQ3 DQ7 18
D 1K_0402_5%~D D
19 VSS VSS 20
DDR_A_D9 DQ8 DQ12 DDR_A_D13
23 24
2
DQ9 DQ13
25 VSS VSS 26
DDR_A_DQS#1 27 28 DDR3_DRAMRST#_R 1 2
DQS1# DM1 <13> DDR3_DRAMRST#_R DDR3_DRAMRST# <7>
DDR_A_DQS1 29 30 DDR3_DRAMRST#_R RD28 1K_0402_5%~D
DQS1 RESET#
31 VSS VSS 32
35 DQ11 DQ15 36
Populate RD1, De-Populate RD7 for Intel DDR3 37 VSS VSS 38
VREFDQ multiple methods M1 DDR_A_D17 41
DQ16 DQ20
42 DDR_A_D21
Populate RD7, De-Populate RD1 for Intel DDR3 DQ17 DQ21
43 VSS VSS 44
VREFDQ multiple methods M3 DDR_A_DQS#2 45 46
DDR_A_DQS2 DQS2# DM2 @ RD29 1
47 DQS2 VSS 48 2 0_0402_5%~D
49 50 DDR_A_D22
DDR_A_D18 VSS DQ22 DDR_A_D23
51 DQ18 DQ23 52
DDR_A_D19 53 54 QD1
DQ19 VSS
D
All VREF traces should 55 56 DDR_A_D28 +DIMM0_1_VREF_CPU 3 1 BSS138_G_SOT23-3 +V_DDR_REFA_M3
have 10 mil trace width 57 DQ24 DQ29 58
DDR_A_D25 59 60
DQ25 VSS DDR_A_DQS#3
61 62
G
2
VSS DQS3# DDR_A_DQS3
<8> DDR_A_DQS#[0..7] 63 DM3 DQS3 64
65 66 DDR_HVREF_RST
VSS VSS <7> DDR_HVREF_RST
<8> DDR_A_D[0..63] DQ26 DQ30
DQ27 DQ31
<8> DDR_A_DQS[0..7] 71 VSS VSS 72
@ RD30 1 2 0_0402_5%~D
<8> DDR_A_MA[0..15]
DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA
<8> DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA <8>
75 VDD VDD 76
77 78 DDR_A_MA15 QD2
C NC A15 C
D
DDR_A_BS2 79 80 DDR_A_MA14 3 1 BSS138_G_SOT23-3
<8> DDR_A_BS2 BA2 A14 +DIMM0_1_CA_CPU +V_DDR_REFB_M3
81 VDD VDD 82
DDR_A_MA12 83 84 DDR_A_MA11
DDR_A_MA9 A12/BC# A11 DDR_A_MA7
Layout Note:
G
85 86
2
A9 A7
87 88
Place near JDIMM1 DDR_A_MA8 89
VDD VDD
90 DDR_A_MA6 DDR_HVREF_RST
DDR_A_MA5 A8 A6 DDR_A_MA4
91 A5 A4 92
93 VDD VDD 94
DDR_A_MA3 95 96 DDR_A_MA2 M3 Circuit (Processor Generated SO-DIMM VREF_DQ)
DDR_A_MA1 A3 A2 DDR_A_MA0
97 A1 A0 98
99 VDD VDD 100
+1.5V_MEM M_CLK_DDR0 101 102 M_CLK_DDR1
<8> M_CLK_DDR0 CK0 CK1 M_CLK_DDR1 <8>
M_CLK_DDR#0 103 104 M_CLK_DDR#1
<8> M_CLK_DDR#0 CK0# CK1# M_CLK_DDR#1 <8>
105 VDD VDD 106
DDR_A_MA10 107 108 DDR_A_BS1
A10/AP BA1 DDR_A_BS1 <8>
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
DDR_A_BS0 109 110 DDR_A_RAS#

<8> DDR_A_BS0 BA0 RAS# DDR_A_RAS# <8>
1 1 1 1 111 VDD VDD 112
DDR_A_WE# 113 114 DDR_CS0_DIMMA#
<8> DDR_A_WE# WE# S0# DDR_CS0_DIMMA# <8>
CD3
CD4
CD5
CD6
DDR_A_CAS# 115 116 M_ODT0

<8> DDR_A_CAS# CAS# ODT0 M_ODT0 <8>
117 VDD VDD 118
2 2 2 2 DDR_A_MA13 119 120 M_ODT1 +DIMM1_VREF_CA
A13 ODT1 M_ODT1 <8>
DDR_CS1_DIMMA# 121 122
<8> DDR_CS1_DIMMA# S1# NC
123 VDD VDD 124
125 TEST VREF_CA 126 2 1 +V_DDR_REF
127 128 @ RD11 0_0402_5%~D
VSS VSS
0.1U_0402_25V6K~D
DDR_A_D32 129 130 DDR_A_D36
DQ32 DQ36
2.2U_0402_6.3V6M
DDR_A_D33 131 132 DDR_A_D37
DQ33 DQ37
133 134 1 1
VSS VSS
CD15
CD16
DDR_A_DQS#4 135 136
+1.5V_MEM DDR_A_DQS4 DQS4# DM4
137 138
DQS4 VSS DDR_A_D38
139 140
DDR_A_D34 VSS DQ38 DDR_A_D39 2 2
141 142
B DDR_A_D35 DQ34 DQ39 B
143 144
DQ35 VSS
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
145 146 DDR_A_D44

147 148
DQ40 DQ45
330U_SX_2VY~D
1 DDR_A_D41 149 150

DQ41 VSS
@ CD13
1 1 1 1 1 1 1 151 152 DDR_A_DQS#5

VSS DQS5#
CD7
CD14
CD8
CD9
CD10
CD11
CD51
+ 153 154 DDR_A_DQS5

DM5 DQS5
155 156
DDR_A_D42 VSS VSS DDR_A_D46
157 158
2 2 2 2 2 2 2 2 DDR_A_D43 DQ42 DQ46 DDR_A_D47
159 160
DQ43 DQ47
161 162
163 164
165 166
DQ49 DQ53
167 168
DDR_A_DQS#6 VSS VSS
169 170
DDR_A_DQS6 DQS6# DM6
171 172
DQS6 VSS DDR_A_D54
173 174
175 176
DDR_A_D51 DQ50 DQ55
177 178
DQ51 VSS DDR_A_D60
Layout Note: 179
VSS DQ60
180
DDR_A_D56 181 182 DDR_A_D61
Place near JDIMM1.203,204 DDR_A_D57 183
DQ56 DQ61
184
DQ57 VSS DDR_A_DQS#7
185 186
VSS DQS7# DDR_A_DQS7
187 188
DM7 DQS7
189 190
191 192
193 194
DQ59 DQ63
195 196
RD21 VSS VSS
2 10K_0402_5%~D 197
SA0 EVENT#
198
+0.75V_DDR_VTT +3.3V_RUN 199 200
VDDSPD SDA DDR_XDP_WAN_SMBDAT <7,13,14,15,27,34>
1 2 201 202 DDR_XDP_WAN_SMBCLK <7,13,14,15,27,34>
RD3 10K_0402_5%~D SA1 SCL
1 1 203 204 +0.75V_DDR_VTT
VTT VTT
0.1U_0402_25V6K~D
2.2U_0402_6.3V6M
A +0.75V_DDR_VTT A
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD21
CD22
205 206
2 2 GND1 GND2
1 1 1 1
TYCO_2-2013289-2~D
CD18
CD17
CD19
CD20
2 2 2 2
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT DDRIII-SODIMM SLOT1
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
2-3A to 1 DIMMs/channel
WWW.AliSaler.Com +V_DDR_REFB_M3 1
@ RD8
2
+DIMM2_VREF_DQ
0_0402_5%~D
+1.5V_MEM
1
3
JDIMM2 CONN@
VREF_DQ VSS 2
4
+1.5V_MEM
DDR_B_D4
VSS DQ4
JDIMMB H=9.2
2.2U_0402_6.3V6M
0.1U_0402_25V6K~D
DDR_B_D0 5 6 DDR_B_D5
DDR_B_D1 DQ0 DQ5
+V_DDR_REF 1 2 7
DQ1 VSS 8
@ RD4 0_0402_5%~D 1 1 9 10 DDR_B_DQS#0
VSS DQS0#
CD23
CD24
11 12 DDR_B_DQS0
DM0 DQS0
13 VSS VSS 14
2 2 DDR_B_D3 DQ2 DQ6 DDR_B_D7
17 DQ3 DQ7 18
19 VSS VSS 20
D DDR_B_D9 DQ8 DQ12 DDR_B_D13 D
23 DQ9 DQ13 24
25 VSS VSS 26
DDR_B_DQS#1 27 28
DDR_B_DQS1 DQS1# DM1 DDR3_DRAMRST#_R
29 DQS1 RESET# 30 DDR3_DRAMRST#_R <12>
31 32
DDR_B_D10 VSS VSS DDR_B_D14
33 DQ10 DQ14 34
DQ11 DQ15
37 VSS VSS 38
DDR_B_D17 DQ16 DQ20 DDR_B_D21
41 DQ17 DQ21 42
43 VSS VSS 44
DDR_B_DQS#2 45 46
DDR_B_DQS2 DQS2# DM2
47 DQS2 VSS 48
49 50 DDR_B_D22
DDR_B_D18 VSS DQ22 DDR_B_D23
Populate RD4, De-Populate RD8 for Intel DDR3 51 DQ18 DQ23 52
DDR_B_D19 53 54
VREFDQ multiple methods M1 55
DQ19 VSS
56 DDR_B_D28
Populate RD8, De-Populate RD4 for Intel DDR3 DDR_B_D24 VSS DQ28 DDR_B_D29
57 DQ24 DQ29 58
VREFDQ multiple methods M3 DDR_B_D25 59 60
DQ25 VSS DDR_B_DQS#3
61 VSS DQS3# 62
63 64 DDR_B_DQS3
DM3 DQS3
65 VSS VSS 66
<8> DDR_B_DQS#[0..7] 69 DQ27 DQ31 70
71 VSS VSS 72
<8> DDR_B_D[0..63]
All VREF traces should
have 10 mil trace width
DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB
<8> DDR_B_DQS[0..7] <8> DDR_CKE2_DIMMB CKE0 CKE1 DDR_CKE3_DIMMB <8>
75 VDD VDD 76
77 78 DDR_B_MA15
<8> DDR_B_MA[0..15] DDR_B_BS2 NC A15 DDR_B_MA14
<8> DDR_B_BS2 79 BA2 A14 80
81 VDD VDD 82
C DDR_B_MA12 DDR_B_MA11 C
83 A12/BC# A11 84
Layout Note: DDR_B_MA9 85 86 DDR_B_MA7
A9 A7
87 88
Place near JDIMM2 DDR_B_MA8 89
VDD VDD
90 DDR_B_MA6
DDR_B_MA5 A8 A6 DDR_B_MA4
91 A5 A4 92
93 VDD VDD 94
DDR_B_MA3 95 96 DDR_B_MA2
DDR_B_MA1 A3 A2 DDR_B_MA0
97 A1 A0 98
99 VDD VDD 100
M_CLK_DDR2 101 102 M_CLK_DDR3
<8> M_CLK_DDR2 M_CLK_DDR#2 CK0 CK1 M_CLK_DDR#3 M_CLK_DDR3 <8>
<8> M_CLK_DDR#2 103 CK0# CK1# 104 M_CLK_DDR#3 <8>
+1.5V_MEM 105 106
DDR_B_MA10 VDD VDD DDR_B_BS1
107 A10/AP BA1 108 DDR_B_BS1 <8>
DDR_B_BS0 109 110 DDR_B_RAS#
<8> DDR_B_BS0 BA0 RAS# DDR_B_RAS# <8>
111 VDD VDD 112
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
DDR_B_WE# 113 114 DDR_CS2_DIMMB#

<8> DDR_B_WE# WE# S0# DDR_CS2_DIMMB# <8>
1 1 1 1 DDR_B_CAS# 115 116 M_ODT2
<8> DDR_B_CAS# CAS# ODT0 M_ODT2 <8>
117 VDD VDD 118
+DIMM2_VREF_CA
CD25
CD26
CD27
CD28
DDR_B_MA13 119 120 M_ODT3

DDR_CS3_DIMMB# A13 ODT1 M_ODT3 <8>
<8> DDR_CS3_DIMMB# 121 S1# NC 122
2 2 2 2 123 124
VDD VDD
125 TEST VREF_CA 126 2 1 +V_DDR_REF
127 128 @ RD15 0_0402_5%~D
VSS VSS
2.2U_0402_6.3V6M
0.1U_0402_25V6K~D
DDR_B_D32 129 130 DDR_B_D36
131 DQ33 DQ37 132
133 VSS VSS 134 1 1
CD37
CD38
DDR_B_DQS#4 135 136
137 DQS4 VSS 138
+1.5V_MEM 139 140 DDR_B_D38
DDR_B_D34 VSS DQ38 DDR_B_D39 2 2
141 DQ34 DQ39 142
DDR_B_D35 143 144
DQ35 VSS DDR_B_D44
145 146
VSS DQ44
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
330U_SX_2VY~D
B DDR_B_D40 DDR_B_D45 B
147 148
DDR_B_D41 DQ40 DQ45
149 150
DQ41 VSS DDR_B_DQS#5
1 151 152
VSS DQS5#
@ CD35
1 1 1 1 1 1 1 153 154 DDR_B_DQS5

DM5 DQS5
CD29
CD30
CD31
CD32
CD33
CD34
CD36
+ 155 156
157 158
159 160
2 2 2 2 2 2 2 2 DQ43 DQ47
161 162
163 164
165 166
DQ49 DQ53
167 168
DDR_B_DQS#6 VSS VSS
169 170
171 172
DQS6 VSS DDR_B_D54
173 174
175 176
DDR_B_D51 DQ50 DQ55
177 178
DQ51 VSS DDR_B_D60
179 180
181 182
DDR_B_D57 DQ56 DQ61
Layout Note: 183
DQ57 VSS
184
185 186 DDR_B_DQS#7
Place near JDIMM2.203,204 187
VSS DQS7#
188 DDR_B_DQS7
DM7 DQS7
189 190
191 192
193 194
DQ59 DQ63
195 196
+3.3V_RUN VSS VSS
197 198
SA0 EVENT#
+3.3V_RUN 199 200 DDR_XDP_WAN_SMBDAT <7,12,14,15,27,34>
VDDSPD SDA
2 1 201 202 DDR_XDP_WAN_SMBCLK <7,12,14,15,27,34>
+0.75V_DDR_VTT RD5 10K_0402_5%~D SA1 SCL
+0.75V_DDR_VTT 203 204 +0.75V_DDR_VTT
VTT VTT
1
10K_0402_5%~D
0.1U_0402_25V6K~D
2.2U_0402_6.3V6M
RD6
1 1 205 206
GND1 GND2
CD43
CD44
A A
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
TYCO_2-2013310-2~D
2
1 1 1 1 2 2
CD39
CD40
CD41
CD42
2 2 2 2
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DDRIII-SODIMM SLOT2
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LA-7781
5 4 3 2 1
5 4 3 2 1
CMOS_CLR1 CMOS setting PCH_AZ_SYNC is sampled
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at the rising edge of RSMRST# pin. +3.3V_ALW_PCH JXDP2
So signal should be PU to the ALWAYS rail. USB_OC0#_R XDP_FN0
Shunt Clear CMOS <17> USB_OC0#_R USB_OC1#_R
1 2
XDP_FN1 +3.3V_ALW_PCH
1 GND0 GND1
2
XDP_FN16
PXDP@ RH1 1 2 33_0402_5%~D 3 4
<17> USB_OC1#_R USB_OC2# PXDP@ RH3 33_0402_5%~D XDP_FN2 OBSFN_A0 OBSFN_C0 XDP_FN17
Open Keep CMOS +3.3V_ALW_PCH <17> USB_OC2# USB_OC3#
1 2
XDP_FN3
5 OBSFN_A1 OBSFN_C1
6
PXDP@ RH4 1 2 33_0402_5%~D 1 7 8
<17> USB_OC3# USB_OC4#_R PXDP@ RH5 33_0402_5%~D XDP_FN4 PXDP@ XDP_FN0 GND2 GND3 XDP_FN8
1 2 9 OBSDATA_A0 OBSDATA_C0
10
<17> USB_OC4#_R USB_OC5# PXDP@ RH6 33_0402_5%~D XDP_FN5 CH1 XDP_FN1 XDP_FN9
ME_CLR1 TPM setting <17> USB_OC5#
1 2 11 OBSDATA_A1 OBSDATA_C1
12
1
USB_OC6# PXDP@ RH7 1 2 33_0402_5%~D XDP_FN6 0.1U_0402_25V6K~D 13 14
RH66 <17> USB_OC6# SIO_EXT_SMI# PXDP@ RH8 33_0402_5%~D XDP_FN7 2 XDP_FN2 GND4 GND5 XDP_FN10
Shunt Clear ME RTC Registers <17,40> SIO_EXT_SMI# SLP_ME_CSW_DEV#
1 2
XDP_FN8 XDP_FN3
15 OBSDATA_A2 OBSDATA_C2
16
XDP_FN11
1K_0402_5%~D PXDP@ RH9 1 2 33_0402_5%~D 17 18
<18,39> SLP_ME_CSW_DEV# USB_MCARD1_DET# PXDP@ RH10 33_0402_5%~D XDP_FN9 OBSDATA_A3 OBSDATA_C3
Open Keep ME RTC Registers <18,34> USB_MCARD1_DET# HDD_DET#_R
1 2
XDP_FN10
19
GND6 GND7
20
PXDP@ RH12 1 2 33_0402_5%~D 21 22
2
BBS_BIT0_R PXDP@ RH13 33_0402_5%~D XDP_FN11 OBSFN_B0 OBSFN_D0
1 2 23
OBSFN_B1 OBSFN_D1
24
PCH_GPIO36 PXDP@ RH14 1 2 33_0402_5%~D XDP_FN12 25 26
+RTC_CELL PCH_AZ_SYNC <18> PCH_GPIO36 PCH_GPIO37 PXDP@ RH15 33_0402_5%~D XDP_FN13 XDP_FN4 GND8 GND9 XDP_FN12
1 2 27
28
<18> PCH_GPIO37 PCH_GPIO16 PXDP@ RH16 33_0402_5%~D XDP_FN14 XDP_FN5 XDP_FN13
1 2 29 30
1
<18> PCH_GPIO16 TEMP_ALERT# PXDP@ RH17 33_0402_5%~D XDP_FN15
1 2 31 32
<18,39> TEMP_ALERT# GND10 GND11
1
RH282 @ PCH_GPIO15 PXDP@ RH18 1 2 33_0402_5%~D XDP_FN16 XDP_FN6 33 34 XDP_FN14

D
RH38 100K_0402_5%~D <18> PCH_GPIO15 SIO_EXT_SCI#_R PXDP@ RH19 33_0402_5%~D XDP_FN17 XDP_FN7 OBSDATA_B2 OBSDATA_D2 XDP_FN15
D
1 2 35
36
330K_0402_1%~D <18> SIO_EXT_SCI#_R PXDP@ RH20 33_0402_5%~D PXDP@ RH283 1K_0402_5%~D 37 38
GND12 GND13 +3.3V_ALW_PCH
1 2 RSMRST#_XDP 1 2 1.05V_0.8V_PWROK_R 39 40
2
<16,41> PCH_RSMRST#_Q <40,51> 1.05V_0.8V_PWROK PCH_PWRBTN#_XDP PWRGOOD/HOOK0 ITPCLK/HOOK4
PXDP@ RH24 1K_0402_5%~D 1 2 41 42
2
<7,16> SIO_PWRBTN#_R HOOK1 ITPCLK#/HOOK5

PCH_INTVRMEN PXDP@ RH21 0_0402_5%~D 43 44
VCC_OBS_AB VCC_OBS_CD RSMRST#_XDP
45 46
HOOK2 RESET#/HOOK6
1
47 48 XDP_DBRESET#
@ RH39
@RH39 PXDP@ RH284 0_0402_5%~D HOOK3 DBR#/HOOK7 XDP_DBRESET# <7,16>
On Die PLL VR is supplied by 49
GND14 GND15
50
330K_0402_1%~D CH2
<7,12,13,15,27,34> DDR_XDP_WAN_SMBDAT 1 2 DDR_XDP_WAN_SMBDAT_R2 51 52 PCH_JTAG_TDO
1.5V when sampled high, 1.8 V 15P_0402_50V8J~D 1 2 DDR_XDP_WAN_SMBCLK_R2 53
SDA TD0
54
<7,12,13,15,27,34> DDR_XDP_WAN_SMBCLK SCL TRST#
when sampled low 2 1 PCH_RTCX1 PXDP@ RH285 0_0402_5%~D 55 56 PCH_JTAG_TDI
2
PCH_JTAG_TCK TCK1 TDI PCH_JTAG_TMS

57 58
TCK0 TMS
59 60
GND16 GND17
1
INTVRMEN- Integrated SUS YH1 RH2 SAMTE_BSH-030-01-L-D-A CONN@
32.768KHZ_12.5PF_Q13FC1350000~D 10M_0402_5%~D UH4A
1.1V VRM Enable
2
* High - Enable Internal VRs CH3 A20 C38 LPC_LAD0
2
RTCX1 FWH0 / LAD0 LPC_LAD1 LPC_LAD0 <32,34,39,40>
15P_0402_50V8J~D A38
Low - Enable External VRs FWH1 / LAD1 LPC_LAD1 <32,34,39,40> +3.3V_RUN
2 1 PCH_RTCX2_R 1 2 PCH_RTCX2 C20 B37 LPC_LAD2
LPC
RTCX2 FWH2 / LAD2 LPC_LAD2 <32,34,39,40>
@ RH286 0_0402_5%~D C37 LPC_LAD3
FWH3 / LAD3 LPC_LAD3 <32,34,39,40>
1 2 PCH_RTCRST# D20
+RTC_CELL RTCRST#
RH22 20K_0402_5%~D D36 LPC_LFRAME# PCH_GPIO33 2 1
SRTCRST# FWH4 / LFRAME# LPC_LFRAME# <32,34,39,40>
1 2 G22 RH355 100K_0402_5%~D
RH23 20K_0402_5%~D SRTCRST#
LDRQ0# E36
1 2 INTRUDER# K22 K36 LPC_LDRQ1# IRQ_SERIRQ 2 1
RTC
INTRUDER# LDRQ1# / GPIO23 LPC_LDRQ1# <39>
RH11 1M_0402_5%~D RH28 8.2K_0402_5%~D
2 1 PCH_INTVRMEN C17 V5 IRQ_SERIRQ
INTVRMEN SERIRQ IRQ_SERIRQ <32,39,40>
@CH100
@ CH100
27P_0402_50V8J~D
1 2 1 2 AM3 PSATA_PRX_DTX_N0_C <27>
1 2 1 2 PCH_AZ_BITCLK SATA0RXN BBS_BIT0_R
<30> PCH_AZ_MDC_BITCLK 1 2 N34 AM1 PSATA_PRX_DTX_P0_C <27> 2 1
RH32 33_0402_5%~D HDA_BCLK SATA0RXP RH52 4.7K_0402_5%~D
AP7 HDD
SATA 6G
SATA0TXN PSATA_PTX_DRX_N0_C <27>
<30> PCH_AZ_MDC_SYNC 1 2PCH_AZ_SYNC_Q PCH_AZ_SYNC L34 AP5 INTEL feedback 0302
@ @ RH33 33_0402_5%~D HDA_SYNC SATA0TXP PSATA_PTX_DRX_P0_C <27>
ME1 SHORT PADS~D CMOS1 SHORT PADS~D T10 AM10
<29> SPKR SPKR SATA1RXN SATA_ODD_PRX_DTX_N1_C <28>
1 2 1 2 AM8 SATA_ODD_PRX_DTX_P1_C <28>
CH5 1U_0402_6.3V6K~D CH4 1U_0402_6.3V6K~D PCH_AZ_RST# SATA1RXP
<30> PCH_AZ_MDC_RST# 1 2 K34 HDA_RST# SATA1TXN AP11
SATA_ODD_PTX_DRX_N1_C <28> ODD/ E Module Bay
CMOS place near DIMM RH34 33_0402_5%~D AP10
C
SATA1TXP SATA_ODD_PTX_DRX_P1_C <28> C
PCH_AZ_CODEC_SDIN0 E34 AD7 +3.3V_RUN
<29> PCH_AZ_CODEC_SDIN0 HDA_SDIN0 SATA2RXN
SATA2RXP AD5
<29> PCH_AZ_CODEC_SDOUT 1 2 PCH_AZ_SDOUT <30> PCH_AZ_MDC_SDIN1
PCH_AZ_MDC_SDIN1 G34 AH5
RH29 33_0402_5%~D HDA_SDIN1 SATA2TXN SPKR
AH4 2 1
+3.3V_ALW_PCH SATA2TXP
<29> PCH_AZ_CODEC_SYNC 1 2 PCH_AZ_SYNC_Q C34 @ RH35 10K_0402_5%~D
RH26 33_0402_5%~D HDA_SDIN2
1 2 AB8
IHDA
SATA3RXN
<29> PCH_AZ_CODEC_RST# 1 2 PCH_AZ_RST# @ RH287 1K_0402_5%~D A34 HDA_SDIN3 SATA3RXP AB10 No Reboot Strap
RH27 33_0402_5%~D 1 2 AF3
<30> PCH_AZ_MDC_SDOUT SATA3TXN
<29> PCH_AZ_CODEC_BITCLK 1 2 PCH_AZ_BITCLK RH36 33_0402_5%~D AF1 Low = Default
SATA3TXP
1 RH25 33_0402_5%~D <39> ME_FWP 1 2 PCH_AZ_SDOUT A36 SPKR
HDA_SDO
RH50 1K_0402_5%~D Y7 ESATA_PRX_DTX_N4_C <37>
High = No Reboot
SATA
@ CH101
@CH101 SATA4RXN
SATA4RXP Y5 ESATA_PRX_DTX_P4_C <37>
27P_0402_50V8J~D +3.3V_ALW_PCH PCH_GPIO33
2
C36 HDA_DOCK_EN# / GPIO33 SATA4TXN AD3
ESATA_PTX_DRX_N4_C <37> E-SATA
SATA4TXP AD1
ESATA_PTX_DRX_P4_C <37>
1
USB30_SMI# N32
<28> USB30_SMI# HDA_DOCK_RST# / GPIO13
@ RH288 Y3
SATA5RXN SATA_PRX_DKTX_N5_C <38>
0_0603_5%~D SATA5RXP Y1 SATA_PRX_DKTX_P5_C <38>
SATA5TXN AB3
SATA_PTX_DKRX_N5_C <38> DOCK
RH59 2 1 51_0402_1%~D PCH_JTAG_TCK J3 AB1
2
JTAG_TCK SATA5TXP SATA_PTX_DKRX_P5_C <38>

+3.3V_ALW_PCH_JTAG RH44 2 1 200_0402_1%~D PCH_JTAG_TMS H7 Y11 +1.05V_RUN
JTAG_TMS SATAICOMPO
JTAG
RH45 2 1 200_0402_1%~D PCH_JTAG_TDI K5 Y10 SATA_COMP 1 2
JTAG_TDI SATAICOMPI RH40 37.4_0402_1%~D
RH43 2 1 200_0402_1%~D PCH_JTAG_TDO H1 JTAG_TDO +1.05V_RUN
SATA3RCOMPO AB12
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
AB13 SATA3_COMP 1 2
SATA3COMPI
1
1
RH42 49.9_0402_1%~D
+3.3V_RUN
RH49
RH47
RH48
PCH_SPI_CLK T3 AH1 RBIAS_SATA3 1 2

@ @ @ SPI_CLK SATA3RBIAS RH46 750_0402_1%~D
1
PCH_SPI_CS0# Y14
2
2
SPI_CS0#
Follow INTEL CRB 0.7 RH30
PCH_SPI_CS1# T1 10K_0402_5%~D
SPI_CS1# SATA_ACT#
P3
SPI
SATALED# SATA_ACT# <43>
2
PCH_SPI_DO V4 V14 HDD_DET#_R 1 2
SPI_MOSI SATA0GP / GPIO21 HDD_DET# <27>
@ RH290 0_0402_5%~D
B B
PCH_SPI_DIN U3 P1 BBS_BIT0_R 1 3
S
SPI_MISO SATA1GP / GPIO19 PCH_SATA_MOD_EN# <40>
BD82QM77 QPRE C1_BGA989~D QH1 BSS138W-7-F_SOT323-3~D
G
2
S
PCH_AZ_SYNC_Q 3 1 PCH_AZ_SYNC
<7,17> PCH_PLTRST#
BBS_BIT0 - BIOS BOOT STRAP BIT 0
1 2 QH7
RH31 1M_0402_5%~D SSM3K7002FU_SC70-3~D
G
2
+5V_RUN
INTEL HDA_SYNC
isolation circuit +3.3V_SPI C746
0.1U_0402_25V6K~D
1 2 +3.3V_SPI C745
0.1U_0402_25V6K~D
1
200 MIL SO8 1 2

1
R890
3.3K_0402_5%~D R891 JSPI1
64Mb Flash ROM 3.3K_0402_5%~D 200 MIL SO8 1
1 SPI_PCH_CS1# 1 2
X76@ U52 2 PCH_SPI_CS1# RH345 0_0402_5%~D
32Mb Flash ROM
2
SPI_PCH_CS0# 2
1 2 SPI_PCH_CS0#_R 1 8 3 SPI_PCH_DO 1 2
2
R935 47_0402_5%~D /CS VCC X76@ U53 3 PCH_SPI_DO RH346 0_0402_5%~D

4
SPI_PCH_DIN 4
1 2 SPI_DIN64 2 DO /HOLD 7 SPI_HOLD# SPI_PCH_CS1# 1 2 SPI_PCH_CS1#_R 1 8 5
5 SPI_PCH_DIN 1 2
R894 33_0402_5%~D R936 47_0402_5%~D CS# VCC SPI_HOLD# PCH_SPI_DIN RH347 0_0402_5%~D
2 7 6
SPI_WP#_SEL DO HOLD# 6
<39> SPI_WP#_SEL 1 2 SPI_WP#_SEL_R 3 /WP CLK 6 SPI_CLK64 1 2 SPI_PCH_CLK SPI_PCH_DIN 1 2 SPI_DIN32 3 6 SPI_CLK32 1 2 SPI_PCH_CLK 7
7 SPI_PCH_CLK 1 2
@ R898 0_0402_5%~D R899 33_0402_5%~D R895 33_0402_5%~D WP# CLK R897 33_0402_5%~D PCH_SPI_CLK RH348 0_0402_5%~D
4 5 8
SPI_DO64 GND DI 8
4 GND DIO 5 1 2 SPI_PCH_DO SPI_WP#_SEL_R SPI_DO32 1 2 SPI_PCH_DO
9
9 SPI_PCH_CS0# 1 2
R901 33_0402_5%~D W25Q32BVSSIG_SO8~D R900 33_0402_5%~D 10 PCH_SPI_CS0# RH349 0_0402_5%~D
10
11 11 +3.3V_SPI
W25Q64CVSSIG_SO8~D 12
12 +3.3V_M
13 13
14 14 1 2
15 RH350 0_0402_5%~D
15
X76@ configuration for ROM part 16 16
Vendor No. U52 U53 G1 17

G2 18
A A
WINBOND X7640631L01 SA000039A1L SA00003K80L
WINBOND X7640631L02 SA000039A2L SA00003K80L HRS_FH12-16S-0P5SH(55)~D

CONN@
EON X7640631L03 SA000046400 SA00004LI00

MXIC X7640631L04 SA00004G600 SA000041P00
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCH (1/8)
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LA-7781
5 4 3 2 1
5 4 3 2 1
+3.3V_RUN
WWW.AliSaler.Com QH5A
2
MEM_SMBCLK 6 1 DDR_XDP_WAN_SMBCLK <7,12,13,14,27,34>
5
MEM_SMBDATA 3 4 DDR_XDP_WAN_SMBDAT <7,12,13,14,27,34>
QH5B
D DMN66D0LDW-7_SOT363-6~D D
UH4B
PCIE_PRX_WANTX_N1 BG34
<34> PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1 PERN1 PCH_SMB_ALERT#
<34> PCIE_PRX_WANTX_P1 BJ34 PERP1 SMBALERT# / GPIO11 E12
WWAN (Mini Card 1)---> PCIE_PTX_WANRX_N1 AV32 +3.3V_ALW_PCH
<34> PCIE_PTX_WANRX_N1 PCIE_PTX_WANRX_P1 PETN1 MEM_SMBCLK
AU32 PETP1 SMBCLK H14
<34> PCIE_PTX_WANRX_P1
PCIE_PRX_WLANTX_N2 BE34 C9 MEM_SMBDATA SML1_SMBCLK 1 2
<34> PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2 PERN2 SMBDATA
BF34 RH298 2.2K_0402_5%~D
<34> PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2 PERP2 SML1_SMBDATA
WLAN (Mini Card 2)---> <34> PCIE_PTX_WLANRX_N2
BB32 PETN2
1 2
PCIE_PTX_WLANRX_P2 AY32 RH299 2.2K_0402_5%~D
<34> PCIE_PTX_WLANRX_P2 PETP2 DDR_HVREF_RST_PCH
A12
SMBUS
PCIE_PRX_EXPTX_N3 SML0ALERT# / GPIO60 DDR_HVREF_RST_PCH <7> +3.3V_ALW_PCH
<35> PCIE_PRX_EXPTX_N3 BG36 PERN3
PCIE_PRX_EXPTX_P3 BJ36 C8 LAN_SMBCLK
<35> PCIE_PRX_EXPTX_P3 PERP3 SML0CLK LAN_SMBCLK <31>
EXPRESS Card---> PCIE_PTX_EXPRX_N3 AV34
<35> PCIE_PTX_EXPRX_N3 PCIE_PTX_EXPRX_P3 PETN3 LAN_SMBDATA DDR_HVREF_RST_PCH 2
AU34 PETP3 SML0DATA G12 LAN_SMBDATA <31> 1
<35> PCIE_PTX_EXPRX_P3 RH300 1K_0402_5%~D
PCIE_PRX_EMBTX_N4 BF36 PCH_GPIO74 2 1
<28> PCIE_PRX_EMBTX_N4 PERN4
PCIE_PRX_EMBTX_P4 BE36 RH301 10K_0402_5%~D
<28> PCIE_PRX_EMBTX_P4 PERP4
E3 Module Bay---> PCIE_PTX_EMBRX_N4 AY34 C13 PCH_GPIO74 MEM_SMBCLK 2 1
<28> PCIE_PTX_EMBRX_N4 PCIE_PTX_EMBRX_P4 PETN4 SML1ALERT# / PCHHOT# / GPIO74 RH302 2.2K_0402_5%~D
BB34 PETP4
<28> PCIE_PTX_EMBRX_P4 SML1_SMBCLK MEM_SMBDATA
E14 SML1_SMBCLK <40> 2 1
PCIE_PRX_WPANTX_N5 SML1CLK / GPIO58 RH303 2.2K_0402_5%~D
BG37
PCI-E*
<34> PCIE_PRX_WPANTX_N5 PERN5
1/2 MINI CARD-3 PCIE PCIE_PRX_WPANTX_P5 BH37 M16 SML1_SMBDATA PCH_SMB_ALERT# 2 1
<34> PCIE_PRX_WPANTX_P5 PERP5 SML1DATA / GPIO75 SML1_SMBDATA <40>
PCIE_PTX_WPANRX_N5 AY36 RH304 10K_0402_5%~D
(Mini Card 3)---> <34> PCIE_PTX_WPANRX_N5 PCIE_PTX_WPANRX_P5 BB36
PETN5 PEG_A_CLKRQ# 2 1
<34> PCIE_PTX_WPANRX_P5 PETP5 RH80 10K_0402_5%~D
PCIE_PRX_MMITX_N6 BJ38
<33> PCIE_PRX_MMITX_N6 PERN6
PCIE_PRX_MMITX_P6 BG38
<33> PCIE_PRX_MMITX_P6 PERP6 +3.3V_LAN
MMI ---> PCIE_PTX_MMIRX_N6 AU36 M7 PCH_CL_CLK1
PCH_CL_CLK1 <34>
Controller
<33> PCIE_PTX_MMIRX_N6 PCIE_PTX_MMIRX_P6 PETN6 CL_CLK1
AV36 PETP6
C <33> PCIE_PTX_MMIRX_P6 C
PCIE_PRX_GLANTX_N7 BG40 T11 PCH_CL_DATA1 LAN_SMBCLK 2 1
Link
<31> PCIE_PRX_GLANTX_N7 PERN7 CL_DATA1 PCH_CL_DATA1 <34>
PCIE_PRX_GLANTX_P7 BJ40 RH305 2.2K_0402_5%~D
<31> PCIE_PRX_GLANTX_P7 PERP7
10/100/1G LAN ---> PCIE_PTX_GLANRX_N7 AY40 LAN_SMBDATA 2 1
<31> PCIE_PTX_GLANRX_N7 PCIE_PTX_GLANRX_P7 PETN7 PCH_CL_RST1# RH306 2.2K_0402_5%~D
BB40 PETP7 CL_RST1# P10
<31> PCIE_PTX_GLANRX_P7 PCH_CL_RST1# <34>
BE38 PERN8
BC38 PERP8
AW38 PETN8
AY38 PETP8
M10 PEG_A_CLKRQ#
PCIE_MINI1# PEG_A_CLKRQ# / GPIO47
2 1 Y40
<34> CLK_PCIE_MINI1# @ RH3072 PCIE_MINI1 CLKOUT_PCIE0N
10_0402_5%~D Y39
<34> CLK_PCIE_MINI1 CLKOUT_PCIE0P
WWAN (Mini Card 1)---> +3.3V_ALW_PCH @ RH3082 10_0402_5%~D CLKOUT_PEG_A_N AB37
RH81 10K_0402_5%~D MINI1CLK_REQ# J2 AB38
<34> MINI1CLK_REQ# PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P
CLOCKS
2 1 PCIE_LAN# AB49 AV22 CLK_CPU_DMI#
<31> CLK_PCIE_LAN# @ RH82 2 PCIE_LAN CLKOUT_PCIE1N CLKOUT_DMI_N CLK_CPU_DMI CLK_CPU_DMI# <7>
1 0_0402_5%~D AB47 CLKOUT_PCIE1P CLKOUT_DMI_P AU22
<31> CLK_PCIE_LAN CLK_CPU_DMI <7>
10/100/1G LAN ---> @ RH83 0_0402_5%~D
LANCLK_REQ# M1 CLK_BUF_DMI# 1 2
<31> LANCLK_REQ# PCIECLKRQ1# / GPIO18
AM12 CLK_BUF_DMI RH74 1 2 10K_0402_5%~D
CLKOUT_DP_N RH75 10K_0402_5%~D
CLKOUT_DP_P AM13
2 1 PCIE_MMI# AA48
<33> CLK_PCIE_MMI# PCIE_MMI CLKOUT_PCIE2N CLK_BUF_BCLK
MMI---> <33> CLK_PCIE_MMI
@ RH85 2 1 0_0402_5%~D AA47 CLKOUT_PCIE2P
1 2
+3.3V_RUN @ RH86 1 2 0_0402_5%~D BF18 CLK_BUF_DMI# RH91 10K_0402_5%~D
RH87 10K_0402_5%~D MMICLK_REQ# CLKIN_DMI_N CLK_BUF_DMI
<33> MMICLK_REQ# V10 PCIECLKRQ2# / GPIO20 CLKIN_DMI_P BE18
CLK_BUF_DOT96# 1 2
2 1 PCIE_MINI3# Y37 BJ30 CLK_BUF_BCLK CLK_BUF_DOT96 RH76 1 2 10K_0402_5%~D
<34> CLK_PCIE_MINI3# CLKOUT_PCIE3N CLKIN_GND1_N
PP (Mini Card 3)---> @ RH88 2 1 0_0402_5%~D PCIE_MINI3 Y36 BG30 CLK_BUF_BCLK RH77 10K_0402_5%~D
B <34> CLK_PCIE_MINI3 CLKOUT_PCIE3P CLKIN_GND1_P B
+3.3V_ALW_PCH @ RH90 2 1 0_0402_5%~D
RH152 10K_0402_5%~D MINI3CLK_REQ# A8 CLK_BUF_CKSSCD# 1 2
<34> MINI3CLK_REQ# PCIECLKRQ3# / GPIO25 CLK_BUF_DOT96# CLK_BUF_CKSSCD
G24 RH78 1 2 10K_0402_5%~D
CLKIN_DOT_96N CLK_BUF_DOT96 RH79 10K_0402_5%~D
CLKIN_DOT_96P E24
2 1 PCIE_EXP# Y43
<35> CLK_PCIE_EXP# CLKOUT_PCIE4N
Express card---> @ RH92 2 1 0_0402_5%~D PCIE_EXP Y45 CLK_PCH_14M 1 2
<35> CLK_PCIE_EXP CLKOUT_PCIE4P
+3.3V_ALW_PCH @ RH93 2 1 0_0402_5%~D AK7 CLK_BUF_CKSSCD# RH183 10K_0402_5%~D
RH94 10K_0402_5%~D EXPCLK_REQ# CLKIN_SATA_N CLK_BUF_CKSSCD
<35> EXPCLK_REQ# L12 PCIECLKRQ4# / GPIO26 CLKIN_SATA_P AK5
2 1 PCIE_MINI2# V45 K45 CLK_PCH_14M

<34> CLK_PCIE_MINI2# CLKOUT_PCIE5N REFCLK14IN
<34> CLK_PCIE_MINI2
@ RH95 2 1 0_0402_5%~D PCIE_MINI2 V46 CLKOUT_PCIE5P
CLOCK TERMINATION for FCIM and need close to PCH
WLAN (Mini Card 2)---> +3.3V_ALW_PCH @ RH96 2 1 0_0402_5%~D
RH97 10K_0402_5%~D MINI2CLK_REQ# L14 H45 CLK_PCI_LOOPBACK
<34> MINI2CLK_REQ# PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK CLK_PCI_LOOPBACK <17>
AB42 V47 XTAL25_IN 2 1

CLKOUT_PEG_B_N XTAL25_IN XTAL25_OUT @ RH309 0_0402_5%~D
AB40 CLKOUT_PEG_B_P XTAL25_OUT V49
1
+3.3V_ALW_PCH 1 2 PEG_B_CLKRQ# E6 RH99
RH98 10K_0402_5%~D PEG_B_CLKRQ# / GPIO56 1M_0402_5%~D
Y47 XCLK_RCOMP 1 2 +1.05V_RUN YH2
XCLK_RCOMP RH100 90.9_0402_1%~D 25MHZ_10PF_Q22FA2380049900~D
V40
2
CLKOUT_PCIE6N
V42 3 1
CLKOUT_PCIE6P OUT IN
8.2P_0402_50V8D~D
8.2P_0402_50V8D~D
T13 4 2
PCIECLKRQ6# / GPIO45 GND GND
2 2
CH19
2 1 PCIE_EMB# V38 K43 PCI_TPM_TCM 1@RH311 2 1 22_0402_5%~D
CH18
<28> CLK_PCIE_EMB# PCIE_EMB CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64 CLK_PCI_TPM_TCM <32>
eModule Bay---> @ RH3102 1 0_0402_5%~D V37
FLEX CLOCKS
<28> CLK_PCIE_EMB CLKOUT_PCIE7P

+3.3V_ALW_PCH @ RH3122 1 0_0402_5%~D F47 SIO_14M RH313 2 1 22_0402_5%~D
CLKOUTFLEX1 / GPIO65 CLK_SIO_14M <39> 1 1
RH104 10K_0402_5%~D EMBCLK_REQ# K12
<28> EMBCLK_REQ# PCIECLKRQ7# / GPIO46
H47 CLK_80H RH314 2 1 22_0402_5%~D
A CLK_BCLK_ITP# AK14 CLKOUTFLEX2 / GPIO66 PCLK_80H <34> A
<7> CLK_CPU_ITP# 2 1 CLKOUT_ITPXDP_N
@ RH2802 1 0_0402_5%~D CLK_BCLK_ITP AK13 K49 JETWAY_14M @ RH315
@RH315 2 1 22_0402_5%~D
<7> CLK_CPU_ITP CLKOUT_ITPXDP_P CLKOUTFLEX3 / GPIO67 JETWAY_CLK14M <32>
@ RH281 0_0402_5%~D
BD82QM77 QPRE C1_BGA989~D

PCIE REQ power rail:
suspend: 0 3 4 5 6 7 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
core: 1 2 BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCH (2/8)
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LA-7781
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com
+3.3V_ALW_PCH
@ RH357 1 2 0_0402_5%~D
+3.3V_RUN
@ CH99
RH131
1
1
2 PCH_CRT_BLU
150_0402_1%~D
2 PCH_CRT_GRN
+3.3V_RUN
2.2K_0402_5%~D
2.2K_0402_5%~D
1 2 RH132 150_0402_1%~D
1
1 2 PCH_CRT_RED
RH316
RH317
1 2 SUS_STAT#/LPCPD# @ UC3 0.1U_0402_25V6K~D RH133 150_0402_1%~D
@ RH318 10K_0402_5%~D 1 1 2 ENVDD_PCH
P
<7,14> XDP_DBRESET# B
4 SYS_RESET# RH134 100K_0402_5%~D
ME_SUS_PWR_ACK O
1 2 2 1 ME_RESET# 2
2
A
G
RH144 10K_0402_5%~D @ RH141 8.2K_0402_5%~D
74AHC1G09GW_TSSOP5~D
3
1 2 PCH_PCIE_WAKE# PCH_CRT_DDC_CLK
D PCH_CRT_DDC_CLK <23> D
RH142 10K_0402_5%~D
DSWODVREN - On Die DSW VR Enable
1 2 SIO_SLP_LAN# PCH_CRT_DDC_DAT
PCH_CRT_DDC_DAT <23>
@ RH319 10K_0402_5%~D Enabled (DEFAULT)
+3.3V_ALW2
1 2 PCH_RI# HIGH: RH127 STUFFED,
RH140 10K_0402_5%~D PCH_DPWROK 1 2 PCH_RSMRST#_R RH129 UNSTUFFED 1 2
@ RH113 0_0402_5%~D CH108 0.1U_0402_25V6K~D
UH5
5
Disabled TC7SH08FU_SSOP5~D
SIO_SLP_A# 1
P
RESET_OUT# LOW: RH129 STUFFED, B
1 2 SYS_PWROK 4 PM_APWROK_R
+3.3V_RUN @ RH321 0_0402_5%~D PM_APWROK O
RH127 UNSTUFFED <40> PM_APWROK 2
A
G
+3.3V_RUN
3
1 2 CLKRUN# PCH_SDVO_CTRLCLK 2 1
RH137 8.2K_0402_5%~D RH351 2.2K_0402_5%~D
1 2 ME_RESET# ME_SUS_PWR_ACK_R 1 2 SUSACK#_R PCH_SDVO_CTRLDATA 2 1
@ RH138 8.2K_0402_5%~D @ RH323 0_0402_5%~D RH352 2.2K_0402_5%~D
1 2
@ RH118 0_0402_5%~D
UH4C
Intel request DDPB can not support eDP
DMI_CTX_PRX_N0 BC24 BJ14 FDI_CTX_PRX_N0 UH4D

<6> DMI_CTX_PRX_N0 DMI0RXN FDI_RXN0 FDI_CTX_PRX_N0 <6>
DMI_CTX_PRX_N1 BE20 AY14 FDI_CTX_PRX_N1 PANEL_BKEN_PCH J47 AP43
<6> DMI_CTX_PRX_N1 DMI1RXN FDI_RXN1 FDI_CTX_PRX_N1 <6> <24> PANEL_BKEN_PCH L_BKLTEN SDVO_TVCLKINN
DMI_CTX_PRX_N2 BG18 BE14 FDI_CTX_PRX_N2 ENVDD_PCH M45 AP45
<6> DMI_CTX_PRX_N2 DMI2RXN FDI_RXN2 FDI_CTX_PRX_N2 <6> <24,39> ENVDD_PCH L_VDD_EN SDVO_TVCLKINP
DMI_CTX_PRX_N3 BG20 BH13 FDI_CTX_PRX_N3
<6> DMI_CTX_PRX_N3 DMI3RXN FDI_RXN3 FDI_CTX_PRX_N3 <6>
BC12 FDI_CTX_PRX_N4 BIA_PWM_PCH P45 AM42
FDI_RXN4 FDI_CTX_PRX_N4 <6> <24> BIA_PWM_PCH L_BKLTCTL SDVO_STALLN
DMI_CTX_PRX_P0 BE24 BJ12 FDI_CTX_PRX_N5 AM40
<6> DMI_CTX_PRX_P0 DMI0RXP FDI_RXN5 FDI_CTX_PRX_N5 <6> SDVO_STALLP
DMI_CTX_PRX_P1 BC20 BG10 FDI_CTX_PRX_N6 LDDC_CLK_PCH T40
C <6> DMI_CTX_PRX_P1 DMI1RXP FDI_RXN6 FDI_CTX_PRX_N6 <6> <24> LDDC_CLK_PCH L_DDC_CLK C
DMI_CTX_PRX_P2 BJ18 BG9 FDI_CTX_PRX_N7 LDDC_DATA_PCH K47 AP39
<6> DMI_CTX_PRX_P2 DMI2RXP FDI_RXN7 FDI_CTX_PRX_N7 <6> <24> LDDC_DATA_PCH L_DDC_DATA SDVO_INTN
DMI_CTX_PRX_P3 BJ20 AP40
<6> DMI_CTX_PRX_P3 DMI3RXP SDVO_INTP
BG14 FDI_CTX_PRX_P0 T45
FDI_RXP0 FDI_CTX_PRX_P0 <6> L_CTRL_CLK
DMI_CRX_PTX_N0 AW24 BB14 FDI_CTX_PRX_P1 P39
<6> DMI_CRX_PTX_N0 DMI0TXN FDI_RXP1 FDI_CTX_PRX_P1 <6> L_CTRL_DATA
DMI_CRX_PTX_N1 AW20 BF14 FDI_CTX_PRX_P2
<6> DMI_CRX_PTX_N1 DMI1TXN FDI_RXP2 FDI_CTX_PRX_P2 <6>
DMI_CRX_PTX_N2 BB18 BG13 FDI_CTX_PRX_P3 1 2 LVD_IBG AF37 P38 PCH_SDVO_CTRLCLK PCH_SDVO_CTRLCLK <25>
<6> DMI_CRX_PTX_N2 DMI2TXN FDI_RXP3 FDI_CTX_PRX_P3 <6> LVD_IBG SDVO_CTRLCLK
DMI_CRX_PTX_N3 AV18 BE12 FDI_CTX_PRX_P4 RH344 2.37K_0402_1%~D AF36 M39 PCH_SDVO_CTRLDATA
<6> DMI_CRX_PTX_N3 DMI3TXN FDI_RXP4 FDI_CTX_PRX_P4 <6> LVD_VBG SDVO_CTRLDATA PCH_SDVO_CTRLDATA <25>
BG12 FDI_CTX_PRX_P5 Minimum speacing of 20mils for LVD_IBG
DMI
DMI_CRX_PTX_P0 AY24
FDI FDI_RXP5
BJ10 FDI_CTX_PRX_P6
FDI_CTX_PRX_P5 <6>
AE48
<6> DMI_CRX_PTX_P0 DMI0TXP FDI_RXP6 FDI_CTX_PRX_P6 <6> LVD_VREFH
DMI_CRX_PTX_P1 AY20 BH9 FDI_CTX_PRX_P7 AE47 AT49
<6> DMI_CRX_PTX_P1 DMI1TXP FDI_RXP7 FDI_CTX_PRX_P7 <6> LVD_VREFL DDPB_AUXN
DMI_CRX_PTX_P2 AY18 AT47
<6> DMI_CRX_PTX_P2 DMI2TXP DDPB_AUXP
DMI_CRX_PTX_P3 AU18 AT40
<6> DMI_CRX_PTX_P3 DMI3TXP DDPB_HPD HDMIB_PCH_HPD <25>
AW16 FDI_INT LCD_ACLK-_PCH AK39
+1.05V_RUN FDI_INT FDI_INT <6> <24> LCD_ACLK-_PCH LVDSA_CLK#
LCD_ACLK+_PCH AK40 AV42
LVDS
<24> LCD_ACLK+_PCH LVDSA_CLK DDPB_0N TMDSB_PCH_N2 <25>
BJ24 AV12 FDI_FSYNC0 AV40
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 <6> DDPB_0P TMDSB_PCH_P2 <25>
LCD_A0-_PCH AN48 AV45
<24> LCD_A0-_PCH LVDSA_DATA#0 DDPB_1N TMDSB_PCH_N1 <25>
1 2 DMI_COMP_R BG25 BC10 FDI_FSYNC1 LCD_A1-_PCH AM47 AV46
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 <6> <24> LCD_A1-_PCH LVDSA_DATA#1 DDPB_1P TMDSB_PCH_P1 <25>
RH111 49.9_0402_1%~D LCD_A2-_PCH AK47 AU48
Digital Display Interface

<24> LCD_A2-_PCH LVDSA_DATA#2 DDPB_2N TMDSB_PCH_N0 <25>
1 2 RBIAS_CPY BH21 AV14 FDI_LSYNC0 AJ48 AU47
DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 <6> LVDSA_DATA#3 DDPB_2P TMDSB_PCH_P0 <25>
RH112 750_0402_1%~D AV47
FDI_LSYNC1 LCD_A0+_PCH DDPB_3N TMDSB_PCH_CLK# <25>
BB10 FDI_LSYNC1 <6> <24> LCD_A0+_PCH AN47 AV49
FDI_LSYNC1 LCD_A1+_PCH LVDSA_DATA0 DDPB_3P TMDSB_PCH_CLK <25>
<24> LCD_A1+_PCH AM49
+RTC_CELL LCD_A2+_PCH LVDSA_DATA1
<24> LCD_A2+_PCH AK49
LVDSA_DATA2
AJ47 P46 PCH_DDPC_CTRLCLK <26>
LVDSA_DATA3 DDPC_CTRLCLK
A18 DSWODVREN RH127 1 2 330K_0402_1%~D P42 PCH_DDPC_CTRLDATA <26>
DSWVRMEN DDPC_CTRLDATA
@ RH129 1 2 330K_0402_1%~D LCD_BCLK-_PCH AF40
<24> LCD_BCLK-_PCH LVDSB_CLK#
System Power Management
1 2 SUSACK#_R C12 E22 PCH_DPWROK LCD_BCLK+_PCH AF39 AP47

<39> SUSACK# SUSACK# DPWROK PCH_DPWROK <39> <24> LCD_BCLK+_PCH LVDSB_CLK DDPC_AUXN DPC_PCH_DOCK_AUX# <26>
@ RH114 0_0402_5%~D AP49
LCD_B0-_PCH DDPC_AUXP DPC_PCH_DOCK_AUX <26>
<24> LCD_B0-_PCH AH45 AT38 DPC_PCH_DOCK_HPD <38>
SYS_RESET# PCH_PCIE_WAKE# LCD_B1-_PCH LVDSB_DATA#0 DDPC_HPD
K3 B9 PCH_PCIE_WAKE# <40> <24> LCD_B1-_PCH AH47
SYS_RESET# WAKE# LCD_B2-_PCH LVDSB_DATA#1
<24> LCD_B2-_PCH AF49 AY47 DPC_PCH_LANE_N0 <38>
B LVDSB_DATA#2 DDPC_0N B
AF45 AY49 DPC_PCH_LANE_P0 <38>
SYS_PWROK_R CLKRUN# LVDSB_DATA#3 DDPC_0P
<7,39> SYS_PWROK 1 2 P12 N3 CLKRUN# <32,39,40> AY43
@ RH116 0_0402_5%~D SYS_PWROK CLKRUN# / GPIO32 LCD_B0+_PCH DDPC_1N DPC_PCH_LANE_N1 <38>
<24> LCD_B0+_PCH AH43 AY45 DPC_PCH_LANE_P1 <38>
LCD_B1+_PCH LVDSB_DATA0 DDPC_1P
<24> LCD_B1+_PCH AH49 BA47
PCH_PWROK SUS_STAT#/LPCPD# T56 PAD~D LCD_B2+_PCH LVDSB_DATA1 DDPC_2N DPC_PCH_LANE_N2 <38>
<40> RESET_OUT# 1 2 L22 G8 <24> LCD_B2+_PCH AF47 BA48 DPC_PCH_LANE_P2 <38>
@ RH117 0_0402_5%~D PWROK SUS_STAT# / GPIO61 LVDSB_DATA2 DDPC_2P
AF43 BB47 DPC_PCH_LANE_N3 <38>
LVDSB_DATA3 DDPC_3N
BB49
PM_APWROK_R SUSCLK T57 PAD~D DDPC_3P DPC_PCH_LANE_P3 <38>
L10 N14
APWROK SUSCLK / GPIO62
T58 PAD~D PCH_CRT_BLU N48 M43 PCH_DDPD_CTRLCLK <26>
<23> PCH_CRT_BLU CRT_BLUE DDPD_CTRLCLK
1 2 PM_DRAM_PWRGD_R B13 D10 SIO_SLP_S5# PCH_CRT_GRN P49 M36
<7> PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 SIO_SLP_S5# <40> <23> PCH_CRT_GRN CRT_GREEN DDPD_CTRLDATA PCH_DDPD_CTRLDATA <26>
@ RH320 0_0402_5%~D PCH_CRT_RED T49
<23> PCH_CRT_RED CRT_RED
T59 PAD~D
1 2 PCH_RSMRST#_R C21 H4 SIO_SLP_S4# AT45
<14,41> PCH_RSMRST#_Q RSMRST# SLP_S4# SIO_SLP_S4# <39,42,46> DDPD_AUXN DPD_PCH_DOCK_AUX# <26>
@ RH120 0_0402_5%~D PCH_CRT_DDC_CLK T39 AT43
CRT
CRT_DDC_CLK DDPD_AUXP DPD_PCH_DOCK_AUX <26>
PCH_CRT_DDC_DAT M40 BH41
ME_SUS_PWR_ACK_R SIO_SLP_S3# CRT_DDC_DATA DDPD_HPD DPD_PCH_DOCK_HPD <38>
<40> ME_SUS_PWR_ACK 1 2 K16 F4
@ RH121 0_0402_5%~D SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# SIO_SLP_S3# <11,27,35,39,42,47> RH123 20_0402_1%~D BB43 DPD_PCH_LANE_N0 <38>
DDPD_0N
<7,14> SIO_PWRBTN#_R <23> PCH_CRT_HSYNC 1 2 HSYNC M47 BB45
SIO_PWRBTN#_R SIO_SLP_A# CRT_HSYNC DDPD_0P DPD_PCH_LANE_P0 <38>
<40> SIO_PWRBTN# 1 2 E20 G10 SIO_SLP_A# <39,42,48> <23> PCH_CRT_VSYNC 1 2 VSYNC M49 BF44 DPD_PCH_LANE_N1 <38>
@ RH122 0_0402_5%~D PWRBTN# SLP_A# RH124 20_0402_1%~D CRT_VSYNC DDPD_1N
BE44 DPD_PCH_LANE_P1 <38>
T62 PAD~D DDPD_1P
BF42
AC_PRESENT SIO_SLP_SUS# CRT_IREF DDPD_2N DPD_PCH_LANE_N2 <38>
<40> AC_PRESENT H20 G16 SIO_SLP_SUS# <39> T43 BE42 DPD_PCH_LANE_P2 <38>
ACPRESENT / GPIO31 SLP_SUS# DAC_IREF DDPD_2P
T42 BJ42
T63 PAD~D CRT_IRTN DDPD_3N DPD_PCH_LANE_N3 <38>
BG42 DPD_PCH_LANE_P3 <38>
DDPD_3P
1
+3.3V_ALW_PCH 1 2 PCH_BATLOW# E10 AP14 H_PM_SYNC
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC <7>
RH139 8.2K_0402_5%~D BD82QM77 QPRE C1_BGA989~D
RH126
PCH_RI# A10 K14 SIO_SLP_LAN# 1K_0402_0.5%~D
RI# SLP_LAN# / GPIO29 SIO_SLP_LAN# <31,39>
2
A A
LA-7781
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
WWW.AliSaler.Com
+3.3V_RUN
1 2 PCI_PIRQA#
RH324 8.2K_0402_5%~D
UH4E
D PCI_PIRQB# D
1 2 RSVD1
AY7
RH325 8.2K_0402_5%~D AV7
RSVD2
BG26 TP1 AU3
PCI_PIRQC# RSVD3
1 2 BJ26 BG4
RH326 8.2K_0402_5%~D TP2 RSVD4
BH25 TP3
BJ16 TP4 AT10
PCI_PIRQD# RSVD5
1 2 BG16 BC8
RH329 8.2K_0402_5%~D TP5 RSVD6
AH38 TP6
AH37 TP7 AU2
PCI_REQ1# RSVD7
1 2 AK43 TP8 RSVD8
AT4
RH327 10K_0402_5%~D AK45 AT3
TP9 RSVD9
C18 TP10 AT1
LCD_CBL_DET# RSVD10
1 2 N30 AY3
RH330 10K_0402_5%~D TP11 RSVD11
H3 TP12 AT5
RSVD12
AH12 TP13 AV3
BT_DET# RSVD13
1 2 AM4 TP14 RSVD14
AV1
RH328 10K_0402_5%~D AM5 BB1
TP15 RSVD15
Y13 TP16 BA3
PCH_GPIO3 RSVD16
1 2 K24 BB5
RH332 10K_0402_5%~D TP17 RSVD17
L24 TP18 BB3
RSVD18
AB46 TP19 BB7
CAM_MIC_CBL_DET# RSVD19
1 2 AB45 TP20 RSVD20
BE8
RH331 10K_0402_5%~D BD4
RSVD
RSVD21
BF6
PCIE_MCARD2_DET# RSVD22
1 2
RH359 10K_0402_5%~D B21 AV5
TP21 RSVD23
M20 TP22 AV10
RSVD24
AY16 TP23
BG46 TP24 AT8
RSVD25
AY5
RSVD26
BA2
C RSVD27 C
<36> USB3RN1 BE28 USB3Rn1
<36> USB3RN2 BC30 USB3Rn2 AT12
RSVD28
BE32 USB3Rn3 BF3
RSVD29
<38> USB3RN4 BJ32 USB3Rn4
<36> USB3RP1 BC28 USB3Rp1
<36> USB3RP2 BE30 USB3Rp2
BF32
USB30
USB3Rp3 USBP0-
<38> USB3RP4 BG32 USB3Rp4 USBP0N C24 USBP0- <36>
PCI_GNT3#
<36> USB3TN1 AV26 USB3Tn1 USBP0P
A24 USBP0+
USBP0+ <36>
----->Right Side Top
BB26 C25 USBP1-
<36> USB3TN2 USB3Tn2 USBP1N USBP1- <36>
AU28 USB3Tn3 USBP1P B25 USBP1+
USBP1+ <36>
----->Right Side Bottom
1
AY30 C26 USBP2-

<38> USB3TN4 USB3Tn4 USBP2N USBP2- <37>
@ RH333
<36> USB3TP1 AU26 USB3TP1 USBP2P A26 USBP2+
USBP2+ <37>
----->Right side E-SATA
1K_0402_5%~D AY26 K28 USBP3-
<36> USB3TP2 USB3Tp2 USBP3N USBP3- <38>
AV28 USB3Tp3 USBP3P H28 USBP3+
USBP3+ <38>
----->MLK DOCK
AW30 E28 USBP4-
<38> USB3TP4 USBP4- <34>
2
USB3Tp4 USBP4N
USBP4P D28 USBP4+
USBP4+ <34>
----->WLAN/WIMAX
C28 USBP5-
USBP5N USBP5- <34>
USBP5P A28 USBP5+
USBP5+ <34>
----->WWAN/UWB
USBP6-
USBP6N C29
B29 USBP6+ USBP6- <38> ----->DOCK
USBP6P USBP6+ <38>
PCI_PIRQA# USBP7-
PCI_PIRQB#
K40
K38
PIRQA# USBP7N N28
M28 USBP7+
USBP7- <32> ----->USH
PIRQB# USBP7P USBP7+ <32>
A16 swap override Strap/Top-Block PCI_PIRQC# USBP8-
H38 L30 ----->Flash
PCI
PCI_PIRQD# PIRQC# USBP8N USBP8+ USBP8- <34>
G38 K30 USBP8+ <34>
PIRQD# USBP8P
Swap Override jumper USBP9N G30 USBP9-
USBP9- <30>
PCI_REQ1# C46
REQ1# / GPIO50 USBP9P E30 USBP9+
USBP9+ <30>
----->Left side
C44 C30 USBP10-
USB
<34> PCIE_MCARD2_DET# REQ2# / GPIO52 USBP10N USBP10- <35>
Low = A16 swap <41> BT_DET#
BT_DET# E40 REQ3# / GPIO54 USBP10P A30 USBP10+
USBP10+ <35>
----->Express Card +3.3V_ALW_PCH
PCI_GNT#3 L32 USBP11-
USBP11N USBP11- <41>
High = Default BBS_BIT1 D47 GNT1# / GPIO51 USBP11P K32 USBP11+
USBP11+ <41> ----->Blue Tooth INTEL feedback 0307 RPH1
E42 G32 USBP12- USB_OC0#_R 4 5
GNT2# / GPIO53 USBP12N USBP12- <24>
B PCI_GNT3# F46 GNT3# / GPIO55 USBP12P E32 USBP12+
USBP12+ <24>
----->Camera USB_OC1#_R 3 6 B
C32 USBP13- USB_OC3# 2 7
USBP13N USBP13- <24>
USBP13P A32 USBP13+
USBP13+ <24>
----->LCD Touch USB_OC4#_R 1 8
LCD_CBL_DET# G42
<24> LCD_CBL_DET# PCH_GPIO3 PIRQE# / GPIO2
G40 10K_1206_8P4R_5%~D
CAM_MIC_CBL_DET# PIRQF# / GPIO3 USBRBIAS RPH2
<24> CAM_MIC_CBL_DET# C42 C33 1 2
FFS_PCH_INT PIRQG# / GPIO4 USBRBIAS# RH151 USB_OC5#
<27> HDD_FALL_INT 1 2 D44 4 5
@ RH334 0_0402_5%~D PIRQH# / GPIO5 22.6_0402_1%~D USB_OC6# 3 6
1 2 B33 Route single-end 50-ohms and max 500-mils length. SIO_EXT_SMI# 2 7
<32> PLTRST_USH# USBRBIAS
@ RH3351 2 0_0402_5%~D PAD~D T104 @ K10 USB_OC2# 1 8
<33> PLTRST_MMI# PME# Minimum spacing to other signals: 15 mils
@ RH3361 2 0_0402_5%~D
<7> PLTRST_XDP#
@ RH3371 2 0_0402_5%~D PCH_PLTRST# C6 A14 USB_OC0#_R 1 2 10K_1206_8P4R_5%~D
<31> PLTRST_LAN# PLTRST# OC0# / GPIO59 USB_OC1#_R USB_OC0# <36>
@ RH3381 2 0_0402_5%~D K20 @ RH3391
@RH339 2 0_0402_5%~D
<28> PLTRST_EMB# OC1# / GPIO40 USB_OC2# USB_OC1# <36>
@ RH340 0_0402_5%~D B17 @ RH341 0_0402_5%~D
OC2# / GPIO41 USB_OC2# <14>
2 1 PCI_5048 H49 C16 USB_OC3#
<39> CLK_PCI_5048 PCI_MEC CLKOUT_PCI0 OC3# / GPIO42 USB_OC4#_R
USB_OC3# <14>
<40> CLK_PCI_MEC
RH160 2 1 22_0402_5%~D H43 CLKOUT_PCI1 OC4# / GPIO43 L16 1 2 USB_OC4# <30>
RH102 2 1 22_0402_5%~D PCI_DOCK J48 A16 USB_OC5# RH356
@RH356
@ 0_0402_5%~D
<38> CLK_PCI_DOCK CLKOUT_PCI2 OC5# / GPIO9 USB_OC6# USB_OC5# <14>
RH103 22_0402_5%~D K42 D14
PCI_LOOPBACKOUT CLKOUT_PCI3 OC6# / GPIO10 SIO_EXT_SMI# USB_OC6# <14>
<15> CLK_PCI_LOOPBACK 2 1 H40 C14 SIO_EXT_SMI# <14,40>
RH105 22_0402_5%~D CLKOUT_PCI4 OC7# / GPIO14
USB_OC0#_R <14>
CLK_PCI_5048 CLK_PCI_MEC BD82QM77 QPRE C1_BGA989~D
USB_OC1#_R <14>
USB_OC4#_R <14>
1 1
+3.3V_RUN CH102 CH110 CH109
0.1U_0402_25V6K~D 12P_0402_50V8J~D 12P_0402_50V8J~D
1 2
2 2
Boot BIOS Strap

5
A A
UH3 SATA_SLPD
PCH_PLTRST# 1 BBS_BIT1 (BBS_BIT0) Boot BIOS Location
P
<7,14> PCH_PLTRST# B
4 PCH_PLTRST#_EC BBS_BIT1
O PCH_PLTRST#_EC <32,34,35,39,40>
2
A
G
0 0 LPC
1
TC7SH08FU_SSOP5~D
3
@ RH342
0 1 Reserved (NAND) 1K_0402_5%~D
Title
2
1 0 PCI PCH (4/8)

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1 1 SPI 1.0
* LA-7781
5 4 3 2 1
5 4 3 2 1
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+3.3V_ALW_PCH +3.3V_RUN
2
RH53 CONTACTLESS_DET# 2 1
4.7K_0402_5%~D RH256 10K_0402_5%~D
D D
1
SLP_ME_CSW_DEV# UH4F
<14> SIO_EXT_SCI#_R
1
SIO_EXT_SCI# 1 2 T7 C40 CONTACTLESS_DET#

<40> SIO_EXT_SCI# BMBUSY# / GPIO0 TACH4 / GPIO68 CONTACTLESS_DET# <32>
RH353 @ RH259 0_0402_5%~D
1K_0402_5%~D USH_DET# A42 B41 PCH_GPIO69
<32> USH_DET# TACH1 / GPIO1 TACH5 / GPIO69
@
IO_LOOP# H36 C41 PCIE_MCARD3_DET# PCH_GPIO69 1 2
<30> IO_LOOP# PCIE_MCARD3_DET# <34>
2
TACH2 / GPIO6 TACH6 / GPIO70 RH260 1.5K_0402_1%~D

PCH_GPIO7 E38 A40
TACH3 / GPIO7 TACH7 / GPIO71 USB_MCARD2_DET# <34>
<39> SIO_EXT_WAKE# C10

GPIO8
Note: PCH has internal pull up 20k ohm on PM_LANPHY_ENABLE C4
<31> PM_LANPHY_ENABLE LAN_PHY_PWR_CTRL / GPIO12
E3_PAID_TS_DET# (GPIO27) <14> PCH_GPIO15
PCH_GPIO15 G2 P4 SIO_A20GATE
SIO_A20GATE <40>
GPIO15 A20GATE
AU16
PCH_GPIO16 PECI
<14> PCH_GPIO16 U2
SATA4GP / GPIO16 SIO_RCIN#
SLP_ME_CSW_DEV# PLL ON DIE VR ENABLE P5 SIO_RCIN# <40>
RCIN#
DBC_ENABLE for E4 12" +3.3V_RUN
PCH_GPIO17 D40 AY11 H_CPUPWRGD +1.05V_RUN_VTT
GPIO
TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD <7>
ENABLED - HIGH DEFAULT
CPU/MISC
DISABLED - LOW PCH_GPIO22 T5 AY10 PCH_THRMTRIP#_R 2 1 SIO_A20GATE 2 1
SCLOCK / GPIO22 THRMTRIP# RH262 56_0402_5%~D RH158 10K_0402_5%~D
E8 T14 INIT3_3V# PAD~D T106 1 SIO_RCIN# 2 1
<34> PCIE_MCARD1_DET# GPIO24 INIT3_3V# @ RH203 10K_0402_5%~D
E3_PAID_TS_DET# E16 AY1 DF_TVS CH97
+3.3V_ALW_PCH <24> E3_PAID_TS_DET# GPIO27 DF_TVS 0.1U_0402_25V6K~D
SLP_ME_CSW_DEV# P8 2 SIO_EXT_SCI# 1 2
<14,39> SLP_ME_CSW_DEV# GPIO28
AH8 RH263 10K_0402_5%~D
SIO_EXT_WAKE# TS_VSS1 USH_DET#
2 1 K1 1 2
C RH177 10K_0402_5%~D STP_PCI# / GPIO34 RH164 100K_0402_5%~D C
TS_VSS2 AK11
1 2 PCH_GPIO15 USB_MCARD1_DET# K4
<14,34> USB_MCARD1_DET# GPIO35
RH354 1K_0402_5%~D AH10
PCH_GPIO36 TS_VSS3
<14> PCH_GPIO36 V8
SATA2GP / GPIO36
TS_VSS4 AK10
PCH_GPIO37 M5
<14> PCH_GPIO37 SATA3GP / GPIO37
TPM_ID0 N2 P37 NC_1 PAD~D T108 @
SLOAD / GPIO38 NC_1
TPM_ID1 M3
SDATAOUT0 / GPIO39
FFS_INT2 V13 BG2 VSS_NCTF_15
<27> FFS_INT2 SDATAOUT1 / GPIO48 VSS_NCTF_15
TEMP_ALERT# V3 BG48 VSS_NCTF_16
<14,39> TEMP_ALERT# SATA5GP / GPIO49 / TEMP_ALERT# VSS_NCTF_16
KB_DET# D6 BH3 VSS_NCTF_17 Layout note:
<41> KB_DET# GPIO57 VSS_NCTF_17
BH47 VSS_NCTF_18 Trace wide 10mil & length 30mil
VSS_NCTF_18
VSS_NCTF_1 VSS_NCTF_19
All NCTF pins should have thick
A4 BJ4
VSS_NCTF_1 VSS_NCTF_19 traces at 45°from the pad.
VSS_NCTF_2 A44 BJ44 VSS_NCTF_20
INTEL feedback 0302 VSS_NCTF_3 A45 BJ45 VSS_NCTF_21
2 1 PCH_GPIO36
RH174 10K_0402_5%~D VSS_NCTF_4 A46 BJ46 VSS_NCTF_22
NCTF
2 1 PCH_GPIO37
RH172 10K_0402_5%~D VSS_NCTF_5 A5 BJ5 VSS_NCTF_23
2 1 PCH_GPIO17 VSS_NCTF_6 A6
VSS_NCTF_6 VSS_NCTF_24 BJ6 VSS_NCTF_24
@ RH273 1K_0402_5%~D
VSS_NCTF_7 B3 C2 VSS_NCTF_25
B VSS_NCTF_7 VSS_NCTF_25 B
2 1 PCH_GPIO16
@ RH265 10K_0402_5%~D VSS_NCTF_8 B47 C48 VSS_NCTF_26
Layout note: VSS_NCTF_9 BD1 D1 VSS_NCTF_27
Trace wide 10mil & length 30mil VSS_NCTF_10 BD49 D49 VSS_NCTF_28 PLACE RH150 CLOSE TO THE BRANCHING POINT
All NCTF pins should have thick VSS_NCTF_11 VSS_NCTF_29
( TO CPU and NVRAM CONNECTOR)
BE1 E1
traces at 45°from the pad. VSS_NCTF_11 VSS_NCTF_29
VSS_NCTF_12 BE49 E49 VSS_NCTF_30
VSS_NCTF_12 VSS_NCTF_30 +VCCDFTERM
VSS_NCTF_13 BF1 F1 VSS_NCTF_31
RH149 need to close to CPU
VSS_NCTF_14 BF49 F49 VSS_NCTF_32
1
+3.3V_ALW_PCH
RH149
2 1 KB_DET# BD82QM77 QPRE C1_BGA989~D 2.2K_0402_5%~D
RH170 10K_0402_5%~D
2
1 2 DF_TVS_R 1 2 DF_TVS
<7> H_SNB_IVB#
@RH150
@ RH150 0_0402_5%~D RH358 1K_0402_5%~D
+3.3V_RUN
2 1 PCH_GPIO36
@ RH171 10K_0402_5%~D
2 1 PCH_GPIO37 +3.3V_RUN +3.3V_RUN
@ RH173 1K_0402_5%~D
DMI & FDI Termination Voltage
1
2
2 1 TEMP_ALERT#
RH266 10K_0402_5%~D 1@ RH267 RH268 Set to Vss when LOW
2 1 PCH_GPIO22 10K_0402_5%~D 20K_0402_5%~D DF_TVS
A A
RH181 10K_0402_5%~D TPM_ID0 TPM_ID1 Set to Vcc when HIGH
2 1 PCH_GPIO7
2
1
RH178 10K_0402_5%~D Non-TPM 0 1

TPM_ID0 TPM_ID1
1 2 PCH_GPIO17 TPM 1 1
RH269 8.2K_0402_5%~D DELL CONFIDENTIAL/PROPRIETARY
1
IO_LOOP#
1
RH163
2
10K_0402_5%~D 2@ RH270 @ RH271 Compal Electronics, Inc.
10K_0402_5%~D 2.2K_0402_5%~D Title
PCH_GPIO16
1 2 PCH (5/8)
2
RH272 10K_0402_5%~D
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1.0
LA-7781
5 4 3 2 1
5 4 3 2 1
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1UH_GLFR1608T1R0M-LR_20%~D
+3.3V_RUN
PCH Power Rail Table
+1.05V_RUN UH4G POWER +VCCADAC 2 1 S0 Iccmax
Voltage Rail Voltage Current (A)
0.01U_0402_16V7K~D
0.1U_0402_10V7K~D
22U_0805_6.3V6M~D
AA23 VCCCORE[1] VCCADAC U48 1 1 1
AC23 VCCCORE[2]
V_PROC_IO 1.05 0.001
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH34
CH35
CH36
1 1 1 1 AD21 VCCCORE[3]
CRT
AD23 VCCCORE[4] VSSADAC U47
2 2 2
CH30
CH32
CH33
CH31
AF21 VCCCORE[5]
V5REF 5 0.001
VCC CORE
AF23 +3.3V_RUN
D 2 2 2 2 VCCCORE[6] D
AG21 VCCCORE[7]
AG23 VCCCORE[8]
V5REF_Sus 5 0.001
AG24 VCCCORE[9] VCCALVDS AK36
AG26 VCCCORE[10]
AG27 AK37 +1.8V_RUN Vcc3_3 3.3 0.228
VCCCORE[11] VSSALVDS LH8
AG29 VCCCORE[12]
AJ23 100NH_HK1608R10J-T_5%_0603~D
VCCCORE[13] +1.8V_RUN_LVDS
AJ26 AM37 2 1 VccADAC3 3.3 0.063
LVDS
VCCCORE[14] VCCTX_LVDS[1]
22U_0805_6.3V6M~D
AJ27 1 1 1 0.1uH inductor, 200mA
VCCCORE[15]
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
CH105
AJ29 AM38
VCCCORE[16] VCCTX_LVDS[2]
CH103
CH104
AJ31 CPN: SHI0110BJ0L VccADPLLA 1.05 0.08
+1.05V_RUN VCCCORE[17]
VCCTX_LVDS[3] AP36
2 2 2
VCCTX_LVDS[4] AP37 VccADPLLB 1.05 0.08

AN19 VCCIO[28]
+1.05V_RUN
VccCore 1.05 1.7
1 2 +VCCAPLLEXP BJ22
@ RH247 VCCAPLLEXP
1UH_LB2012T1R0M_20%~D
10U_0603_6.3V6M~D
1 VCC3_3[6]
V33 +3.3V_RUN VccDMI 1.1 0.047
@ AN16
HVCMOS
VCCIO[15]
1
CH40
AN17 VCCIO[16]
VccIO 1.05 3.711
2 V34 CH43
VCC3_3[7]
0.1U_0402_10V7K~D
2 VccASW 1.05 0.903
AN21 VCCIO[17]
AN26 +1.05V_+1.5V_1.8V_RUN
VCCIO[18]
VccSPI 3.3 0.01
AN27 VCCIO[19] VCCVRM[3] AT16
+1.05V_RUN
AP21 VCCIO[20]
VccDSW3_3 3.3 0.001
C C
AP23 AT20 +1.05V_RUN_VTT
VCCIO[21] VCCDMI[1]
VCCDFTERM 1.8 0.002
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 1 1 1 1 AP24 1 2 CH49
DMI
VCCIO[22] 1U_0402_6.3V6K~D
VCCIO
CH44
CH45
CH46
CH48
CH47
AP26 AB36 +1.05V_RUN_VCCCLKDMI 2 1 VccRTC 3.3 2 (mA)

VCCIO[23] VCCCLKDMI +1.05V_RUN
10U_0603_6.3V6M~D
1 1 @ @ RH205 0_0603_5%~D
2 2 2 2 2
AT24 VCCIO[24]
CH106
CH50 VccSus3_3 3.3 0.095
1U_0402_6.3V6K~D
AN33 2 2 INTEL feedback 0302
VCCIO[25]
VccSusHDA 3.3 0.01
AN34 AG16
+3.3V_RUN VCCIO[26] VCCDFTERM[1] +VCCDFTERM @RH276
@ RH276
0_0805_5%~D VccVRM 1.5 0.167
BH29 AG17 2 1 +3.3V_RUN
VCC3_3[3] VCCDFTERM[2]
DFT / SPI
0.1U_0402_10V7K~D
1 PJP66
@PJP66
@ VccClkDMI 1.05 0.07
+1.05V_+1.5V_1.8V_RUN AJ16 1 1 2 +1.8V_RUN
VCCDFTERM[3]
CH51
AP16 VCCVRM[2]
CH52 PAD-OPEN1x1m VccSSC 1.05 0.095
2 0.1U_0402_10V7K~D
VCCDFTERM[4] AJ17
2
+VCCAPLL_FDI BG6 VccDIFFCLKN 1.05 0.055
VccAFDIPLL +VCCSPI
+1.05V_RUN AP17 VCCIO[27]

VccALVDS 3.3 0.001
V1 2 1 +3.3V_M
VCCSPI
FDI
@ RH202 0_0603_5%~D
+1.05V_RUN_VTT AU20
VCCDMI[2]
VccTX_LVDS 1.8 0.04
1 2 1 +3.3V_RUN
@ RH204 0_0603_5%~D
B BD82QM77 QPRE C1_BGA989~D CH54 B
1U_0402_6.3V6K~D INTEL feedback 0307
2
+1.05V_RUN
1 2 +VCCAPLL_FDI
@ RH195 0.022_0805_1%
+1.5V_RUN +1.05V_+1.5V_1.8V_RUN
2 1
@ RH197 0_0603_5%~D
A A
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LA-7781
5 4 3 2 1
5 4 3 2 1
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QH4
SSM3K7002FU_SC70-3~D
+5V_ALW_PCH
1
+1.05V_RUN 1 3
20K_0402_5%~D
0.1U_0402_10V7K~D
1 2 +VCCACLK RH279
1
+3.3V_ALW_PCH @ RH200 0.022_0805_1% 100K_0402_5%~D
POWER 1
G
2
RH278
UH4J
3300P_0402_50V7K~D
+3.3V_ALW2
CH98
1 2 5V_ALW_PCH_ENABLE
@ RH201 0_0402_5%~D 1 AD49 N26 +1.05V_RUN 1
VCCACLK VCCIO[29]
1
D 2
1 2
2
CH107
@ RH253 0_0402_5%~D CH55 P26 1 2 QH6
0.1U_0402_10V7K~D +VCCDSW3_3 VCCIO[30] <42> ALW_ON_3.3V#
T16 G SSM3K7002FU_SC70-3~D
D 2 VCCDSW3_3 CH56 2 D
P28 S
3
VCCIO[31] 1U_0402_6.3V6K~D
+PCH_VCCDSW V12 T27 2
+1.05V_RUN @ LH3 DCPSUSBYP VCCIO[32]
1
10UH_LBR2012T100M_20%~D T29
VCCIO[33]
@
1 2 CH57 +3.3V_RUN_VCC_CLKF33 T38
VCC3_3[5]
10U_0603_6.3V6M~D
0.1U_0402_10V7K~D +3.3V_ALW_PCH
2
0.1U_0402_10V7K~D
1 VCCSUS3_3[7] T23
+1.05V_RUN +VCCAPLL_CPY_PCH BH23 VCCAPLLDMI2 1
@ T24 +3.3V_ALW_PCH
VCCSUS3_3[8] +5V_ALW_PCH +3.3V_ALW_PCH
0.1U_0402_10V7K~D
CH59
AL29 VCCIO[14]
2
CH58
VCCSUS3_3[9] V23 1
2
USB
2
CH60
+VCCSUS1 AL24 V24
DCPSUS[3] VCCSUS3_3[10] RH208 DH2
1 2
P24 10_0402_1%~D RB751S40T1_SOD523-2~D
VCCSUS3_3[6]
@
CH61
1U_0402_6.3V6K~D AA19
1
2 VCCASW[1] +PCH_V5REF_SUS
VCCIO[34] T26 +1.05V_RUN
AA21 VCCASW[2] 1
AA24 M26 +PCH_V5REF_SUS CH63

VCCASW[3] V5REF_SUS
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 1 +3.3V_ALW_PCH 0.1U_0402_10V7K~D
2
CH64
CH65
0.1U_0402_10V7K~D
AA26 VCCASW[4]
Clock and Miscellaneous

AN23 +VCCA_USBSUS 1
DCPSUS[4] CRB 0.7 RH208,RH213 trace width 20mil.
AA27 VCCASW[5]
2 2
CH66
VCCSUS3_3[1] AN24
AA29 VCCASW[6] 2
+1.05V_M AA31 +5V_RUN +3.3V_RUN
VCCASW[7]
AC26 P34 +PCH_V5REF_RUN
VCCASW[8] V5REF
2
C C
1 1U_0402_6.3V6K~D 1 1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
AC27 RH213 DH3
CH67 VCCASW[9]
CH68
CH69
N20 +3.3V_ALW_PCH 10_0402_1%~D RB751S40T1_SOD523-2~D
VCCSUS3_3[2]
AC29 1
PCI/GPIO/LPC
2 2 2 VCCASW[10]
N22
1
VCCSUS3_3[3] CH70 +PCH_V5REF_RUN
AC31 VCCASW[11]
P20 1U_0603_10V7K~D +3.3V_RUN
VCCSUS3_3[4] 2
AD29 VCCASW[12] 1
VCCSUS3_3[5] P22
+3.3V_RUN AD31 CH71
VCCASW[13] 1
1U_0603_10V7K~D
W21 AA16 CH72 2
VCCASW[14] VCC3_3[1] 0.1U_0402_10V7K~D
W23 W16 2 +3.3V_RUN
VCCASW[15] VCC3_3[8]
1 2 +3.3V_RUN_VCC_CLKF33 W24 T34
VCCASW[16] VCC3_3[4]
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
RH215 0.022_0805_1% 1 1 1
W26 +VCCA_USBSUS
VCCASW[17]
CH74
@ CH75
+3.3V_RUN 0.1U_0402_10V7K~D
Note: If EMI concern, pop 2 2
W29 VCCASW[18] 2 1
CH73
with SHI00008S0L, 10UH +-20% W31 VCCASW[19] VCC3_3[2] AJ2 @CH62

@CH62
1U_0402_6.3V6K~D
1 2
W33 VCCASW[20]
AF13 CH76 +1.05V_RUN
VCCIO[5] 0.1U_0402_10V7K~D
2 1
+VCCRTCEXT N16 DCPRTC CH77
Note: Place VCCDIFFCLKN with a trace 1
+1.05V_+1.5V_1.8V_RUN VCCIO[12] AH13
1U_0402_6.3V6K~D
2
specially for XCLK_RCOMP (RH100.2) CH78
0.1U_0402_10V7K~D
Y49 VCCVRM[4] VCCIO[13] AH14
2
B +1.05V_RUN AF14 LH5 @ B
+1.05V_RUN_VCCA_A_DPL VCCIO[6] 10UH_LBR2012T100M_20%~D
BD47 VCCADPLLA
AK1 +VCCSATAPLL 1 2
SATA
VCCAPLLSATA +1.05V_RUN
1 +1.05V_RUN_VCCA_B_DPL BF47 +1.05V_+1.5V_1.8V_RUN 1
VCCADPLLB @ CH80
@CH80
CH79 AF11 10U_0603_6.3V6M~D
1U_0402_6.3V6K~D VCCVRM[1]
AF17 VCCIO[7]
2 AF33 2
VCCDIFFCLKN[1]
AF34 VCCDIFFCLKN[2] VCCIO[2] AC16 +1.05V_RUN
1 2 CH81 AG34
1U_0402_6.3V6K~D VCCDIFFCLKN[3]
VCCIO[3] AC17 1
1 AG33 AD17 CH82

VCCSSC VCCIO[4] 1U_0402_6.3V6K~D
+1.05V_M CH96 2
1U_0402_6.3V6K~D +VCCSST V16 +1.05V_M
2 DCPSST
1 2 +1.05V_M_VCCSUS
@ RH248 0.022_0805_1% 1 +1.05V_M_VCCSUS
1 T17 DCPSUS[1] VCCASW[22] T21
CH84 V19
0.1U_0402_10V7K~D CH83 @ DCPSUS[2]
MISC
+1.05V_RUN_VTT 2 1U_0402_6.3V6K~D V21

2 VCCASW[23]
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
BJ8
CPU
V_PROC_IO
1 1 1 VCCASW[21] T19
+RTC_CELL
CH86
CH87
CH85
4.7U_0603_6.3V6K~D
2 2 2 A22 P32
VCCRTC VCCSUSHDA +3.3V_ALW_PCH
RTC
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
HDA
1 1 1 1
LH6 BD82QM77 QPRE C1_BGA989~D
A +1.05V_RUN A
CH88
CH89
10UH_LBR2012T100M_20%~D CH90 CH91

1 2 +1.05V_RUN_VCCA_A_DPL 1U_0402_6.3V6K~D 0.1U_0402_10V7K~D
2 2 2 2
1 2 +1.05V_RUN_VCCA_B_DPL
LH7 DELL CONFIDENTIAL/PROPRIETARY
220U_D2_2VY_R15M
220U_D2_2VY_R15M
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10UH_LBR2012T100M_20%~D 1 1
1 1 Compal Electronics, Inc.
CH94
CH95
CH93
CH92
+ +
Title
2 2 2 2 PCH (7/8)
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1.0
LA-7781
5 4 3 2 1
5 4 3 2 1
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UH4I
AY4 H46
VSS[159] VSS[259]
AY42 K18
VSS[160] VSS[260]
AY46 K26
VSS[161] VSS[261]
AY8 K39
D VSS[162] VSS[262] D
B11 K46
UH4H VSS[163] VSS[263]
B15 K7
VSS[164] VSS[264]
H5 B19 L18
VSS[0] VSS[165] VSS[265]
B23 L2
VSS[166] VSS[266]
AA17 VSS[1] VSS[80] AK38 B27
VSS[167] VSS[267]
L20
AA2 AK4 B31 L26
VSS[2] VSS[81] VSS[168] VSS[268]
AA3 AK42 B35 L28
VSS[3] VSS[82] VSS[169] VSS[269]
AA33 AK46 B39 L36
VSS[4] VSS[83] VSS[170] VSS[270]
AA34 AK8 B7 L48
VSS[5] VSS[84] VSS[171] VSS[271]
AB11 AL16 F45 VSS[172] M12
VSS[6] VSS[85] VSS[272]
AB14 AL17 BB12 P16
VSS[7] VSS[86] VSS[173] VSS[273]
AB39 AL19 BB16 M18
VSS[8] VSS[87] VSS[174] VSS[274]
AB4 AL2 BB20 M22
VSS[9] VSS[88] VSS[175] VSS[275]
AB43 AL21 BB22 M24
VSS[10] VSS[89] VSS[176] VSS[276]
AB5 AL23 BB24 M30
VSS[11] VSS[90] VSS[177] VSS[277]
AB7 AL26 BB28 M32
VSS[12] VSS[91] VSS[178] VSS[278]
AC19 AL27 BB30 M34
VSS[13] VSS[92] VSS[179] VSS[279]
AC2 AL31 BB38 M38
VSS[14] VSS[93] VSS[180] VSS[280]
AC21 AL33 BB4 M4
VSS[15] VSS[94] VSS[181] VSS[281]
AC24 AL34 BB46 M42
VSS[16] VSS[95] VSS[182] VSS[282]
AC33 AL48 BC14 M46
VSS[17] VSS[96] VSS[183] VSS[283]
AC34 AM11 BC18 M8
VSS[18] VSS[97] VSS[184] VSS[284]
AC48 AM14 BC2 N18
VSS[19] VSS[98] VSS[185] VSS[285]
AD10 AM36 BC22 P30
VSS[20] VSS[99] VSS[186] VSS[286]
AD11 AM39 BC26 N47
VSS[21] VSS[100] VSS[187] VSS[287]
AD12 AM43 BC32 P11
VSS[22] VSS[101] VSS[188] VSS[288]
AD13 AM45 BC34 P18
VSS[23] VSS[102] VSS[189] VSS[289]
AD19 AM46 BC36 T33
VSS[24] VSS[103] VSS[190] VSS[290]
AD24 AM7 BC40 P40
VSS[25] VSS[104] VSS[191] VSS[291]
AD26 AN2 BC42 P43
VSS[26] VSS[105] VSS[192] VSS[292]
AD27 AN29 BC48 P47
VSS[27] VSS[106] VSS[193] VSS[293]
AD33 AN3 BD46 P7
C VSS[28] VSS[107] VSS[194] VSS[294] C
AD34 AN31 BD5 R2
VSS[29] VSS[108] VSS[195] VSS[295]
AD36 AP12 BE22 R48
VSS[30] VSS[109] VSS[196] VSS[296]
AD37 AP19 BE26 T12
VSS[31] VSS[110] VSS[197] VSS[297]
AD38 AP28 BE40 T31
VSS[32] VSS[111] VSS[198] VSS[298]
AD39 AP30 BF10 T37
VSS[33] VSS[112] VSS[199] VSS[299]
AD4 AP32 BF12 T4
VSS[34] VSS[113] VSS[200] VSS[300]
AD40 AP38 BF16 W34
VSS[35] VSS[114] VSS[201] VSS[301]
AD42 AP4 BF20 T46
VSS[36] VSS[115] VSS[202] VSS[302]
AD43 AP42 BF22 T47
VSS[37] VSS[116] VSS[203] VSS[303]
AD45 AP46 BF24 T8
VSS[38] VSS[117] VSS[204] VSS[304]
AD46 AP8 BF26 V11
VSS[39] VSS[118] VSS[205] VSS[305]
AD8 AR2 BF28 V17
VSS[40] VSS[119] VSS[206] VSS[306]
AE2 AR48 BD3 V26
VSS[41] VSS[120] VSS[207] VSS[307]
AE3 AT11 BF30 V27
VSS[42] VSS[121] VSS[208] VSS[308]
AF10 AT13 BF38 V29
VSS[43] VSS[122] VSS[209] VSS[309]
AF12 AT18 BF40 V31
VSS[44] VSS[123] VSS[210] VSS[310]
AD14 AT22 BF8 V36
VSS[45] VSS[124] VSS[211] VSS[311]
AD16 AT26 BG17 V39
VSS[46] VSS[125] VSS[212] VSS[312]
AF16 AT28 BG21 V43
VSS[47] VSS[126] VSS[213] VSS[313]
AF19 AT30 BG33 V7
VSS[48] VSS[127] VSS[214] VSS[314]
AF24 AT32 BG44 W17
VSS[49] VSS[128] VSS[215] VSS[315]
AF26 AT34 BG8 W19
VSS[50] VSS[129] VSS[216] VSS[316]
AF27 AT39 BH11 W2
VSS[51] VSS[130] VSS[217] VSS[317]
AF29 AT42 BH15 W27
VSS[52] VSS[131] VSS[218] VSS[318]
AF31 AT46 BH17 W48
VSS[53] VSS[132] VSS[219] VSS[319]
AF38 AT7 BH19 Y12
VSS[54] VSS[133] VSS[220] VSS[320]
AF4 AU24 H10 VSS[221] VSS[321] Y38
VSS[55] VSS[134]
AF42 AU30 BH27 Y4
VSS[56] VSS[135] VSS[222] VSS[322]
AF46 AV16 BH31 Y42
VSS[57] VSS[136] VSS[223] VSS[323]
AF5 AV20 BH33 Y46
VSS[58] VSS[137] VSS[224] VSS[324]
AF7 AV24 BH35 VSS[325] Y8
VSS[59] VSS[138] VSS[225]
AF8 AV30 BH39 VSS[328] BG29
B VSS[60] VSS[139] VSS[226] B
AG19 AV38 BH43 VSS[329] N24
VSS[61] VSS[140] VSS[227]
AG2 AV4 BH7 VSS[330] AJ3
VSS[62] VSS[141] VSS[228]
AG31 AV43 D3 VSS[331] AD47
VSS[63] VSS[142] VSS[229]
AG48 AV8 D12 VSS[333] B43
VSS[64] VSS[143] VSS[230]
AH11 AW14 D16 VSS[334] BE10
VSS[65] VSS[144] VSS[231]
AH3 AW18 D18 VSS[335] BG41
VSS[66] VSS[145] VSS[232]
AH36 AW2 D22 VSS[337] G14
VSS[67] VSS[146] VSS[233]
AH39 AW22 D24 VSS[338] H16
VSS[68] VSS[147] VSS[234]
AH40 AW26 D26 VSS[340] T36
VSS[69] VSS[148] VSS[235]
AH42 AW28 D30 VSS[342] BG22
VSS[70] VSS[149] VSS[236]
AH46 AW32 D32 VSS[343] BG24
VSS[71] VSS[150] VSS[237]
AH7 AW34 D34 VSS[238] VSS[344] C22
VSS[72] VSS[151]
AJ19 AW36 D38 VSS[239] VSS[345] AP13
VSS[73] VSS[152]
AJ21 AW40 D42 VSS[240] VSS[346] M14
VSS[74] VSS[153]
AJ24 AW48 D8 VSS[241] VSS[347] AP3
VSS[75] VSS[154]
AJ33 AV11 E18 VSS[242] VSS[348] AP1
VSS[76] VSS[155]
AJ34 AY12 E26 VSS[243] VSS[349] BE16
VSS[77] VSS[156]
AK12 AY22 G18 VSS[244] VSS[350] BC16
VSS[78] VSS[157]
AK3 AY28 G20 VSS[245] VSS[351] BG28
VSS[79] VSS[158]
G26 VSS[246] VSS[352] BJ28
BD82QM77 QPRE C1_BGA989~D G28 VSS[247]
G36 VSS[248]
G48 VSS[249]
H12 VSS[250]
H18 VSS[251]
H22 VSS[252]
H24 VSS[253]
H26 VSS[254]
H30 VSS[255]
H32 VSS[256]
H34 VSS[257]
F3 VSS[258]
A A
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LA-7781
5 4 3 2 1
5 4 3 2 1
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JFAN1
+FAN1_VOUT FAN1_DET# 1
1
Place under CPU 2
2
RB751S40T1_SOD523-2~D
FAN1_TACH_FB 3 5
Place C266 close to the Q12 as possible 3 G1
22U_0805_6.3V6M~D
4 6
4 G2
1
1
D2
C219
REM_DIODE1_P_4022 MOLEX_53398-0471~D
CONN@
1
@ 2 C
D C266 2 2 +3.3V_M D
2
100P_0402_50V8J~D B
E Q12
3
1 MMBT3904WT1G_SC70-3~D REM_DIODE1_N_4022 BC_INT#_EMC4022 2 1
R385 10K_0402_5%~D
FAN1_TACH_FB 2 1
R426 10K_0402_5%~D
+5V_RUN FAN1_DET# 2 1
R402 10K_0402_5%~D
10U_0805_10V6K~D
0.1U_0402_25V6K~D
1 1
C276
C275
+3.3V_RUN
2 2 1 2 +3.3V_RUN_EMC_VDDL
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
1 1 @ R1639 0_0603_5%~D U9
C305
C738
2 VDD_H
2 2 +3.3V_M 3 VDD_H THERMATRIP2#
6 17
VDD_L THERMTRIP2#
(1) DP2/DN2 for SODIMM on Q14, place Q14 close to SODIMM and C272 close to Q14 1 2 VDD_PWRGD 13
R389 10K_0402_5%~D VDD_PWRGD
18
(2) DP4/DN4 for Skin on Q13, place Q13 close to Vcore VR choke. N/C
1 2 REM_DIODE1_N_4022 23
C270 2200P_0402_50V7K~D REM_DIODE1_P_4022 DN1/THERM
24 19 THERM_STP# <45>
REM_DIODE2_P_4022 DP1/VREF_T SYS_SHDN#
100P_0402_50V8J~D
1 2 REM_DIODE2_N_4022 26 20 POWER_SW# 1 2 +RTC_CELL

C271 2200P_0402_50V7K~D REM_DIODE2_P_4022 DN2/DP4 POWER_SW# @R390
@ R390 47K_0402_1%~D
1 1 27
DP2/DN4
1
E
C @
C277
C @C272
@ C272
B C
2 2 30 21 ACAV_IN <40,52,53>
100P_0402_50V8J~D B Q13 N/C ACAVAIL_CLR BC_INT#_EMC4022
29 9
2 E 2 C
MMBT3904WT1G_SC70-3~D N/C ATF_INT#/BC_IRQ# BC_INT#_EMC4022 <40>
3
Q14 REM_DIODE2_N_4022
MMBT3904WT1G_SC70-3~D 2 1 VCP2 31
<52> MAX8731_IINP VCP
4.7K_0402_5%~D R387 25
VIN
FAN_OUT 5 +FAN1_VOUT
VSET_4021 28 4
VSET FAN_OUT
8 BC_CLK_EMC4022 <40>
FAN1_TACH_FB SMCLK/BC_CLK
10 7 BC_DAT_EMC4022 <40>
+3.3V_M TACH/GPIO1 SMDATA/BC_DATA
11
TEST3
1
1
FAN1_DET# 15
R395 R404 GPIO3/PWM/THERMTRIP_SIO +3.3V_M
8.2K_0402_5%~D 10K_0402_5%~D
SMSC request
1
2
2
+1.05V_RUN_VTT THERMATRIP2# 1 2 3V_PWROK# 12 R388
<40> PCH_PWRGD# 3V_PWROK#
R399 R391 1K_0402_5%~D 22_0402_5%~D
1
0.1U_0402_25V6K~D
2.2K_0402_5%~D C 1
C278
1 2 2 1 +VCC_4022
2
B VDD +ADDR_XEN
32 1 2 +VCC_4022
ADDR_MODE/XEN
0.1U_0402_25V6K~D
1U_0402_6.3V6K~D
Q16 E 4.7K_0402_5%~D R393 1 1
3
PMST3904_SOT323-3~D 2 14
TEST1
C273
C1179
<7> H_THERMTRIP# 22
TEST2
+RTC_CELL 16 33
RTC_PWR3V VSS 2 2
1
1U_0402_6.3V6K~D
B EMC4021-1-EZK-TR_QFN32_5X5~D R403 B
1
10K_0402_5%~D
C274
SMSC request
2
2
+RTC_CELL
VSET_4021
0.1U_0402_25V6K~D
1 2
C281 0.1U_0402_25V6K~D
1
5
1 U10
R406 TC7SH08FU_SSOP5~D 1
P
B DOCK_PWR_SW# <40>
C282
1.24K_0402_1%~D POWER_SW# 4 O
2 POWER_SW_IN# <40>
A
G
2
2
3
Tp=93degree
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, FAN & Thermal Sensor
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LA-7781
5 4 3 2 1
2 1
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B
SW for MB/DOCK B
+5V_RUN +3.3V_RUN
U18
PCH_CRT_RED 1 16
<16> PCH_CRT_RED PCH_CRT_GRN R 5V VDD
<16> PCH_CRT_GRN 2 G
PCH_CRT_BLU 5 4
<16> PCH_CRT_BLU PCH_CRT_HSYNC B VDD
<16> PCH_CRT_HSYNC 6 H_SOURCE VDD 23
PCH_CRT_VSYNC 7 32
<16> PCH_CRT_VSYNC PCH_CRT_DDC_DAT V_HOURCE VDD
<16> PCH_CRT_DDC_DAT 9 SDA_SOURCE
+3.3V_RUN PCH_CRT_DDC_CLK 10 27 RED_CRT
<16> PCH_CRT_DDC_CLK SCL_SOURCE R1 GREEN_CRT RED_CRT <30>
G1 25 GREEN_CRT <30>
+3.3V_RUN 22 BLUE_CRT
B1 BLUE_CRT <30>
1
CRT_SWITCH 30 20 HSYNC_BUF
<39> CRT_SWITCH SEL H1_OUT VSYNC_BUF HSYNC_BUF <30>
R556 18
4.7K_0402_5%~D V1_OUT DAT_DDC2_CRT VSYNC_BUF <30>
SDA1 12
CLK_DDC2_CRT DAT_DDC2_CRT <30>
29 TEST SCL1 14 CLK_DDC2_CRT <30>
2
8 26 RED_DOCK
Reserved R2 GREEN_DOCK RED_DOCK <38>
G2 24
BLUE_DOCK GREEN_DOCK <38>
3 GND B2 21
HSYNC_DOCK BLUE_DOCK <38>
11 GND H2_OUT 19 HSYNC_DOCK <38>
28 17 VSYNC_DOCK
GND V2_OUT DAT_DDC2_DOCK VSYNC_DOCK <38>
31 GND SDA2 13
CLK_DDC2_DOCK DAT_DDC2_DOCK <38>
33 GPAD SCL2 15
CLK_DDC2_DOCK <38>
TS3V713ELRTGR _TQFN32_6X3~D
+3.3V_RUN +5V_RUN
SEL1/SEL2 Chanel Source
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0 A=B1 MB
1 1 1 1 1 1
1 A=B2 APR/SPR @ @
C332
C333
C334
C335
C336
C339
2 2 2 2 2 2
A A
Title
CRT/Video switch
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1.0
LA-7781
2 1
5 4 3 2 1
LCD Power
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Q18
SI3456DDV-T1-GE3_TSOP6~D
+3.3V_ALW
D
S
6
JLVDS1 +LCDVDD +3.3V_ALW 4 5
0.1U_0402_25V6K~D
2
130_0402_1%~D
GND 1 +5V_ALW +5V_ALW for panel side LED power R412 1
1
10K_0402_5%~D
2 470K_0402_5%~D
G
BATT_WHITE_LED BATT_WHITE_LED <43> 1
1
R413
C292
3 BATT_YELLOW_LED <43>
3
BATT_YELLOW_LED
R414
4 BREATH_WHITE_LED <43>
2
BREATH_WHITE_LED
VR_SRC 5 +BL_PWR_SRC 2
0.022U_0402_25V7K~D
6 1 2
6 2
VR_SRC
4.7M_0402_5%~D
7 C246 0.1U_0603_50V7K~D
2
VR_SRC
3
8 PANEL_HDD_LED <43> 1
NC
1
Q19A
D DISP_ON D
9
DISP_ON/OFF#
Q19B
C293
10 1 2 BIA_PWM_LVDS
PWM
R1632
11 LE92 BLM18BB221SN1D_2P~D 2 5
CONNTST_GND 2
VR_GND 12
1
13
2
VR_GND D6
VR_GND 14
LCD_B_CLK+ 15 LCD_BCLK+_PCH <16>
16 LCD_BCLK-_PCH <16> <39> LCD_VCC_TEST_EN 2
LCD_B_CLK-
5P_0402_50V8C~D
5P_0402_50V8C~D
17 1 EN_LCDPWR 2
GND
LVDS_B2+ 18 LCD_B2+_PCH <16> 1 1
19 @ @ +3.3V_RUN 3
LVDS_B2- LCD_B2-_PCH <16> <16,39> ENVDD_PCH
C40
C41
20 Q20
LVDS_B1+ LCD_B1+_PCH <16> LDDC_CLK_PCH
21 1 2 PDTC124EU_SC70-3~D
LCD_B1-_PCH <16>
3
LVDS_B1- 2 2 R159 2.2K_0402_5%~D BAT54CW_SOT323-3~D
LVDS_B0+ 22 LCD_B0+_PCH <16>
23 1 2 LDDC_DATA_PCH
LVDS_B0- LCD_B0-_PCH <16>
24 R160 2.2K_0402_5%~D
GND
LVDS_A_CLK+ 25 LCD_ACLK+_PCH <16>
LVDS_A_CLK-
26 LCD_ACLK-_PCH <16> Place near to JLVDS1
5P_0402_50V8C~D
5P_0402_50V8C~D
GND 27
28 LCD_A2+_PCH <16> 1 1
LVDS_A2+ @ @
LVDS_A2- 29 LCD_A2-_PCH <16> +LCDVDD +3.3V_RUN
C42
C43
30 Q21
LVDS_A1+ LCD_A1+_PCH <16>
31 FDC654P-G_SSOT-6~D
LVDS_A1- LCD_A1-_PCH <16> 2 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
+PWR_SRC
LVDS_A0+
32 LCD_A0+_PCH <16> 40mil
40mil
D
33 LCD_A0-_PCH <16> 6
LVDS_A0- LDDC_DATA_PCH
S
34 LDDC_DATA_PCH <16> 1 1 4 5 +BL_PWR_SRC
EDID_DATA
C298
C243
46 35 LDDC_CLK_PCH 2
MGND6 EDID_CLK LCD_TST LDDC_CLK_PCH <16>
45 36 LCD_TST <39> 1
MGND5 BIST
1000P_0402_50V7K~D
G
44 37 +3.3V_RUN
MGND4 V_EDID 2 2
43 38 1
3
MGND3 LCD_VDD
1
42 39 +LCDVDD 1
MGND2 LCD_VDD R422 C296
41 40 LCD_CBL_DET# <17>
MGND1 CONNTST
C297
C C
Close to JLVDS1.42,43 Close to JLVD1.41 100K_0402_5%~D
2
0.1U_0603_50V7K~D
ACES_59003-0400C-001 2
2
CONN@
PWR_SRC_ON
Q22
1 2 1 3
S
R423 47K_0402_5%~D
D66 D67
G
2
BIA_PWM_LVDS 1 2 DISP_ON 1 2
BIA_PWM_PCH <16> PANEL_BKEN_PCH <16>
1
1
EN_INVPWR
RB751VM-40TE-17_SOD323-2~D RB751VM-40TE-17_SOD323-2~D <40> EN_INVPWR
R1137 R1138 FDC654P: P CHANNAL
D68 D69
10K_0402_5%~D 100K_0402_5%~D
1 2 BIA_PWM_EC <40> 1 2 PANEL_BKEN_EC <39>
Panel backlight power control by EC
2
2
RB751VM-40TE-17_SOD323-2~D RB751VM-40TE-17_SOD323-2~D
+CAMERA_VDD Touch Screen Connector

For Webcam JCAM1
wait CIS symbol E3_PAID_TS_DET# (touch screen detect pin)
1 CAM_MIC_CBL_DET# is not functional because remove trace
1 CAM_MIC_CBL_DET# <17>
2 USBP12_D+
B 2 USBP12_D- inside cable. B
3
3 +5V_RUN +5V_TSP +5V_RUN
4
4 DMIC_CLK 5@ Q32
5 DMIC_CLK <29>
Q23 5
10K_0402_5%~D
5@ R431
+CAMERA_VDD 6 PMV65XP_SOT23-3~D
6
1
PMV65XP_SOT23-3~D 7 DMIC0
7 DMIC0 <29>
0.1U_0402_25V6K~D
8 1 3 Place close JTCH1 +5V_TSP
S
8
3
100P_0402_50V8J~D
100P_0402_50V8J~D
5@ C306
1 3 9
D
+3.3V_RUN G1
10U_0805_10V6K~D
PESD5V0U2BT_SOT23-3~D
D8
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
G2 10 1 1 1
0.1U_0402_25V6K~D
5@ C302
@ @ 1
G
2
2
C1207
C1206
1 1 JST_BM08B-SRSS-TB1-LF-SN~D
G
2
+5V_TSP
C300
C299
1 CONN@
2 2 2
C301
8
JTCH1 2
2 2 1 1
G2
6
2
5@ Q125A
2 2
1
3 3
<18> E3_PAID_TS_DET#
<17> USBP13- 4 4
<39> TOUCH_SCREEN_PD# 2 <17> USBP13+ 5 5
6 6
G1
1
CCD_OFF CONN@ TYCO_1734595-6
<39> CCD_OFF
7
L10
2
USBP12+ 1 2 USBP12_D+
<17> USBP12+ 1 2
Webcam PWR CTRL
3
USBP12- 4 3 USBP12_D-
<17> USBP12- 4 3 5@ Q125B
DLW21SN900SQ2L_0805_4P~D DMN66D0LDW-7_SOT363-6~D
1 2 5 @ D86
@ R427 0_0402_5%~D PESD5V0U2BT_SOT23-3~D
1
4
1 2
A @ R428 0_0402_5%~D A
Title
eDP & CAM &TS Conn
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1.0
5 4 3 2 1
2 1
WWW.AliSaler.Com +5V_RUN
BAT1000-7-F_SOT23-3~D
L100
2
3
1 2
9NH_0402HS-9N0EJTS_5%~D
NC
D4
@L19
@ L19
1
2 1 TMDSB_PCH_CLK_C 1 2 TMDSB_CON_CLK +VDISPLAY_VCC
<16> TMDSB_PCH_CLK 1 2
C353 0.1U_0402_10V7K~D
2 1 TMDSB_PCH_CLK#_C 4 3 TMDSB_CON_CLK#
<16> TMDSB_PCH_CLK# 4 3
10U_0805_10V6K~D
C352 0.1U_0402_10V7K~D +5V_RUN_HDMI
DLW21SN900HQ2L_0805_4P~D
1.8P_0402_50V8
1.8P_0402_50V8
0.5A_15V_SMD1812P050TF
0.1U_0402_10V7K~D
1 1 1 1
C338
L101
2
C1209
C1210
0_1206_5%~D
C337
1 2 @
2 2 2 2
R5
F2
L102
1
1 2
B JHDMI1 B
@L20
@ L20 HDMI_HPD_SINK 19
TMDSB_PCH_P0_C TMDSB_CON_P0 HP_DET
<16> TMDSB_PCH_P0 2 1 1 2 18
C351 0.1U_0402_10V7K~D 1 2 +5V
17 DDC/CEC_GND
PCH_SDVO_CTRLDATA_R 16
TMDSB_PCH_N0_C TMDSB_CON_N0 PCH_SDVO_CTRLCLK_R SDA
<16> TMDSB_PCH_N0 2 1 4 4 3 3 15
C350 0.1U_0402_10V7K~D SCL
14 Reserved
DLW21SN900HQ2L_0805_4P~D HDMI_CEC 13 CEC
1.8P_0402_50V8
1.8P_0402_50V8
1 1 TMDSB_CON_CLK# 12
L103 CK-
11 CK_shield
C1211
C1212
1 2 TMDSB_CON_CLK 10
9NH_0402HS-9N0EJTS_5%~D TMDSB_CON_N0 CK+
9 D0-
2 2
8 D0_shield
TMDSB_CON_P0 7
+3.3V_RUN L105 TMDSB_CON_N1 D0+
6 D1-
1 2 5
9NH_0402HS-9N0EJTS_5%~D TMDSB_CON_P1 D1_shield
4 D1+ GND 20
TMDSB_CON_N2 3 21
HDMI_CEC D2- GND
2 1 2 22
R1165 10K_0402_5%~D @L22
@ L22 TMDSB_CON_P2 D2_shield GND
1 D2+ GND 23
2 1 TMDSB_PCH_P1_C 1 2 TMDSB_CON_P1
<16> TMDSB_PCH_P1 1 2
C347 0.1U_0402_10V7K~D TYCO_2041270-1
CONN@
2 1 TMDSB_PCH_N1_C 4 3 TMDSB_CON_N1
<16> TMDSB_PCH_N1 4 3
C346 0.1U_0402_10V7K~D
DLW21SN900HQ2L_0805_4P~D
1.8P_0402_50V8
1.8P_0402_50V8
1 1
L104
C1214
C1213
1 2
TMDSB_PCH_P2_C R452 1 2 604_0402_1% HDMI_OB 9NH_0402HS-9N0EJTS_5%~D
TMDSB_PCH_N2_C R450 1 2 604_0402_1% 2 2
TMDSB_PCH_P1_C R448 1 2 604_0402_1%
TMDSB_PCH_N1_C R449 1 2 604_0402_1% L107
TMDSB_PCH_P0_C R454 1 2 604_0402_1% 1 2
TMDSB_PCH_N0_C R453 1 2 604_0402_1% 9NH_0402HS-9N0EJTS_5%~D
TMDSB_PCH_CLK_C R456 1 2 604_0402_1%
TMDSB_PCH_CLK#_C R455 1 2 604_0402_1%
L21
@L21
@
2 1 TMDSB_PCH_P2_C 1 2 TMDSB_CON_P2
<16> TMDSB_PCH_P2 1 2
1
D C349 0.1U_0402_10V7K~D
+3.3V_RUN R458 1 2 10K_0402_5%~D 2
G 2 1 TMDSB_PCH_N2_C 4 3 TMDSB_CON_N2
<16> TMDSB_PCH_N2 4 3
Q26 S C348 0.1U_0402_10V7K~D
3
SSM3K7002FU_SC70-3~D DLW21SN900HQ2L_0805_4P~D
1.8P_0402_50V8
1.8P_0402_50V8
1 1
L106
C1215
C1216
1 2
+5V_RUN 2 2
+3.3V_RUN
RB751VM-40TE-17_SOD323-2~D
2
@
D65
R1163
0_0402_5%~D
Q120A
1
2
2
1 6 PCH_SDVO_CTRLCLK_R 1 2 +5V_HDMI_DDC
<16> PCH_SDVO_CTRLCLK
R1153 2.2K_0402_5%~D
5
A A
4 3 PCH_SDVO_CTRLDATA_R 1 2
<16> PCH_SDVO_CTRLDATA
R1152 2.2K_0402_5%~D
Q120B
+3.3V_RUN
1M_0402_5%~D
2
R1168
2
G
1
3 1 HDMI_HPD_SINK 1 2
<16> HDMIB_PCH_HPD R1128 20K_0402_5%~D
S
Q121
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, HDMI port
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LA-7781
2 1
5 4 3 2 1
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+3.3V_RUN
AUX/DDC SW for DPC to E-DOCK 1 2
C356
0.1U_0402_25V6K~D
C357 U20
D 0.1U_0402_10V7K~D D
1 BE0 14
DPC_AUX_C VCC
<16> DPC_PCH_DOCK_AUX 2 1 2 A0 BE3 13
DPC_DOCK_AUX 3 12
<38> DPC_DOCK_AUX B0 A3 PCH_DDPC_CTRLCLK <16>
4 11
DPC_AUX#_C BE1 B3
<16> DPC_PCH_DOCK_AUX# 2 1 5 10
C360 0.1U_0402_10V7K~D A1 BE2
DPC_DOCK_AUX# 6 9
<38> DPC_DOCK_AUX# B1 A2 PCH_DDPC_CTRLDATA <16>
7 GND B2 8
PI3C3125LEX_TSSOP14~D
+5V_RUN
2 1
C365
0.1U_0402_25V6K~D
5
1
U21
P
NC
DPC_CA_DET 2 4 DPC_CA_DET#
<38> DPC_CA_DET A Y
G
TC7SET04FU_SC70-5~D
3
C C
There is a new die for PI3C3125. Sample availabe on May.
+3.3V_RUN
AUX/DDC SW for DPD to E-DOCK 1 2
C366
0.1U_0402_25V6K~D
C367 U23
0.1U_0402_10V7K~D 1 14
DPD_AUX_C BE0 VCC
<16> DPD_PCH_DOCK_AUX 2 1 2 13
A0 BE3
DPD_DOCK_AUX 3 12
<38> DPD_DOCK_AUX B0 A3 PCH_DDPD_CTRLCLK <16>
4 11
DPD_AUX#_C BE1 B3
<16> DPD_PCH_DOCK_AUX# 2 1 5 10
C368 0.1U_0402_10V7K~D A1 BE2
DPD_DOCK_AUX# 6 9
<38> DPD_DOCK_AUX# B1 A2 PCH_DDPD_CTRLDATA <16>
7 8
GND B2
PI3C3125LEX_TSSOP14~D
B B
+5V_RUN
2 1
C369
0.1U_0402_25V6K~D
5
U24
P
NC
DPD_CA_DET 2 4 DPD_CA_DET#
<38> DPD_CA_DET A Y
G
TC7SET04FU_SC70-5~D
3
+3.3V_RUN
1 2 PCH_DDPC_CTRLCLK
R487 2.2K_0402_5%~D Intel WW18 Strapping option
1 2 PCH_DDPC_CTRLDATA
R488 2.2K_0402_5%~D
1 2 PCH_DDPD_CTRLCLK
A R489 2.2K_0402_5%~D A
PCH_DDPD_CTRLDATA
Intel WW18 Strapping option
1 2
R490 2.2K_0402_5%~D
1 2 DPD_CA_DET
R491
1
1M_0402_5%~D
2 DPC_CA_DET Compal Electronics, Inc.
R492 1M_0402_5%~D PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DP AUX SW
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LA-7781
5 4 3 2 1
5 4 3 2 1
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D D
+3.3V_RUN
1
PJP53
PAD-OPEN1x1m
Free Fall Sensor

2
+3.3V_RUN_FFS
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
1 1
U88
C388
C387
C LNG3DM 10 C
2 2 RES
1 13
VDD_IO RES
14 15
VDD RES
16
HDD_FALL_INT RES
11
<17> HDD_FALL_INT FFS_INT2 INT 1
9 5
INT 2 GND
12
GND
7
SDO/SA0
<7,12,13,14,15,34> DDR_XDP_WAN_SMBDAT 6
SDA / SDI / SDO
<7,12,13,14,15,34> DDR_XDP_WAN_SMBCLK 4
SCL/SPC
2
NC
8
CS NC
3
HDD PWR
LNG3DMTR_LGA16_3X3~D
+5V_ALW
+PWR_SRC_S
+3.3V_ALW2
For HDD Temp.
1
@ R499
1
2
5
6
+3.3V_RUN 100K_0402_5%~D
1
JSATA1 D
1 @ R500 G @ Q27
2
GND
1 2 DDR_XDP_WAN_SMBDAT <14> PSATA_PTX_DRX_P0_C 2 1 SATA_PTX_DRX_P0 2
RX+
100K_0402_5%~D HDD_EN_5V 3 SI3456DDV-T1-GE3_TSOP6~D
R501 10K_0402_5%~D C383 2 1 0.01U_0402_16V7K~D SATA_PTX_DRX_N0 3 S
<14> PSATA_PTX_DRX_N0_C RX-
1 2 DDR_XDP_WAN_SMBCLK C384 0.01U_0402_16V7K~D 4 +5V_HDD +5V_RUN
4
2
GND
3
R502 10K_0402_5%~D 2 1 SATA_PRX_DTX_N0 5 @ PJP3
<14> PSATA_PRX_DTX_N0_C TX-
0.1U_0603_50V7K~D
1 2 HDD_FALL_INT C385 2 1 0.01U_0402_16V7K~D SATA_PRX_DTX_P0 6
TX+
@ 1 1
2
2
<14> PSATA_PRX_DTX_P0_C
Q28B
1M_0402_5%~D
10U_0805_10V6K~D
R503 100K_0402_5%~D C386 0.01U_0402_16V7K~D 7
GND
1
5 @ 1 @ 1 JUMP_43X79
PJP64
1
R516
C393
8
3.3V SHORT DEFAULT
6
C394
B +3.3V_RUN_HDD B
+3.3V_RUN 1 2 9
4
3.3V @ R504
10
+5V_HDD 3.3V 2 2
Q28A
11 100K_0402_5%~D
2
PAD-OPEN1x1m HDD_DET# GND
12 <35,39,42,47> RUN_ON 1 2 2
2
<14> HDD_DET# GND R1621
@R1621
@ 0_0402_5%~D
13
GND
1
+5V_HDD 14 <11,16,35,39,42,47> SIO_SLP_S3# 1 2
1
5V
1
+3.3V_RUN @ R506 15 @ R1624 0_0402_5%~D
100K_0402_5%~D +5V_HDD 5V R505
@R505
@
16
17
5V
GND
100K_0402_5%~D +5V_HDD Source
1
FFS_INT2_Q 18 23
2
Reserved GND1
1000P_0402_50V7K~D
0.1U_0402_25V6K~D
R508 FFS_INT2_Q 19 24
2
GND GND2
100K_0402_5%~D 20
12V
3
1 1 21
12V
22
2
12V
C396
Q29B
C395
5 JAE_SP100421-HDD
2 2 CONN@
6
Main SATA +5V Default

Q29A
FFS_INT2 2
<18> FFS_INT2
1
Pleace near HDD CONN
+3.3V_RUN_HDD
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
A A
1 1
C399
C402
2 2
Title
Pleace near HDD CONN TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT HDD CONNECTOR
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5 4 3 2 1
5 4 3 2 1
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+3.3V_ALW
1 2 ZODD_WAKE#
R510 10K_0402_5%~D
1
R513
2 MOD_MD
10K_0402_5%~D For ODD
+3.3V_ALW_PCH
D D
1 2 USB30_SMI#
R514 100K_0402_5%~D
JSATA2 +5VMOD Source

+PWR_SRC_S +5V_ALW
1
SATA_ODD_PTX_DRX_P1 GND
<14> SATA_ODD_PTX_DRX_P1_C 2 1 2
A+
1
C407 2 1 0.01U_0402_16V7K~D SATA_ODD_PTX_DRX_N1 3 +3.3V_ALW2
<14> SATA_ODD_PTX_DRX_N1_C A-
C406 0.01U_0402_16V7K~D 4 R507
SATA_ODD_PRX_DTX_N1 GND 470K_0402_5%~D
2 1 5
<14> SATA_ODD_PRX_DTX_N1_C B-
1
2
5
6
C405 2 1 0.01U_0402_16V7K~D SATA_ODD_PRX_DTX_P1 6
<14> SATA_ODD_PRX_DTX_P1_C C404 0.01U_0402_16V7K~D B+ R509 D
7
2
GND 100K_0402_5%~D G Q30
8 MOD_EN
2 3 SI3456DDV-T1-GE3_TSOP6~D
<40> DEVICE_DET# DP S
+5V_MOD +5V_MOD 9
2
+5V
3
10 +5V_MOD +5V_RUN
4
+5V
0.022U_0402_25V7K~D
MOD_MD 11 @PJP4
@ PJP4
MD
1000P_0402_50V7K~D
0.1U_0402_25V6K~D
Q31B
4.7M_0402_5%~D
12 1 1 2
GND 2
10U_0805_10V6K~D
1 1 13 MODC_EN# 5 1
GND
1
R517
1 JUMP_43X79
C398
6
C397
C400
14 R511
4
GND
C401
15 100K_0402_5%~D
2 2 <15> CLK_PCIE_EMB REFCLK+ 2
Q31A
<15> CLK_PCIE_EMB# 16
2
REFCLK- 2
17 <39> MODC_EN 2
2
GND
<15> PCIE_PRX_EMBTX_P4 18
PETX+
1
<15> PCIE_PRX_EMBTX_N4 19
1
C PETX- R512 C
20
GND 100K_0402_5%~D
21
GND
<15> PCIE_PTX_EMBRX_P4
0.1U_0402_10V7K~D 2 1 C409 PCIE_PTX_EMBRX_P4_C 22
PERX+
<15> PCIE_PTX_EMBRX_N4
0.1U_0402_10V7K~D 2 1 C408 PCIE_PTX_EMBRX_N4_C 23
2
PERX-
Pleace near ODD CONN 24
GND
+5V_MOD 25
EMBCLK_REQ# +5V
<15> EMBCLK_REQ# 26
PCIE_WAKE# CLKREQ#
<34,35,40> PCIE_WAKE# 27
PLTRST_EMB# WAKE#
<17> PLTRST_EMB# 28
BAY_SMBDAT PERST#
<40,44> BAY_SMBDAT 29 32
BAY_SMBCLK SMB_DATA GND1
<40,44> BAY_SMBCLK 30 33
SMB_CLK GND2
<39> MOD_SATA_PCIE#_DET 31
HPD
+3.3V_ALW 1 2 TYCO_2-2129116-3
R1183 10K_0402_5%~D CONN@
+3.3V_ALW
B Q76 B
1
S
MOD_MD 3 1 ZODD_WAKE# R515

ZODD_WAKE# <39>
100K_0402_5%~D
G
2
2
MODC_EN#
USB30_EN
Q123B
6
4 3 USB30_SMI#
USB30_SMI# <14>
Q123A
MOD_SATA_PCIE#_DET 2 DMN66D0LDW-7_SOT363-6~D
5
USB30_EN
A A
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT ODD CONNECTOR
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5 4 3 2 1
2 1
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Internal Speakers Header +VDDA_AVDD
place close to pin27 place close to pin38 L77
BLM21PG600SN1D_0805~D
1 2 +5V_RUN
+5V_RUN
1
0.1U_0402_25V6K~D
1U_0603_10V7K~D
10U_0805_10V6K~D
0_0805_5%~D
+3.3V_RUN +3.3V_RUN_DVDD +3.3V_RUN_DVDD @
R1095
15 mils trace DVDD_IO should match 1 1 1
with HDA Bus level
C957
C956
C955
JSPK1 CONN@ @ PJP60
INT_SPK_L+ L91 1 2 BLM18PG121SN1D_0603 INT_SPKL_L+ 1 1 2 +DVDD_CORE
1
2
2 2 2
1U_0603_10V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0805_10V6K~D
INT_SPK_L- L92 1 2 BLM18PG121SN1D_0603 INT_SPKR_L- 2
INT_SPK_R+ L93 1 2 BLM18PG121SN1D_0603 INT_SPKR_R+ 2
5 3
1 1 1 1 Place C994, C952~C957 close to Codec
3 G1
C952
C994
10U_0805_10V6K~D
0.1U_0402_25V6K~D
10U_0805_10V6K~D
0.1U_0402_25V6K~D
INT_SPK_R- L94 1 2 BLM18PG121SN1D_0603 INT_SPKR_R- 6 4 PAD-OPEN1x1m
4 G2
C953
C954
1 1 1 1
MOLEX_53398-0471~D 2 2 2 2 U72
C958
C959
C960
C961
1 27
DVDD_CORE AVDD1
C973
C974
C975
C976 AVDD2
38
2 2 2 2
3 45 +VDDA_PVDD
DVDD_IO PVDD
2200P_0402_50V7K~D R1658
2200P_0402_50V7K~D R1659
2200P_0402_50V7K~D R1660
2200P_0402_50V7K~D R1661
1 1 1 1 39 +VREFOUT
PVDD
1U_0603_10V7K~D
9 13 AUD_SENSE_A 1
DVDD SENSE_A
2
3
AZ5125-02S.R7G_SOT23-3
AZ5125-02S.R7G_SOT23-3
14 AUD_SENSE_B
2 2 2 2 SENSE_B
C1180
@ @
DE1
DE2
28 MIC_IN_L 1 2
PORTA_L MIC_IN_R <30> 2
PCH_AZ_CODEC_BITCLK 6 29 MIC_IN_R C1163 2.2U_0402_6.3V6M
<14> PCH_AZ_CODEC_BITCLK BITCLK PORTA_R
23 +VREFOUT +VREFOUT
PCH_AZ_CODEC_SDOUT VrefOut_A
<14> PCH_AZ_CODEC_SDOUT 5 1 2
SDATA_OUT AUD_HP_OUT_L R1143 2.2K_0402_5%~D
31 AUD_HP_OUT_L <30>
PORTB_L AUD_HP_OUT_R
<14> PCH_AZ_CODEC_SYNC 10 32 AUD_HP_OUT_R <30>
SYNC PORTB_R
Place R1096 close to codec
1
1
1
1 2 PCH_AZ_SDIN0_R 8 40 INT_SPK_L+
B <14> PCH_AZ_CODEC_SDIN0 33_0402_5%~D SDATA_IN PORTD_+L INT_SPK_L- B
41
PORTD_-L
3.3_0402_5%~D
3.3_0402_5%~D
3.3_0402_5%~D
3.3_0402_5%~D
R1096 PCH_AZ_CODEC_RST# 11
<14> PCH_AZ_CODEC_RST# RESET#
44 INT_SPK_R+
PORTD_+R INT_SPK_R-
43
2
PORTD_-R
I2S_MCLK 15 25
I2S_MCLK MONO_OUT AUD_PC_BEEP 2 1 1 2 SPKR <14>
I2S_BCLK 16 12 C1105 0.1U_0402_25V6K~D R1119 100K_0402_5%~D
I2S_SCLK PC_BEEP
Close to U72 2 1 1 2 BEEP <40>
I2S_DO 1 2 17 C1106 0.1U_0402_25V6K~D R1120 100K_0402_5%~D
R1097 33_0402_5%~D I2S_DOUT DMIC_CLK_L 1
2 2 DMIC_CLK <24>
I2S_LRCLK DMIC_CLK/GPIO 1 LE3 BLM18BB221SN1D_2P~D
18 4 DMIC0 <24>
I2S_LRCLK DMIC_0/GPIO 2
I2S_DI# DMIC1/GPIO0/SPDIFOUT1
46 Place LE3 close to codec
Place R1097 close to codec 24
I2S_DIN SPDIFOUT0//GPIO3/Aux_Out
48 1 2 1 2
Close to U72 pin5 Close to U72 pin6 @ R169 0_0402_5%~D @ R1141 10K_0402_5%~D
36 1 2 EN_I2S_NB_CODEC# 1 2
CAP+ @ R1641 0_0402_5%~D @ R1142 10K_0402_5%~D
1
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK 19 C962
No Connect 4.7U_0603_6.3V6K~D
BCLK: Audio serial data bus bit clock input/output
LRCK: Audio serial data bus word clock input/output 20 Place C962 close to Codec
No Connect
1
35 2
@ R1077 R1076 CAP-
47_0402_5%~D 33_0402_5%~D
Place C963~C966 close to Codec
<39> AUD_NB_MUTE# 47 21
EAPD VREFFILT
22
+3.3V_RUN CAP2
34
2
2
V-
4.7U_0603_6.3V6K~D
1U_0603_10V7K~D
10U_0805_10V6K~D
4.7U_0603_6.3V6K~D
1 1 7 37
DVSS Vreg
1 1 1 1
C978
@C978
@ C977 1 2 42 26
PVSS AVSS1
C963
C966
C964
C965
0.1U_0402_10V7K~D 10P_0402_50V8J~D R1099 10K_0402_5%~D 30
2 2 AVSS
49 33
GND AVSS 2 2 2 2
92HD93B2X5NLGXWBX8_QFN48_7X7~D
+VDDA_AVDD place at AGND and DGND plane

Notes:
Place closely to Pin 13. R1083
2.49K_0402_1%~D
1 2 Keep PVDD supply and speaker traces routed on the DGND plane.
AUD_SENSE_A 2 1 C981 Keep away from AGND and other analog signals
0.1U_0402_25V6K~D
1
0.1U_0402_10V7K~D
1 2 place at Codec bottom side

R1086 +3.3V_RUN @ PJP62
1
20K_0402_1%~D C982 1 2
C980
0.1U_0402_25V6K~D
1 2
2
2 PAD-OPEN1x1m
R1087 C983 +3.3V_RUN +3.3V_RUN
100K_0402_5%~D 0.1U_0402_25V6K~D
3
6
0.1U_0402_10V7K~D
2
2
3
2
3
DA204U_SOT323-3~D
DA204U_SOT323-3~D
DA204U_SOT323-3~D
DA204U_SOT323-3~D
2 5 AUD_HP_NB_SENSE <30,39> 2
@ D56
C1103
@ D54
@ D55
@ D57
1
Q107A Q107B
4
1
DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D @ C967

0.1U_0402_25V6K~D 1 @ U73
2 R162, R163, R164, R165,R166 CO-lay with U73 16
1
1
1
1
VCC
DAI_BCLK# 1 2 I2S_BCLK 2 3 DAI_BCLK#
R162 22_0402_5%~D 1A 1Y# DAI_BCLK# <38>
Add for solve pop noise and detect issue
DAI_LRCK# 1 2 I2S_LRCLK 4 5 DAI_LRCK#
@ R163 0_0402_5%~D 2A 2Y# DAI_LRCK# <38>
DAI_DO# 1 2 I2S_DO 6 7 DAI_DO#
A 3A 3Y# DAI_DO# <38> A
@ R164 0_0402_5%~D
Resistor SENSE_A SENSE_B DAI_12MHZ# 1 2 I2S_MCLK 10 9 DAI_12MHZ#
R165 22_0402_5%~D 4A 4Y# DAI_12MHZ# <38>
Place closely to Pin 14 +VDDA_AVDD 12 11
R1078 5A 5Y# +3.3V_RUN
39.2K PORT A PORT E
2.49K_0402_1%~D 14 13 I2S_DI# 1 2 DAI_DI
AUD_SENSE_B 6A 6Y# @ R166 0_0402_5%~D
2 1
20K PORT B PORT F EN_I2S_NB_CODEC# 1
<39> EN_I2S_NB_CODEC# OE1#
2
1000P_0402_50V7K~D
1 2 1 15 8
@ R1540 OE2# GND @ D58
1
1
+3.3V_RUN
C979
10K NA DMIC0 1K_0402_5%~D DA204U_SOT323-3~D

R1079 R1080 +3.3V_RUN CD74HC366M96_SO16~D
39.2K_0402_1%~D 20K_0402_1%~D 2
1
5.11K SPDIFOUT0 SPDIFOUT1 (DMIC1)
1
1
R1081
2
2
100K_0402_5%~D R1082 DAI_DI

100K_0402_5%~D DAI_DI <38>
2.49K Pull-up to AVDD
2
PORT A External MIC

<39> DOCK_HP_DET 2 5 DOCK_MIC_DET <39>
Q106A Q106B PORT B HeadPhone Out Compal Electronics, Inc.
1
DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
PORT C Dock Audio
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Azalia (HD) Codec
PORT D Internal SPK LA-7781
2 1
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I/O board CONN.
Change to TYCO_2041300-2_60P-T and Horizonal reverse to SSI
JIO1
2 2 1 1
IO_LOOP# <18>
<31> SW_LAN_TX0+ 4 4 3 3 VSYNC_BUF <23>
<31> SW_LAN_TX0- 6 6 5 HSYNC_BUF <23>
D 5 D
8 8 7 7
<31> SW_LAN_TX1- 10 9 RED_CRT <23>
10 9
<31> SW_LAN_TX1+ 12 11 GREEN_CRT <23>
12 11
14 13 BLUE_CRT <23>
14 13
<31> SW_LAN_TX2+ 16 15
16 15
<31> SW_LAN_TX2- 18 17 DAT_DDC2_CRT <23>
18 17
20 19 CLK_DDC2_CRT <23>
SW1 20 19
<31> SW_LAN_TX3- 22 21
NTC033-XJ1J-X260CM_4P 22 21
<31> SW_LAN_TX3+ 24 23
POWER_SW#_MB 24 23
3 1 26
26 25
25
<40,41> POWER_SW#_MB
+5V_RUN 28 27
@D23
@ D23 28 27
+3.3V_LAN 30 29 AUD_HP_OUT_R <29>
+5V_ALW 30 29 MIC_IN_R +5V_ALW
3 <31> LED_100_ORG# 32
32 31
31
MIC_IN_R <29>
1 <31> LED_10_GRN# 34
34 33
33 AUD_HP_OUT_L <29>
2 4 2 <31> LAN_ACTLED_YEL# 36
36 35
35
38 37
38 37
0.1U_0402_25V6K~D
PESD24VS2UT_SOT23-3~D 1 40 39 1
40 39
42 41
42 41
C50
44 43 C1003
POWER & INSTANT ON SWITCH 2
<17> USB_OC4#
46
44
46
43
45
45
PCH_AZ_MDC_RST1#
+3.3V_ALW_PCH
2
0.1U_0402_25V6K~D
<17> USBP9+ 48 47
48 47
<17> USBP9- 50 49 PCH_AZ_MDC_SDIN1 <14>
50 49
52 51 PCH_AZ_MDC_SYNC <14>
52 51
<36,39> USB_SIDE_EN# 54 53
54 53 PCH_AZ_MDC_SDOUT <14>
56 55
Defult on, Media Board <29,39> AUD_HP_NB_SENSE
DETECT_GND
58
56
58
55
57
57 PCH_AZ_MDC_BITCLK <14>
60 59
60 59
WIRELESS_ON/OFF#:
JMDIA1 62 61
LOW: ON <40> VOL_MUTE 1 1
64
GND
GND
GND
GND
63
+3.3V_ALW 2 66 65 Analog_GND
HIGH: OFF <40> VOL_DOWN
3
2 GND GND
C <40> VOL_UP 3 C
4 4
5 5
<39> WIRELESS_ON#/OFF TYCO_2041300-2
6 9
<39,43> LID_CL# 6 G1 CONN@ +3.3V_ALW_PCH
7 10
7 G2 +3.3V_LAN
1 8 8
1
0.1U_0402_25V6K~D
C1001 TYCO_2041070-8~D 1
0.1U_0402_25V6K~D CONN@ C1000
2
C997
0.1U_0402_25V6K~D
2
2
Place close
Place close to JIO1.35
to JIO1.13
LED Board
JLED1
+5V_ALW 1
<43> SATA_LED 1
<43> BATT_WHITE 2
2
<43> BATT_YELLOW 3
3
4
4
<43> WLAN_LED 5 7
5 G1
1 6 8
6 G2
C1002 TYCO_2041084-6~D
B CONN@ B
0.1U_0402_25V6K~D
2
Q44
1 3 PCH_AZ_MDC_RST1#
D
<14> PCH_AZ_MDC_RST#
+5V_ALW
G
2
A A
R751
1
100K_0402_5%~D
R752
10K_0402_5%~D
2
2
<39> MDC_RST_DIS# Compal Electronics, Inc.

Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT PWR SW/Sub-board Connector
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5 4 3 2 1
5 4 3 2 1
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+3.3V_LAN
1 2 TP_LAN_JTAG_TMS
+3.3V_RUN
1
@ R545 10K_0402_5%~D
1 2 TP_LAN_JTAG_TCK R547
@ R546 10K_0402_5%~D 10K_0402_5%~D
2
U31
1 2 LANCLK_REQ#_R 48 13 LAN_TX0+
<15> LANCLK_REQ# @R1187
@ R1187 0_0402_5%~D CLK_REQ_N MDI_PLUS0 LAN_TX0-
<17> PLTRST_LAN# 36 14
D PE_RST_N MDI_MINUS0 D
CLK_PCIE_LAN 44 17 LAN_TX1+
<15> CLK_PCIE_LAN CLK_PCIE_LAN# PE_CLKP MDI_PLUS1 LAN_TX1-
<15> CLK_PCIE_LAN# 45 18
PCIE
PE_CLKN MDI_MINUS1
MDI
<15> PCIE_PRX_GLANTX_P7 2 1 PCIE_PRX_GLANTX_P7_C
C458 0.1U_0402_10V7K~D 38 20 LAN_TX2+
PETp MDI_PLUS2 +1.0V_LAN +1.05V_M
<15> PCIE_PRX_GLANTX_N7 2 1 PCIE_PRX_GLANTX_N7_C 39
PETn MDI_MINUS2
21 LAN_TX2-
C459 0.1U_0402_10V7K~D @ R548
@R548
+3.3V_LAN 1 2 PCIE_PTX_GLANRX_P7_C 41 23 LAN_TX3+ L29 0_0805_5%~D
<15> PCIE_PTX_GLANRX_P7 PERp MDI_PLUS3
C460 0.1U_0402_10V7K~D 42 24 LAN_TX3- REGCTL_PNP10 1 2 1 2
PERn MDI_MINUS3
10U_0603_6.3V6M~D
0.1U_0402_10V7K~D
<15> PCIE_PTX_GLANRX_N7 1 2 PCIE_PTX_GLANRX_N7_C
1
C461 0.1U_0402_10V7K~D 4.7UH_CBC2012T4R7M_20%~D 1 1
C462
C463
R549 28 6 Idc max=330mA
SMBUS
SMB_CLK RSVD_NC
10K_0402_5%~D
<15> LAN_SMBCLK 1 2 LAN_SMBCLK_R 31
SMB_DATA
<15> LAN_SMBDATA
@ R551
@R551
1 2 LAN_SMBDATA_R
0_0402_5%~D
RSVD_VCC3P3_1 1 +RSVD_VCC3P3_1 2 1 +3.3V_LAN
R552
@R552
@ 0_0402_5%~D 2 +RSVD_VCC3P3_2 R5532 14.7K_0402_5%~D 2 2
2
RSVD_VCC3P3_2
SMBus Device Address 0xC8 VDD3P3_IN
5 R554 4.7K_0402_5%~D
1 2 LAN_DISABLE#_R 3
<18> PM_LANPHY_ENABLE LAN_DISABLE_N +3.3V_LAN_OUT
@ R555 0_0402_5%~D 4
VDD3P3_OUT
<39> LAN_DISABLE#_R Place R548, C462, C463 and L29 close to U31
15 1
VDD3P3_15
1
LOM_ACTLED_YEL# 26 19
@ R557 LOM_SPD100LED_ORG# LED0 VDD3P3_19 C464
27 29
LED1 VDD3P3_29
LED
10K_0402_5%~D LOM_SPD10LED_GRN# 25 +1.0V_LAN 1U_0603_10V7K~D
LED2 2
47 +1.0V_LAN +3.3V_LAN
2
VDD1P0_47
46
T142 PAD~D TP_LAN_JTAG_TDI VDD1P0_46
32 37
JTAG_TDI VDD1P0_37
22U_0805_6.3V6M~D
T143 PAD~D TP_LAN_JTAG_TDO 34
JTAG_TDO
JTAG
0.1U_0402_10V7K~D
22U_0805_6.3V6M~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
TP_LAN_JTAG_TMS 33 43
TP_LAN_JTAG_TCK JTAG_TMS VDD1P0_43
35 1 1 1 1 1 1
JTAG_TCK
C1177
C1178
11
VDD1P0_11
C466
C467
C468
C469
C XTALO C
1 2 9 40
@ R1144 0_0402_5%~D XTALI XTAL_OUT VDD1P0_40 2 2 2 2 2 2
10 22
XTAL_IN VDD1P0_22
16
Y3 VDD1P0_16
8
25MHZ_18PF_X3G025000DI1H-H~D LAN_TEST_EN VDD1P0_8
30
TEST_EN
1 3
IN OUT
33P_0402_50V8J~D
33P_0402_50V8J~D
RES_BIAS 12 7 REGCTL_PNP10 Place C1178 close to pin5

RBIAS CTRL_1P0
2 2 4 2
GND GND
49
VSS_EPAD
1
1
C470
C471
1K_0402_5%~D
3.01K_0402_1%~D
Note:
R561
+3.3V_M
R562
82579_QFN48_6X6~D +1.0V_LAN will work at 0.95V to 1.15V

1 1
+1.0V_LAN POWER OPTIONS

2
2
Shared with PCH @ R563
Need to verify A3 silicon drive 1.05V SVR * Internal SRV 0_1206_5%~D
power before removing C427
1
KDS crystal vender verify STUFF: R548 STUFF: L29 Q34
driving level in A3 NO STUFF: L29 NO STUFF: R548 +3.3V_ALW +3.3V_LAN
+PWR_SRC_S
D
6
S
+3.3V_ALW2 5 4
1
+3.3V_LAN 2
10U_0603_6.3V6M~D
0.1U_0402_10V7K~D
R564 1 1 1
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
100K_0402_5%~D
C475
C476
1 1 1
3
1
2
2 2
C472
C473
C474
R565 ENAB_3VLAN
LAN ANALOG 100K_0402_5%~D
3
2 2 2
1M_0402_5%~D
2200P_0402_50V7K~D
B B
SWITCH
1
2
Q35B
R1638
39
30
21
14
1
8
4
1
U32 5
C477
VDD
VDD
VDD
VDD
VDD
VDD
VDD
6
38 SW_LAN_TX0+
SW_LAN_TX0+ <30>
2
B0+ SW_LAN_TX0- 2
B0- 37 SW_LAN_TX0- <30>
Q35A
LAN_TX0+ 1 2 LAN_TX0+R 2
L30 12NH_0603CS-120EJTS_5%~D A0+ SW_LAN_TX1+
B1+ 34 SW_LAN_TX1+ <30> <16,39> SIO_SLP_LAN# 2
LAN_TX0- 1 2 LAN_TX0-R 3 33 SW_LAN_TX1-
A0- B1- SW_LAN_TX1- <30>
L31 12NH_0603CS-120EJTS_5%~D
1
29 SW_LAN_TX2+
LAN_TX1+ 1 LAN_TX1+R B2+ SW_LAN_TX2- SW_LAN_TX2+ <30>
2 6 A1+ B2- 28
L33 12NH_0603CS-120EJTS_5%~D SW_LAN_TX2- <30>
LAN_TX1- 1 2 LAN_TX1-R 7 25 SW_LAN_TX3+
A1- B3+ SW_LAN_TX3+ <30>
L32 12NH_0603CS-120EJTS_5%~D 24 SW_LAN_TX3-
B3- SW_LAN_TX3- <30>
LAN_TX2+ 1 2 LAN_TX2+R 9 17 LAN_ACTLED_YEL#
A2+ LEDB0 LED_100_ORG# LAN_ACTLED_YEL# <30>
L34 12NH_0603CS-120EJTS_5%~D 18
LEDB1 LED_100_ORG# <30>
LAN_TX2- 1 2 LAN_TX2-R 10 41 LED_10_GRN#
A2- LEDB2 LED_10_GRN# <30> +3.3V_LAN
L35 12NH_0603CS-120EJTS_5%~D C478
36 DOCK_LOM_TRD0+ 0.1U_0402_10V7K~D
LAN_TX3+ 1 LAN_TX3+R C0+ DOCK_LOM_TRD0- DOCK_LOM_TRD0+ <38>
2 11 35 DOCK_LOM_TRD0- <38> 1 2
L36 12NH_0603CS-120EJTS_5%~D A3+ C0-
LAN_TX3- 1 2 LAN_TX3-R 12 32 DOCK_LOM_TRD1+
A3- C1+ DOCK_LOM_TRD1+ <38>
5
L37 12NH_0603CS-120EJTS_5%~D 31 DOCK_LOM_TRD1-
C1- DOCK_LOM_TRD1- <38>
LOM_SPD100LED_ORG# 1
P
DOCKED DOCK_LOM_TRD2+ B
13 SEL C2+ 27 4
<39> DOCKED DOCK_LOM_TRD2- DOCK_LOM_TRD2+ <38> LOM_SPD10LED_GRN# O WLAN_LAN_DISB# <39>
C2- 26 2
DOCK_LOM_TRD2- <38> A
G
LOM_ACTLED_YEL# 15 23 DOCK_LOM_TRD3+ TC7SH08FU_SSOP5~D
DOCK_LOM_TRD3+ <38>
3
LOM_SPD100LED_ORG# LEDA0 C3+ DOCK_LOM_TRD3- U15
16 LEDA1 C3- 22 DOCK_LOM_TRD3- <38>
A LOM_SPD10LED_GRN# A
Layout Notice : Place bead as 42 LEDA2
19 DOCK_LOM_ACTLED_YEL#
close PI3L500 as possible LEDC0 DOCK_LOM_SPD100LED_ORG#
DOCK_LOM_ACTLED_YEL# <38>
5 PD LEDC1 20 DOCK_LOM_SPD100LED_ORG# <38>
40 DOCK_LOM_SPD10LED_GRN#
LEDC2 DOCK_LOM_SPD10LED_GRN# <38>
43 PAD_GND DELL CONFIDENTIAL/PROPRIETARY
1: TO DOCK
FROM NIC DOCKED
0: TO RJ45 TO
PI3L720ZHEX_TQFN42_9X3P5~D Title
DOCK
Intel 82579 (Hanksville) / LAN SW
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1.0
LA-7781
5 4 3 2 1
5 4 3 2 1
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D D
+3.3V_RUN +3.3V_RUN_TPM
PJP61
1 2
+3.3V_SB3V
PAD-OPEN1x1m
+3.3V_RUN_TPM
+3.3V_RUN_TPM +3.3V_SUS
0.1U_0402_25V6K~D
4700P_0402_25V7K~D
+3.3V_SB3V
ATMEL TPM for E4
1 1
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
0.1U_0402_25V6K~D
1@ 1@
1 2 USH board conn
C44
C45
@ R873 0_0402_5%~D 1 2 USH_SMBCLK
1@ U39 1 1 1 1 R589 2.2K_0402_5%~D
+3.3V_RUN_TPM 2 2 1@ 1@ 1@ 1@ 1 2 USH_SMBDAT
C550
C551
C552
C553
10 R585 2.2K_0402_5%~D
VCC_0
5 19
SB3V VCC_1 2 2 2 2 JUSH1
1 2 24
@R1663
@ R1663 10K_0402_5%~D VCC_2
1 1
1 2 <17> USBP7- 2
@R1662
@ R1662 0_0402_5%~D 2
<17> USBP7+ 3 3
+3.3V_SUS 4 4
<39> SP_TPM_LPC_EN 1 2 SP_TPM_LPC_EN_R 28
LPCPD# V_BAT
12 <40> USH_SMBCLK 5 5
@ D87 RB751S40T1_SOD523-2~D 13 JETWAY_CLK14M 6
NBO_13 JETWAY_CLK14M <15> <40> USH_SMBDAT 6
0.1U_0402_25V6K~D
LPC_LAD0 26 14 NC_P 1 2 7
<14,34,39,40> LPC_LAD0
LPC_LAD1 LAD0 NBO_14 <39> BCM5882_ALERT# 7
23 @ C554 1U_0402_6.3V6K~D 8
<14,34,39,40> LPC_LAD1
LPC_LAD2 LAD1 8
<14,34,39,40> LPC_LAD2 20 1 9
LAD2 9
C53
LPC_LAD3 17 10
<14,34,39,40> LPC_LAD3 LAD3 10
6 11
C GPIO6 <41> BT_COEX_STATUS2 11 C
12
CLK_PCI_TPM_TCM TCM_BA0 2 <41> BT_PRI_STATUS 12
<15> CLK_PCI_TPM_TCM 21 9 13
LPC_LFRAME# LCLK TESTBI 13
<14,34,39,40> LPC_LFRAME# 22 8 14
PCH_PLTRST#_EC LFRAME# TESTI +3.3V_RUN_TPM 14
<17,34,35,39,40> PCH_PLTRST#_EC 16 15
IRQ_SERIRQ LRESET# <17> PLTRST_USH# 15
<14,39,40> IRQ_SERIRQ 27 16
CLKRUN# SERIRQ <39> USH_PWR_STATE# 16
<16,39,40> CLKRUN# 15 <18> CONTACTLESS_DET# 17
CLKRUN# PP +3.3V_RUN 17
7 1 2 18
NC_7 @ R656 4.7K_0402_5%~D 18
19
CLK_PCI_TPM_TCM +5V_RUN 19
1 4 20
ATEST_1 GND_4 <18> USH_DET# 20
0.1U_0402_25V6K~D
2 11
ATEST_2 GND_11
1
1M_0402_5%~D
TCM_BA1 3 18 21
ATEST_3 GND_18 GND1
1
0.1U_0402_25V6K~D
1@ RE5 25 1 22
GND_25 GND2
C51
R1640
33_0402_5%~D
AT97SC3204-X2A18-AB_TSSOP28 1 TYCO_2-2041070-0
C52
2
2
1 2
1@ CE3
33P_0402_50V8J~D
2
Co-lay U37 and U38

LPC layout: Place TCM first and then end LPC with TPM.
B
China TCM: NationZ & Jetway co-lay B
+3.3V_RUN_TPM
LOW:Power Down Mode @ U37
High:Working Mode
VDD_0 10
VDD_1 19
VDD_2 24
SP_TPM_LPC_EN_R 28
+3.3V_RUN_TPM LPC_LAD0 LPCPD#
26 LAD0 GND_11 11
LPC_LAD1 23 18
LPC_LAD2 LAD1 GND_18
20 LAD2 GND_25 25
LPC_LAD3 17 4
LAD3 GND_4
1
1
+3.3V_SB3V
@ R657 @ R658
10K_0402_5%~D 10K_0402_5%~D
CLK_PCI_TPM_TCM 21 5 JETWAY_CLK14M
LPC_LFRAME# LCLK NC_5
22 12
2
2
PCH_PLTRST#_EC LFRAME# NC_12 JETWAY_CLK14M

1
16 13
TCM_BA0 IRQ_SERIRQ LRESET# NC_13 @
27 SERIRQ
TCM_BA1 CLKRUN# 15 1 RE6
PP CLKRUN# NC_1 33_0402_5%~D
7 PP NC_2 2
TCM_BA1 3 6
2
TCM_BA0 BA_1 NC_6

9 BA_0 NC_8 8
1
14 NC_P 1
1@ R659 1@ R660 NC_P @
10K_0402_5%~D 10K_0402_5%~D CE4
27P_0402_50V8J~D
2
2
A A
SSX44-B-D-T1_TSSOP28~D
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, TPM/TCM
WWW.AliSaler.Com
LA-7781
5 4 3 2 1
A B C D E
WWW.AliSaler.Com
1 1
+3.3V_RUN
L45
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
BLM18PG471SN1D_2P~D
1 2 1 1
+1.5V_RUN
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
1 1 1
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
C559
C560
L47
C577
1 2 1 1 2 2
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
C576
C575
BLM18BD601SN1D_0603~D
2 2 2
C563
C564
1 1
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
U38
2 2
C561
C562
1 1
+3.3VDDH 16 10 +OZ_DVDD
2 2 3.3VDDH DVDD
C565
C566
+VDDH_SD 9 8 +OZ_AVDD
+PE_VDDH VDDH AVDD +3.3V_RUN_CARD
1 2 32
L44 BLM18BD601SN1D_0603~D PE_VDDH 2 2
2 1 17 +SKT_VCC
+PE_VDDH C578 4.7U_0603_6.3V6K~D SKT_VCC
15
MMI_VCC_OUT
0.1U_0402_25V6K~D
0.01U_0402_16V7K~D
<15> CLK_PCIE_MMI 2
PE_REFCLKP SD/MMCDAT1_R
1 1 <15> CLK_PCIE_MMI# 1
PE_REFCLKM SD_D1
28 R663 1 2 33_0402_5%~D SD/MMCDAT1
26 SD/MMCDAT2_R R664 1 2 33_0402_5%~D SD/MMCDAT2
SD_D2
C573
C574
29 SD/MMCDAT0_R R665 1 2 33_0402_5%~D SD/MMCDAT0

C569 0.1U_0402_10V7K~D PCIE_PRX_MMITX_P6_C MMI_D0
1 2 6 27
2 2 <15> PCIE_PRX_MMITX_P6 C571 0.1U_0402_10V7K~D PCIE_PRX_MMITX_N6_C PE_TXP MS_D1
1 2 7 25
<15> PCIE_PRX_MMITX_N6 C567 0.1U_0402_10V7K~D PCIE_PTX_MMIRX_P6_C PE_TXM MS_D2 SD/MMCDAT3_R R668 33_0402_5%~D SD/MMCDAT3
<15> PCIE_PTX_MMIRX_P6 1 2 5 24 1 2
C568 0.1U_0402_10V7K~D PCIE_PTX_MMIRX_N6_C PE_RXP MMI_D3 SD/MMCDAT4_R R669 33_0402_5%~D SD/MMCDAT4
<15> PCIE_PTX_MMIRX_N6 1 2 4 23 1 2
PE_RXM MMI_D4 SD/MMCDAT5_R R670 33_0402_5%~D SD/MMCDAT5
1 2 3 22 1 2
2 R677 191_0402_1%~D PE_REXT MMI_D5 SD/MMCDAT6_R R672 33_0402_5%~D SD/MMCDAT6 2
21 1 2
MMI_D6 SD/MMCDAT7_R R673 33_0402_5%~D SD/MMCDAT7
33 20 1 2
GPAD MMI_D7
13 PE_RST# MS_CD# 11
place close to pin U38.32 19 SD/MMCCMD_R R674 1 2 33_0402_5%~D SD/MMCCMD
<17> PLTRST_MMI# SD_CMD/MS_BS SD/MMCCLK_R
18 R676 1 2 10_0402_1%~D SD/MMCCLK
MMI_CLK SD/MMCCD#
14 12
MULTI-IO1 SD_CD# SDWP
31 30
<15> MMICLK_REQ# MULTI-IO2 SD_WPI
OZ600FJ0LN_QFN32_5X5~D
PLTRST_MMI#
0.047U_0402_16V4Z~D
1
CE13
2
Note: The trace need to route as

daisy-chain and the trace of SD signals
need to route as short as possible
3 +3.3V_RUN_CARD JSD1 CONN@ 3
SD/MMCCLK 8
CLK/SD-5
9
VCC/VDD/SD-4
10
SD/MMCCMD VSS1/SD-3
EMI request 12
CMD/SD-2
4.7U_0603_6.3V6K~D
10K_0402_5%~D
33P_0402_50V8J~D
0.1U_0402_25V6K~D
1
1 1 1 @
CE758
SD/MMCCLK SD/MMCDAT0 4
DAT0/SD-7
C572
R826
C570
SD/MMCDAT1 3
SD/MMCDAT2 DAT1/SD-8
15
2 2 2 SD/MMCDAT3 DAT2/SD-9
14
2
DAT3/SD-1
1
SD/MMCDAT4 13
@ RE678 SD/MMCDAT5 DAT4/MMC-10
11
SD/MMCDAT6 DAT5/MMC-11
22_0402_5%~D 7
SD/MMCDAT7 DAT6/MMC-12
5
DAT7/MMC-13
2
SDWP 1
SD/MMCCD# WP SW/SD
1 2
@ CE757 CD SW/SD
33P_0402_50V8J~D 16
SD/MMCCD# GND SW
17
2 CD SW
SDWP 18
WP SW
19
CD&WP/SW/GND
20 21
CD&WP/SW/GND GND1
6 22
GND/VSS2/SD6 GND2
T-SOL_156-3000000901~D
4
only for MMC/SD 4
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Card Reader OZ600FJ0
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A B C D E
5 4 3 2 1
+3.3V_PCIE_WWAN
WWW.AliSaler.Com +3.3V_RUN
1
@ R693
2
0_0402_5%~D
PCIE_MCARD1_DET# 1 2
+3.3V_ALW_PCH
2.2K_0402_5%~D
2.2K_0402_5%~D
USB_MCARD2_DET# 2 1 1 2 WLAN_RADIO_DIS#_R R692 100K_0402_5%~D
<39> WLAN_RADIO_DIS#
1
@ R1159
@ R1160
R694 100K_0402_5%~D
D31
RB751S40T1_SOD523-2~D
Mini WLAN/WIMAX H=4
2
2 1 WWAN_SMBCLK USB_MCARD1_DET# 1 2 PCIE_MCARD1_DET# +3.3V_RUN
<7,12,13,14,15,27> DDR_XDP_WAN_SMBCLK
@ R1157 0_0402_5%~D @ R698 0_0402_5%~D
2 1 WWAN_SMBDAT +3.3V_WLAN +3.3V_WLAN
<7,12,13,14,15,27> DDR_XDP_WAN_SMBDAT
@ R1158 0_0402_5%~D CONN@
D JMINI2 +1.5V_RUN PCIE_MCARD1_DET# 1 2 D
<28,35,40> PCIE_WAKE# PCIE_WAKE# 1 2 @ R699 100K_0402_5%~D
Mini WWAN/GPS/LTE H=5.2 <41> COEX2_WLAN_ACTIVE
<41> COEX1_BT_ACTIVE
COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVE
1
@ R7001
2
20_0402_5%~D
3
5
1
3
5
2
4
6
4
6
USB_MCARD1_DET# 1
R701
2
100K_0402_5%~D
@ R702 0_0402_5%~D 7 8
+3.3V_PCIE_WWAN CONN@ +3.3V_PCIE_WWAN <15> MINI2CLK_REQ# 7 8
9 9 10
10 1 2
JMINI1 11 12
PCIE_WAKE# <15> CLK_PCIE_MINI2# 11 12 MSDATA
<28,35,40> PCIE_WAKE# 1 2 13 14 C595 4700P_0402_25V7K~D
1 2 <15> CLK_PCIE_MINI2 13 14
3 3 4 4 15 16 HOST_DEBUG_TX <40>
15 16
5 5 6 6 +1.5V_RUN 17 18
MINI1CLK_REQ# <40> HOST_DEBUG_RX 17 18 WLAN_RADIO_DIS#_R
7 8 8 +SIM_PWR 19 20
<15> MINI1CLK_REQ# 7 UIM_DATA <40> MSCLK 19 20
9 10 21 22 2 1 PCH_PLTRST#_EC
CLK_PCIE_MINI1# 9 10 UIM_CLK PCIE_PRX_WLANTX_N2 21 22 @ R703 0_0402_5%~D
11 11 12 12 23 24
<15> CLK_PCIE_MINI1# CLK_PCIE_MINI1 UIM_RESET <15> PCIE_PRX_WLANTX_N2 PCIE_PRX_WLANTX_P2 23 24
13 13 14 14 25 26
<15> CLK_PCIE_MINI1 UIM_VPP <15> PCIE_PRX_WLANTX_P2 25 26
15 15 16 16 27 28
C596 0.1U_0402_10V7K~D 27 28
17 17 18 18 29 30
29 30
19 20 WWAN_RADIO_DIS# <39> <15> PCIE_PTX_WLANRX_N2 1 2 PCIE_PTX_WLANRX_N2_C 31 32
19 20 31 32
21 21 22 22 1 2 PCH_PLTRST#_EC <17,32,35,39,40> <15> PCIE_PTX_WLANRX_P2 1 2 PCIE_PTX_WLANRX_P2_C 33 34
PCIE_PRX_WANTX_N1 @ R704 0_0402_5%~D C598 0.1U_0402_10V7K~D 33 34 USBP4-
23 23 24 24 35 36 USBP4- <17>
<15> PCIE_PRX_WANTX_N1 PCIE_PRX_WANTX_P1 PCIE_MCARD1_DET# 35 36 USBP4+
25 25 26 26 37 38 USBP4+ <17>
<15> PCIE_PRX_WANTX_P1 <18> PCIE_MCARD1_DET# 37 38 USB_MCARD1_DET#
27 27 28 28 39 40 USB_MCARD1_DET# <14,18>
C597 0.1U_0402_10V7K~D WWAN_SMBCLK 39 40 WIMAX_LED#
29 29 30 30 41 42
41 42
<15> PCIE_PTX_WANRX_N1 1 2 PCIE_PTX_WANRX_N1_C 31 31 32 32 WWAN_SMBDAT COEX2_WLAN_ACTIVE 43
43 44 44 WLAN_LED#
<15> PCIE_PTX_WANRX_P1 1 2 PCIE_PTX_WANRX_P1_C 33 34 <15> PCH_CL_CLK1 45 46
C599 0.1U_0402_10V7K~D 33 34 USBP5- 45 46 MSDATA
35 36 USBP5- <17> 1 <15> PCH_CL_DATA1 47 48 1 2 MSDATA <40>
35 36 47 48
1 2 PCIE_MCARD2_DET#_R 37 37 38 38 USBP5+
USBP5+ <17> <15> PCH_CL_RST1# 1 2 49 50 @ R706 0_0402_5%~D
<17> PCIE_MCARD2_DET# @ R725 0_0402_5%~D USB_MCARD2_DET# @ C600 @ R707 0_0402_5%~D 49 50
39 39 40 40 USB_MCARD2_DET# <18> 51 52
LED_WWAN_OUT# 33P_0402_50V8J~D 51 52 WIMAX_LED# STUDY FOR DEBUG
41 41 42 42
2
43 43 44 44 53 54
GND1 GND2
45
47
45 46 46
48
check
+1.5V_RUN 47 48 TYCO_1775861-1~D +3.3V_WLAN
49 49 50 50
C C
<39> HW_GPS_DISABLE2# 51 51 52 52
53 GND1 GND2 54
0.047U_0402_16V4Z~D
33P_0402_50V8J~D
USB_MCARD2_DET# 1 2 PCIE_MCARD2_DET#
100K_0402_5%~D
100K_0402_5%~D
@ R697 0_0402_5%~D
2
TYCO_1775861-1~D +1.5V_RUN +3.3V_WLAN
1 1
R718
R705
C594
C593
+3.3V_PCIE_WWAN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
5
2 2 DMN66D0LDW-7_SOT363-6~D
1
@ C603
1 1 1 1 1 2 2 1
WIMAX_LED# 4 3 WIRELESS_LED#
100K_0402_5%~D
C601
C604
C605
C607
C602
C608
C606
2
Q124B
2
2 2 2 2 2 1 1 2
R719
+3.3V_PCIE_WWAN
WLAN_LED# 1 6
2
G
1
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
22U_0805_6.3V6M~D
330U_D2E_6.3VM_R25~D
33P_0402_50V8J~D
33P_0402_50V8J~D
330U_D2E_6.3VM_R25~D
Q124A
1 1 LED_WWAN_OUT# 3 1 WIRELESS_LED# <39,43>
S
1 1 1 1 1
@ C1176
+ +
C611
C610
C612
C613
C614
C615
Q77
2 2 2 2 2 2 2
1/2 Minicard Pink Pather/60GHz Card H=4
+3.3V_PCIE_FLASH +3.3V_PCIE_FLASH
Primary Power Aux Power CONN@ USB_MCARD3_DET# 1 2 PCIE_MCARD3_DET#
PWR Voltage JMINI3 @R708
@ R708 0_0402_5%~D
1 1PCIE_WAKE# 2
Rail Tolerance Peak Normal Normal COEX2_WLAN_ACTIVE 3 3 1 2
2
4
B @ R709 0_0402_5%~D 4 B
5 5 6
6 +1.5V_RUN
MINI3CLK_REQ#
7 7 8 LPC_LFRAME#
<15> MINI3CLK_REQ# 8 LPC_LAD3 LPC_LFRAME# <14,32,39,40>
+3.3V +-9% 1000 750 9 9 10
SIM Card Push-Push 250 (Wake enable)
<15> CLK_PCIE_MINI3#
<15> CLK_PCIE_MINI3
CLK_PCIE_MINI3#
CLK_PCIE_MINI3
11 11
13 13
10
12
14
12
14
LPC_LAD2
LPC_LAD1
LPC_LAD0
LPC_LAD3 <14,32,39,40>
LPC_LAD2 <14,32,39,40>
LPC_LAD1 <14,32,39,40>
+3.3Vaux +-9% 330 250 5 (Not wake enable) 15 15 16 16 LPC_LAD0 <14,32,39,40>
PCH_PLTRST#_EC 17 17 18
PCLK_80H 18
<15> PCLK_80H 19 19 20 20
+SIM_PWR +1.5V +-5% 500 375 NA 21 21 22 1 2 PCH_PLTRST#_EC
PCIE_PRX_WPANTX_N5 22 @ R710 0_0402_5%~D
23 23 24 24
JSIM1 <15> PCIE_PRX_WPANTX_N5 PCIE_PRX_WPANTX_P5 25 25 26 26
<15> PCIE_PRX_WPANTX_P5
1 5 27 27 28 28
UIM_RESET VCC GND UIM_VPP C617 0.1U_0402_10V7K~D
2 6 29 29 30 30
UIM_CLK RST VPP UIM_DATA PCIE_PTX_WPANRX_N5_C
3 7 <15> PCIE_PTX_WPANRX_N5 1 2 31 31 32 32
CLK I/O PCIE_PTX_WPANRX_P5_C
4 8 <15> PCIE_PTX_WPANRX_P5 1 2 33 33 34 34
NC NC C618 0.1U_0402_10V7K~D USBP8-
9 35 35 36 36 USBP8- <17>
GND PCIE_MCARD3_DET# USBP8+
10 37 37 38 38 USBP8+ <17>
GND <18> PCIE_MCARD3_DET# USB_MCARD3_DET#
1
MOLEX_475531001 1 2
39 39
41 41
40 40
42
just reserve
+3.3V_RUN 42
C616 CONN@ R711 100K_0402_5%~D 43 43 44 2 1 +3.3V_ALW_PCH
1U_0402_6.3V6K~D 44 @ R712 100K_0402_5%~D
45 45 46 46
2 47 47 48
48
49 49 50 50
51 51 52 52 WPAN Noise
+1.5V_RUN +3.3V_PCIE_FLASH 53 54 USB_MCARD3_DET#
@ U40 GND1 GND2
1
TYCO_1775861-1~D
0.047U_0402_16V4Z~D
0.1U_0402_25V6K~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
UIM_RESET 1 6 UIM_VPP @ C627

4700P_0402_25V7K~D
2
@ C621
1 1 1 1 1 2 2 1
A A
2 5 +SIM_PWR
C625
C620
C619
C624
C626
C622
C623
UIM_CLK UIM_DATA 2 2 2 2 2 1 1 2
3 4
33P_0402_50V8J~D
33P_0402_50V8J~D
33P_0402_50V8J~D
33P_0402_50V8J~D
1 1 1 1
@ C629
@ C628
@C630
@
@C631
@
SRV05-4.TCT_SOT23-6~D
C630
C631
2 2 2 2 TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Mini Card
WWW.AliSaler.Com
LA-7781
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com
Power Control for Mini card2 Express Card PWR S/W
+3.3V_ALW
Q38 +3.3V_WLAN +1.5V_RUN +3.3V_RUN +3.3V_SUS +3.3V_CARDAUX +3.3V_CARD +1.5V_CARD
+3.3V_ALW +PWR_SRC_S SI3456DDV-T1-GE3_TSOP6~D
D D
D
100K_0402_5%~D
6
S
1
100K_0402_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
5 4
R714
2
R713
1 1 1 1 1 1 1 1 1 1
C635
C634
C633
C642
C643
C640
C641
C637
C638
2
3
R715
2
2 2 2 2 2 2 2 2 2
20K_0402_5%~D
4700P_0402_25V7K~D
1 U41
2
Q39B
1M_0402_5%~D
17 AUXIN AUXOUT 15
C632
5 2 3
3.3VIN 3.3VOUT
R1620
12 1.5VIN 1.5VOUT 11
6
Q39A 2
4 <11,16,27,39,42,47> SIO_SLP_S3# 1 2
DMN66D0LDW-7_SOT363-6~D @ R734 0_0402_5%~D 20 8 CARD_RESET#
EXPRCRD_STBY_R# SHDN# PERST# EXPRCRD_CPPE#
<27,39,42,47> RUN_ON 1 2 1 10
2
@ R717 0_0402_5%~D STBY# CPPE# CPUSB#
<39> AUX_EN_WOWL 2 <17,32,34,39,40> PCH_PLTRST#_EC 6 SYSRST# CPUSB# 9
19 OC#
1
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
+3.3V_RUN 4 NC
R716 +3.3V_CARD 5 18 1 1 1
NC RCLKEN
CE11
CE10
CE12
100K_0402_5%~D +1.5V_CARD 13 NC
+1.5V_RUN 14 7
2
NC GND
16 NC PAD 21
2 2 2
TPS2231MRGPR-2_QFN20_4X4~D
C Power Control for Mini card1 Note: Add connection on pin4, pin5, pin 13 C
+3.3V_PCIE_WWAN and pin14 to support GMT 2nd source part

+3.3V_ALW
Q40
+3.3V_ALW +PWR_SRC_S SI3456DDV-T1-GE3_TSOP6~D
470K_0402_5%~D
6
S
1
100K_0402_5%~D
5 4
1
R722
2
R721
1
1
G
R723
Express Card Conn.
2
1K_0402_5%~D
2
3
220P_0402_50V8J~D
+3.3V_SUS
4.7M_0402_5%~D
+1.5V_CARD
1
1
Q41B
0.1U_0402_25V6K~D
C644
R1625
MCARD_WWAN_PWREN# 5
1
D
2
6
Q73
2.2K_0402_5%~D
2.2K_0402_5%~D
Q41A 2 MCARD_WWAN_PWREN# 1
4
1
DMN66D0LDW-7_SOT363-6~D G
2
C645
R731
R732
S 1 2
3
2 @R724
@ R724 0_0402_5%~D
<39> MCARD_WWAN_PWREN 2
1
2
R726 1 2
100K_0402_5%~D @ R727
@R727 0_0402_5%~D CONN@
1 1 JEXP1
<17> USBP10- 2 2
1
2
USBP10_D- GND1
2 USB_D-
4 3 USBP10_D+ 3
B <17> USBP10+ 4 3 CPUSB# USB_D+ B
4 CPUSB#
L49 DLW21SN900SQ2L_0805_4P~D 5
Power Control for Mini card3 <40> CARD_SMBCLK
CARD_SMBCLK
CARD_SMBDAT
6
7
RESERVED
RESERVED
SMB_CLK
<40> CARD_SMBDAT 8
SMB_DAT
9
+1.5V
10
+3.3V_ALW +1.5V
11
Q42 +3.3V_PCIE_FLASH <28,34,40> PCIE_WAKE# WAKE#
+3.3V_CARDAUX 12
+PWR_SRC_S +3.3VAUX
0.1U_0402_25V6K~D
+3.3V_ALW SI3456DDV-T1-GE3_TSOP6~D CARD_RESET# 13
PERST#
470K_0402_5%~D
+3.3V_CARD 14
+3.3V
D
6 1 15
S
+3.3V
1
100K_0402_5%~D
5 4 16
<15> EXPCLK_REQ# CLKREQ#
1
R729
C646
0.1U_0402_25V6K~D
2 EXPRCRD_CPPE# 17
CPPE#
R728
1 <15> CLK_PCIE_EXP# 18
REFCLK-
1
2 19
1
G
<15> CLK_PCIE_EXP REFCLK+

R730 20
2
GND
C649
20K_0402_5%~D <15> PCIE_PRX_EXPTX_N3 21
2
PER_N0
<15> PCIE_PRX_EXPTX_P3 22
PER_P0
3
2
220P_0402_50V8J~D
C647 0.1U_0402_10V7K~D 23
2
GND
4.7M_0402_5%~D
<15> PCIE_PTX_EXPRX_N3 1 2 PCIE_PTX_EXPRX_N3_C 24

PET_N0
1
1
Q43B
<15> PCIE_PTX_EXPRX_P3 1 2 PCIE_PTX_EXPRX_P3_C 25

PET_P0
R1628
C650
5 C648 0.1U_0402_10V7K~D 26
GND
2
6
Q43A 27
4
DMN66D0LDW-7_SOT363-6~D GND
28
2
GND
29 GND
<39> MCARD_MISC_PWREN 2 30 GND
1
T-SOL_5421005002000-9_NR
1
R733
A 100K_0402_5%~D A
2
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCIE-SATA SW / PCIE PWR
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D D
L97 D79 +USB_SIDE_PWR

USB3RN2 4 3 USB3RN2_D- USB3RN2_D- 1 10 USB3RN2_D- JUSB2
<17> USB3RN2 4 3 USB3TP2_D+ 9 SSTX+
USB3RP2_D+ 2 9 USB3RP2_D+ 1
USB3RP2 USB3RP2_D+ USB3TN2_D- VBUS
<17> USB3RP2 1 1 2 2 8 SSTX-
0.1U_0402_25V6K~D
150U_D2_6.3VY_R15M~D
USB3TN2_D- 4 7 USB3TN2_D- USBP1_D- 2
DLW21SN900HQ2L_0805_4P~D D-
1 7 GND
1 2 USB3TP2_D+ 5 6 USB3TP2_D+ 1 USBP1_D+ 3 10
@ R1616 0_0402_5%~D + USB3RP2_D+ D+ GND
6 SSRX+ GND 11
2
C652
C655
3 4 12
GND GND
D73
1 2 USB3RN2_D- 5 13
@ R1609 0_0402_5%~D 2 2 SSRX- GND
8
SANTA_370300-1
IP4292CZ10-TBR_XSON10_2.5X1~D
L98 L52
<17> USB3TN2 2 1 USB3TN2_C 4 3 USB3TN2_D- 4 3 USBP1_D+
4 3 <17> USBP1+ 4 3
C410 0.1U_0402_10V7K~D
1
<17> USB3TP2 2 1 USB3TP2_C 1 2 USB3TP2_D+ 1 2 USBP1_D-
1 2 <17> USBP1- 1 2
C411 0.1U_0402_10V7K~D
DLW21SN900HQ2L_0805_4P~D DLW21SN900SQ2L_0805_4P~D +5V_ALW +USB_SIDE_PWR
1 2 1 2
C @ R1612 0_0402_5%~D @ R737 0_0402_5%~D U5 C
1 8
GND VOUT
1 2 1 2 2 7
VIN VOUT
10U_0805_10V6K~D
0.1U_0402_25V6K~D
@ R1615 0_0402_5%~D @ R739 0_0402_5%~D 3 6
VIN VOUT
<30,39> USB_SIDE_EN# 4 5 USB_OC0# <17>
EN FLG
1 1
G547I2P81U_MSOP8
C678
C677
2 2
+SATA_SIDE_PWR
+5V_ALW +5V_ALW
1 2 U48 +5V_USB_CHG_PWR
<39> USB_PWR_SHR_VBUS_EN
2
@ R784 0_0402_5%~D 1 10 USB_OC1# <17>
U2 R816 GND FAULT1#
2 9
IN OUT1
10U_0805_10V6K~D
0.1U_0402_25V6K~D
1 2 SB# 8 1 PWRSHARE_EN 100K_0402_5%~D 3 8
<39> USB_PWR_SHR_EN# SB INT USBP0_D- <39> ESATA_USB_PWR_EN# IN OUT2
@ R1626 0_0402_5%~D 7 2 4 7
<17> USBP0- Y- D- EN1# ILIM
6 3 USBP0_D+ 1 1 PWRSHARE_EN# 5 6 USB_OC0#
<17> USBP0+ <17>
1
Y+ D+ EN2# FAULT#2
1
5 4 SEL 11
VDD SEL T-PAD
C676
C675
+5V_ALW 9 +5V_ALW PWRSHARE_EN# R748
GND
0.1U_0402_25V6K~D
TPS2560DRCR-PG1.1_SON10_3X3~D 24.9K_0402_1%~D
1
SLG55584AVTR_TDFN8_2X2 D 2 2
2
1 2 Q48
2
G SSM3K7002FU_SC70-3~D
C715
R1614 S
3
10K_0402_5%~D
2
1
B B
2
1
D
SB# 2 @ R1613
G 10K_0402_5%~D
@Q126 S
3
L95 D78 +5V_USB_CHG_PWR

USB3RN1 4 3 USB3RN1_D- USB3RN1_D- 1 10 USB3RN1_D- JUSB1
<17> USB3RN1 4 3 USB3TP1_D+ 9
USB3RP1_D+ USB3RP1_D+ SSTX+
2 9 1 VBUS
150U_D2_6.3VY_R15M~D
0.1U_0402_25V6K~D
USB3RP1 1 2 USB3RP1_D+ USB3TN1_D- 8
<17> USB3RP1 1 2 USB3TN1_D- USB3TN1_D- USBP0_R_D- SSTX-
4 7 1 2
DLW21SN900HQ2L_0805_4P~D D-
1 7
USB3TP1_D+ USB3TP1_D+ + USBP0_R_D+ GND
1 2 5 6 3 10
D+ GND
C651
C654
@ R1605 0_0402_5%~D USB3RP1_D+ 6 11
SSRX+ GND
2
3 4 12
2 2 GND GND
D72
1 2 USB3RN1_D- 5 13
@ R1604 0_0402_5%~D SSRX- GND
8
SANTA_370300-1
IP4292CZ10-TBR_XSON10_2.5X1~D
L96 L51
<17> USB3TN1 2 1 USB3TN1_C 4 3 USB3TN1_D- USBP0_D+ 4 3 USBP0_R_D+
C412 0.1U_0402_10V7K~D 4 3 4 3
1
<17> USB3TP1 2 1 USB3TP1_C 1
1 2
2 USB3TP1_D+ USBP0_D- 1
1 2
2 USBP0_R_D-
A C413 0.1U_0402_10V7K~D A
DLW21SN900HQ2L_0805_4P~D DLW21SN900SQ2L_0805_4P~D
1 2 1 2
@ R1606 0_0402_5%~D @ R736 0_0402_5%~D
1
@ R1603
2
0_0402_5%~D
1
@ R740
2
0_0402_5%~D
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, USB x2
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PJP9
PAD-OPEN1x1m
+3.3V_RUN_U44
1 2
0.01U_0402_16V7K~D
0.1U_0402_25V6K~D
0_0402_5%~D
1 1
1
0_0402_5%~D
0_0402_5%~D
@ R742
0_0402_5%~D
@ @
R1595
R743
R1594
C661
C662
2 2
+3.3V_RUN_U44
2
2
D D
1 2
@ R741 0_0402_5%~D U44
7 EN VCC 6
17 NC_GND_VDD VCC 16
19 20 REXT
NC_GND_VDD
PREXT/NC/VDD
18 NC_GND_VDDNC/GND/VDD 10
ESATA_PTX_DRX_P4_C 2 1 ESATA_PTX_DRX_P4
<14> ESATA_PTX_DRX_P4_C
C663 0.01U_0402_16V7K~D 1 9 ESATA_PE1
ESATA_PTX_DRX_N4_C A_INp A_PRE
<14> ESATA_PTX_DRX_N4_C 2 1 ESATA_PTX_DRX_N4 2 A_INn B_PRE 8 ESATA_PE2
C664 0.01U_0402_16V7K~D
ESATA_PRX_DTX_N4_C 2 1 ESATA_PRX_DTX_N4 4 15 ESATA_PTX_DRX_P4_RP
<14> ESATA_PRX_DTX_N4_C C665 0.01U_0402_16V7K~D B_OUTn A_OUTp ESATA_PTX_DRX_N4_RP
5 B_OUTp A_OUTn 14
ESATA_PRX_DTX_P4_C 2 1 ESATA_PRX_DTX_P4
<14> ESATA_PRX_DTX_P4_C C666 0.01U_0402_16V7K~D ESATA_PRX_DTX_P4_RP
3 GND B_INp 11
13 12 ESATA_PRX_DTX_N4_RP
GND B_INn
21 GND
PS8513BTQFN20GTR-A0_TQFN20_4X4
C C
+SATA_SIDE_PWR
150U_D2_6.3VY_R15M~D
0.1U_0402_25V6K~D
1
1
C667
C668
+
2 2
JESA1
1 VBUS
USBP2_D- 2
USBP2_D+ D- USB
3 D+
4 GND
B B
ESATA_PTX_DRX_P4_RP 1 2 SATA_PTX_DRX_P4 5
C671 0.01U_0402_16V7K~D GND
6 A+
L90 ESATA_PTX_DRX_N4_RP 1 2 SATA_PTX_DRX_N4 7 ESATA
USBP2_D+ C672 0.01U_0402_16V7K~D A-
<17> USBP2+ 1 2 8
1 2 ESATA_PRX_DTX_N4_RP GND
1 2 SATA_PRX_DTX_N4 9
C673 0.01U_0402_16V7K~D B-
10 B+
4 3 USBP2_D- ESATA_PRX_DTX_P4_RP 1 2 SATA_PRX_DTX_P4 11
<17> USBP2- 4 3 GND
C674 0.01U_0402_16V7K~D
DLW21SN900SQ2L_0805_4P~D
1 2 12 GND
3
@ R1150 0_0402_5%~D 13 GND

14 GND
1 2 15 GND
@ R1151 0_0402_5%~D
D74
TYCO_2129156-3
CONN@
1
Place D74 close to JESATA1
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, USB/ESATA/IO/MDC
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CONN@
JDOCK1
DOCK_DET_1 1 2 DOCK_AC_OFF
1 2 DOCK_AC_OFF <39,53>
3 3 4 4
<31> DOCK_LOM_SPD10LED_GRN# DPD_CA_DET DPC_CA_DET DOCK_LOM_SPD100LED_ORG# <31>
5 5 6 6
<26> DPD_CA_DET DPC_CA_DET <26>
7 7 8 8
D D
<16> DPD_PCH_LANE_P0
C690 2 1 0.1U_0402_10V7K~D DPD_PCH_LANE_P0_C RE7 2 1 33_0402_5%~D DPD_DOCK_LANE_P0 9 10 DPC_DOCK_LANE_P0 RE17 1 2 33_0402_5%~D DPC_PCH_LANE_P0_C C691 2 1 0.1U_0402_10V7K~D
9 10 DPC_PCH_LANE_P0 <16>
<16> DPD_PCH_LANE_N0
C679 2 1 0.1U_0402_10V7K~D DPD_PCH_LANE_N0_C RE8 2 1 33_0402_5%~D DPD_DOCK_LANE_N0 11 12 DPC_DOCK_LANE_N0 RE18 1 2 33_0402_5%~D DPC_PCH_LANE_N0_C C680 2 1 0.1U_0402_10V7K~D
11 12 DPC_PCH_LANE_N0 <16>
13 13 14 14
C683 2 1 0.1U_0402_10V7K~D DPD_PCH_LANE_N1_C RE10 2 1 33_0402_5%~D DPD_DOCK_LANE_N1 17
17 18 18 DPC_DOCK_LANE_N1 RE20 1 2 33_0402_5%~D DPC_PCH_LANE_N1_C C684 2 1 0.1U_0402_10V7K~D
DPC_PCH_LANE_N1 <16>
19 19 20 20
25 25 26 26
C687 2 1 0.1U_0402_10V7K~D DPD_PCH_LANE_P3_C RE15 2 1 33_0402_5%~D DPD_DOCK_LANE_P3 27 27 28 28 DPC_DOCK_LANE_P3 RE23 1 2 33_0402_5%~D DPC_PCH_LANE_P3_C C688 2 1 0.1U_0402_10V7K~D
DPC_PCH_LANE_P3 <16>
31 31 32 32
DPD_DOCK_AUX 33 34 DPC_DOCK_AUX
<26> DPD_DOCK_AUX 33 34 DPC_DOCK_AUX <26>
DPD_DOCK_AUX# 35 36 DPC_DOCK_AUX#
<26> DPD_DOCK_AUX# 35 36 DPC_DOCK_AUX# <26>
37 37 38 38
DPD_PCH_DOCK_HPD 39 40 DPC_PCH_DOCK_HPD
<16> DPD_PCH_DOCK_HPD 39 40 DPC_PCH_DOCK_HPD <16>
+NBDOCK_DC_IN_SS 41 41 42 42 ACAV_DOCK_SRC# <53>
0.033U_0402_16V7K~D
0.033U_0402_16V7K~D
1 43 43 44 44 1
BLUE_DOCK 45 46
<23> BLUE_DOCK 45 46 DAT_DDC2_DOCK <23>
C695
C696
47 47 48 48 CLK_DDC2_DOCK <23>
2
49 49 50 50
2
Close to DOCK
51 52
RED_DOCK 53
51 52
54 SATA_PRX_DKTX_P5 2 1
Its for Enhance ESD on dock issue.
<23> RED_DOCK 53 54 SATA_PRX_DKTX_N5
SATA_PRX_DKTX_P5_C <14>
Close to DOCK 55 55 56 56 C697 2 1 0.01U_0402_16V7K~D SATA_PRX_DKTX_N5_C <14>
57 58 C698 0.01U_0402_16V7K~D
Its for Enhance ESD on dock issue. GREEN_DOCK 59
57 58
60 SATA_PTX_DKRX_P5 1 2
<23> GREEN_DOCK 59 60 SATA_PTX_DKRX_N5 SATA_PTX_DKRX_P5_C <14>
61 62 C699 1 2 0.01U_0402_16V7K~D
61 62 C700 0.01U_0402_16V7K~D @SATA_PTX_DKRX_N5_C
L53 <14>
63 63 64 64
65 66 USBP6_D+ 2
<23> HSYNC_DOCK 65 66 USBP6_D- 2 1 1 USBP6+ <17>
DPC_PCH_DOCK_HPD
<23> VSYNC_DOCK 67 67 68 68
DPD_PCH_DOCK_HPD 69 70
69 70
<40> CLK_MSE 71 71 72 72 USBP3+ <17> 3 4 USBP6- <17>
C 3 4 C
<40> DAT_MSE 73 73 74 74 USBP3- <17>
1
75 76 DLW21SN900SQ2L_0805_4P~D
75 76
1
<29> DAI_BCLK# 77 77 78 78 CLK_KBD <40>

79 80 2 1 R758
<29> DAI_LRCK# 79 80 DAT_KBD <40>
R757 81 82 R1672 0_0402_5%~D 100K_0402_5%~D
100K_0402_5%~D 81 82
<29> DAI_DI 83 84 USB3RN4 <17> 2 1
2
83 84 R1673 0_0402_5%~D
85 86
2
<29> DAI_DO# 85 86 USB3RP4 <17>

87 87 88 88 EMI solution for E-Docking USB
<29> DAI_12MHZ# 89 89 90 90 USB3TN4 <17>
91 91 92 92 USB3TP4 <17>
93 93 94 94
95 95 96 96
<39> D_LAD0 97 97 98 98
BREATH_LED# <39,43>
<39> D_LAD1 99 99 100 100
DOCK_LOM_ACTLED_YEL# <31>
101 101 102 102
<39> D_LAD2 103 103 104 104
DOCK_LOM_TRD0+ <31>
<39> D_LAD3 105 105 106 106
DOCK_LOM_TRD0- <31> +3.3V_ALW
107 107 108 108
<39> D_LFRAME# 109 109 110 110
DOCK_LOM_TRD1+ <31> +LOM_VCT
<39> D_CLKRUN# 111 111 112 112
DOCK_LOM_TRD1- <31> DOCK_DET#
113 113 114 114 1 2
115 116 1 R755 10K_0402_5%~D
<39> D_SERIRQ 115 116
117 118 +LOM_VCT @
<39> D_DLDRQ1# 117 118
119 120 C701
119 120 1U_0402_6.3V6K~D
<17> CLK_PCI_DOCK 121 121 122 122 DOCK_LOM_TRD2+ <31>
123 124 2
123 124 DOCK_LOM_TRD2- <31>
125 125 126 126
<40> DOCK_SMB_CLK 127 127 128 128 DOCK_LOM_TRD3+ <31>
<40> DOCK_SMB_DAT 129 129 130 130 DOCK_LOM_TRD3- <31>
131 131 132 132
<39,53> DOCK_SMB_ALERT# 133 133 134 134 DOCK_DCIN_IS+ <52>
<44> DOCK_PSID 135 135 136 136 DOCK_DCIN_IS- <52>
B B
137 137 138 138
139 140 D32
<40> DOCK_PWR_BTN# 139 140 DOCK_POR_RST# <40>
141 142 RB751S40T1_SOD523-2~D
SLICE_BAT_PRES# 141 142 DOCK_DET_R#
<39,53> SLICE_BAT_PRES# 143 144 1 2 DOCK_DET# <39>
143 144
145 GND1 PWR2 149 +DOCK_PWR_BAR
+DOCK_PWR_BAR 146 PWR1 PWR2 150
0.1U_0603_50V7K~D
PESD24VS2UT_SOT23-3~D
147 PWR1 PWR2 151

3
2
0.1U_0603_50V7K~D
@ 148 152
PWR1 GND2
4.7U_0805_25V6K~D
C703
D33
1 @ 1 153 159
Shield_G Shield_G
C702
154 Shield_G Shield_G 160

CE6

156 162 2
1
2 2 Shield_G Shield_G
DAI_12MHZ# DAI_BCLK# CLK_PCI_DOCK
1
1
JAE_WD2F144WB1
@ RE11 @ RE12 R756
10_0402_1%~D 10_0402_1%~D 33_0402_5%~D
2
2
1 1 1
@
@CE8
CE8 @CE9
@ CE9 C704
4.7P_0402_50V8C~D 4.7P_0402_50V8C~D 12P_0402_50V8J~D
2 2 2
A A
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT DOCKING CONN
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5 4 3 2 1
5 4 3 2 1
+3.3V_ALW
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1
R796
1
2 DYN_TURB_PWR_ALRT#
10K_0402_5%~D
2 HW_GPS_DISABLE2#
R798 100K_0402_5%~D +3.3V_ALW
1 2 PROCHOT_GATE
R761 100K_0402_5%~D
1 1 1 1 1 1
1 2 CPU_DETECT# C705 C706 C707 C708 C709 C710

R763 100K_0402_5%~D 10U_0603_6.3V6M~D 0.1U_0402_25V6K~D 0.1U_0402_25V6K~D 0.1U_0402_10V7K~D 0.1U_0402_25V6K~D 0.1U_0402_25V6K~D
2 2 2 2 2 2
D SLICE_BAT_PRES# D
1 2
R760 100K_0402_5%~D
A17
B30
A43
A54
B5
1 2 WWAN_RADIO_DIS# U46 +3.3V_ALW
R774 100K_0402_5%~D @ C711 0.1U_0402_25V6K~D
VCC1
VCC1
VCC1
VCC1
VCC1
GPIOI0 A23 ACAV_IN_NB <40,52,53> 1 2
1 2 USB_PWR_SHR_EN# CRT_SWITCH B52 B63 SIO_SLP_A#
<23> CRT_SWITCH GPIOA0 GPIOI1 SIO_SLP_A# <16,42,48>
5
R776 100K_0402_5%~D MDC_RST_DIS# A49 A60 0.75V_DDR_VTT_ON
<30> MDC_RST_DIS# GPIOA1 GPIOI2/TACH0 0.75V_DDR_VTT_ON <46>
MCARD_MISC_PWREN B53 A61 1
P
<35> MCARD_MISC_PWREN GPIOA2 GPIOI3 SIO_SLP_S4# <16,42,46> B
1 2 USB_SIDE_EN# PROCHOT_GATE A50 B65 2 1
R768 10K_0402_5%~D
<52> PROCHOT_GATE
LID_CL_SIO# GPIOA3 GPIOI4 SIO_SLP_S3# <11,16,27,35,42,47> O 4D34 @ DOCK_AC_OFF <38,53>
B54 A62 IMVP_PWRGD <51> 2
GPIOA4 GPIOI5 A
G
DOCK_SMB_ALERT# A51 B66 1 2 RB751S40T1_SOD523-2~D
<38,53> DOCK_SMB_ALERT# GPIOA5 GPIOI6 IMVP_VR_ON <51>
1
1 2 ESATA_USB_PWR_EN# B55 A63 @ R765 0_0402_5%~D U47 @
3
R769 100K_0402_5%~D <24> TOUCH_SCREEN_PD# GPIOA6 GPIOI7 DOCK_AC_OFF_EC TC7SH08FU_SSOP5~D R770 @
A52 GPIOA7
B67 33K_0402_5%~D
USB_PWR_SHR_VBUS_EN USB_SIDE_EN# GPIOJ0 AUX_EN_WOWL <35> DOCK_AC_OFF_EC <53>
1 2 <30,36> USB_SIDE_EN# A33 A64 WLAN_LAN_DISB# <31>
R778 100K_0402_5%~D EN_I2S_NB_CODEC# GPIOB0 GPIOJ1/TACH1 SIO_SLP_LAN#
<29> EN_I2S_NB_CODEC# B36 A5 SIO_SLP_LAN# <16,31>
2
USH_PWR_STATE# GPIOB1 GPIOJ2/TACH2 SIO_SLP_SUS#
<32> USH_PWR_STATE# A34 B6 SIO_SLP_SUS# <16>
DOCK_SMB_ALERT# EN_DOCK_PWR_BAR GPOC2 GPIOJ3
1 2 <53> EN_DOCK_PWR_BAR B37 A6
R762 10K_0402_5%~D PANEL_BKEN_EC GPOC3 GPIOJ4 MODC_EN GPIO_PSID_SELECT <44>
<24> PANEL_BKEN_EC A35 B7 MODC_EN <28>
ENVDD_PCH GPOC4 GPIOJ5 DOCK_HP_DET
<16,24> ENVDD_PCH B38 A7 DOCK_HP_DET <29>
WIRELESS_ON#/OFF LCD_TST GPOC5 GPIOJ6 DOCK_MIC_DET
1 2 <24> LCD_TST A36 B8 DOCK_MIC_DET <29>
R771 100K_0402_5%~D PSID_DISABLE# GPOC6/TACH4 GPIOJ7
A37 GPIOC7
<44> PSID_DISABLE# PBAT_PRES# ME_FWP
<44,53> PBAT_PRES# B40 A8 ME_FWP <14>
DOCKED GPIOD0 GPIOK0 MASK_SATA_LED#
<31> DOCKED A38 B9 MASK_SATA_LED# <43>
DOCK_DET# GPIOC1 GPIOK1/TACH3
<38> DOCK_DET# B41 B10 1.8V_RUN_PWRGD <47>
AUD_NB_MUTE# GPIOC0 GPIOK2 LED_SATA_DIAG_OUT#
A39 A10 LED_SATA_DIAG_OUT# <43>
<29> AUD_NB_MUTE# MCARD_WWAN_PWREN GPIOB7 GPIOK3 TEMP_ALERT#_R
+3.3V_RUN B42 B11 1 2 TEMP_ALERT# TEMP_ALERT# <14,18>
<35> MCARD_WWAN_PWREN LCD_VCC_TEST_EN GPIOB6 GPIOK4 RUN_ON @ R738 0_0402_5%~D +3.3V_RUN
<24> LCD_VCC_TEST_EN A40 A11 RUN_ON <27,35,42,47>
CCD_OFF GPIOB5 GPIOK5
<24> CCD_OFF B43 B12
MCARD_PCIE_SATA# AUD_HP_NB_SENSE GPIOB4 GPIOK6
1 2 <29,30> AUD_HP_NB_SENSE A41 A12
R457 100K_0402_5%~D ESATA_USB_PWR_EN# GPIOB3 GPIOK7 SPI_WP#_SEL <14> D_CLKRUN#
<36> ESATA_USB_PWR_EN# B44 2 1
C WIRELESS_ON#/OFF GPIOB2 SUS_ON R777 100K_0402_5%~D C
1 2 B60 SUS_ON <42>
@ R766 100K_0402_5%~D GPIOL0/PWM7 D_SERIRQ
GPIOL1/PWM8 A57 2 1
1 2 SP_TPM_LPC_EN MODULE_ON B32 B64 BAT1_LED# R780 100K_0402_5%~D
<53> MODULE_ON GPIOD1 GPIOL2/PWM0 BAT1_LED# <43> trace width 20 mils
@ R772 10K_0402_5%~D <53> SLICE_BAT_ON SLICE_BAT_ON A31 B68 D_DLDRQ1# 2 1
LCD_TST SLICE_BAT_PRES# GPIOD2 GPIOL3/PWM1 BAT2_LED# R782 100K_0402_5%~D
1 2 <38,53> SLICE_BAT_PRES# B33 A9 BAT2_LED# <43> trace width 20 mils
R767 100K_0402_5%~D MODULE_BATT_PRES# GPIOD3 GPIOL4/PWM3
B15 B1
<44,53> MODULE_BATT_PRES# CHARGE_MODULE_BATT GPIOD4 GPIOL5/PWM2 USH_PWR_ON
A15 A18 PAD~D T117 @
<53> CHARGE_MODULE_BATT CHARGE_PBATT GPIOD5 GPIOL6
B16 A44
SYS_LED_MASK# <53> CHARGE_PBATT DEFAULT_OVRDE GPIOD6 GPIOL7/PWM5 RUN_ON
1 2 A16 2 1
R775 10K_0402_5%~D <53> DEFAULT_OVRDE GPIOD7 HW_GPS_DISABLE2# R786 100K_0402_5%~D
B34 HW_GPS_DISABLE2# <34>
DGPU_PWR_EN GPIOM1 BREATH_LED#
1 2 B39 BREATH_LED# <38,43>
R1582 100K_0402_5%~D GPIOM3/PWM4 CPU_VTT_ON
A1 B51 2 1
GFX_MEM_VTT_ON USB_PWR_SHR_EN# GPIOE0/RXD GPIOM4/PWM6 R789 100K_0402_5%~D
1 2 B2
R1583 100K_0402_5%~D <36> USB_PWR_SHR_EN# GFX_MEM_VTT_ON GPIOE1/TXD
A2 GPIOE2/RTS#
1 2 CHARGE_EN MCARD_PCIE_SATA# B3 A27 LPC_LAD0 0.75V_DDR_VTT_ON 2 1
CPU_DETECT# GPIOE3/DSR# LAD0 LPC_LAD1 LPC_LAD0 <14,32,34,40>
R3 100K_0402_5%~D A3 A26 R790 100K_0402_5%~D
<7> CPU_DETECT# GPIOE4/CTS# LAD1 LPC_LAD1 <14,32,34,40>
DGPU_PWR_EN B45 B26 LPC_LAD2 SLICE_BAT_ON 2 1
GPIOE5/DTR# LAD2 LPC_LAD2 <14,32,34,40>
MOD_SATA_PCIE#_DET A42 B25 LPC_LAD3 R791 100K_0402_5%~D
<28> MOD_SATA_PCIE#_DET GPIOE6/RI# LAD3 LPC_LAD3 <14,32,34,40>
@ T116 PAD~D DP_HDMI_HPD B4 A21 LPC_LFRAME# SUS_ON 2 1
GPIOE7/DCD# LFRAME# PCH_PLTRST#_EC LPC_LFRAME# <14,32,34,40>
B22 R878 100K_0402_5%~D
LRESET# CLK_PCI_5048 PCH_PLTRST#_EC <17,32,34,35,40>
PCICLK A28 CLK_PCI_5048 <17>
ZODD_WAKE# A59 B20 CLKRUN#
<28> ZODD_WAKE# GPIOF0 CLKRUN# CLKRUN# <16,32,40>
BCM5882_ALERT# B62
<32> BCM5882_ALERT# GPIOF1
A58 A22 LPC_LDRQ1#
<16> SUSACK# EDID_SELECT# GPIOF2 LDRQ1# IRQ_SERIRQ LPC_LDRQ1# <14>
@ T111 PAD~D B61 GPIOF3/TACH8 SER_IRQ B21 IRQ_SERIRQ <14,32,40>
DGPU_PWROK A56 A32 CLK_SIO_14M
@ T110 PAD~D GPIOF4/TACH7 14.318MHZ/GPIOM0 CLK_SIO_14M <15>
VGA_ID B59 B35 EC_32KHZ_ECE5048 <40>
3.3V_RUN_GFX_ON GPIOF5 CLK32/GPIOM2
@ T109 PAD~D A55 GPIOF6
SLP_ME_CSW_DEV# B58
<14,18> SLP_ME_CSW_DEV# GPIOF7 D_LAD0
DLAD0 B29
D_LAD1 D_LAD0 <38>
DLAD1 B28
LAN_DISABLE#_R D_LAD2 D_LAD1 <38>
<31> LAN_DISABLE#_R B47 GPIOG0/TACH5 DLAD2 A25
B CHARGE_EN D_LAD3 D_LAD2 <38> B
A45 A24
SYS_LED_MASK# GPIOG1 DLAD3 D_LFRAME# D_LAD3 <38>
<43> SYS_LED_MASK# B48 B23 D_LFRAME# <38>
DYN_TURB_PWR_ALRT# GPIOG2 DLFRAME# D_CLKRUN#
A46 A19 D_CLKRUN# <38>
GPIOG3 DCLKRUN# D_DLDRQ1#
<18> SIO_EXT_WAKE# @ R797 1 2 0_0402_5%~D B49
GPIOG4 DLDRQ1# B24 D_DLDRQ1# <38>
WIRELESS_LED# A47 A20 D_SERIRQ
+3.3V_ALW <34,43> WIRELESS_LED# GPIOG5 DSER_IRQ D_SERIRQ <38>
USB_PWR_SHR_VBUS_EN B50
<36> USB_PWR_SHR_VBUS_EN WLAN_RADIO_DIS# GPIOG6
<34> WLAN_RADIO_DIS# A48
GPIOG7/TACH6 BC_INT#_ECE5048
BC_INT# A29 BC_INT#_ECE5048 <40>
B31 BC_DAT_ECE5048
BC_DAT BC_DAT_ECE5048 <40>
WIRELESS_ON#/OFF B13 A30 BC_CLK_ECE5048
<30> WIRELESS_ON#/OFF GPIOH0 BC_CLK BC_CLK_ECE5048 <40>
1 2 VGA_ID BT_RADIO_DIS# A13
<41> BT_RADIO_DIS# GPIOH1
R800 100K_0402_5%~D WWAN_RADIO_DIS# A53
<34> WWAN_RADIO_DIS# SYS_PWROK SYSOPT1/GPIOH2 RUNPWROK
<7,16> SYS_PWROK B57 SYSOPT0/GPIOH3 PWRGD A4
DGPU_SELECT# RUNPWROK <7,40>
@ T114 PAD~D B14 GPIOH4
A14 B56 SP_TPM_LPC_EN
GPIOH5 OUT65 SP_TPM_LPC_EN <32>
CPU_VTT_ON B17 +3.3V_ALW
<49> CPU_VTT_ON GPIOH6
<16> PCH_DPWROK 1 2 B18
VGA_ID @ R802
@R802 0_0402_5%~D GPIOH7
1 2 B19 1 2
@ R803
@R803 100K_0402_5%~D TEST_PIN R804 1K_0402_5%~D +CAP_LDO trace width 20 mils
1
B46 +CAP_LDO
CAP_LDO CLK_SIO_14M CLK_PCI_5048 R805
1
B27 100K_0402_5%~D
VSS C714
C1
EP
1
4.7U_0603_6.3V6K~D
2
DB Version 0.4 2 @
@R794
R794 @ R795
VGA_ID0 ECE5048-LZY_DQFN132_11X11~D 10_0402_1%~D 33_0402_5%~D LID_CL_SIO# 2 1 LID_CL# <30,43>
R807 10_0402_1%~D
Discrete 0 1
2
UMA 1 1 1 C716
@ C713 0.047U_0402_16V4Z~D
@ C712 33P_0402_50V8J~D 2
A 4.7P_0402_50V8C~D A
2 2
ME_FWP PCH has internal 20K PD.
(suspend power rail)
ME_FWP DELL CONFIDENTIAL/PROPRIETARY
1
@ R793 Compal Electronics, Inc.

1K_0402_5%~D PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, ECE5048
2
WWW.AliSaler.Com
LA-7781
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com
+3.3V_ALW +RTC_CELL
C720
0.1U_0402_25V6K~D
1
1 2 @ C721
R810 1U_0402_6.3V6K~D
100K_0402_5%~D 1 2
5
U50
1.05V_VTTPWRGD 1
P
<49,50> 1.05V_VTTPWRGD
2
B 1.05V_0.8V_PWROK
4 1.05V_0.8V_PWROK <14,51>
VCCSAPWROK O POWER_SW_IN#
<50> VCCSAPWROK 2 <22> POWER_SW_IN# 1 2 POWER_SW#_MB <30,41>
G
A R811 10K_0402_5%~D
1
Modify name net TC7SH08FU_SSOP5~D
3
C722
1U_0402_6.3V6K~D
2
+3.3V_ALW
+RTC_CELL @ R815 +3.3V_ALW

1 2 PCIE_WAKE# 0_0402_5%~D +RTC_CELL
D R759 10K_0402_5%~D 1 2+RTC_CELL_VBAT D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
1
2 1 BC_DAT_EMC4022 1 1 1 1 1 1 1 1 1 1 @ C733
R821 100K_0402_5%~D R819 1U_0402_6.3V6K~D
C723
C725
C727
C726
C729
C731
C728
C739
C732
C730
1 2 BC_DAT_ECE5048 100K_0402_5%~D 1 2
R814 100K_0402_5%~D
1 2 BC_DAT_ECE1117 2 2 2 2 2 2 2 2 2 2
2
R817 100K_0402_5%~D
B64
A11
A22
B35
A41
A58
A52
A26
DOCK_PWR_SW#
B3
<22> DOCK_PWR_SW# 1 2 DOCK_PWR_BTN# <38>
1 2 PBAT_SMBDAT U51 1 R825 10K_0402_5%~D
R818 2.2K_0402_5%~D
VBAT
VTR[1]
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]
VTR[8]
1 2 PBAT_SMBCLK C734
R820 2.2K_0402_5%~D 1U_0402_6.3V6K~D
1 2 LPC_LDRQ#_MEC 2
@ R823 100K_0402_5%~D PS/2 INTERFACE MISC INTERFACE
SML1_SMBDATA A5 A10 SYSTEM_ID
<15> SML1_SMBDATA GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA GPIO021/RC_ID1
1 2 CHARGER_SMBDAT SML1_SMBCLK B6 B10 BOARD_ID
<15> SML1_SMBCLK GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK GPIO020/RC_ID2
R827 2.2K_0402_5%~D CLK_TP_SIO A37 B14 DDR_ON
<41> CLK_TP_SIO GPIO110/PS2_CLK2/GPTP-IN6 GPIO025/UART_CLK DDR_ON <46>
1 2 CHARGER_SMBCLK DAT_TP_SIO B40 B44 HOST_DEBUG_TX +RTC_CELL
<41> DAT_TP_SIO GPIO111/PS2_DAT2/GPTP-OUT6 GPIO120/UART_TX HOST_DEBUG_TX <34>
R828 2.2K_0402_5%~D CLK_KBD A38 B46 HOST_DEBUG_RX
<38> CLK_KBD GPIO112/PS2_CLK1A GPIO124/GPTP-OUT5/UART_RX HOST_DEBUG_RX <34>
DAT_KBD B41 B26 RUNPWROK
<38> DAT_KBD RUNPWROK <7,39>
1
CLK_MSE GPIO113/PS2_DAT1A VCC_PRWGD EN_INVPWR
<38> CLK_MSE A39 A25
GPU_SMBDAT DAT_MSE GPIO114/PS2_CLK0A GPIO060/KBRST EN_INVPWR <24> R870
1 2 <38> DAT_MSE B42 B36
R829 2.2K_0402_5%~D PBAT_SMBDAT GPIO115/PS2_DAT0A GPIO101/ECGP_SCLK PCH_SATA_MOD_EN# <14> 100K_0402_5%~D
<44> PBAT_SMBDAT B59 B37
GPU_SMBCLK PBAT_SMBCLK GPIO154/I2C1C_DATA/PS2_CLK1B GPIO103/ECGP_MISO
1 2 <44> PBAT_SMBCLK A56 B38
R822 2.2K_0402_5%~D GPIO155/I2C1C_CLK/PS2_DAT1B GPIO105/ECGP_MOSI DDR_HVREF_RST_GATE
A34
2
GPIO102/HSPI_SCLK DYN_TUR_CURRNT_SET# DDR_HVREF_RST_GATE <7>
A35
EC firmware can configure those un-used SMBUS pins as GPO (Output), GPIO104/HSPI_MISO CPU1.5V_S3_GATE DYN_TUR_CURRNT_SET# <52> LAT_ON_SW#
A36
then it's OK to leave these un-used pins No-Connect. GPIO106/HSPI_MOSI MSDATA CPU1.5V_S3_GATE <11>
JTAG INTERFACE GPIO116/MSDATA
A40 MSDATA <34>
JTAG_TDI A51 B43 MSCLK
GPIO145/I2C1K_DATA/JTAG_TDI GPIO117/MSCLK MSCLK <34>
JTAG_TDO B55 A45 SIO_A20GATE
GPIO146/I2C1K_CLK/JTAG_TDO GPIO127/A20M SIO_A20GATE <18>
JTAG_CLK B56 A55 PS_ID
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK GPIO153/LED3 PS_ID <44>
JTAG_TMS A53 A57
JTAG_RST# GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS GPIO156/LED1
B57 B61
JTAG_RST# GPIO157/LED2 FWP#
B65
nFWP PROCHOT#_EC
A46
PROCHOT#/PWM4
+3.3V_ALW C736 2 1 0.1U_0402_25V6K~D FAN PWM & TACH +1.05V_RUN_VTT
DOCK_POR_RST# H_PROCHOT# <7,51,52>
<38> DOCK_POR_RST# B22
GPIO050/FAN_TACH1 GENERAL PURPOSE I/O
A21 B2 R884 1 2 1K_0402_5%~D VOL_MUTE
GPIO051/FAN_TACH2 GPIO001/ECSPI_CS1 VOL_MUTE <30>
1
10K_0402_5%~D
B23 A2 1 2
GPIO052/FAN_TACH3 GPIO002/ECSPI_CS2
R824
B24 B8 R886 1 2 1K_0402_5%~D VOL_UP @ R1179 10K_0402_5%~D

C GPIO053/PWM0 GPIO014/GPTP-IN7/HSPI_CS1 VOL_UP <30> C
JTAG_RST# citcuit <42,44> PCH_ALW_ON
PCH_ALW_ON A23 B18 R887 1 2 1K_0402_5%~D VOL_DOWN
VOL_DOWN <30>
GPIO054/PWM1 GPIO040/GPTP-OUT3/HSPI_CS2
1
BIA_PWM_EC ME_SUS_PWR_ACK D
close to U51.B57 <24> BIA_PWM_EC B25
GPIO055/PWM2 GPIO015/GPTP-OUT7
A8 ME_SUS_PWR_ACK <16>
A24 B9 1.5V_SUS_PWRGD PROCHOT#_EC 2 @ Q47
1.5V_SUS_PWRGD <46>
2
GPIO056/PWM3 GPIO016/GPTP-IN8 PM_APWROK G SSM3K7002FU_SC70-3~D

A9 PM_APWROK <16>
JTAG_RST# GPIO017/GPTP-OUT8 1.05V_A_PWRGD
A14 1.05V_A_PWRGD <48> 1 2 S
3
GPIO026/GPTP-IN1 ALW_PWRGD_3V_5V @ R812 100K_0402_5%~D
BC-LINK GPIO027/GPTP-OUT1
B15 ALW_PWRGD_3V_5V <45>
100_0402_1%~D
0.1U_0402_25V6K~D
BC_CLK_ECE5048 A43 A17 DEVICE_DET#

<39> BC_CLK_ECE5048 GPIO123/BCM_A_CLK GPIO041 DEVICE_DET# <28>
1
@ 1 BC_DAT_ECE5048 B45 B39 RESET_OUT#

<39> BC_DAT_ECE5048 GPIO122/BCM_A_DAT GPIO107/nRESET_OUT RESET_OUT# <16>
BC_INT#_ECE5048 A42 A44
1
<39> BC_INT#_ECE5048 GPIO121/BCM_A_INT# GPIO125/GPTP-IN5

R836
C735
@SHORT PADS~D
JTAG1 CONN@
BC_CLK_EMC4022 A12 B47 PCH_RSMRST# 1 2

<22> BC_CLK_EMC4022 GPIO022/BCM_B_CLK GPIO126 PCH_RSMRST# <41>
<22> BC_DAT_EMC4022 BC_DAT_EMC4022 B13 A54 AC_PRESENT @ R1180 0_0402_5%~D
2 GPIO023/BCM_B_DAT GPIO151/GPTP-IN4 AC_PRESENT <16>
BC_INT#_EMC4022 A13 B58 SIO_PWRBTN#
<22> BC_INT#_EMC4022 SIO_PWRBTN# <16>
2
GPIO024/BCM_B_INT# GPIO152/GPTP-OUT4
B20
PCH_PCIE_WAKE# GPIO044/BCM_C_CLK
<16> PCH_PCIE_WAKE# A18
PCIE_WAKE# GPIO043/BCM_C_DAT +3.3V_RUN
<28,34,35> PCIE_WAKE# B19
GPIO042/BCM_C_INT# SMBUS INTERFACE
2
BC_CLK_ECE1117 A20 A3 DOCK_SMB_DAT

<41> BC_CLK_ECE1117 GPIO047/LSBCM_D_CLK GPIO003/I2C1A_DATA DOCK_SMB_DAT <38>
<41> BC_DAT_ECE1117 BC_DAT_ECE1117 B21 B4 DOCK_SMB_CLK
DOCK_SMB_CLK <38>
2
GPIO046/LSBCM_D_DAT GPIO004/I2C1A_CLK
1
BC_INT#_ECE1117 A19 A4 LCD_SMBDAT
<41> BC_INT#_ECE1117 GPIO045/LSBCM_D_INT# GPIO005/I2C1B_DATA
BEEP A16 B5 LCD_SMBCLK R799
<29> BEEP GPIO032/GPTP-IN3/BCM_E_CLK GPIO006/I2C1B_CLK
SIO_SLP_S5# B16 B7 BAY_SMBDAT 10K_0402_5%~D
<16> SIO_SLP_S5# GPIO31/GPTP-OUT2/BCM_E_DAT GPIO012/I2C1H_DATA/I2C2D_DATA BAY_SMBDAT <28,44>
ACAV_IN_NB A15 A7 BAY_SMBCLK
<39,52,53> ACAV_IN_NB GPIO30/GPTP-IN2/BCM_E_INT# GPIO013/I2C1H_CLK/I2C2D_CLK BAY_SMBCLK <28,44>
B48 GPU_SMBDAT
2
GPIO130/I2C2A_DATA GPU_SMBCLK RUNPWROK
B49
GPIO131/I2C2A_CLK CHARGER_SMBDAT
HOST INTERFACE GPIO132/I2C1G_DATA
A47 CHARGER_SMBDAT <52>
SIO_EXT_SMI# A6 B50 CHARGER_SMBCLK
<14,17> SIO_EXT_SMI# GPIO011/nSMI GPIO140/I2C1G_CLK CHARGER_SMBCLK <52>
1
SIO_RCIN# CARD_SMBDAT D
A27 B52 CARD_SMBDAT <35>
<18> SIO_RCIN# LPC_LDRQ#_MEC GPIO061/LPCPD# GPIO141/I2C1F_DATA/I2C2B_DATA CARD_SMBCLK ALWON
B29 A49 CARD_SMBCLK <35> <42> RUN_ON_ENABLE# 2
LDRQ# GPIO142/I2C1F_CLK/I2C2B_CLK
Q45
IRQ_SERIRQ A28 B53 USH_SMBDAT G
32 KHz Clock <14,32,39> IRQ_SERIRQ
<17,32,34,35,39> PCH_PLTRST#_EC
PCH_PLTRST#_EC B30
SER_IRQ GPIO143/I2C1E_DATA
A50 USH_SMBCLK
USH_SMBDAT <32>
USH_SMBCLK <32> 1 S
3
CLK_PCI_MEC LRESET# GPIO144/I2C1E_CLK +3.3V_ALW_PCH
<17> CLK_PCI_MEC A29
LPC_LFRAME# PCI_CLK C1208
<14,32,34,39> LPC_LFRAME# B31
C741 LPC_LAD0 LFRAME# 0.1U_0402_25V6K~D
<14,32,34,39> LPC_LAD0 A30
LAD0 DELL PWR SW INF
1 2 LPC_LAD1 B32 A59 2 AC_PRESENT 2 1
<14,32,34,39> LPC_LAD1 LAD1 BGPO0
LPC_LAD2 A31 B63 LAT_ON_SW# R835 10K_0402_5%~D
<14,32,34,39> LPC_LAD2 LAD2 VCI_IN2#
22P_0402_50V8J~D LPC_LAD3 B33 A60 ALWON
<14,32,34,39> LPC_LAD3 LAD3 VCI_OUT ALWON <45>
MEC_XTAL2 CLKRUN# A32 A63 VCI_IN1# +3.3V_ALW
<16,32,39> CLKRUN# CLKRUN# VCI_IN1#
SIO_EXT_SCI# A33 B67 POWER_SW_IN#
<18> SIO_EXT_SCI# GPIO100/nEC_SCI VCI_IN0#
2
B1 ACAV_IN LCD_SMBCLK 2 1
VCI_OVRD_IN ACAV_IN <22,52,53> +1.05V_RUN_VTT
Y6 A1 DOCK_PWR_SW# R863 close to R418 2.2K_0402_5%~D
VCI_IN3# U51& least 250mils LCD_SMBDAT
32.768KHZ_12.5PF_Q13FC1350000~D MASTER CLOCK 2 1
MEC_XTAL1 A61 PECI B51 +PECI_VREF 1 2 R420 2.2K_0402_5%~D
1
MEC_XTAL1 MEC_XTAL2 2 MEC_XTAL2_R XTAL1 PECI_VREF PECI_EC_R @ R862 0_0402_5%~D DOCK_SMB_DAT

1 A62 A48 1 2 PECI_EC <7> 2 1
B @ R1068 XTAL2 PECI B
<39> EC_32KHZ_ECE5048 1 20_0402_5%~D B62 DB Version 0.12 R863 43_0402_5%~D 1 R838 2.2K_0402_5%~D
C743 @ R867 0_0402_5%~D GPIO160/32KHZ_OUT DOCK_SMB_CLK
I2S I2S_DAT
B17 2 1
1 2 B27 R1656 1 2 100K_0402_5%~D C737 R841 2.2K_0402_5%~D
VSS_RO
VR_CAP
I2S_CLK 0.1U_0402_25V6K~D
B34 B28 R1657 1 2 100K_0402_5%~D
VSS[1]
VSS[4]
NC1 I2S_WS
AGND
22P_0402_50V8J~D A64 2 BAY_SMBDAT 2 1

NC2 R854 2.2K_0402_5%~D
EP
B68
NC3 BAY_SMBCLK 2 1
MEC5055-LZY_DQFN132_11X11~D R856 2.2K_0402_5%~D
B66
B11
B60
+VR_CAP B12
B54
C1 DYN_TUR_CURRNT_SET# 2 1
GPIO024/THSEL_STRAP note R1171 100K_0402_5%~D
15mil least i.THSEL_STRAP =1 (selects thermistor on diode channel 1) DEVICE_DET# 2 1
15mil ii.THSEL_STRAP = 0 (selects remote diode on diode channel 1) R1125 100K_0402_5%~D
+3.3V_ALW
+RTC_CELL +5V_RUN
1
CLK_KBD 2 1
10K_0402_5%~D
49.9_0402_1%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
C740 R845 4.7K_0402_5%~D

1
1
1
+3.3V_ALW 4.7U_0603_6.3V6K~D DAT_KBD 2 1

2
R864
R858
R860
R859
R861
C739 close to U51.B12 VCI_IN1# 2 1 R846 4.7K_0402_5%~D

R1156 100K_0402_5%~D CLK_MSE 2 1
R851 4.7K_0402_5%~D
1
1
1
1
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
100K_0402_5%~D
@ R850
CONN@ DAT_MSE 2 1
2
2
2
R848
R849
R847
JDEG2 1 2 MSDATA R852 4.7K_0402_5%~D

1 R869 10K_0402_5%~D
1 JTAG_TDI
2
2 2 JTAG_TMS
3
2
2
2
3 JTAG_CLK
4
4 4 JTAG_TDO +3.3V_ALW +3.3V_RUN
5
5 MSCLK DDR_ON
6 1 2
6 6 MSDATA R876 100K_0402_5%~D VOL_MUTE
7 2 1
7 HOST_DEB_TX HOST_DEBUG_TX +3.3V_M @ R1169 100K_0402_5%~D
8 1 2
1
8 8 @ R853 1
9 HOST_DEB_RX 2 0_0402_5%~D HOST_DEBUG_RX VOL_DOWN 2 1
9 @ R855 0_0402_5%~D PCH_ALW_ON @ R1197 100K_0402_5%~D
10 1 2
10 10
1
R872 R880 100K_0402_5%~D VOL_UP 2 1

11 10K_0402_5%~D 1 2 DOCK_POR_RST# @ R1118 100K_0402_5%~D
G1 R893 R881 100K_0402_5%~D
12
2
G2 +3.3V_ALW 100K_0402_5%~D EN_INVPWR
13 1 2
G3 FWP# R882 100K_0402_5%~D
14
2
G4 +3.3V_ALW
R875 C744 REV PCH_PWRGD# <22> 1 2 1.05V_0.8V_PWROK
ACES_87153-10411 R883 10K_0402_5%~D
2
1
240K 4700p X00

1
R871 D @ R879 1 2 RESET_OUT#

A R875 1K_0402_5%~D RESET_OUT# 2 Q50 10K_0402_5%~D @ R843 8.2K_0402_5%~D A
Place closely pin A29 130K 4700p X01 33K_0402_5%~D G SSM3K7002FU_SC70-3~D 1 2 CPU1.5V_S3_GATE
R889 100K_0402_5%~D
62K 4700p X02 S
3
1
2
CLK_PCI_MEC 1 2 PCH_RSMRST#
2
BOARD_ID SYSTEM_ID R892 10K_0402_5%~D

* 33K 4700p A00
1
4700P_0402_25V7K~D
@ R885
10_0402_5%~D 8.2K 4700p
4.3K 4700p
1
C744
1
C742
4700P_0402_25V7K~D
2
1
2K 4700p 2 2
CHIPSET_ID for BID Compal Electronics, Inc.
@ C747
8.2P_0402_50V8D~D
2
1K 4700p function PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, MEC5055
WWW.AliSaler.Com
BOARD_ID rise time is measured from 5%~68%. LA-7781
5 4 3 2 1
5 4 3 2 1
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+3.3V_TP
TP_CLK
+3.3V_TP
Pin reverse for PT BlueTooth +3.3V_RUN
Touch Pad
4.7K_0402_5%~D
4.7K_0402_5%~D
TP_DATA
1
R903
R902
0.1U_0402_25V6K~D
1
2
C755
D37
Touch Pad Conn. Pitch=0.5mm 1
C748
0.1U_0402_25V6K~D
2
2
L54 2 1 BLM18AG601SN1D_0603~D TP_DATA
<40> DAT_TP_SIO 2
JTP1 CONN@
L55 2 1 BLM18AG601SN1D_0603~D TP_CLK 1 JBT1
D <40> CLK_TP_SIO TP_CLK 1 D
2 2 1
1
10P_0402_50V8J~D
10P_0402_50V8J~D
10P_0402_50V8J~D
10P_0402_50V8J~D
1 1 TP_DATA 3 2
1
3 <17> BT_DET# 2
C752
1 1 4 4 <34> COEX1_BT_ACTIVE 3
3
C751
5 BT_COEX_STATUS2 4
Place close to JTP1 +3.3V_TP 5 <32> BT_COEX_STATUS2 4
C750
C749
PS2_DAT_TS 6 9 BT_PRI_STATUS 5
2 2 PS2_CLK_TS 6 G1 <32> BT_PRI_STATUS 5
7 7 G2
10 6
2 2 <43> BT_ACTIVE 6
8 8 <39> BT_RADIO_DIS# 7 7
<34> COEX2_WLAN_ACTIVE 8 8
TYCO_2041070-8 9
CONN@ 9
10
10
<17> USBP11- 11
11
<17> USBP11+ 12
12
13
G1
14
G2
E&T_3703-E12N-03R
100P_0402_50V8J~D
+3.3V_ALW +3.3V_RUN +3.3V_TP
33P_0402_50V8J~D
10K_0402_5%~D
1
@ C754
1 1
C753
R904
1 2
@R1161
@ R1161 0_0603_5%~D 2 2
2
1 2
@ R1162 0_0603_5%~D
+3.3V_RUN 1 2 BT_COEX_STATUS2
R1133 1K_0402_5%~D
C RSMRST circuit R1134
1 2 BT_PRI_STATUS
1K_0402_5%~D C
+3.3V_ALW_PCH
+5V_ALW_PCH +3.3V_ALW
Power Switch for debug

1
@R1623
@ R1623 1 2
R1622 0_0402_5%~D C288 0.1U_0402_25V6K~D
R1629 100K_0402_5%~D 1 2 PCH_RSMRST#_Q
33_0402_5%~D EC SIDE
U4
5
U7 @ R1655
2
PCH_RSMRST# 1 0_0402_5%~D
P
<40> PCH_RSMRST# B
1 4 1 2 PCH_RSMRST#_Q <14,16> 1 2
VCC O <30,40> POWER_SW#_MB 1 2
0.01U_0402_16V7K~D
3 RSMRST# 2
RESET# A
G
1 2 1
GND TC7SH08FU_SSOP5~D
1
3
C289
CE14 @ C759
RT9818A-44GU3_SC70-3~D 100P_0402_50V8J~D 100P_0402_50V8J~D @ PWRSW1
2 2 @SHORT PADS~D
2
Place on Bottom
@ LVDS cable
Part Number Description @LED Board FFC @ MDC wire set cable
Part Number Description Part Number Description
DC02001DV00 H-CONN SET 0LD MB-LCD-CAM-LED 1CH TEFLON
B Change KB connector to same as JSC1 NBX00010100 FFC 6P H P1.0 PAD=0.65 63MM MB-LED/B 0LD DC30100BL0L CONN SET 0FD B
MDC-RJ11
@MEDIA Board FFC
KB Conn. Pitch=1.0mm @ RTC BATT Part Number Description
@ T/P FFC
Part Number Description Part Number Description
NBX00010200 FFC 8P G P0.5 PAD.3 67MM MB-VOLUME/B 0LD
JKB1 BATT CR2032 3V FFC 8P F P0.5
GC20323MX00 NBX0000RR0L PAD=0.3 136MM
KB_DET# 1 220MAH MAXELL @ LVDS cable
<18> KB_DET# PS2_CLK_TS 1 MB-TP/B 0FD
2 Part Number Description
PS2_DAT_TS 2 @KB FFC
3
3
+3.3V_ALW 4 Part Number Description
4 @ FAN DC02XXXXXXX H-CONN SET 0FD MB-LCD CAM LED 2CHANNEL
+5V_RUN 5
5 FFC 8P G P1.0 PAD=0.65 134MM MB-KB 0FD
6 Part Number Description NBX0000RQ0L
<40> BC_INT#_ECE1117 6 @ UMA DC_IN wire cable
<40> BC_DAT_ECE1117 7
7
8 DC28A000800 FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA Part Number Description
8 @BT wire cable
<40> BC_CLK_ECE1117 9
9
10 DC30100BN0 CONN SET 0FD DCJACK-MB WDMD-DCE30004-DF Part Number Description
10
11 @ Speak @ Battery bridge cable DC02001510L H-CONN SET 0FH MB-BT
GND
12 Part Number Description Part Number Description
+3.3V_ALW +5V_RUN GND
FCI_10089709-010010LF~D PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG DC020014Z10 H-CONN SET 0FD M/B-BATTERY 9PIN
CONN@
1 1
C756 C758
0.1U_0402_25V6K~D 0.1U_0402_25V6K~D
2 2
A A
Place close to JKB1
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, TP/KB/BT/FAN/RESET
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LA-7781
5 4 3 2 1
5 4 3 2 1
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+3.3V_ALW_PCH Source
+3.3V_ALW2
+PWR_SRC_S +3.3V_ALW Q49 +3.3V_ALW_PCH
DC/DC Interface
+PWR_SRC_S
+1.5V_RUN Source
+1.5V_MEM Q59
AO4304L_SO8 +1.5V_RUN
+3.3V_ALW2 8 1
D
6 7 2
S
1
10U_0603_6.3V6M~D
5 4 6 3
1
10U_0603_6.3V6M~D
2 R920 5 1
C769
R907 R905 1 1 470K_0402_5%~D R921
1
C760
100K_0402_5%~D 100K_0402_5%~D R908 20K_0402_5%~D
4
20K_0402_5%~D R909
2
ALW_ENABLE 100K_0402_5%~D 2
2
2 1.5V_RUN_ENABLE
2
3
D D
3
1M_0402_5%~D
1
1
Q51B
2.2M_0402_5%
1 1
R1619
Q52B
R1610
ALW_ON_3.3V# 5
<20> ALW_ON_3.3V# C762 RUN_ON_ENABLE# C771
<40> RUN_ON_ENABLE# 5
6
3300P_0402_50V7K~D 470P_0402_50V7K~D
4
2 2
Q51A
2
6
<40,44> PCH_ALW_ON 2 <11,16,27,35,39,47> SIO_SLP_S3# 1 2
Q52A
R735
@R735
@ 0_0402_5%~D
1 <27,35,39,47> RUN_ON 1 2 2
@R744
@ R744 0_0402_5%~D
1
+1.05V_RUN Source
+3.3V_SUS Source +PWR_SRC_S
+3.3V_ALW Q54 +PWR_SRC_S +1.05V_M Q63
SI3456DDV-T1-GE3_TSOP6~D +3.3V_SUS SI4164DY-T1-GE3_SO8~D +1.05V_RUN
1
8 1
1
R911 6 7 2
10U_0603_6.3V6M~D
+3.3V_ALW2 470K_0402_5%~D 5 4 R930 6 3
1
10U_0603_6.3V6M~D
2 330K_0402_5%~D 5 1
C772
1 1 R931
C765
R914 20K_0402_5%~D
4
1
20K_0402_5%~D 1.05V_RUN_ENABLE
3
R915 SUS_ENABLE 2
2
100K_0402_5%~D 2
2
3
1
D
100P_0402_50V8J~D
1
4.7M_0402_5%~D
1M_0402_5%~D
Q64
2
2
1
Q53B
R1611
G 1
R1618
SUS_ON_3.3V# 5 S
3
1
C773
C C767 C
6
1 2 220P_0402_50V8J~D
<39> SUS_ON
4
2
@ R1607 0_0402_5%~D 2
2
Q53A
1 2 2 DMN66D0LDW-7_SOT363-6~D
<16,39,46> SIO_SLP_S4#
@ R1608 0_0402_5%~D
1
+3.3V_M Source +5V_RUN Source

+3.3V_ALW Q58 +3.3V_M
+PWR_SRC_S SI3456DDV-T1-GE3_TSOP6~D +3.3V_M +PWR_SRC_S +5V_ALW Q55
+3.3V_ALW2 DMN3030LSS +5V_RUN
D
1
6 8 1
S
1
1
5 4 R916 7 2
10U_0805_10V4Z~D
10U_0603_6.3V6M~D
R917 2 39_0603_5%~D R906 6 3
1
1
1
470K_0402_5%~D 1 1
C768 470K_0402_5%~D 5 1
R918 @ R919 R910
G
C761
100K_0402_5%~D 20K_0402_5%~D 20K_0402_5%~D
+3.3V_M_CHG
2
4
A_ENABLE 5V_RUN_ENABLE
2 2
2
2
2
3
1
D
4.7M_0402_5%~D
220P_0402_50V8J~D
220P_0402_25V8J
Q57B
Q62
A_ON_3.3V# 5 2 1
1
R1617
1
6
D
C770
C763
S
4
3
Q60
Q57A A_ON_3.3V# 2
2
B DMN66D0LDW-7_SOT363-6~D G 2 B
2
SIO_SLP_A# 2 S
<16,39,48> SIO_SLP_A#
3
1
+3.3V_RUN Source
Discharg Circuit +PWR_SRC_S
+3.3V_ALW Q61
DMN3030LSS
+3.3V_RUN
+3.3V_SUS +3.3V_ALW_PCH +5V_RUN +1.5V_RUN +3.3V_RUN +1.05V_RUN +1.5V_CPU_VDDQ +0.75V_DDR_VTT 8 1
10U_0805_6.3V6M~D
7 2
1
6 3 1
1
1
1
1
C764
R912 5 R913
@
@ R922 @ R928 @ R923 @ R924 R929 @R925

@ R925 R926 470K_0402_5%~D 20K_0402_5%~D
1K_0402_5%~D 1K_0402_5%~D 1K_0402_5%~D 1K_0402_5%~D 39_0603_5%~D 39_0402_5%~D 220_0402_5%~D R927
4
22_0603_5%~D 2
2
2
2
2
2
3.3V_RUN_ENABLE
+3.3V_ALWPCH_CHG
+5V_RUN_CHG
+1.5V_RUN_CHG
+3.3V_RUN_CHG
+1.05V_RUN_CHG
+1.5V_CPU_VDDQ_CHG
+3.3V_SUS_CHG
+DDR_CHG
1M_0402_5%~D
220P_0402_25V8J
@
1
D
1
Q56
R1627
2
C766
G
S
3
<7,11> RUN_ON_CPU1.5VS3# 2
2
1
1
1
1
D D D D D
@ Q68
@ Q69
@ Q67
@ Q70
1
D D
@ Q65
@ Q66
Q72
RUN_ON_ENABLE# 2 2 2 2 2
1
SUS_ON_3.3V# ALW_ON_3.3V# 2 G G G G D G
2
Q71
G G S S S S 2 S
3
3
3
3
A G A
S S
3
S
3
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, POWER CONTROL
WWW.AliSaler.Com
LA-7781
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com +3.3V_ALW
HDD LED solution for White LED
Q83B
Battery LED
+5V_ALW DMN66D0LDW-7_SOT363-6~D
1
4 3 BAT2_LED#_Q 1 2 BATT_WHITE <30>
<39> BAT2_LED#
R932 R949 1K_0402_5%~D
10K_0402_5%~D
BATT_YELLOW <30>
5
3
Q74B MASK_BASE_LEDS#
2
DMN66D0LDW-7_SOT363-6~D Q74A
D59 DMN66D0LDW-7_SOT363-6~D
<14> SATA_ACT# 4 3 1 2 1 6 2
D D
RB751S40T1_SOD523-2~D Q75
PDTA114EU_SC70-3~D 1 2 BATT_WHITE_LED <24>
2
R958 620_0402_5%
<39> MASK_SATA_LED#
1
BATT_YELLOW_LED <24>
D62 1 2
MASK_BASE_LEDS# R934 2.2K_0402_5%~D SATA_LED <30>
<39> LED_SATA_DIAG_OUT# 1 2
RB751S40T1_SOD523-2~D
Q83A R951
DMN66D0LDW-7_SOT363-6~D 330_0402_5%~D
PANEL_HDD_LED 1 6 BAT1_LED#_Q 1 2
PANEL_HDD_LED <24> <39> BAT1_LED#
2
3
MASK_BASE_LEDS#
Q84B
4 3 2 R953
330_0402_5%~D
Q81 1 2
PDTA114EU_SC70-3~D
1
1 2
SYS_LED_MASK# R938 2.2K_0402_5%~D
Breath LED
+5V_ALW
+3.3V_ALW
WLAN LED solution for White LED
Q84A LED1
DMN66D0LDW-7_SOT363-6~D LTW-193ZDS5_WHITE~D
1 6 BREATH_LED#_Q 1 2 BREATH_WHITE_LED_SNIFF 1 2
+5V_ALW <38,39> BREATH_LED#
R957 220_0402_5%~D
1
C C
R937
2
100K_0402_5%~D
Place LED1 close to SW1
3
MASK_BASE_LEDS#
Q78A
2
<34,39> WIRELESS_LED# 1 6 2
Q79 1 2 BREATH_WHITE_LED <24>

PDTA114EU_SC70-3~D R955 2.2K_0402_5%~D
2
MASK_BASE_LEDS#
1
3
Q78B
<41> BT_ACTIVE 5
4
1 2
WLAN_LED <30>
1
R939 1.8K_0402_5%~D
R950
100K_0402_5%~D
2
B B
+3.3V_ALW
C778 0.1U_0402_25V6K~D
EMI CLIP
1 2 CLIP1
5 EMI_CLIP
U58 1
LED Circuit Control Table SYS_LED_MASK# 1
GND
Fiducial Mark
P
<39> SYS_LED_MASK# B
4 MASK_BASE_LEDS#
@ FD1 LID_CL# O CLIP2
SYS_LED_MASK# LID_CL# <30,39> LID_CL# 2
A
G
1 EMI_CLIP
+PWR_SRC +5V_ALW TC7SH08FU_SSOP5~D
3
FIDUCIAL MARK~D 1
GND
A
@ FD2
Mask All LEDs (Sniffer Function) 0 X C1217
1 2
0.1U_0402_25V6K~D
A
1 Mask Base MB LEDs (Lid Closed) 1 0

FIDUCIAL MARK~D
Do not Mask LEDs (Lid Opened) 1 1
@ FD3
1
FIDUCIAL MARK~D
@ FD4 @ H1 @ H2 @ H3 @ H4 @ H5 @ H6 @ H8 @ H9 @ H10 @ H12 @ H13 @ H14 @ H15 @ H16 @ H19 @ H20 @ H17 @ H24 @ H25
1 H_3P3 H_3P3 H_3P0 H_3P3 H_3P0 H_3P0 H_3P2 H_3P0 H_3P3 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0x2P0 H_2P0N H_3P0 H_2P8 H_2P8 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
FIDUCIAL MARK~D BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PAD and Standoff
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1
1
1
1
1
1
1

LA-7781
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com ESD Diodes +COINCELL
COIN RTC Battery
1
@ @
PD1 PD2 PR1
PESD24VS2UT_SOT23-3~D PESD24VS2UT_SOT23-3~D PL1 +3.3V_ALW 1K_0402_5%~D
FBMJ4516HS720NT_2P~D +3.3V_RTC_LDO
1 2
2
Media Bay Battery Connector
3
JRTC1
Z4012
1
@ PJP1 +COINCELL 1 3
100K_0402_5%~D
MBATT+_C 1 G
2 1 MPBATT+ 2 4
MBATT1 PR3 2 G
PR2
0.1U_0603_25V7K~D
1
D D
1 100_0402_5%~D PR4 PAD-OPEN 1x2m TYCO_2-1775293-2~D
1
2
Z5304
PC1
2 1 2 100_0402_5%~D PR5
BAY_SMBCLK <29,41>
2
2 Z5305 100_0402_5%~D +RTC_CELL
3 1 2 BAY_SMBDAT <29,41>
2
3 Z5306
4 1 2 MODULE_BATT_PRES# <40,57>
2200P_0402_50V7K~D
4
5
5
6
6
1
PC2
PD4
1
7
GND RB715FGT106_UMD3
8 1
2
GND PC3
1U_0603_10V4Z~D
SUYIN_150010GR006M500ZR
2
ESD Diodes
GND PL2
FBMJ4516HS720NT_2P~D
1
@ @ 1 2
PD5 PD6
PESD24VS2UT_SOT23-3~D PESD24VS2UT_SOT23-3~D PL3 +3.3V_ALW
1 2
Primary Battery Connector
2
1
@ PJP2
100K_0402_5%~D
PBATT+_C 1 2 PBATT+
PR6
11
0.1U_0603_25V7K~D
GND
1
10 PAD-OPEN 1x3m
GND PR7
PC4
9
2
9 100_0402_5%~D PR9
8
2
8 Z4304 100_0402_5%~D PR8
7 1 2 PBAT_SMBCLK <41>
2200P_0402_50V7K~D
7 Z4305 100_0402_5%~D
6 1 2 PBAT_SMBDAT <41>
6 Z4306
5 1 2 PBAT_PRES# <40,57>
5
1
PC5
4
4
3
3
2
2
2
C 1 C
1
PBATT1
SUYIN_200275MR009G50PZR
GND
+5V_ALW
DA204U_SOT323~D
+3.3V_ALW
2
PD7
GND
@ PR11 PU1
2.2K_0402_5%~D
2
1 2 @ <39> DOCK_PSID 1 6 GPIO_PSID_SELECT <40>
0_0402_5%~D NO IN
PR12
1
2 5 +5V_ALW
PL4 PR13 GND V+
1
BLM18BD102SN1D_0603~D 33_0402_5%~D
NB_PSID NB_PSID_TS5A63157
D
S
2 1 1 3 1 2 3 4 PS_ID <41>
NC COM
PQ2 TS5A63157DCKR_SC70-6~D
100K_0402_1%~D
2
FDV301N_G_NL_SOT23-3~D
G
2
+5V_ALW
PR14
10K_0402_1%~D
1
1
B B
C
PQ3
PR15
2
B MMST3904-7-F_SOT323~D
E
15K_0402_1%~D
3
2
2
PR16
PR17
1 2
PSID_DISABLE# <40>
1
@ 10K_0402_5%~D
DC_IN+ Source +PWR_SRC_S

+PWR_SRC
3 1
+DC_IN +DC_IN_SS
100K_0402_1%
0.1U_0603_25V7K
0.22U_0603_25V7K
1
PQ5
1
PC8
PC9
FDS6679AZ_G_SO8~D
PR19
1 8
PL5 S D
2 7
2
FBMJ4516HS720NT_2P~D S D
3 6
2
+DC_IN S D PQ4
1 2 4 5
G D PR21 TP0610K-T1-GE3_SOT23-3
1
22K_0402_1%
1M_0402_5%~D
VZ0603M260APT_0603
2
0.022U_0805_50V7K~D
@ PR27 1 2 VSB_N_001
10U_0805_25V6K
100K_0402_5%~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1
1
1
1
PC10
PR20
0_0402_5%~D
1VSB_N_003
1
PD13
1 <39> PCH_ALW_ON 1 2
1
PC11
PC12
PC14
PR22
PC15
2
2
2
2
0.1U_0603_25V7K~D
1
PR24
4.7K_0805_5%~D
2
1
PS_HPW15003-05M101R @ 1 2 @ PR25
2
SOFT_START_GC <57>
0.1U_0603_25V7K~D
1
0_0402_5% D
PC13
5
2
5 PQ6
4 -DCIN_JACK 10K_0402_5%~D 2VSB_N_002
@ PR23
+3.3V_ALW 1 2
4
1
2 SSM3K7002FU_SC70-3
PC16
3 G
1M_0402_5%~D
2
3
2 +DCIN_JACK .1U_0402_16V7K S
2
3
2
1
PR26
PC17
A 1 A
1 @
PJPDC1
2
PL6
1 2
0.1U_0603_25V7K~D
1

PC18
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D +DCIN
WWW.AliSaler.Com
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Size Document Number Rev
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1.0
LA-7781
5 4 3 2 1
A B C D E
WWW.AliSaler.Com
2VREF_6182
1
PC101
1U_0603_16V6K
2
1 1
@ PC120 @PC121
@ PC121
2 1 2 1
22P_0402_50V8J~D 22P_0402_50V8J~D
@
PJP100 PR101 PR102
1 2 13K_0402_1% 30.9K_0402_1%
1 2 1 2
PAD-OPEN 1x3m
+PWR_SRC +DC1_PWR_SRC PR103 PR104

20K_0402_1% 20K_0402_1% +DC1_PWR_SRC
FB_3V FB_5V 1
PL100 +3.3V_RTC_LDO 1 2 2
1UH_PCMB053T-1R0MS_7A_20%
2 1
+3.3V_ALW2
@PR100
@ PR100 PR105 PR106
2200P_0402_50V7K
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
0_0402_5%~D 169K_0402_1%~N 90.9K_0402_1%

1
1
1
10U_0805_25V6K
10U_0805_25V6K
PC119
PC103
0.1U_0402_25V6
1 2 1 2 ENTRIP2 ENTRIP1
1 2
1
PC100
PC106
PC118
PC102
PC105
PC104
PQ100
2
2
2
1
FDMC8884_POWER33-8-5 PU100
2
2
5
@ @
ENTRIP2
FB2
TONSEL
FB1
ENTRIP1
REF
1
PC107 PQ101
4 10U_0805_6.3V6M 25 FDMC8884_POWER33-8-5
P PAD
2
7 24 4
2 VO2 VO1 2
1
2
3
PC108 8 23 PC109
0.22U_0603_16V7K VREG3 PGOOD 0.22U_0603_16V7K
PR107 PR108
1 2 BST1_3V 1 2 BST_3V 9 22 BST_5V 1 2 BST1_5V 1 2
3
2
1
BOOT2 BOOT1
2.2_0603_5% 2.2_0603_5%
PL101 UG_3V 10 21 UG_5V PL102
2.2UH_ETQP3W2R2WFN_8.5A_20% UGATE2 UGATE1 3.3UH_ETQP3W3R3WFN_7A_20%
+3.3V_ALWP 2 1 LX_3V 11
PHASE2 PHASE1
20 LX_5V 1 2
+5V_ALWP
5
1
1
4.7_1206_5%
4.7_1206_5%
LG_3V 12 19 LG_5V
LGATE2 LGATE1
PR109
PR110
220U_6.3V_M
PQ102
SKIPSEL
220U_6.3V_M
FDMC8878_POWER33-8-5
VREG5
1
1
GND
1
VIN
PC110
NC
EN
2
1
PC111
PC123 4 4 +
0.1U_0603_25V7K
SNUB_3V
SNUB_5V
13
15
2
14
16
17
18
2 PQ103 PC122
2
RT8205LZQW(2) WQFN 24P PWM FDMC7692S_POWER33-8-5 2 0.1U_0603_25V7K
680P_0603_50V7K
1
2
3
3
2
1
680P_0603_50V7K
+5V_ALW2
PC112
1
PC113
1
2
2
1
1
300K_0402_1%
1U_0603_10V6K
1
+3.3V_ALW
PC115
PC114
3.3VALWP PR111 4.7U_0805_10V6K
2
TDC 5.72A
2
Peak Current 8.17A
@ PD100 @ PR113
MMSZ5229BS_SOD323~D 499K_0402_1%~D @ 2
@ +DC1_PWR_SRC PR112
100K_0402_1%
1
1 2 2 1
3 OCP current 9.8A +PWR_SRC 3
1
PC116
FSW:375KHz 2VREF_6182
2
0.1U_0603_25V7K
ALW_PWRGD_3V_5V <41>
ENTRIP2
ENTRIP1
5VALWP
TDC 4.88A
Peak Current 6.98A
6
3
PQ104B PQ104A OCP current 8.38A

DMN66D0LDW-7 2N_SOT363-6~D 5 2 DMN66D0LDW-7 2N_SOT363-6~D FSW:300KHz
1
4
PJP101
1 2
PR114 PAD-OPEN 1x3m

100K_0402_1% PJP102
1 2 1 2
+5V_ALW2 +5V_ALWP +5V_ALW
1
PAD-OPEN 1x3m
PR115 PQ105 PJP103
2K_0402_1%~D PDTC115EU_SOT323-3 1 2 +3.3V_ALW
+3.3V_ALWP
<41> ALWON 1 2 2
PAD-OPEN 1x3m
@ PR116 PJP104
4 0_0402_5%~D 4
1 2
3
23 THERM_STP# 1 2
PAD-OPEN 1x3m
1U_0603_10V6K
1
PC117

Title
2
@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +5V_ALW/3.3V_ALW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
WWW.AliSaler.Com
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-7781
A B C D E
5 4 3 2 1
WWW.AliSaler.Com 1.5Volt +/- 5%

TDC 7.17A
Peak Current 10.25A 0.75Volt +/- 5%
OCP current 12.3A TDC 0.525A
Peak Current 0.75A
+PWR_SRC PJP200 OCP Current 0.9A
D 2 1 1.5V_B+ D
PJP204
PR200
PAD-OPEN 1x2m~D 1 2 BOOT_1.5V VLDOIN_1.5V 2 1 +1.5V_MEN_P
2.2_0603_5%~D
PAD-OPEN1x1m
DH_1.5V +0.75V_P
2200P_0402_50V7K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
0.1U_0402_25V6K~D
0.22U_0603_16V7K~D
2
SIR472DP-T1-GE3_POWERPAK8-5~D
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
1
1
SW _1.5V
PC204
PC200
PC201
PC202
PC203
1
2
1
DL_1.5V
PC205
PC206
16
17
18
19
20
PU200
VLDOIN
PHASE
UGATE
BOOT
VTT
2
PQ200
PAD 21
4 15 1
+1.5V_MEN_P LGATE VTTGND
PR201 14 2
PL200 5.62K_0402_1% PGND VTTSNS +V_DDR_REF
1
2
3
1UH 20% FDUE1040D-H-1R0M=P3_21.3A_20%~D 1 2 CS_1.5V
1 2 13 CS GND 3
PC207 RT8207MZQW _W QFN20_3X3
5
1U_0603_10V6K~D
PC209
390U_2.5V_M
680P_0603_50V7K
330U_SX_2VY~D
SIR466DP-T1-GE3_POWERPAK8-5
PR202 12 4 +V_DDR_REF
VDDP VTTREF
1
1 1 5.1_0603_5%~D
+ + +1.5V_MEN_P
PQ201
VDD_1.5V VDDQ_1.5V
@ PC214
PC208
C 1 2 11 5 C
+5V_ALW
2
VDD VDDQ
PGOOD
4
PC210
1SNUB_1.5V
TON
2 2 PC211
FB sense trace
FB
S5
S3
1U_0603_10V6K~D 0.033U_0402_16V7~D
when FB pull down to GND
10
6
1
2
3
+5V_ALW
+3.3V_ALW
4.7_1206_5%
PR203
@ PR207
1
0_0402_5%~D
PR204 1.5V_FB 2 1
2
100K_0402_1%~D
@ PC215
2
22P_0402_50V8J~D
<41> 1.5V_SUS_PW RGD 1.5V_SUS_PW RGD 2 1
PR205
1M_0402_1%~D
@ PR206 1.5V_B+ 1 2
0_0402_5%~D
1 2 S5_1.5V
<41> DDR_ON
2
@ PR210
1
0_0402_5%~D PR209
1 2 @ PR208 0_0402_5%~D PC213
<41> SIO_SLP_S4#
0_0402_5%~D @ 0.1U_0402_16V7K~D
2
<41> 0.75V_DDR_VTT_ON 1 2
1
1
B @ PC212 B
0.1U_0402_16V7K~D
2
Mode S3 S5 +1.5V_MEN +V_DDR_REF +0.75V_P

S5 L L off off off
S3 L H on on off(Hi-Z)
+1.5V_MEN_P
S0 H H on on on PJP203
+0.75V_P 2 1 +0.75V_DDR_VTT
PAD-OPEN1x1m FB sense trace
PJP201
2 2 1 1
JUMP_1x3m
PJP202
+1.5V_MEN_P 2 2 1 1 +1.5V_MEM
JUMP_1x3m
A A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +1.5V_MEN/+0.75V_DDR_VTT
5 4 WWW.AliSaler.Com
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3 2
Date: Friday, February 24, 2012
LA-7781
Sheet
1
46 of 61
A B C D
WWW.AliSaler.Com PR300
1.8Volt +/-5%
2 1 +3.3V_RUN
TDC 0.65A
10K_0402_5%~D
Peak Current 0.93A
1
1.8V_RUN_PWRGD <40> OCP current 1.12A 1
PU300 PL301
4
PJP301 1UH_NRS4018T1R0NDGJ_3.2A_20%
+3.3V_ALW 2 1 1.8VSP_VIN 10 2 1.8VSP_LX 1 2
PG
PVIN LX +1.8V_RUNP
22P_0402_50V8J
PAD-OPEN 1x2m~D 9 3
PVIN LX
1
1
1
PC301
PC300 PC307 8 SVIN
4.7_0805_5%~D
PR301
22U_0805_6.3VAM 0.1U_0603_25V7K~D PR302
6 1.8VSP_FB 20K_0402_1%
2
FB
22U_0805_6.3VAM
22U_0805_6.3VAM
47P_0402_50V8J~D
5
2
EN
PC306
NC
NC
TP
PC302
PC303
11
2
SNUB_1.8VSP
1 2 EN_1.8VSP
<11,28,38,40,43> RUN_ON
1
1
0.1U_0402_10V7K
@ PR303 0_0402_5%
PC304
SYN470DBC_DFN10_3X3 PR305
1
@ PR306 @ PR304 10K_0402_1%
0_0402_5%~D 47K_0402_5%
2
2 2
1 2 @
<11,28,38,40,43> SIO_SLP_S3#
680P_0603_50V7K
PC305
2
<Vo=1.8V> VFB=0.6V
Vo=VFB*(1+PR64/PR67)=0.6*(1+20K/10K)=1.8V
PJP300
2 1
+1.8V_RUNP +1.8V_RUN
PAD-OPEN 1x2m~D
3 3
4
DELL CONFIDENTIAL/PROPRIETARY 4

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +1.8V_RUN
A B C D
WWW.AliSaler.Com
5 4 3 2 1
WWW.AliSaler.Com +V1.05SP_B+
PJP400
2 1
+PWR_SRC
PAD-OPEN 1x2m~D
2200P_0402_50V7K
4.7U_0805_25V6K
4.7U_0805_25V6K
0.1U_0402_25V6
1
1
D D
PC402
5
+3.3V_ALW
PC401
PC403
PC400
2
2
100K_0402_1%~D
1
PR400
4
PR401 PC404
2.2_0603_5% 0.1U_0603_25V7K
1 2 1 2 PQ400
2
3
2
1
<41> 1.05V_A_PWRGD PU400
PR402 1 10 BST_+V1.05SP
110K_0402_1% PGOOD VBST
1 2 TRIP_+V1.05SP 2 9 UG_+V1.05SP PL400
TRIP DRVH 1UH_FDSD0630-H-1R0M=P3 11A_20%
EN_+V1.05SP 3 EN SW 8 SW_+V1.05SP 1 2 +1.05V_MP
@ PR403
5
0_0402_5%~D FB_+V1.05SP 4 7
<16,40,43> SIO_SLP_A#
1 2
VFB V5IN +5V_ALW
220U_D2_4VM
RF_+V1.05SP 5 6 LG_+V1.05SP 1
RF DRVL
1
S0 mode be high level
1
+
PC406
TP 11
1
C
@ PC405 4 PR404 C
PC407 TPS51212DSCR_SON10_3X3 1U_0402_6.3V6K~D 4.7_1206_5%
2
0.1U_0402_16V7K PQ401 2
2
2
FDMC7692S_POWER33-8-5
1
3
2
1
1
PC408
PR405
680P_0603_50V7K
470K_0402_1%
2
2
PR406
4.99K_0402_1%
2 1
+1.05Volt +/- 5%
2
PR407
PJP401 TDC 4.75A
B 2 1 B
10K_0402_1% Peak Current 6.69A
PAD-OPEN 1x2m~D
OCP current 8.03A
1
PJP402
+1.05V_MP 2 1 +1.05V_M
PAD-OPEN 1x2m~D
A
DELL CONFIDENTIAL/PROPRIETARY A

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +1.05V_M
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
WWW.AliSaler.Com +V1.05S_VCCPP_B+ 2
PJP500
PAD-OPEN 1x2m~D
1
+PWR_SRC
+3.3V_RUN
2200P_0402_50V7K
4.7U_0805_25V6K
4.7U_0805_25V6K
0.1U_0402_25V6
1
1
PC502
PC501
PC503
PC500
2
D D
2
5
PR500
100K_0402_5% PQ500
1
PR502 PC504
2.2_0603_5% 0.1U_0603_25V7K 4
<41,53> 1.05V_VTTPWRGD
1 2 1 2
PU500
PR501 1 10 BST_+V1.05S_VCCPP
3
2
1
110K_0402_1% PGOOD VBST
1 2 TRIP_+V1.05S_VCCPP 2 TRIP DRVH 9 UG_+V1.05S_VCCPP PL500
1UH_FDSD0630-H-1R0M=P3 11A_20%~D
@ PR503 EN_+V1.05S_VCCPP 3 8 SW_+V1.05S_VCCPP 1 2
0_0402_5%~D EN SW +1.05VTTP
1 2 FB_+V1.05S_VCCPP 4 7
<40> CPU_VTT_ON VFB V5IN +5V_ALW
220U_D2_4VM
RF_+V1.05S_VCCPP 5 6 LG_+V1.05S_VCCPP 1
RF DRVL
1
1
1
+
PC507
@ PC506 11
0.1U_0402_16V7K TP PC505 PR504
2
TPS51212DSCR_SON10_3X3 1U_0402_6.3V6K~D 4.7_1206_5%
1
@ 2
2
C C
PR505 4 PC510
470K_0402_1% .1U_0402_16V7K
2
1
PQ501 PC508
2
FDMC7692S_POWER33-8-5
680P_0603_50V7K
3
2
1
2
Local sense put on HW site
PR507
@ PR508
4.32K_0402_1% 0_0402_5%~D
2 1 VTT_SENSE_FB 2 1 VTT_SENSE <10>
@ PR513
0_0402_5%~D
VSSIO_SENSE_R_FB 2 1 VSSIO_SENSE_R <10>
1
PR509 +3.3V_RUN +1.05Volt +/- 5%

71.5K_0402_1% TDC 5.98A
B VCCP_PWRCTRL = "High" , Vo = 1.05V (SNB) Peak Current 8.55A
B
2
VCCP_PWRCTRL = "Low" , Vo = 1V (IVB)

OCP current 10.26A
2
PR510 PR511
10K_0402_1% 10K_0402_5%
1
1
SSM3K7002FU_SC70-3
D
PQ502
2 From GPIO
VCCP_PWRCTRL <11>
G
.01U_0402_16V7K~D
S
3
PC509
1
PJP501
@ PR514 @ 2 1
10_0402_1%~D
2
PAD-OPEN 1x2m~D
2
PJP502
+1.05VTTP 2 1 +1.05V_RUN_VTT
A PAD-OPEN 1x2m~D DELL CONFIDENTIAL/PROPRIETARY A

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +1.05V_RUN_VTT
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
WWW.AliSaler.Com VID [0] VID[1] VCCSA Vout

0 0 0.9V
The 1k PD on the VCCSA VIDs are empty. 0 1 0.8V
These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability. 1 0 0.725V
1 1 0.675V
PR601
1K_0402_5%
D
2 1
output voltage adjustable network D
+3.3V_RUN @ PR602
1 2 VCCSA_VID_1 <11>
100K_0402_5%
0_0402_5%~D
1
PR603
@ PR604
1 2
VCCSA
VCCSA_VID_0 <11>
@ PR600 TDC 4.2A
2
0_0402_5%~D 0_0402_5%~D
+VCCSA_PWRGD
<41> VCCSAPWROK
2 1 Peak Current 6A
2 1 OCP current 7.2A
PR605
1K_0402_5%
+5V_ALW
1U_0603_10V6K
2
PC601
PR606 @ PR607
10_0402_1% 0_0402_5%~D
1
2 1 +VCCSA_EN 1 2 1.05V_VTTPWRGD <41,52>
PC602
2.2U_0603_10V7K
1 2
18
17
16
15
14
13
PU600
PR608 PC603
VID1
VID0
PGOOD
EN
V5FILT
V5DRV
2.2_0603_1% 0.1U_0603_25V7K
12 +VCCSA_BT 1 2+VCCSA_BT_1 1 2
BST PL600
19
PGND 0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
C
SW
11 +VCCSA_PHASE 1 2 +VCCSA_P C
20
PGND
22U_0805_6.3V6M
22U_0805_6.3V6M
0.1U_0402_25V6K~D
10
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
2200P_0402_50V7K
SW
1
2200P_0402_50V7K
21 @ PC604
0.1U_0603_25V7K
PGND
2
10U_0805_25V6M
10U_0805_25V6M
680P_0603_50V7K
PC606
PC608
PC609
PC611
PC612
PC605
TPS51461RGER_QFN24_4X4~D
PC607
PC610
9
1 2
SW
22
PC613
1 2 2
1
VIN
2
@ @
PC615
PC600
PC614
8
SW
PR609
23
4.7_0805_5%~D
+3.3V_ALW
1
2 1 1 VIN
PJP600 7
2
+VCCSA_PWR_SRC +VCCSA_PWR_SRC SW
2 1 24
VIN @
PAD-OPEN 1x2m~D 25
COMP
MODE
TP
SLEW
VOUT
VREF
GND
1
6
@ PR610
2 1
33K_0402_5%
PR611
100_0402_5%
PC616 2 1
2 1
GNDA_VCCSA
0.22U_0402_10V6K
@ PR612
2 1 2 1 0_0402_5%~D
0.01U_0402_25V7K 2 1 VCCSA_SENSE <11>
PC617 PR613 2
3300P_0402_50V7K 5.1K_0402_1%~D
PC618
B B
PJP601
+VCCSA_P 1 2
+VCC_SA
PAD-OPEN 1x3m
PJP602
2 1
PAD-OPEN1x1m
GNDA_VCCSA
A A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +VCC_SA
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
PR701 PC701
VCC_GFXCORE
WWW.AliSaler.Com Local sense put on HW site
2
PR702
1
2K_0402_1%
2
2
1
330P_0402_50V7K~D
1
2 1
PC702
2 1
TDC 21.5A Base on PDDG rev 0.95
Peak Current 33A
OCP current 39.6A
1
PJP702
PAD-OPEN 1x3m
2
150K_0402_1%~D
@
PC703 3.32K_0402_1%~N PR703 150P_0402_50V8F~D @PL703
@ PL703
Load line -3.9mV/A
PR705
2 1 267K_0402_1% HCB4532KF-800T90_1812
<11> VCC_AXG_SENSE PR704 PC704 PC705 +GFX_PWR_SRC 1 2 +PWR_SRC
330P_0402_50V7K~D
2 1 2 1 1 2
2200P_0402_50V7K~D
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6K~D
<11> VSS_AXG_SENSE PC706 499_0402_1%~D 470P_0402_50V7K~D 68P_0402_50V8J~D @
5
1 2 PQ708 PQ709
1
1
1
PC748
PC746
PC747
PC749
PC752
0.01U_0402_50V7K
D D
2
2
2
4 4
VSUMG+
2.61K_0402_1%
@PR708
@ PR708
3
2
1
3
2
1
1
1 2 IMVP_PWRGD
0.068U_0402_16V7K
.1U_0402_16V7K~D
.1U_0603_16V7K~D
PR707
11K_0402_1%
0_0402_5% PL704
1
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
+VCC_GFXCORE
1
1
PR709
PC707
PC708
PC709
10KB_0402_5%_ERTJ0ER103J
4 1
1 2
680P_0603_50V7K
@ PR710
5
649_0402_1%~D PQ711 PQ710 GP1_SW GP1_Vo
3 2
2
PC751
1 2
2
2
PH700
LGATE1G
10K_0603_1%
3.65K_0603_1%
@ PC710 PC750
2
2
10K_0402_1%
PR711 3300P_0402_50V7K~D PHASE1G 0.22U_0603_16V7K
2
1 1
1_0402_5%
PR762
PR758
PR761
PR759
412_0402_1% 4 4
PGOODG
4.7_1206_5%
VSUMG- 1 2 UGATE1G
1
PR763
.1U_0402_16V7K
PR760
BOOT1G 2.2_0603_5% @
1
1
2
1
@ ISEN2G
3
2
1
3
2
1
PC711
@ PC712
2
2 1
2
2
VSUMG+ VSUMG-
40
39
38
37
36
35
34
33
32
31
VSUMG- 0.22U_0402_16V7K~D PU700 BOOT2
@ PC713
ISUMNG
RTNG
FBG
COMPG
PGOODG
PWM2G
LGATE1G
PHASE1G
UGATE1G
BOOT1G
2 1 UGATE2 ISEN1G
PR712
0.22U_0402_16V7K~D PHASE2
1 2 2 1
PH701 @ PR713 1 30 @ PR714
@PR714
VCC_core
3.83K_0402_1% 470K_0402_5%_ TSM0B474J4702RE 1 2 ISEN1G 2
ISUMPG BOOT2
29 LGATE2 0_0402_5%~D +5V_ALW TDC 32A Base on PDDG rev 0.95
+5V_RUN ISEN2G 3
ISEN1G UGATE2
28 1 2
ISEN2G PHASE2
C
2 PR7151 0_0402_5%~D NTCG 4 NTCG LGATE2 27 PR717 Peak Current 53A C
27.4K_0402_1% PR716 0_0402_5% SCLK 5 26 VCCP 1 2
<10> VIDSCLK 1 2 ALERT# 6
SCLK
ALERT#
VCCP
VDD 25 Load line -1.9mV/A
PR718 0_0402_5% 7 24 PWM3 0_0603_5%
<10> VIDALERT_N 1 2 8
SDA PWM3
23 PR720 Icc_Dyn_VID1 43A
VR_HOT# LGATE1 @ PJP700
PR719
1
0_0402_5%
2 SDA
VR_EN
NTC
9
10
VR_ON PHASE1 22
21
LGATE1 2 1 OCP current 63.6A 1 2
<10> VIDSOUT NTC UGATE1
1U_0603_10V6K
1U_0603_10V6K
ISEN3/FB2
PC715
PC714
@ PR721 PHASE1 1_0603_5%
PGOOD
VR_HOT# PAD-OPEN 1x3m
2 1
BOOT1
ISUMN
ISUMP
1
1
COMP
ISEN2
ISEN1
0_0402_5%~D UGATE1
+PWR_SRC
RTN
PR722
@PR722
@ 0_0402_5% 41 PL700
FB
IMVP_VR_ON TP FBMA-L11-453215-800LMA90T_1812
<7,41,56> H_PROCHOT# 1 2
2
2
<40> @PR723
@ PR723 +VCC_PWR_SRC 1 2
11
12
13
14
15
16
17
18
19
20
2200P_0402_50V7K~D
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6K~D
<14,41> 1.05V_0.8V_PWROK 1 2 ISL95836HRTZ-T_TQFN40_5X5~D
+1.05V_RUN_VTT
5
PR724
@PR724
@ 0_0402_5%~D @
1 2 BOOT1 PQ700 PQ701
PGOOD
1
PC716
PC717
PC718
PC700
PC753
PR725 COMP
43P_0402_50V8J~D
0_0402_5% @PR726
@ PR726
ISEN2
ISEN1
ISEN3
1 2 2 1
PC719
PH702 0_0402_5%~D
2
2
1
3.83K_0402_1% 470K_0402_5%_ TSM0B474J4702RE 1 2 IMVP_PWRGD UGATE2 4 4
PR727 PR728 1.91K_0402_1%

2
27.4K_0402_1% 2 1
2 1 +3.3V_RUN PL701
3
2
1
3
2
1
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
PHASE2 4 1
+VCC_CORE
680P_0603_50V7K
PC720 10P_0402_50V8J 3 2
5
5
PC725
PR730 54.9_0402_1% PQ703 PQ702
COMP 2 1 PR729
BOOT2 2 1 1 2
2 1 SCLK @ PR732
@PR732 0_0402_5% 2.2_0603_5% P2_SW P2_Vo
2
1 2 PC721
+5V_RUN PC722 0.22U_0603_16V7K PR733 @PR734
@ PR734
1
4.7_1206_5%
@ PR735 75_0402_5% PR736 470P_0402_50V7K~D PC723 LGATE2 4 4 ISEN21 2 2 1ISEN1
PR731
2 1 ALERT# 2 1 2 1 2 1 10K_0603_1% 10K_0402_1%
B B
@ PC724 499_0402_1%~D 47P_0402_50V8J~D
PR737 130_0402_1% 2 1 PR738
3
2
1
2
3
2
1
2 1 SDA 0.22U_0402_6.3V6K VSUM+
1 2
PC726 PR742 3.65K_0603_1%
VSUM- 2 1 PR740 PR741 PC727 21K_0402_1%~D PR743
0.22U_0402_6.3V6K VSUM-
2 1 2 1 2 1 1 2 2 1
PC728 1_0402_5%
2 1 2.1K_0402_1%~D 267K_0402_1% 150P_0402_50V8F~D
0.22U_0402_6.3V6K +VCC_PWR_SRC
2200P_0402_50V7K~D
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6K~D
PR744 PC729 1 1 1
100U_25V_M
100U_25V_M
100U_25V_M
1 2 1 2 @
+ + +
PC730
PC731
PC732
PQ704 PQ705
1
1
1
1
PC735
PC733
PC734
PC754
PC736
2K_0402_1% 680P_0402_50V7K~D
VSUM+
2 2 2
0.082U_0402_16V7K
0.22U_0603_10V7K
0.1U_0402_10V7K~D
2
2
2
2
11K_0402_1%
2.61K_0402_1%
@ UGATE1 4 4
PC737
1
PR746
10KB_0402_5%_ERTJ0ER103J
1 2
VCCSENSE
1
330P_0402_50V7K PL702
3
2
1
3
2
1
PC741 0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
VSSSENSE
12
1 2 PHASE1 4 1
+VCC_CORE
PC738 2
2
PC739 2
680P_0603_50V7K
PR747
PH703
PC740
0.01U_0402_50V7K
3 2
2
1
5
5
PC745
PR749 PQ706 PQ707
P1_Vo
PR750 BOOT1 2 1 1 2 P1_SW
2
VSUM- 2 1 2.2_0603_5%
2
365_0402_1%~D PC742
0.22U_0603_16V7K PR752 @ PR753
Local sense put on HW site
1
4.7_1206_5%
.1U_0402_16V7K
@ LGATE1 4 4 ISEN11 2 2 1 ISEN2

PC744
1
PR751
@ PR754 10K_0603_1% 10K_0402_1%
PC743
1 2 1 2
2
649_0402_1%~D 2200P_0402_25V7K~D PR755
3
2
1
2
3
2
1
A A
VSUM+1 2
3.65K_0603_1%
PR757
VSUM- 2 1
1_0402_5%
DELL CONFIDENTIAL/PROPRIETARY Compal Electronics, Inc.

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +VCC_CORE
5 4
WWW.AliSaler.Com AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
3 2
Size
Date:
Document Number
Friday, February 24, 2012

LA-7781
1
Sheet 51 of 61
Rev
1.0
A B C D
@ PD1300
WWW.AliSaler.Com ES2AA-13-F
PQ1300
2
SI4835DDY-T1-GE3_SO8~D
8 1
1
+SDC_IN
PR1301
0.01_1206_1%~D +PWR_SRC
PL1300
1UH_PCMB053T-1R0MS_7A_20%
2
@
1
PJP1300
CHAGER_SRC
7 2 4 1 1 2
+DC_IN_SS
6 3
0.1U_0603_25V7K~D
5 3 2 PAD-OPEN 4x4m
0.1U_0603_25V7K~D
@
47P_0402_50V8J~D
1
1
PC1301
PC1302
4
@ PR1300
PC1300
0_0402_5%~D @ PR1302
2
1
1 2 0_0402_5%~D D @
DC_BLOCK_GC <63>
1 2 2 PQ1301
<63> CSS_GC
G NTR4502PT1G_SOT23-3~D
1
1 1
D S
3
2 PQ1303A
G SI3993CDV-T1-GE3_TSOP6~D
PQ1302 S
PD1302
S
NTR4502PT1G_SOT23-3~D
D
5 6 DOCK_DCIN_IS+ <39>
E2 AC_OK=17.7 Volt +DOCK_PWR_BAR 2
CSSN_1
CSSP_1
G
1
1
PR1313 PQ1303B
3 PR1303 SI3993CDV-T1-GE3_TSOP6~D
TI bq24745 = 316K +DC_IN_SS 10K_0402_5%~D
10_0402_5%~D
10_0402_5%~D
S
Intersil ISL88731 = 226K 2 1 2 4
D
100K_0402_1%~D
BAT54CW_SOT323~D DOCK_DCIN_IS- <39>
1
Maxim = 383K
PR1304
PR1305
PR1306
100K_0402_1%~D
1
G
3
+SDC_IN
MAX8731A_LDO MAX8731_REF PC1303 PC1304
PR1307
@ PR1309 0.1U_0603_25V7K~D 0.047U_0603_25V7M~D PC1305 @ PR1312
10K_0402_1%~D
10K_0402_5%~D
2
<63> +CHGR_DC_IN 1 2 1 2 1 2 1 2 0_0402_5%~D
2
1
1
1 2
226K_0402_1%~D
DK_CSS_GC <63>
1_0805_5%~D 0.1U_0603_25V7K~D
PR1310
PR1311
2
PR1313
GNDA_CHG
28
27
1
PC1306 GNDA_CHG PU1300 ICOUT
2
2
@ 0.1U_0805_50V7M~D PR1319
CSSN
ICREF
CSSP
1U_0603_10V6K~D
PR1317 +DCIN 22 4.7_0603_5%~D
2 1 26 Maximum charging current is 7.2A
1
DCIN ICOUT
2
49.9K_0402_1%~D PR1318
PC1309
1
2 1 2 2.2_0603_1%~D
BAT54HT1G_SOD323-2~D
@ PR1320 ACIN BOOT BOOT_D
25 1 2
BOOT
1 2 13
15.8K_0402_1%~D
PC1307
2
<22,41,63> ACAV_IN ACOK
1
PC1310
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K~D
1
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1
1
0_0402_5%~D
PD1301
2 1 11
VDDSMB
5
PR1316
1
1
1
1
0.01U_0402_25V7K~D GNDA_CHG PQ1304
PC1313
PC1314
PC1315
PC1312
10
2
SCL @ PC1311
2
GNDA_CHG +5V_ALW 9 21 MAX8731A_LDO 1 2
2
2
2
2
2
SDA VDDP
2
GNDA_CHG 14 1U_0603_10V6K~D 4 2
NC CHG_UGATE
24
MAX8731_IINP UGATE PR1322
8
1
VICM +VCHGR_B
23 2 1
PC1316 PHASE 0_0603_5%~D SIR472DP-T1-GE3_POWERPAK8-5
6
3
2
1
3300P_0402_50V7K~D
FBO
1
0.1U_0402_10V7K~D
2
1 2 5 @ PC1317
@ PC1318 @ PR1324 EAI 220P_0402_50V7K~D
1
GNDA_CHG @ PR1323 2 1 1 2 4 20 CHG_LGATE
4.7K_0402_5%~D
200K_0402_5%~D 7.5K_0402_5%~D EAO LGATE PL1301 PR1326 +VCHGR
PC1319
<41> CHARGER_SMBCLK
56P_0402_50V8~D
1
PC1320 2200P_0402_50V7K~D 0.01_1206_1%~D
2
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
PR1325
<41> CHARGER_SMBDAT
2 MAX8731_REF 3
VREF PGND
19 @ 2 1+VCHGR_L
4 1
@ 18
@ PC1321 @ PR1327 CSOP
3 2
2
<22> MAX8731_IINP
1
120P_0402_50VNPO~D 1 2 7 17 PQ1305
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0603_25V7K~D
CE CSON
5
10K_0402_5%~D
SI7716ADN-T1-GE3_POWERPAK8-5
1 2
0_0402_5%~D
10_0402_5%~D
8.45K_0402_1%~D
220P_0402_50V8J~D
1
1
15 VFB 1 PR1328 2 +VCHGR PC1322
2
0.1U_0402_10V7K~D
VFB
1
1
1
1
Vref 1000P_0603_50V7K~D
PR1329
PC1323
12
1U_0603_10V6K~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
1 GND 100_0402_5%~D
PC1330
PR1330
PR1331
PC1329
PC1331
PC1332
16
TI bq24747 = 3.3V NC
1
1
1
1
PC1324
PC1326
PC1325
PC1327
PC1328
29
2
2
2
2
TP
2
Intersil ISL88731C = 3.2V @ 4 PR1332
2
2
@ 4.7_1206_5%~D
2
2
2
2
VDDP @ @ ISL88731C_QFN28_5X5~D
TI bq24747 = 6V @ PJP1301
1 2 @ PC1333
3
2
1
1
Intersil ISL88731C = 5.1V 0.1U_0603_25V7K~D PC1334 @ PC1335
1 2 1 2 1 2
PAD-OPEN1x1m
GNDA_CHG GNDA_CHG 0.22U_0603_25V7K~D 0.1U_0603_25V7K~D
GNDA_CHG
GNDA_CHG
MAX8731_REF
+5V_ALW
+DC_IN MAX8731_REF
100P_0402_50V8J~D
0.01U_0402_25V7K~D
DYN_TUR_CURRENT_SET# PR1333
10K_0402_1%~D
1M_0402_1%~D
47K_0402_1%~D
232K_0402_1%~D
H_PROCHOT#
1
1
1
1
PC1337
PC1336
3
1 2 3
221K_0402_1%~D
2
PR1335
PR1334
PR1336
PR1338
2
+5V_ALW
65W High
2
2
+3.3V_ALW2 @ @ @ PR1339
+5V_ALW PR1340 0_0402_5%~D
2
2
1.8M_0402_1%
1
8
1 2 PU1303B @ PR1342
90W Low
1
0_0402_5%~D
DMN66D0LDW-7 2N_SOT363-6~D
5
P
+
PR1341 7 1 2
150K_0402_1%~D PR1343 O ACAV_IN_NB <40,41,63>
6
42.2K_0402_1%~D
41.2K_0402_1%~D
22.6K_0402_1%~D
100P_0402_50V8J~D
-
8
G
20K_0402_1%~D PU1303A
100P_0402_50V8J~D
1
1
6
1
MAX8731_IINP 1 2 3 LM393DR_SO8~D
P
4
2
1
PC1338
PR1347
PR1348
PR1346
PC1339
PQ1307B
1
O
PQ1307A
2 5
-
G
2
220P_0402_50V8J~D
LM393DR_SO8~D @
4
2
4
2
2
1
PC1340
150K_0402_1%~D
66.5K_0402_1%~D
+3.3V_ALW
100P_0402_50V8J~D
1
2
1
PR1350
PR1349
PC1341
1
2
PR1351
+3.3V_ALW 100K_0402_5%~D
1
D PC1342
DYN_TUR_CURRNT_SET# 2 0.1U_0402_25V4Z~D
2
G
S 2 1
3
PQ1309
DMN65D8LW-7_SOT323-3~D
5
PU1302
1
D
1
P
B
4 2 ACAV_IN <41,63>
O G
2 PROCHOT_GATE <40>
A
G
S
3
PQ1306
4
Adapter Protection Circuit for Turbo Mode TC7SH08FU_SSOP5~D
3
4
To prevent system throtlle when it

switching from AC to DC.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Charger
A B
WWW.AliSaler.Com AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
C
Size
Date:
Document Number
Friday, February 24, 2012

D
LA-7781
Sheet 52 of 61
Rev
1.0
5 4 3 2 1
PQ900 PD901
WWW.AliSaler.Com +3.3V_ALW2 SI4835DDY-T1-GE3_SO8~D 2

1 8 MPBATT+ PR901 1
PC915 2 7 1 8 330K_0402_5%~D 3
0.1U_0402_10V7K~D +VCHGR S D
3 6 2 7
S D PDS5100H-13_POWERDI5-3~D S2AA-13-F SMA
1 2 5 3 6 1 2
0.1U_0603_25V7K~D
S D PQ902 PD902
4 5
100K_0402_5%~D
G D
1
PU902 8 1 2 1
390K_0402_5%~D
620K_0402_5%~D
4
D S
1
FDS6679AZ_G_SO8~D
PR900
PC900
PR903
PR904
1 7 2
P
<41,56> ACAV_IN
0.47U_0805_25V7K~D
B PQ901 MPBATT_IN_SS D S
4 6 3 PQ903
O D S
CHARGE_MODULE_BATT 2 5 4
2
A D G
G
<40> @ 8 1
2
PR905 FDS6679AZ_G_SO8~D D S
7 2
10K_0402_5%~D
3
1
TC7SH08FU_SSOP5~D 820_0603_1%~D D S
+DOCK_PWR_BAR 6 3
D S
1
PD903
PR908
PC902
1 2 5 4
SDMK0340L-7-F_SOD323-2~D D G
10K_0402_5%~D
1
2 1
2
3
FDS6679AZ_G_SO8~D
PR906
2
2
D D
1
PC903 PD904 PR907
390K_0402_5%~D
0.01U_0603_25V7K~D
PR909
5 2 1 330K_0402_5%~D
2
PQ909 PQ904B @
1
DMN65D8LW-7_SOT323-3~D DMN66D0LDW-7 2N_SOT363-6~D SDMK0340L-7-F_SOD323-2~D PR911
499K_0402_1%~D
4
1
1
6
D 0_0402_5%~D
PR910
2
<40> 2 PQ904A
MODULE_BATT_PRES# G
1
STSTART_DCBLOCK_GC
S 2
3
2
PR912
330K_0402_5%~D
1
PQ912 1 2 PD905
+3.3V_ALW2 FDS6679AZ_G_SO8~D 2
PQ913 PBATT+ 1 8 1
PC916 SI4835DDY-T1-GE3_SO8~D S D
2 7 3
0.1U_0402_10V7K~D S D PBATT_IN_SS
1 8 3 6
S D PDS5100H-13_POWERDI5-3~D
1 2 2 7 4 5
390K_0402_5%~D
+VCHGR G D
1
3 6 PQ914
620K_0402_5%~D
1
PR914
5 8 1
0.1U_0603_25V7K~D
PU901 D S
PR913
7 2
100K_0402_5%~D
2
D S
5
6 3 +PWR_SRC
4
D S
1
PR915
PC904
1 5 4
P
<41,56> ACAV_IN
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
B PR917 D G
4
2
O
2
CHARGE_PBATT 2 820_0603_1%~D FDS6679AZ_G_SO8~D
2
1
G
@ PR916
PC905
PC906
<40> 1 2
1
20K_0402_1%~D
3
3
TC7SH08FU_SSOP5~D PD907
2
SDMK0340L-7-F_SOD323-2~D
PQ910B
1
0.01U_0603_25V7K~D
2 1
10K_0402_5%~D
1
5
10K_0402_5%~D
1
1
PR920
PC907
390K_0402_5%~D
1
PD908
PR919
4
2
PR921 SDMK0340L-7-F_SOD323-2~D
PR922
2
6
20K_0402_1%~D 2 1
2
<40> DEFAULT_OVRDE
PQ908A
2
1
C DMN65D8LW-7_SOT323-3~D 2 C
10K_0402_5%~D
499K_0402_1%~D
1
6
1
3
PQ910A
PR924
PQ916
PR923
PQ908B
6
1
D PQ906A
2 5
2
3
<40> PBAT_PRES# 2
2
6
G 2 PQ906B @ PR925
1
S 0_0402_5%~D <40>
3
@ 51 2 MODULE_ON
1
PR926 2
0_0402_5%~D PQ905A
499K_0402_1%~D
4
1
1
2
2
PR928
1
PQ911
PD910
PD911
PD912
PD913
1
2
PD915 MPBATT+ @ D
2
2 ACAV_IN <41,56>
1
1
PBATT+ G
S
200K_0402_1%~D
510K_0402_5%~D
3
1
1
1
PR931
PR933
1
3
<40> SLICE_BAT_ON @
3
PR932
PQ907B
0_0402_5%~D
2
@ PR934 100K_0402_5%~D
PQ905B
5
5 1 2
6
2
4
@ PR935
PQ907A
0_0402_5%~D @ PR937
2
1 2 2 @ 0_0402_5%~D
<40> DEFAULT_OVRDE PR936 SLICE_BAT_PRES# 1 2 MODULE_BATT_PRES# <40,47>
0_0402_5%~D <39,40,47>
1
1
499K_0402_1%~D
PBATT+
PR938
@ PR939
+DOCK_PWR_BAR 1 2
2
@ 0_0402_5%~D @
2
2
<40,47> PBAT_PRES# 1 2 PR941
B +DC_IN_SS @ PR940 0_0402_5%~D 0_0402_5%~D @ PR942
B
0_0402_5%~D
1 2
<56> +CHGR_DC_IN
1
@ PR943
1
0_0402_5%~D
CHGVR_DCIN
DK_PWRBAR
+DC_IN 1 2 CD3301_DCIN
DC_IN_SS
PR944 47_0805_5%~D
1
PC910
0.1U_0603_50V4Z~D @ PR945
2
0_0402_5%~D
+5V_ALW
P50ALW
36
35
34
33
32
31
30
29
28
1 2
PU900
<47> SOFT_START_GC @ PR947 0_0402_5%~D
1 2
NC
CHARGERVR_DCIN
DK_PWRBAR
GND
NC
BLK_MOSFET_GC
DSCHRG_MOSFET_GC
PBatt+
DC_IN_SS
+3.3V_ALW2
CD_PBATT_OFF 1 2 SLICE_BAT_ON <40>
PR946 100K_0402_5%~D @ PR948
<39> ACAV_DOCK_SRC# 1 2 ACAVDK_SRC @ PR949 0_0402_5%~D
0_0402_5%~D 1 2 DOCK_AC_OFF <39,41,47>
1 27
@ PR951 DC_IN P50ALW
2 26
ERC1 SS_GC PBATT_OFF DK_AC_OFF @ PR953
+SDC_IN 1 2 3 25 1 2
ERC1 DK_AC_OFF_EN 3301_ACAV_IN_NB
4 24 1 2 ACAV_IN_NB <40,41,56>
0_0402_5%~D ACAVDK_SRC ACAV_IN_NB 0_0402_5%~D @ PR954 1M_0402_5%~D
5 23
CD3301_SDC_IN GND GND DK_AC_OFF_EN PR952
6 22 1 2 DOCK_AC_OFF_EC <40>
SDC_IN DK_AC_OFF_EN SL_BAT_PRES# 0_0402_5%~D
7 21
<56> DC_BLOCK_GC ACAVIN DC_BLK_GC SL_BAT_PRES# BLKNG_MOSFET_GC
8 20
@ PR955 P33ALW2 9 ACAV_IN BLKNG_MOSFET_GC
19
P33ALW2 NBDK_DCINSS
EN_DK_PWRBAR
<41,56> ACAV_IN 1 2
SS_DCBLK_GC
0_0402_5%~D @ PR956
DK_CSS_GC
1 2 SLICE_BAT_PRES# <39,40,47>
PWR_SRC
0_0402_5%~D
CSS_GC
P33ALW
@ PR957 37
TP
1
1
ERC3
ERC2
PD917
1 2 1 2
GND
+3.3V_ALW2 +NBDOCK_DC_IN_SS
PD916 @ PR958 0_0402_5%~D
0_0402_5%~D
CD3301ARHHR_QFN36_6X6~D
10
11
12
13
14
15
16
17
18
A PQ915 A
2
2
@ PR959
0.1U_0603_25V7K~D
FDN338P_G_NL_SOT23-3~D <56> CSS_GC P33ALW 1 2

ERC2
<56> DK_CSS_GC +3.3V_ALW

1
ERC3 0_0402_5%~D
PC911
1 3
1
DOCK_SMB_ALERT# <39,41,47>
@ PR960
EN_DK_PWRBAR 1 2 EN_DOCK_PWR_BAR <40>
2
0.047U_0603_25V7K~D
0_0402_5%~D
2
2
0.1U_0402_25V4Z~D
@ PR961 1 2
PC912
40,47> SLICE_BAT_PRES# 1 2
1
1
STSTART_DCBLOCK_GC 1M_0402_5%~D
PC913
0_0402_5%~D @ PR962
1
@ PR963 Title
2
2
PC914 @ 3301_PWRSRC PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
1500P_0402_7K~D
1
0_0402_5%~D
2 +PWR_SRC TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Selector
2
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+VCC_CORE
+VCC_CORE +VCC_GFXCORE Below is 458544_CRV_PDDG_0.5 Table 5-8.
1 1 1 1 1
5 x 22 µF (0805)
PC1000 PC1001 PC1002 PC1003 PC1004
Socket Bottom 5 x (0805) no-stuff
2
10U_0805_4VAM
2
10U_0805_4VAM
2
10U_0805_4VAM
2
10U_0805_4VAM
2
10U_0805_4VAM +VCC_GFXCORE sites
D
7 x 22 µF (0805) D
Socket Top 2 x (0805) no-stuff
sites
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1
PC1011
PC1012
PC1013
PC1014
PC1015
PC1016
PC1018
PC1017
PC1005 PC1006 PC1007 PC1008 PC1009
10U_0805_4VAM 10U_0805_4VAM 10U_0805_4VAM 10U_0805_4VAM 10U_0805_4VAM
2 2 2 2 2 2 2 2 2 2 2 2 2
+1.05V_RUN_VTT
+VCC_CORE +1.05V_RUN_VTT
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 @ @ @ @
PC1028
PC1029
PC1032
PC1024
PC1025
PC1026
PC1027
PC1030
PC1031
PC1033
PC1034
PC1019 PC1020 PC1021 PC1022 PC1023
2 2 2 2 2 2 2 2 2 2 2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 1 1 1 1
2 2 2 2 2
PC1035
PC1036
PC1037
PC1038
2 2 2 2
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1 1 1 1 1 1 1 1
1 1 1 1 1 @ @ @
PC1047
PC1048
PC1049
PC1050
PC1051
PC1052
PC1054
PC1055
PC1043 PC1044 PC1045 PC1046 PC1053
22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 2 2 2 2 2 2 2 2
2 2 2 2 2
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
1 1
PC1056
PC1057
+ +
C C
2 2
330U_X_2VM_R6M
330U_X_2VM_R6M
1 1
1 1 1 1 1
PC1065
PC1066
+ +
PC1060 PC1061 PC1062 PC1063 PC1064
22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM
2 2 2 2 2 2 2
1
For sandy bridge depop PC1267
PC1068 For ivy bridge pop PC1267
22U_0805_6.3VAM
2
+VCC_CORE
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
1 @ 1 1 1 @
PC1074
PC1073
PC1075
PC1072
+ + + +
B 2 2 2 2 B
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
1 1
PC1076
PC1077
+ +
2 2
A A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL PROCESSOR DECOUPLING
5 4 WWW.AliSaler.Com
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Date: Friday, February 24, 2012
LA-7781
Sheet
1
54 of 61
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WWW.AliSaler.ComVersion Change List ( P. I. R. List ) Page 1

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
1 46 +1.5V_MEN 7/5 Dell Follow VC , enable use SIO_SLP_S4#. Add PR210 for net "SIO_SLP_S4#" X01
D D
2 44 DCIN 8/4 Dell ME design change. PJPDC1 change from 7pin to 5pin X01
3 45 +5V/3.3V 8/4 Compal Main and 2nd IC common setting. De-pop PD100,PR113,PR111 X01
4 51 Vcore/GFX core 8/4 Compal Suppress WWAN BB noise. Pop PC751,PR760,PC725,PR731, X01
JimmyCC_Kuo PC745,PR751(680pF 0603, 4.7 ohm 1206)
5 45 +5V/3.3V 8/4 Compal DFX concern, choke change from 10*10 to 7*7 PL101 change from 3.3u 10*10 to 2.2u 7*7 X01
PL102 change from 3.3u 10*10 to 3.3u 7*7
6 45 +5V/3.3V 8/4 Compal COS concern, change from D2 Polymer cap to OScon cap PC110,PC111 change from 220u polymer cap X01
to 220u OScon cap
46 +1.5V_MEN PC208 change from 330u polymer cap
C to 390u OScon cap C
7 45 +5V/3.3V 8/4 Compal Prevent Jitter issue. Add PC120,PC121,PC215 parallel with X01
PR101,PR102,PR207
46 +1.5V_MEN
8 51 Vcore/GFX core 8/4 Compal Prevent output voltage glitch when power up. PU700 VCCP and VDD change form +5V_RUN X01
to +5V_ALW
9 51,52 Vcore, Charger 8/8 Compal EMI solution. Pop PL700.PL1300,PL100 X01
Justin_Hsu
45 +5V/3.3V
10 45 +5V/3.3V 8/8 Compal Suppress WWAN BB noise. Pop PR109,PC112,PR110,PC113,PC209,PR203 X01

JimmyCC_Kuo (680pF 0603, 4.7 ohm 1206)
46 +1.5V_MEN
11 47,48 +1.8V/+1.05VM 8/8 Compal Suppress WWAN BB noise. Pop PR301(0805),PC305,PR404,PC408,PR504, X01
JimmyCC_Kuo PC508(680pF 0603, 4.7 ohm 1206)
B 49 +1.05V_VTT B
12 45 +5V/3.3V 8/10 Compal Suppress WWAN BB noise. Add PC122,PC123 on +5V_ALWP X01
JimmyCC_Kuo and +3.3V_ALWP
13 45-53 11/16 Compal For cost saving, change the 0ohm resistors to Footprint change PR100,PR116,PR208,PR210, X02
PR306,PR403,PR503,PR508,PR513,PR600,PR607,
layout short PAD. PR612,PR602,PR604,PR714,PR726,PR713,PR721,
PR723,PR1300,PR1302,PR1312,PR1320,PR1339,
PR1342,PR911,PR925,PR937,PR941,PR932,PR936,
PR926,PR935,PR945,PR947,PR949,PR939,PR940,
PR943,PR948,PR951,PR955,PR957,PR961,PR953,
PR954,PR956,PR958,PR959,PR960,PR963
14 44 DCIN 11/30 Compal Reduce power consumption in S5. Add PCH_ALW_ON for +PWR_SRC_S X02
enable signal.
A A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL PWR_PIR 1
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WWW.AliSaler.ComVersion Change List ( P. I. R. List ) Page 1

Request
Item Page# Title Date Issue Description Solution Description Rev.
Owner
1 51 VCORE/GFXcore 12/09 Compal Fine tune load line,OCP,transient response. PR740 change from 2K to 2.1K ohm. X02
D D
PC740 change from 0.033uF to 0.082uF.
PR750 change from 348 to 365 ohm.
PC707 change from 0.022uF to 0.1uF.
PR711 change from 357 to 412 ohm.
PR702 change from 2.55k to 3.32K ohm.
C C
B B
A A
Title
PWR_PIR 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
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AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-7781
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Friday, February 24, 2012 Sheet 56 of 61
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Version Change List ( P. I. R. List )
Request
Owner
D D
1 42 HW 07/11/2011 COMPAL E4 uses SIO_SLP_S4# for power control DDR_ON and SUS_ON are replaced by SIO_SLP_S4# X01
2 14,39 HW 07/11/2011 COMPAL SMSC request to delete LPC_LDRQ0# Leave LDRQ0# no connection on both of 5048 and PCH side X01
Change RC99, RC100 from SD034100A8L (S RES 1/16W 10 +-1% 0402) to

3 11 HW 07/11/2011 COMPAL Follow INTEL DG X01
SD03410008L (S RES 1/16W 100 +-1% 0402)
4 24 HW 07/11/2011 COMPAL ATG needs touch screen circuit Add “5@” for touch screen circuit of Dalmore 14” ATG X01
5 22 HW 07/11/2011 COMPAL UMA uses EMC4021 for cost concern Change thermal sensor to EMC4021 for UMA X01
Load SW sources output rising time

6 42 HW 07/14/2011 COMPAL Change back to E3 +3.3V/5V_RUN discrete solution X01
mismatch and COS. cost concern
7 20 HW 07/14/2011 COMPAL CH94 and CH95 to D2 size for cost concern Change CH94 and CH95 from SGA0000170L to SGA00004L0L X01
C C
8 29 HW 07/19/2011 COMPAL Codec is change to 92HD93 Pop R162~R166 and de-pop U73 X01
9 20,42 HW 07/21/2011 COMPAL Vgs less than cut-in voltage in battery mode Add control circuit for +5V_ALW_PCH X01
10 27,28,42 HW 07/25/2011 COMPAL Vgs of 5V MOS maybe large than max rating Add R516, R517. Change Q55 from SB00000KQ0L to SB00000GV00 X01
11 11 HW 07/25/2011 COMPAL Follow INTEL PDDG 0.8 De-pop RC140 X01
12 32 HW 07/25/2011 COMPAL RESET_OUT# power sequence issue Add R1640, 1M ohms pull down for USH_PWR_STATE# at M/B side X01
13 15 HW 07/25/2011 COMPAL Follow crystal measurement report Change CH18 and CH19 to 8.2pF X01
B 14 40 HW 07/27/2011 COMPAL Change board ID to X01 Change R875 to 130Kohms X01 B
15 34 HW 07/27/2011 COMPAL PCH GPIO52 need 8.2~10K pull up +3.3VS Change R695 from 100K to 10Kohms X01
16 23 HW 07/28/2011 COMPAL CRT SW 2nd source TI, TS3V713 pin29 is VDD Connect pin29 to +3.3V_RUN X01
17 16 HW 07/28/2011 COMPAL +1.05V_M turn off before APWROK de-assert Add UH5 circuit for HW solution X01
Pop option for 92HD93/ALC290=>R1646/C1164; R1644/R1643; C965/R1642; Q107/R171
18 29 HW 08/01/2011 COMPAL Co-lay 92HD93 with ALC290 Reserve for ALC290 only: C1204, C1205, R1647, C1165, R1648 X01
Reserve for 92HD93 only: R1645, C963
19 41 HW 08/02/2011 COMPAL Reset IC threshold voltage issue Change U4 to RT9801A (threshold adjustable) X01
20 29 HW 08/02/2011 COMPAL EMI request to add solution for BITCLK Pop R1076 (33ohms) and C977 (10pF) for PCH_AZ_CODEC_BITCLK X01
21 26 HW 08/03/2011 COMPAL DPX_CA_DET voltage too low through dongle Change U21 and U24 to SA000055G0L X01
A A
22 17 HW 08/03/2011 COMPAL Request from INTEL review feedback Pop RH332 for PCH_GPIO3 X01
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE P.I.R (1/4)
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Request
Owner
D D
Change Q61 to SB00000GV00; HDD and breath LED control share Q84; X01
23 42,43 HW 08/04/2011 COMPAL For cost saving
Power team request Q59 change to SB00000L80L
Pop RE678 (22ohms), CE757 (33pF) and C981~3 (0.1uF). Add CE758 (33pF).
24 24, 29, 33 HW 08/08/2011 COMPAL EMI request to add solution X01
Reserve C1206 and C1207.
25 41 HW 08/08/2011 COMPAL For RSMRST# debug Reserve R1655 and pop R1623 X01
Pop R795 (33ohms), C713 (32pF), RE5 (33ohms), CE3 (32pF), R885 (10ohms)
26 39 HW 08/08/2011 COMPAL RF request to add solution X01
and C747 (8.2pF)
27 43 HW 08/08/2011 COMPAL White light LED brightness is abnormal Change R934, R938, R939, R949, R958, R957 and R955 to 2.2 Kohms X01
28 40 HW 08/09/2011 COMPAL ESD request add 0.1uF on ALWON Reserve C1208 for ESD backup plan X01
29 17 HW 08/10/2011 COMPAL RF request 10pF on MEC and 5048 PCI CLK Reserve 10pF bypass cap. at CH109 and CH110 X01
30 18 HW 08/11/2011 COMPAL Delete TCM and Non-TPM configuration De-pop RH270 and RH271. Always pop RH267 and RH268 X01
C C
31 11 HW 08/12/2011 COMPAL S3 can't resume issue Control 1.5V_VDDQ by EC. Pop RC79 and de-pop RC82 X01
32 40 HW 08/15/2011 COMPAL Change board ID to X02 Change R875 to 62Kohms X02
33 14~21 HW 08/15/2011 COMPAL Change PCH to B0 version Change UH4 to SA00004NQ2L X02
34 42 HW 08/18/2011 COMPAL Rated Vgs of Q61 is 25V De-pop R1627 X02
35 36 HW 08/19/2011 COMPAL Follow INTEL DG Change C410~C413 from 0.01uF to 0.1uF X02
36 19 HW 08/19/2011 COMPAL CRT ripple garbage display issue Change LH1 from 180ohms bead to 1uH inductor X02
37 29 HW 08/29/2011 COMPAL IDT request and codec version change Change C1163 from 1uF to 2.2uF and codec from WA to WB version X02
38 43 HW 08/29/2011 COMPAL To meet current limit resistor of LED spec Change R949, R958, R957, R955, R939, R938, R934 from 2.2K to 1.2Kohms X02
B B
39 42 HW 09/02/2011 COMPAL DMN3030LSS-13 poor soldering issue Change Q55 and Q61 to AO4478L X02
40 39 HW 09/02/2011 COMPAL SMSC change 5048 pin A23 to GPIOI0 Re-link ECE 5048 symbol X02
41 25 HW 09/14/2011 COMPAL HDMI EMI low cost solution De-pop L19~L22. Add L100~107 (9nH) and C1209~C1216 (3.3pF) X02
42 40 HW 09/14/2011 COMPAL SMSC review feedback Add R1656 and R1657 100Kohms to GND for I2S disabled X02
Remove R1648, R1647, R1646, R1645, C1165, C1164, R1643, R1644, R1642,
43 29 HW 09/16/2011 COMPAL Remove ALC290 co-lay circuit X02
R171, C1204, C1205
Add snubber on speaker trace with C: 2200pF and R: 3.3ohms.
44 29 HW 09/16/2011 COMPAL 15" UMA speaker no sound issue X02
Change bead rated current from 200mA to 2A.
45 33 HW 09/26/2011 COMPAL EMI request to change SD CLK series R R676 is changed from 33ohms to 10ohms X02
46 42 HW 09/26/2011 COMPAL 1V leakage on +3.3V_RUN during system boot Pop Q69 and R929 discharge circuit X02
A A
47 40 HW 09/26/2011 COMPAL EC has internal pull up for volume signals De-pop R1169, R1197 and R1118 X02
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48 42 HW 09/28/2011 COMPAL INTEL timing spec, V2 fail Change C763 to 470pF as that of +3.3V_RUN X02
Update U4 symbol and add R1629 for backup of inrush prevention.
49 41 HW 10/05/2011 COMPAL Chane reset IC to RT9818A-44GU3 X02
Change RSMRST# pull up with 100Koms. Pop R1655 and de-pop R1623.
When suspend/resume cycles, wireless SW
50 39 HW 10/05/2011 COMPAL Add R771 pulling up to +3.3V_ALW for WIRELESS_ON#/OFF and de-pop R766 X02
GPIO IRQs keeps giving
51 19 HW 10/11/2011 COMPAL CRT ripple garbage display issue Change CH36 from 10uF to 22uF X02
52 7~42 HW 10/11/2011 COMPAL For cost saving Change 0 ohm resistor to short pad X02
Change C973~C976 P/N to SE074222K8L.
53 29 HW 10/11/2011 COMPAL Change C973~C976 P/N and R1658~R1661 size X02
Change R1658~R1661 size to 0402.
54 42 HW 10/18/2011 COMPAL +3.3V_SUS sequence timing probelm Change C767 to 470pF, the same as that of +3.3V_RUN X02
55 22 HW 10/18/2011 COMPAL Thermal requests to change OTP from 88 to 93 Change R406 from 953ohms to 1.24Kohms X02
C C
56 43 HW 10/20/2011 COMPAL BREATH LED flash issue when AC plugin Add Q126 to control BREATH LED X02
57 32 HW 10/24/2011 COMPAL TPM is changed to AT97SC3204-X2A18-AB U39(TPM) is changed to SA00004WQ10(AT97SC3204-X2A18-AB) for WIN8 support X02
58 42 HW 10/25/2011 COMPAL +3.3/5V_RUN inrush curren issue with 470pF Change C763 and C766 form 470pF to 2200pF X02
59 33 HW 10/25/2011 COMPAL EMI change to reserve solution for SD/MMCCLK De-pop RE678 and CE757 X02
60 34 HW 11/04/2011 COMPAL PCH GPIO52 changed to be free De-pop R725, remove R695 and add RH359 X02
61 17,39,40 HW 11/07/2011 COMPAL RF final solution for PCI clock noise De-pop R795, C713, R885 and C747. Pop CH109 and CH110 with 12pF X02
R949 from 2.2K to 1K, R939 from 2.2K to 1.8K, R957 from 2.2K to 220,
62 43 HW 11/07/2011 COMPAL Change current limit resistors of LED X02
R951 from 475 to 330, R953 from 475 to 330 and R958 from 2.2K to 620
67 14~21 HW 11/07/2011 COMPAL Change PCH to C0 version Change UH4 to SA00005BU0L X02
B B
68 11,42 HW 11/07/2011 COMPAL AO4728L leakage issue Change QC3 and Q59 to AO4304L (SB00000RV00) X02
Add R1662 0ohm resistor. Reserve D87 and R1663 (pull high to
69 32 HW 11/07/2011 COMPAL +3.3V_RUN Giltch when AC plugin X02
+3.3V_RUN_TPM) for HW solution backup.
70 HW 11/07/2011 COMPAL Change 1Kohms tolerance for cost saving Change 1Kohms +-1% to +-5% except RC78, RC80, RC81 and RC84 X02
71 38 HW 11/11/2011 COMPAL EMI request to add 33ohms for DP port Add RE7~RE24 for DP portD and portC X02
RC72 from 100K to 330K; RC143 from 330K to 1M; CC136 from 0.1u to 0.022u X02
R412 from 100K to 470K; R1632 from 1M to 4.7M; C293 from 0.1u to 0.022u
R507 from 100K to 470K; R517 from 1M to 4.7M; C400 from 0.1u to 0.022u
R722 from 100K to 470K; R1625 from 1M to 4.7M; C644 from 4700p to 220p
72 HW 11/16/2011 COMPAL Change RC value at Gate of MOS Load SW to
modify power rail soft start timing
R920 from 100K to 470K; R1610 from 470K to 2.2M; C771 from 4700p to 470p
R930 from 100K to 470K; R1611 from 470K to 2.2M; C773 from 2200p to 100p
A A
R906 from 100K to 470K; C763 from 2200p to 220p
R912 from 100K to 470K; C766 from 470p to 220p
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73 36 HW 11/21/2011 COMPAL ESD team modify USB3.0 ESD diode package Change D78 and D79 to NXP IP4292CZ10-TBR(SC300002F0L, Package: XSON10) X02
Change RC value at Gate of MOS Load SW to
74 42 HW 11/21/2011 COMPAL R930 from 470K to 330K; R1611 form 2.2M to 1M X02
modify power rail soft start timing
Add single channel USB PWR SW U5, G547. Add decoupling cap. C677 and
75 36 HW 11/23/2011 COMPAL Add USB PWR SW circuit with G547 for JUSB2 X02
C678 for SW IC input. Add decoupling cap. C652 and C655 at conn. side.
76 38 HW 11/29/2011 COMPAL EMI solution for E-Docking USB (port8) Add bypass resistors, R1672 and R1673; choke L99 for backup X02
Pop C1208 for UMA trace, ALWON
Add CE10~CE12 for EXP PWR SW signals, CPUSB#, EXPRCRD_CPPE#
77 35 HW 11/30/2011 COMPAL From ESD team request and CARD_RESET# X02
Add 0ohm resistors, RE27~RE32 and RE34~RE36 to block ESD from XDP
Swap USB Port6 and Port8; reserve a 90ohms choke at E-Docking conn.:
78 17,34,38 HW 12/02/2011 COMPAL EMI solution for E-Docking USB port Port6 from Mini3 Pink Panther card to E-docking X02
Port8 from E-Docking to Mini3 Pink Panther card
C C
79 14~21 HW 12/05/2011 COMPAL Change PCH to C1 version (QS) Change UH4 to SA00005BU1L X02
80 24 HW 12/06/2011 COMPAL EMI solution for USB port12 of camera Pop 90ohms choke, L10; De-pop R427 and R428 X02
81 42 HW 12/07/2011 COMPAL +3.3V_SUS sequence timing R911 from 100K to 470K; R1618 from 1M to 4.7M; C767 from 470p to 220p X02
82 43 HW 12/07/2011 COMPAL Add EMI solution Add C1217 with 0.1uF X02
Pop L100~L107 with 9nH. Change C1209~C1216 from 3.3pF to 1.8pF.
83 25 HW 12/08/2011 COMPAL EMI final solution for HDMI port X02
Change R450, R452~R456 and R458~R459 from 680ohms to 604ohms.
84 41 HW 12/08/2011 COMPAL To prevent inrush current at reset IC input Change R1629 from 0ohms to 33ohms resistor X02
For DFX conern of F2 2nd source, SP040003H0L, change F2 footprint to
85 25 HW 12/28/2011 COMPAL SMT request to change F2 footprint X02
F_MF-MSMF050-2
86 40 HW 01/13/2012 COMPAL Change board ID to A00 Change R875 to 33Kohms A00
B B
87 14 HW 01/13/2012 COMPAL Add X76@ for ROM part Add X76@ for U52 and U53 A00
88 40 HW 01/13/2012 COMPAL Change MEC5055 P/N for MP Change U51 P/N to SA00003TZ2L A00
89 38 HW 01/13/2012 COMPAL System hangs after hot dock (DF531758) Change R755 from 100Kohms to 10Kohms A00
UH4 is changed to SA00005BU3L

90 14~21,32 HW 02/01/2012 COMPAL Chnage PCH, LAN chip P/N for X-build A00
U31 is changed to SA00003SI5L
91 31 HW 02/01/2012 COMPAL Change PWR button, SW1 back to E3 solution change SW1 back to E3 solution, ALPS SKRBAAE010 A00
92 15,18,32 HW 02/03/2012 COMPAL Add BOM config for Non-TPM Add 1@ for TPM and 2@ for Non-TPM config A00
93 14 HW 02/16/2012 COMPAL De-pop resistor on PCH JTAG for power saving De-pop RH288, RH47, RH48 and RH49 A00
Add 47nF CE13 close to reset input of SD card reader IC
94 33 HW 02/20/2012 COMPAL For SD card reader and KB ESD issue A00
A Add 100pF CE14 close to U4.3 A
Change charging mode to SDP only in S0 Add Q126 and change

95 36 HW 02/24/2012 COMPAL Samsung cell phone can't support CDP A00
R1614 to 100Kohms (reserve this solution and R1614 10kohms)
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96 36 HW 02/24/2012 COMPAL Samsung cell phone can't support CDP Change U2 to Seligo SA00004VH00 A00
D D
97 41 HW 02/24/2012 COMPAL Pericom IC fail Change U4 to Richtek SA00005A60L A00
C C
B B
A A

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LA-7781P
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Dell Latitude E6430 Compal LA-7781P Schematics

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Dell Latitude E6430 Compal LA-7781P Schematics

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A B C D E

PCB NO : LA-7781P (DA60000OP10)

@ Ivy Bridge + Panther POINT

MB Type BOM P/N

ATG TPM L51 1@ 5@

ATG Non-TPM L52 2@ 5@

MB PCB DELL CONFIDENTIAL/PROPRIETARY

USH W25Q32BVSSIG HDD

LED SMSC KBC

S0 ON ON ON ON ON SATA 4 ESATA 0 BIO

S5 S4/AC ON OFF OFF ON OFF

need to update Power Status and PM Lane 1 MINI CARD-1 WWAN

Lane 3 Express card

Lane 4 E3 Module Bay (USB3)

UMA DP/HDMI Port Connetion Lane 5 1/2vMINI CARD-3 PCIE

Port B MB HDMI Conn Lane 6 MMI

Port C Dock DP port 2 Lane 7 10/100/1G LOM

B (Q38) (Q49) (Q54) (Q34) (U78) (Q58) B

+1.8V_RUN +VCC_SA +3.3V_WLAN +3.3V_ALW_PCH +3.3V_SUS +3.3V_LAN +3.3V_M

+VCC_CORE +1.05V_RUN_VTT +1.05V_M

SI4164 Pop option

+1.5V_CPU_VDDQ +1.5V_RUN +0.75V_DDR_VTT DELL CONFIDENTIAL/PROPRIETARY

G12 LAN_SMBDATA 31 LOM SMBUS Address [C8]

Compal Electronics, Inc.

T35 VSS161 VSS234

PCI EXPRESS* - GRAPHICS

Follow check list 0.5 A28 CPU_DMI 1 2

<22> H_THERMTRIP# 1 2 H_THERMTRIP#_R AN32 SM_RCOMP2 --> 15mil 1

PM_SYNC TRST# @ RE30 0_0402_5%~D @ RC47 0_0402_5%~D DDR_HVREF_RST <12>

AL35 XDP_DBRESET#_R 2 1 XDP_DBRESET# XDP_DBRESET# <14,16>

XDP_PREQ# @ RC32 2 1 51_0402_1%~D

DDR SYSTEM MEMORY B

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PAD~D T43 @ D30 AJ32 @ T32 PAD~D

BCLK_ITP AN35 CLK_XDP_ITP <7>

11: (Default) x16 - Device 1 functions 1 and 2 disabled

1: (Default) PEG Train immediately

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PEG AND DDR

V33 AJ30 VIDSCLK <51>

VCC89 VCC_SENSE VCCSENSE <51>

WWW.AliSaler.Com +1.5V_CPU_VDDQ Source

VAXG24 VSS60 VSS141

AM23 AF4 AL19

VCCSA_SENSE VCCSA_SENSE <50>

A6 C22 VCCSA_VID_0 <50>

1 1 1 1 A2 C24 VCCSA_VID_1 <50>

DDR_A_BS0 109 110 DDR_A_RAS#

DDR_A_CAS# 115 116 M_ODT0

145 146 DDR_A_D44

1 DDR_A_D41 149 150

1 1 1 1 1 1 1 151 152 DDR_A_DQS#5

+ 153 154 DDR_A_DQS5

DDR_B_WE# 113 114 DDR_CS2_DIMMB#

DDR_B_MA13 119 120 M_ODT3

1 1 1 1 1 1 1 153 154 DDR_B_DQS5

CMOS_CLR1 CMOS setting PCH_AZ_SYNC is sampled

RH282 @ PCH_GPIO15 PXDP@ RH18 1 2 33_0402_5%~D XDP_FN16 XDP_FN6 33 34 XDP_FN14

<7,16> SIO_PWRBTN#_R HOOK1 ITPCLK#/HOOK5

PCH_JTAG_TCK TCK1 TDI PCH_JTAG_TMS

JTAG_TCK SATA5TXP SATA_PTX_DKRX_P5_C <38>

PCH_SPI_CLK T3 AH1 RBIAS_SATA3 1 2

BD82QM77 QPRE C1_BGA989~D QH1 BSS138W-7-F_SOT323-3~D

200 MIL SO8 1 2