SiHP25N50E

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Vishay Siliconix
E Series Power MOSFET
D
FEATURES
• Low figure-of-merit (FOM): Ron x Qg
TO-220AB
• Low input capacitance (Ciss)
• Reduced switching and conduction losses
G • Low gate charge (Qg)
Available
• Avalanche energy rated (UIS)
S • Material categorization: for definitions of compliance
D
G S please see www.vishay.com/doc?99912
N-Channel MOSFET
APPLICATONS
• Hard switched topologies
PRODUCT SUMMARY • Power factor correction power supplies (PFC)
VDS (V) at TJ max. 550 • Switch mode power supplies (SMPS)
RDS(on) max. at 25 °C () VGS = 10 V 0.145
• Computing
Qg (Max.) (nC) 86
- PC silver box / ATX power supplies
Qgs (nC) 14
• Lighting
Qgd (nC) 25
Configuration Single
- Two stage LED lighting

ORDERING INFORMATION
Package TO-220AB
SiHP25N50E-BE3 a
Lead (Pb)-free and halogen-free
SiHP25N50E-GE3
Note
a. “-BE3” denotes alternate manufacturing location

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT
Drain-source voltage VDS 500
V
Gate-source voltage VGS ± 30
TC = 25 °C 26
Continuous drain current (TJ = 150 °C) VGS at 10 V ID
TC = 100 °C 16 A
Pulsed drain current a IDM 50
Linear derating factor 0.2 W/°C
Single pulse avalanche energy b EAS 273 mJ
Maximum power dissipation PD 250 W
Operating junction and storage temperature range TJ, Tstg -55 to +150 °C
Drain-source voltage slope TJ = 125 °C 65
dV/dt V/ns
Reverse diode dV/dt d 25
Soldering recommendations (peak temperature) c For 10 s 300 °C
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature
b. VDD = 50 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 , IAS = 4.4 A
c. 1.6 mm from case
d. ISD  ID, dI/dt = 100 A/μs, starting TJ = 25 °C
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S22-0948-Rev. E, 21-Nov-2022 1 Document Number: 91626

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THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT
Maximum junction-to-ambient RthJA - 62
°C/W
Maximum junction-to-case (drain) RthJC - 0.5

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-source breakdown voltage VDS VGS = 0 V, ID = 250 μA 500 - - V
VDS temperature coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.59 - V/°C
Gate-source threshold Voltage (N) VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V
VGS = ± 20 V - - ± 100 nA
Gate-source leakage IGSS
VGS = ± 30 V - - ±1 μA
VDS = 500 V, VGS = 0 V - - 1
Zero gate voltage drain current IDSS μA
VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 25
Drain-source on-state resistance RDS(on) VGS = 10 V ID = 12 A - 0.125 0.145 
Forward transconductance gfs VDS = 30 V, ID = 12 A - 6.6 - S
Dynamic
Input capacitance Ciss VGS = 0 V, - 1980 -
Output capacitance Coss VDS = 100 V, - 105 -
Reverse transfer capacitance Crss f = 1 MHz - 8 -
Effective output capacitance, energy pF
Co(er) - 105 -
related a
VDS = 0 V to 400 V, VGS = 0 V
Effective output capacitance, time 
Co(tr) - 285 -
related b
Total gate charge Qg - 57 86
Gate-source charge Qgs VGS = 10 V ID = 12 A, VDS = 400 V - 14 - nC
Gate-drain charge Qgd - 25 -
Turn-on delay time td(on) - 19 38
Rise time tr VDD = 400 V, ID = 12 A - 36 72
ns
Turn-off delay time td(off) Rg = 9.1 , VGS = 10 V - 57 86
Fall time tf - 29 58
Gate input resistance Rg f = 1 MHz, open drain - 0.56 - 
Drain-Source Body Diode Characteristics

Continuous source-drain diode current IS MOSFET symbol D

- - 12
showing the 
A
integral reverse G

Pulsed diode forward current ISM p - n junction diode S

- - 50

Diode forward voltage VSD TJ = 25 °C, IS = 16.5 A, VGS = 0 V - - 1.2 V

Reverse recovery time trr - 338 - ns
TJ = 25 °C, IF = IS,
Reverse recovery charge Qrr - 5.3 - μC
dI/dt = 100 A/μs, VR = 25 V
Reverse recovery current IRRM - 29 - A
Notes
a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS
b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS

S22-0948-Rev. E, 21-Nov-2022 2 Document Number: 91626

For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

70 3.0
TOP 15 V
14 V TJ = 25 °C ID = 12 A
13 V

RDS(on), Drain-to-Source On-Resistance

60 12 V
11 V 2.5
ID, Drain-to-Source Current (A)

10 V
9V
50 8V
7V 2.0
6V

(Normalized)
40 BOTTOM 5 V

1.5
30

1.0
20
VGS = 10 V

10 0.5

0 0
0 5 10 15 20 25 30 -60 -40 -20 0 20 40 60 80 100 120 140 160
VDS, Drain-to-Source Voltage (V) TJ, Junction Temperature (°C)

Fig. 1 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature

40 10 000
TOP 15 V
14 V
TJ = 150 °C
13 V
12 V Ciss
11 V
ID, Drain-to-Source Current (A)

10 V
30 9V 1000 VGS = 0 V, f = 1 MHz
8V Ciss = Cgs + Cgd, Cds shorted
C, Capacitance (pF)

7V
6V Crss = Cgd
BOTTOM 5 V Coss = Cds + Cgd
Coss
20 100

Crss
10 10

0 1
0 5 10 15 20 25 30 0 100 200 300 400 500
VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig. 2 - Typical Output Characteristics Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

70 12
TJ = 25 °C
60 5000
10
ID, Drain-to-Source Current (A)

50
8
Coss
40
Coss (pF)

Eoss (μJ)

Eoss
TJ = 150 °C 6
30 500

4
20
VDS = 28.6 V
10 2

0 50 0
0 5 10 15 20 25 0 100 200 300 400 500
VGS, Gate-to-Source Voltage (V) VDS

Fig. 3 - Typical Transfer Characteristics Fig. 6 - COSS and EOSS vs. VDS

S22-0948-Rev. E, 21-Nov-2022 3 Document Number: 91626

For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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24 30
VDS = 400 V
VDS = 250 V
20 VDS = 100 V
24
VGS, Gate-to-Source Voltage (V)

ID, Drain Current (A)

16
18

12

12
8

6
4

0 0
0 20 40 60 80 100 120 25 50 75 100 125 150
Qg, Total Gate Charge (nC) TC, Case Temperature (°C)

Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 10 - Maximum Drain Current vs. Case Temperature

100 650

VDS, Drain-to-Source Breakdown Voltage (V)

625
ISD, Reverse Drain Current (A)

600
TJ = 150 °C
10
575

550

TJ = 25 °C 525
1
500

475
VGS = 0 V ID = 250 μA
0.1 450
0.2 0.4 0.6 0.8 1.0 1.2 1.4 -60 -40 -20 0 20 40 60 80 100 120 140 160
VSD, Source-Drain Voltage (V) TJ, Junction Temperature (°C)

Fig. 8 - Typical Source-Drain Diode Forward Voltage Fig. 11 - Typical Drain-to-Source Voltage vs. Temperature

Operation in this Area

100
Limited by RDS(on) IDM Limited

10 100 μs
ID, Drain Current (A)

Limited by RDS(on)*
1 ms
1

10 ms
0.1
TC = 25 °C
TJ = 150 °C
Single Pulse
BVDSS Limited
0.01
1 10 100 1000
VDS, Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified

Fig. 9 - Maximum Safe Operating Area

S22-0948-Rev. E, 21-Nov-2022 4 Document Number: 91626

For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Vishay Siliconix

1
Duty Cycle = 0.5
Normalized Effective Transient

0.2
Thermal Impedance

0.1
0.1
0.05

0.02
Single Pulse

0.01
0.0001 0.001 0.01 0.1 1
Pulse Time (s)

Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case

RD VDS
VDS
tp
VGS VDD
D.U.T.
RG
+
- VDD
VDS
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
IAS

Fig. 13 - Switching Time Test Circuit Fig. 16 - Unclamped Inductive Waveforms

VDS
QG
90 % 10 V

QGS QGD

10 % VG
VGS
td(on) tr td(off) tf

Charge
Fig. 14 - Switching Time Waveforms Fig. 17 - Basic Gate Charge Waveform

Current regulator
Same type as D.U.T.
L
VDS
50 kΩ
Vary tp to obtain
12 V 0.2 µF
required IAS 0.3 µF

RG D.U.T +
+ VDS
V DD D.U.T. -
-
IAS
VGS
10 V
tp 0.01 Ω 3 mA

IG ID
Current sampling resistors

Fig. 15 - Unclamped Inductive Test Circuit Fig. 18 - Gate Charge Test Circuit

S22-0948-Rev. E, 21-Nov-2022 5 Document Number: 91626

For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
 SiHP25N50E
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Vishay Siliconix

Peak Diode Recovery dV/dt Test Circuit

+ Circuit layout considerations

D.U.T.
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
-

- +
-

Rg • dV/dt controlled by Rg +
• Driver same type as D.U.T. VDD
-
• ISD controlled by duty factor “D”
• D.U.T. - device under test

Driver gate drive

Period P.W.
D=
P.W. Period

VGS = 10 Va

D.U.T. lSD waveform

Reverse
recovery Body diode forward
current current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
VDD

Re-applied
voltage
Body diode forward drop
Inductor current

Ripple ≤ 5 % ISD

Note
a. VGS = 5 V for logic level devices

Fig. 19 - For N-Channel

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Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91626.

S22-0948-Rev. E, 21-Nov-2022 6 Document Number: 91626

For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
 Package Information
www.vishay.com
Vishay Siliconix
TO-220-1

A
E
F

ØP

Q
H(1)
D

1 2 3
L(1)

M*

b(1)
L

C
b
e
J(1)
e(1)

MILLIMETERS INCHES
DIM.
MIN. MAX. MIN. MAX.
A 4.24 4.65 0.167 0.183
b 0.69 1.02 0.027 0.040
b(1) 1.14 1.78 0.045 0.070
c 0.36 0.61 0.014 0.024
D 14.33 15.85 0.564 0.624
E 9.96 10.52 0.392 0.414
e 2.41 2.67 0.095 0.105
e(1) 4.88 5.28 0.192 0.208
F 1.14 1.40 0.045 0.055
H(1) 6.10 6.71 0.240 0.264
J(1) 2.41 2.92 0.095 0.115
L 13.36 14.40 0.526 0.567
L(1) 3.33 4.04 0.131 0.159
ØP 3.53 3.94 0.139 0.155
Q 2.54 3.00 0.100 0.118
ECN: E21-0621-Rev. D, 04-Nov-2021
DWG: 6031
Note
• M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM

Revison: 04-Nov-2021 1 Document Number: 66542

For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Revision: 01-Jan-2023 1 Document Number: 91000