Bipolar Junction Transistor BJT

 A Bipolar Junction Transistor BJT, is a transistor whose

operation depends on the contact made by two
semiconductors.
 It can act as a switch, amplifier or oscillator.
 It is known as a bipolar transistor since its operation
requires two types of charge carriers holes and
Structure of a BJT
electrons.
 A BJT has two P-N junctions connected back to back and
 Holes constitute the dominant charge carriers in P-type
sharing a common region B base.
semiconductors while electrons are the main charge
 This ensures contacts are made in all the regions that
bearers in N-type semiconductors.
are base, collector and emitter.
 Symbols of a BJT

 The structure of a PNP bipolar transistor is shown
below.
 The BJT shown above consists of two diodes connected
back to back, resulting in the depletion of the regions
called quasi-neutral.
 The width of quasi-neutral of the emitter, base and
collector are indicated above as WE’, WB’ and WC’. They
are obtained as follows −
W′E=WE−Xn,BE
W′B=WB−Xp,BE−Xp,BC
W′C=WC−Xn,BC
 The conventional signs of the currents for the emitter,
base and collector are denoted
by IE, IB and IC respectively.
 Therefore, the collector and base current are positive
when a positive current meets the collector or base
contact. In addition, the emitter current is positive
when current leaves the emitter contact. Thus,
IE = IB + IC
 When a positive voltage is applied to the base contact
relative to the collector and emitter, the base-collector
voltage as well as base-emitter voltage becomes
positive.
 For simplicity, VCE is assumed to be zero. Transport Factor
 Diffusion of electrons occur from the emitter to the  This is given by the ratio of the collector current and the
base while diffusion of holes originates from the base to emitter current.
the emitter. Once the electrons reach the base-collector
depleted region, they are swept through the region by
an electric field. These electrons form the collector
current. Current Gain
 When a BJT is biased in the forward active mode, the  This is given by the ratio of the collector current to the
total emitter current is obtained by adding the electron base current.
diffusion current (IE,n), the hole diffusion current (IE, p)
and the base emitter current.
IE = IE,n + IE,p + Ir,d
The above explains how a BJT can produce current
 The total collector current is given by the electron
amplification. The transport factor α approaches one if
diffusion current (IE,n), less the base recombination
the collector current is almost equivalent to the emitter
current(Ir,B).
current. The current gain β thus becomes greater than
IC = IE,n − Ir,B
one.
 The sum of the base current IB is obtained by adding the
hole diffusion current (IE, p), base recombination current Note:

(Ir,B) and the base-emitter recombination current of the Gain parameters are given by;
depletion layer (Ir,d).
IB = IE,p +Ir,B + Ir,d
 ii) the base-emitter junction is forward biased to these
majority carriers and electrons cross the junction
and appear in the base region
iii) the base region is very thin and only lightly doped
with holes, so some recombination with holes
occurs but many electrons are left in the base region
iv) the base-collector junction is reverse biased to

 BJT Operation holes in the base region and electrons in the

 In the n-p-n transistor, connected as shown below, collector region, but is forward biased to electrons

transistor action is accounted for as follows: in the base region; these electrons are attracted by
the positive potential at the collector terminal
v) a large proportion of the electrons in the base
region cross the base collector junction into the
collector region, creating a collector current
 Conventional current flow is taken to be in the direction
of the motion of holes, that is, in the opposite direction
to electron flow.
 Around 99.5% of the electrons leaving the emitter will
cross the base-collector junction and only 0.5% of the
i) the majority carriers in the n-type emitter material
electrons will recombine with holes in the narrow base
are electrons
region.

 In the p-n-p transistor, connected as shown below,
transistor action is accounted for as follows:
i) the majority carriers in the emitter p-type material
are holes
ii) the base-emitter junction is forward biased to the
majority carriers and the holes cross the junction
and appear in the base region
iii) the base region is very thin and is only lightly
doped with electrons so although some electron
hole pairs are formed, many holes are left in the
base region
iv) the base-collector junction is reverse biased to
electrons in the base region and holes in the
collector region, but forward biased to holes in the
base region; these holes are attracted by the
negative potential at the collector terminal
v) a large proportion of the holes in the base region
cross the base-collector junction into the collector
region, creating a collector current; conventional
current flow is in the direction of hole movement
The transistor action for a p-n-p device is shown
diagrammatically below. Around 99.5% of the
holes leaving the emitter will cross the base-collector
junction and only 0.5% of the holes will recombine with
electrons in the narrow base region.
 However, a small leakage current, ICBO, flows from the
base to the collector due to thermally generated
minority carriers (electrons in the collector and holes in
the base), being present. Once again, the base-collector
junction is forward biased to these minority carriers.
 With modern transistors, leakage current is usually
very small (typically less than 100 nA) and in most

NB: The output Collector current is determined by the applications it can be ignored.

amount of current flowing into the Base terminal of the

device and thereby making the Bipolar Transistor a
CURRENT operated device.
Leakage current
 For an n-p-n transistor, the base-collector junction is
reverse biased for majority carriers, but a small leakage
current, ICBO, flows from the collector to the base
due to thermally generated minority carriers (holes in
the collector and electrons in the base), being present.
The base-collector junction is forward biased to these
minority carriers.
 Similarly, for a p-n-p transistor, the base-collector
junction is reverse biased for majority carriers.
 Bias and current flow  Transistor amplifier operating configurations
and characteristic
 In normal operation (i.e. for operation as a linear
 Three basic circuit configurations are used for transistor
amplifier) the base-emitter junction of a transistor is
amplifiers.
forward biased and the collector base junction is
 These three circuit configurations depend
reverse biased.
upon which one of the three transistor connections is
 The base region is, however, made very narrow so that
made common to both the input and the output.
carriers are swept across it from emitter to collector so
 In the case of bipolar junction transistors, the
that only a relatively small current flows in the base. To
configurations are known as common-emitter,
put this into context, the current flowing in the emitter
common-collector (or emitter-follower), and common-
circuit is typically 100 times greater than that flowing in
base.
the base.
 The direction of conventional current flow is
from emitter to collector in the case of a p-n-p
transistor, and collector to emitter in the case of an n-
p-n device, as shown below.
The equation that relates current flow in the collector,
base, and emitter circuits is:
IE = IB + IC
Where, IE is the emitter current, IB is the base current,
and IC is the collector current (all expressed in the same
units).
 Input Characteristics Curve

It shows the relationship between the input current IB and

input voltage VBE for a constant output voltage VCE.

The input curve for VCE = 0 resembles the forward V-I

characteristics curve of the diode because when VCE = 0, the
CB junction has no effect in the performance of the transistor.
i) Common Emitter Configuration
When VCE increases, the CB junction becomes reverse
biased and the positive collector starts to attract the electrons
 Consider a PNP transistor
in the base which have diffused from the emitter. Due
In CEC, the emitter of the transistor is made common to both to this reason, the base current IB for the same VBE when VCE
other terminals. not equal to zero will be less than the base current for

The input is applied between base and VCE equal to zero.

emitter while the output is taken between collector and

emitter. This configuration is most widely used.
Output Characteristics Curve  When VCE reaches a sufficiently high voltage, the
reverse biased CB junction goes into breakdown and the
This shows the relationship between the output current IC and
collector current increases rapidly.
the output voltage VCE for a constant base current IB.
The output curves are divided into three regions:

(a) Saturation Region

(b) Active Region
(c) Breakdown Region.
 When VBE = 0.7V and VCC = 0V, both the BE junction
and the CB junction are forward biased.
 Here, VCE = 0V and hence IC = 0.
 When both junctions are forward biased, the transistor
is in the saturation region of its operation.
 As VCC is increased, VCE increases gradually and hence
increases IC. We use the symbol hFE to represent the static value
 When VCE exceeds 0.7V, the CB junction becomes of common-emitter current gain, thus:
reverse biased and the transistor goes into the active or
linear region of its operation.
 Once the CB junction is reverse biased,
IC levels off and remains essentially constant for a given Similarly, we use hfe to represent the dynamic value of
value of IB as VCE continues to increase. common emitter current gain, thus:
 The input is applied between the emitter and base while the
output is taken between the collector and base.

Input resistance (from the input characteristic)

Output resistance (from the out characteristic)

The collector current consists of two parts:

(a) the current produced by normal transistor action, i.e.

component depending upon emitter current (αIE)
which is produced by majority carriers and
(b) the leakage current due to the movement of minority
carriers across CB junction on account of it being
reverse biased. This leakage current flows
ii) Common Base Configuration
in the same direction as that of IC and is abbreviated as
In CBC, the base of the transistor is made common to both ICBO (Collector Base current with Emitter open).
emitter and collector terminal. Then total collector current, IC = αIE + ICBO. (ICBO is
 usually very small and may be neglected in transistor
calculations)
Then, IC = αIE + ICBO. = α(IB + IC)+ ICBO = αIB + αIC
+ICBO
Or, IC(1-α) = αIB + ICBO
Or, IC = IB[α/(1-α)] + ICBO [1/(1-α)] = β.IB + (β+1).ICBO
= β.IB + γ.ICBO

Input Characteristics Curve

The graph of IE versus VBE resembles that of a forward biased

diode. However, the exact shape of this curve depends
on the reverse biasing output voltage, VCB. The greater the
value of VCB, the more readily minority carriers in the base
are swept through the CB junction. The figure alongside
represents the different input DC characteristics curves of
CB transistor for different values of VCB.
Output Characteristics Curve
From the figure, we note that each curve starts at IC = 0 and
rises rapidly for a small positive increase in VCB. A very
small portion of emitter current is able to enter the collector
region until the reverse biasing voltage VCB is allowed to
reach 0 value large enough to propel all carriers across the
junction. When VCB is negative, the junction is actually
forward biased. Thus the portion of the plot where VCB is
negative is called the saturation region of the transistor.
Once VCB reaches a value large enough to ensure that a large iii) Common Collector Configuration
portion of carriers enter the collector (close to 0), we see
In CCC, the collector terminal is made common to both emitter
that the curves more or less level off. In other words, for a fixed
and base terminals. The input is applied between base
emitter current, the collector current remains
and collector while the output is taken between emitter and
essentially constant for further increase in VCB. Note that IC ~
collector.
IE in active region.

Input Characteristics Curve

IB versus VCB for VCE = constant (as we have VCB = VCE – VBE,
since, VBE ~ 0.7V, VCB = VCE – 0.7). Therefore, in
order to keep the CB junction reversed biased (VCB > 0), it is
necessary that VCB be larger than VCE – 0.7 V.
From the figure alongside, we can see that each curve is drawn
for a different fixed value of VCE and that each shows
the base current going to 0 very quickly as VCB increases
slightly. This behavior can be explained by remembering
Output Characteristics Curve
Plot of IE versus VCE for IB = constant
These characteristics curves are very much similar to those of

that VBE must remain in the neighborhood of 0.5V to 0.7V in CE configuration. The only difference is that IE = (β+1)IB
or IE = IC + IB has been used as output current here instead of
order for any appreciable base current to flow. But, VBE
IC.
= VCE – VCB. Therefore, if the value of VCB is allowed to a point
where it is near the value of VCE, the value of VBE Load lines
approaches 0, and no base current will flow. Let, VCE = 2V,
The a.c. performance of a transistor amplifier stage can
when VCB = 1.3V, then VBE = 2-1.3 = 0.7V and we
be predicted using a load line superimposed on the relevant set
therefore expect a substantial base current. If VCB is now
of output characteristics. For a bipolar transistor
allowed to increase to 2V, then VBE = 2-2 = 0V, and the BE
operating in common-emitter mode the required
junction is no longer forward biased and hence IB = 0 when VCE
characteristics are IC plotted against VCE. One end of the load
= VCB = 2V.
line corresponds to the supply voltage (VCC) while the
other end corresponds to the value of collector or drain current
that would flow with the device totally saturated
(VCE = 0V). In this condition:

Where RL is the value of collector or drain load resistance.

The figure below shows a load line superimposed on a set The effect of superimposing an alternating base current (of 20
of output characteristics for a bipolar transistor operating in μA peak-peak) to the d.c. bias current (of 20 μA) can be clearly
common-emitter mode. The quiescent point (or seen. The corresponding collector current signal can be
operating point) is the point on the load line that corresponds determined by simply moving up and down the load line.
to the conditions that exist when no-signal is
applied to the stage. In the figure, the base bias current
is set at 20 μA so that the quiescent point effectively
sits roughly halfway along the load line. This position ensures  The Transistor as a Switch
that the collector voltage can swing both
When used as an AC signal amplifier, the transistors Base
positively (above) and negatively (below) its quiescent
biasing voltage is applied so that it operates within its
value (VCQ).
"Active" region and the linear part of the output characteristics
curves are used. However, both the NPN & PNP type
bipolar transistors can be made to operate as an "ON/OFF" type
solid state switch for controlling high power devices
such as motors, solenoids or lamps. If the circuit uses the
Transistor as a Switch, then the biasing is arranged to
operate in the output characteristics curves in the areas known
as the "Saturation" and "Cut-off" regions as shown below.
Transistor Curves
 depletion layer being as small as possible and maximum
current flows through the device. The transistor is
switched "Fully-ON". Then we can summarize this as:
• 1. Cut-off Region - Both junctions are Reverse-biased,
Base current is zero or very small resulting in zero
Collector current flowing, the device is switched fully
"OFF".
• 2. Saturation Region - Both junctions are Forward-
biased, Base current is high enough to give a Collector-

 The pink shaded area at the bottom represents the Emitter voltage of 0v resulting in maximum Collector

"Cut-off" region. Here the operating conditions of the current flowing, the device is switched fully "ON".

transistor are zero input base current (Ib), zero output  An example of an NPN Transistor as a switch being used

collector current (Ic) and maximum collector voltage to operate a relay is given below. With inductive loads

(Vce) which results in a large depletion layer and no such as relays or solenoids a flywheel diode is placed

current flows through the device. The transistor is across the load to dissipate the back EMF generated by

switched "Fully-OFF". the inductive load when the transistor switches "OFF"

 The lighter blue area to the left represents the and so protect the transistor from damage. If the load is

"Saturation" region. Here the transistor will be biased of a very high current or voltage nature, such as motors,

so that the maximum amount of base current is applied, heaters etc, then the load current can be controlled via

resulting in maximum collector current flow and a suitable relay as shown.

minimum collector emitter voltage which results in the

 the channel and charge is capacitively coupled to the
channel.
 JFET transistors comprise a channel of p-type or
n-type material surrounded by material of the opposite
polarity. The ends of the channel (in which conduction
takes place) form electrodes known as the source
and drain.
 The effective width of the channel (in which conduction
takes place) is controlled by a charge
placed on the third (gate) electrode. The effective

Field effect transistors resistance between the source and drain is thus
determined by the voltage present at the gate.
Field effect transistors are available in two basic forms; junction
gate and insulated gate which is more commonly known as the
standard Metal Oxide Semiconductor Field Effect Transistor or
MOSFET for short.

 The gate-source junction of a junction gate field effect

transistor (JFET) is effectively a reverse-biased p-n
junction.  The + signs in the figure below is used to indicate a

 The gate connection of an insulated gate field effect region of heavy doping thus n+ simply indicates a

transistor (IGFET), on the other hand, is insulated from heavily doped n-type region.
 The Field Effect Transistor is a unipolar device that has very
similar properties to those of the Bipolar Transistor ie,
high efficiency, instant operation, robust and cheap, and they
can be used in most circuit applications that use the
equivalent Bipolar Junction Transistors, (BJT). They can be
made much smaller than an equivalent BJT transistor
and along with their low power consumption and dissipation

 JFETs offer a very much higher input resistance make them ideal for use in integrated circuits such as the

when compared with bipolar transistors. For example, CMOS range of chips.

the input resistance of a bipolar transistor operating  As with bipolar transistors, the characteristics of a
in common-emitter mode is usually around 2.5 k. FET are often presented in the form of a set of graphs
A JFET transistor operating in equivalent common relating voltage and current present at the transistors,
source mode would typically exhibit an input resistance terminals.
of 100 M! This feature makes JFET devices ideal for
Field effect transistor characteristics
use in applications where a very high input resistance is
desirable. A typical mutual characteristic (ID plotted against
VGS) for a small-signal general-purpose n-channel field
NB: The Field Effect Transistor, or simply FET , use the voltage
effect transistor operating in common-source mode is
that is applied to their input terminal to control the output
shown below.
current, since their operation relies on the electric field (hence
the name field effect) generated by the input voltage. This then
makes the Field Effect Transistor a VOLTAGE operated device.
 curves, each relating to a different value of gate-source voltage
VGS.

This characteristic shows that the

drain current is progressively reduced as the gate-source
voltage is made more negative. At a certain value of VGS
the drain current falls to zero and the device is said to
be cut-off.
The figure below shows a typical family of output
characteristics (ID plotted against VDS) for a small-signal
general-purpose n-channel FET operating in common
source mode. This characteristic comprises a family of
As in the case of the bipolar junction transistor, the
output characteristic curves for an n-channel FET have
a ‘knee’ that occurs at low values of VDS. Also, note
how the curves become flattened above this value with
the drain current ID not changing very significantly for a
comparatively large change in drain-source voltage VDS.
These characteristics are, in fact, even flatter than those
for a bipolar transistor. Because of their flatness, they are
often said to represent a constant current characteristic.
  The gain offered by a field effect transistor is normally
expressed in terms of its forward Trans conductance
(gfs or Yfs,) in common-source mode. In this mode, the
input voltage is applied to the gate and the output
current appears in the drain (the source is effectively
common to both the input and output circuits).
In common-source mode, the static (or d.c.) forward
transfer conductance is given by:
Whilst the dynamic (or a.c.) forward transfer
conductance is given by:
Field effect transistors biasing and configurations
 The semiconductor "Channel" of the Junction Field
Effect Transistor is a resistive path through which a
voltage Vds causes a current Id to flow.
 A voltage gradient is thus formed down the length of
the channel with this voltage becoming less positive as
we go from the drain terminal to the source terminal.
 The PN junction therefore has a high
reverse bias at the drain terminal and a lower reverse
bias at the source terminal. This bias causes a "depletion
layer" to be formed within the channel and whose width
increases with the bias. FET's control the current flow
through them between the drain and source terminals
by controlling the voltage applied to the gate terminal.
 In an N-channel JFET this gate voltage is negative while
for a P-channel JFET the gate voltage is positive.
 Bias arrangement for an N-channel JFET is as shown
below
The cross sectional diagram above shows an N-type
semiconductor channel with a P-type region called the gate
diffused into the N-type channel forming a reverse biased PN
junction and it is this junction which forms the depletion
layer around the gate area. This depletion layer restricts the
current flow through the channel by reducing its
effective width and thus increasing the overall resistance of the
channel.
 When the gate voltage Vgs =0 and Vds = 0,Id = 0 and the
regions around the junctions are of equal thickness and
symmetrical.
 When the gate voltage Vgs is equal to 0V and external
voltage (Vds) applied between the drain and the source
is gradually increased from zero, Id increases
proportionally as per Ohm’s law. This ohmic
relationship between Vds and Id continues until Vds
reaches a certain critical value called, pinch-off voltage
Vpo when maximum current (Idss) will flow through the
channel slightly restricted by the small depletion layer.
 When Vds is increased beyond Vpo, Id remains constant
at its maximum value Idss, due to the fact that the
resistance of the channel increases at the same rate as
that of Vds. In other words, increase in Vds is
neutralized by increase in Rds. Ultimately, a certain
value of Vds is reached when JFET breaks down and Id
increases to an excessive value.
 If a negative voltage (Vgs) is now applied to the gate the
size of the depletion layer begins to increase reducing
the overall effective area of the channel and thus
reducing the current flowing through it, a sort of
"squeezing" effect. As the gate voltage (Vgs) is made
more negative, the width of the channel decreases until
no more current flows between the
drain and the source and the FET channel is said to be
"cut-off". In this cut-off region the gate voltage, Vgs(off)
 controls the channel current and Vds has little or no The characteristics curves example shown above, shows the
effect. four different regions of operation for a JFET and these
are given as:

• Ohmic Region - The depletion layer of the channel is very

small and the JFET acts like a variable resistor.
• Cut-off Region - The gate voltage is sufficient to cause the
JFET to act as an open circuit as the channel
resistance is at maximum.

•Pinch-oof or Saturation or Active Region - The JFET becomes

a good conductor and is controlled by the gate-source
voltage, (Vgs) supplied entirely by Vds while the drain-source
voltage, (Vds) has little or no effect.

• Breakdown Region - The voltage between the drain and

source, (Vds) is high enough to causes the JFET's
 The result is that the FET acts more like a voltage
resistive channel to break down and pass current.
controlled resistor which has zero resistance when Vgs
Note: The control of the drain current by a negative gate
= 0 and maximum "ON" resistance (Rds) when the gate
potential makes the Junction Field Effect Transistor useful as a
voltage is very negative.
switch and it is essential that the gate voltage is never positive
for an N-channel JFET as the channel current will flow
to the gate and not the drain resulting in damage to the JFET.
The principals of operation for a P-channel JFET are
the same as for the N-channel JFET, except that the polarity of
the voltages need to be reversed.

Where field effect transistors are used, the corresponding

configurations are common source, common
drain (or source follower) and common gate.

The MOSFET

When the Gate input is electrically insulated from the main

current carrying channel the FET is called an Insulated Gate
Field Effect Transistor. The most common type of insulated
gate FET or IGFET as it is sometimes called, is the Metal
Oxide Semiconductor Field Effect Transistor or MOSFET for
short.

This isolation of the controlling gate makes the input resistance

of the MOSFET extremely high in the Mega-ohms region and
almost infinite. As the gate terminal is isolated from the main
current carrying channel ""NO current flows into the gate"" and
like the JFET, the MOSFET also acts like a voltage controlled
resistor. Also like the JFET, this very high input  The voltage at gate controls the operation of the
resistance can easily accumulate large static charges resulting MOSFET. In this case, both positive and negative
in the MOSFET becoming easily damaged unless voltages can be applied on the gate as it is insulated
carefully handled or protected. from the channel. With negative gate bias voltage, it
acts as depletion MOSFET while with positive gate bias
Basic MOSFET Structure and Symbol
voltage it acts as an Enhancement MOSFET.
The gate of a JFET must be biased in such a way as to forward-
Classification of MOSFETs
bias the PN junction but in a MOSFET device no such limitations
applies so it is possible to bias the gate in either polarity.  Depending upon the type of materials used in the
construction, and the type of operation, the MOSFETs
This makes MOSFET's specially valuable as electronic switches
are classified as in the following figure.
or to make logic gates because with no bias they are normally
non-conducting and the high gate resistance means that very
little control current is needed. Both the P-channel and
the N-channel MOSFET is available in two basic forms, the
Enhancement type and the Depletion type.
After the classification, let us go through the symbols of
MOSFET.
The N-channel MOSFETs are simply called as NMOS. The
symbols for N-channel MOSFET are as given below.
The P-channel MOSFETs are simply called as PMOS. The
symbols for P-channel MOSFET are as given below.
Usually an NChannel MOSFET is considered for explanation as
it is mostly used.
Construction of N- Channel MOSFET
Let us consider an N-channel MOSFET to understand it’s
working. A lightly doped P-type substrate is taken into which
two heavily doped N-type regions are diffused, which act as
source and drain. Between these two N+ regions, there occurs
diffusion to form an Nchannel, connecting drain and source.
A thin layer of Silicon dioxide (SiO2) is grown over the entire
surface and holes are made to draw ohmic contacts for drain
and source terminals. A conducting layer of aluminum is laid
over the entire channel, upon this SiO2 layer from source to
drain which constitutes the gate. The SiO2 substrate is
connected to the common or ground terminals.

Because of its construction, the MOSFET has a very less chip

area than BJT, which is 5% of the occupancy when compared to
bipolar junction transistor. This device can be operated in 2
modes. They are depletion and enhancement modes.

Working of N - Channel depletion mode MOSFET

For now, we have an idea that there is no PN junction present
between gate and channel in this, unlike a FET. We can also
observe that, the diffused channel N between two N+ regions,
the insulating dielectric SiO2 and the aluminum metal layer of
the gate together form a parallel plate capacitor.
When no voltage is applied between gate and source, some
current flows due to the voltage between drain and source. Let
some negative voltage is applied at VGG. Then the minority
carriers i.e. holes, get attracted and settle near SiO2 layer. But
the majority carriers, i.e., electrons get repelled.

If the NMOS has to be worked in depletion mode, the gate
terminal should be at negative potential while drain is at
positive potential, as shown in the following figure.
With some amount of negative potential at VGG a certain
amount of drain current ID flows through source to drain. When
this negative potential is further increased, the electrons get
depleted and the current ID decreases. Hence the more
negative the applied VGG, the lesser the value of drain
current ID will be.
The channel nearer to drain gets more depleted than at
source like in FET and the current flow decreases due to this
effect. Hence it is called as depletion mode MOSFET.
Working of N-Channel MOSFET Enhancement Mode
The same MOSFET can be worked in enhancement mode, if we
can change the polarities of the voltage VGG. So, let us consider
the MOSFET with gate source voltage VGG being positive as
shown in the following figure.
When no voltage is applied between gate and source, some
current flows due to the voltage between drain and source. Let
some positive voltage is applied at VGG. Then the minority
carriers i.e. holes, get repelled and the majority carriers i.e.
electrons gets attracted towards the SiO2 layer.
With some amount of positive potential at VGG a certain
amount of drain current ID flows through source to drain. When
this positive potential is further increased, the
current ID increases due to the flow of electrons from source
and these are pushed further due to the voltage applied at VGG.
Hence the more positive the applied VGG, the more the value of
drain current ID will be. The current flow gets enhanced due to
the increase in electron flow better than in depletion mode.
Hence this mode is termed as Enhanced Mode MOSFET.
P - Channel MOSFET
The construction and working of a PMOS is same as NMOS. A
lightly doped n-substrate is taken into which two heavily
doped P+ regions are diffused. These two P+ regions act as
source and drain. A thin layer of SiO2 is grown over the surface.
Holes are cut through this layer to make contacts with P+
regions, as shown in the following figure.
 This can be better understood by having an idea on the drain
characteristics curve.

Drain Characteristics

The drain characteristics of a MOSFET are drawn between the

drain current ID and the drain source voltage VDS. The
characteristic curve is as shown below for different values of
inputs.
Working of PMOS

When the gate terminal is given a negative potential

at VGG than the drain source voltage VDD, then due to the P+
regions present, the hole current is increased through the
diffused P channel and the PMOS works in Enhancement
Mode.

When the gate terminal is given a positive potential at VGG than

the drain source voltage VDD, then due to the repulsion, the
depletion occurs due to which the flow of current reduces. Thus
PMOS works in Depletion Mode. Though the construction
differs, the working is similar in both the type of MOSFETs.
Hence with the change in voltage polarity both of the types can
be used in both the modes.
Actually when VDS is increased, the drain current ID should
increase, but due to the applied VGS, the drain current is
controlled at certain level. Hence the gate current controls the
output drain current.
Transfer Characteristics Comparison between BJT, FET and MOSFET

Transfer characteristics define the change in the value Now that we have discussed all the above three, let us try to
of VDS with the change in ID and VGS in both depletion and compare some of their properties.
enhancement modes. The below transfer characteristic curve is
TERMS BJT FET MOSFET
drawn for drain current versus gate to source voltage.

Current Voltage Voltage

Device type
controlled controlled Controlled

Current Bipolar Unipolar Unipolar

flow

Not
Terminals Interchangeable Interchangeable
interchangeable

Operational No modes Depletion mode Both

modes only Enhancement
and Depletion
modes
Input
Low High Very high
impedance

Output
Moderate Moderate Low
resistance

Operational
Low Moderate High
speed

Noise High Low Low

Thermal
Low Better High
stability