Chapter 3

8086 Microprocessor Programming &

Instruction Sets

Lecture 2
INSTRUCTION SET
8086 Microprocessor
Instruction Set

8086 supports 6 types of instructions.

1. Data Transfer Instructions

2. Arithmetic Instructions

3. Logical Instructions

4. String manipulation Instructions

5. Process Control Instructions

6. Control Transfer Instructions

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8086 Microprocessor
Instruction Set

Instructions that are used to transfer data/

address in to registers, memory locations and I/O
1. Data Transfer Instructions

ports.
Generally involve two operands
✔ Source operand and
✔ Destination operand of the same size.
Source: Register or a memory location or an
immediate data
Destination : Register or a memory location.
The size should be a either a byte or a word.
A 8-bit data can only be moved to 8-bit register/
memory and
A 16-bit data can be moved to 16-bit register/ memory.
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8086 Microprocessor
Instruction Set

Examples

✔ MOV
1. Data Transfer Instructions

Move data between source and

destination
✔ XCHG exchange(swamp) two values
✔ PUSH put data on top of stack
✔ POP read data from top of Stack
✔ IN Read an information from input
device
✔ OUT Send data to output device

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8086 Microprocessor
Instruction Set

MOV reg2/ mem, reg1/ mem

✔ MOV reg2, reg1

1. Data Transfer Instructions

;(reg2) ← (reg1)

✔ MOV mem, reg1 ;(mem) ← (reg1)

✔ MOV reg2, mem ;(reg2) ← (mem)

MOV reg/ mem, data

✔ MOV reg, data ;(reg) ← data

✔ MOV mem, data ;(mem) ← data

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8086 Microprocessor
Instruction Set

XCHG reg2/ mem, reg1

✔
1. Data Transfer Instructions

XCHG reg2, reg1 ; (reg2) ↔

(reg1)

✔ XCHG mem, reg1 ; (mem) ↔

(reg1)

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8086 Microprocessor
Instruction Set

PUSH reg16/ mem

PUSH reg16 (SP) ← (SP) – 2

1. Data Transfer Instructions

MA S = (SS) x 16 10 + SP
(MA S ; MA S + 1) ← (reg16)

PUSH mem (SP) ← (SP) – 2

MA S = (SS) x 16 10 + SP
(MA S ; MA S + 1) ← (mem)

POP reg16/ mem

POP reg16 MA S = (SS) x 16 10 + SP
(reg16) ← (MA S ; MA S + 1)
(SP) ← (SP) + 2

POP mem MA S = (SS) x 16 10 + SP

(mem) ← (MA S ; MA S + 1)
(SP) ← (SP) + 2
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8086 Microprocessor
Instruction Set

IN A, [DX]
1. Data Transfer Instructions

IN AL, [DX] PORTaddr = (DX)

(AL) ← (PORT)

IN AX, [DX] PORTaddr = (DX)

(AX) ← (PORT)

IN A, addr8
IN AL, addr8 (AL) ← (addr8)

IN AX, addr8 (AX) ← (addr8)

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8086 Microprocessor
Instruction Set

OUT [DX], A
1. Data Transfer Instructions

OUT [DX], AL PORTaddr = (DX)

(PORT) ← (AL)

OUT [DX], AX PORTaddr = (DX)

(PORT) ← (AX)

OUT addr8, A

OUT addr8, AL (addr8) ← (AL)

OUT addr8, AX (addr8) ← (AX)

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8086 Microprocessor
Instruction Set

Examples
✔ ADD Addition
✔ ADC Addition with carry
2. Arithmetic Instructions

✔ SUB Subtraction
✔ SBB Subtraction with borrow
✔ INC Increment
✔ DEC Decrement
✔ MUL Multiplication
✔ DIV Division
✔ CMP Compare

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8086 Microprocessor
Instruction Set

ADD reg2/ mem, reg1/mem

✔ ADD reg2, reg1 (reg2) ← (reg1) + (reg2)

✔ ADD reg2, mem

2. Arithmetic Instructions

(reg2) ← (reg2) + (mem)

✔ ADD mem, reg1 (mem) ← (mem)+(reg1)

ADD reg/mem, data

✔ ADD reg, data (reg) ← (reg)+ data
✔ ADD mem, data (mem) ← (mem)+data

ADD A, data
✔ ADD AL, data8 (AL) ← (AL) + data8

✔ ADD AX, data16 (AX) ← (AX) +data16

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8086 Microprocessor
Instruction Set

ADC reg2/ mem, reg1/mem

✔ ADC reg2, reg1 (reg2) ← (reg1) +
(reg2)+CF
2. Arithmetic Instructions

✔ ADC reg2, mem (reg2) ← (reg2) +

(mem)+CF

✔ ADC mem, reg1 (mem) ←

(mem)+(reg1)+CF

ADC reg/mem, data

✔ ADC reg, data (reg) ← (reg)+ data+CF

✔ ADC mem, data (mem) ← (mem)+data+CF

ADC A, data 13
8086 Microprocessor
Instruction Set

SUB reg2/ mem, reg1/mem

✔ SUB reg2, reg1 (reg2) ← (reg2) - (reg1)
2. Arithmetic Instructions

✔ SUB reg2, mem (reg2) ← (reg2) - (mem)

✔ SUB mem, reg1 (mem) ← (mem) - (reg1)

SUB reg/mem, data

✔ SUB reg, data (reg) ← (reg) - data

✔ SUB mem, data (mem) ← (mem) - data

SUB A, data
✔ SUB AL, data8 (AL) ← (AL) - data8

✔ SUB AX, data16 (AX) ← (AX) - data16

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8086 Microprocessor
Instruction Set

SBB reg2/ mem, reg1/mem

✔ SBB reg2, reg1 (reg2) ← (reg2) - (reg1) - CF
2. Arithmetic Instructions

✔ SBB reg2, mem (reg2) ← (reg2) - (mem)- CF

✔ SBB mem, reg1 (mem) ← (mem) - (reg1) –CF

SBB reg/mem, data

✔ SBB reg, data (reg) ← (reg) – data - CF

✔ SBB mem, data (mem) ← (mem) - data - CF

SBB A, data
✔ SBB AL, data8 (AL) ← (AL) - data8 - CF

✔ SBB AX, data16 (AX) ← (AX) - data16 -CF

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8086 Microprocessor
Instruction Set

INC reg/ mem

✔ INC reg8 (reg8) ← (reg8) + 1
2. Arithmetic Instructions

✔ INC reg16 (reg16) ← (reg16) + 1

✔ INC mem (mem) ← (mem) + 1

DEC reg/ mem

✔ DEC reg8 (reg8) ← (reg8) - 1

✔ DEC reg16 (reg16) ← (reg16) - 1

✔ DEC mem (mem) ← (mem) - 1

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8086 Microprocessor Instruction Set

MUL reg/ mem (Unsigned multiplication)

MUL reg For byte : (AX) ← (AL) x (reg8)

2. Arithmetic Instructions

For word : (DX)(AX) ← (AX) x (reg16)

MUL mem For byte : (AX) ← (AL) x (mem8)

For word : (DX)(AX) ← (AX) x (mem16)

IMUL reg/ mem (signed multiplication)

IMUL reg For byte : (AX) ← (AL) x (reg8)

For word : (DX)(AX) ← (AX) x (reg16)

IMUL mem For byte : (AX) ← (AX) x (mem8)

For word : (DX)(AX) ← (AX) x (mem16)

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8086 Microprocessor Instruction Set

DIV reg/ mem (Unsigned division)

DIV reg
2. Arithmetic Instructions

For 16-bit 8-bit :

(AL) ← (AX) :- (reg8) Quotient
(AH) ← (AX) MOD(reg8) Remainder
For 32-bit :- 16-bit :
(AX) ← (DX)(AX) :- (reg16) Quotient
(DX) ← (DX)(AX) MOD(reg16) Remainder

DIV mem
For 16-bit :- 8-bit :
(AL) ← (AX) :- (mem8) Quotient
(AH) ← (AX) MOD(mem8) Remainder
For 32-bit :- 16-bit :
(AX) ← (DX)(AX) :- (mem16) Quotient
(DX) ← (DX)(AX) MOD(mem16) Remainder

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8086 Microprocessor Instruction Set

IDIV reg/ mem (signed division)

IDIV reg
For 16-bit :- 8-bit :
2. Arithmetic Instructions

(AL) ← (AX) :- (reg8) Quotient

(AH) ← (AX) MOD(reg8) Remainder
For 32-bit :- 16-bit :
(AX) ← (DX)(AX) :- (reg16) Quotient
(DX) ← (DX)(AX) MOD(reg16) Remainder

IDIV mem
For 16-bit :- 8-bit :
(AL) ← (AX) :- (mem8) Quotient
(AH) ← (AX) MOD(mem8) Remainder
For 32-bit :- 16-bit :
(AX) ← (DX)(AX) :- (mem16) Quotient
(DX) ← (DX)(AX) MOD(mem16) Remainder
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8086 Microprocessor Instruction Set

CMP reg2/mem, reg1/ mem

CMP reg2, reg1

2. Arithmetic Instructions

Modify flags ← (reg2) – (reg1)

If (reg2) > (reg1) then CF=0, ZF=0, SF=0
If (reg2) < (reg1) then CF=1, ZF=0, SF=1
If (reg2) = (reg1) then CF=0, ZF=1, SF=0

CMP reg2, mem

Modify flags ← (reg2) – (mem)
If (reg2) > (mem) then CF=0, ZF=0, SF=0
If (reg2) < (mem) then CF=1, ZF=0, SF=1
If (reg2) = (mem) then CF=0, ZF=1, SF=0

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8086 Microprocessor Instruction Set

CMP reg2/mem, reg1/ mem

CMP mem, reg1

2. Arithmetic Instructions

Modify flags ← (mem) – (reg1)

If (mem) > (reg1) then CF=0, ZF=0, SF=0
If (mem) < (reg1) then CF=1, ZF=0, SF=1
If (mem) = (reg1) then CF=0, ZF=1, SF=0

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8086 Microprocessor Instruction Set

CMP reg/mem, data

CMP reg, data

2. Arithmetic Instructions

Modify flags ← (reg) – (data)

If (reg) > data then CF=0, ZF=0, SF=0
If (reg) < data then CF=1, ZF=0, SF=1
If (reg) = data then CF=0, ZF=1, SF=0

CMP mem, data

Modify flags ← (mem) – (data)
If (mem) > data then CF=0, ZF=0, SF=0
If (mem) < data then CF=1, ZF=0, SF=1
If (mem) = data then CF=0, ZF=1, SF=0

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8086 Microprocessor Instruction Set

CMP A, data

CMP AL, data8

2. Arithmetic Instructions

Modify flags ← (AL) – data8

If (AL) > data8 then CF=0, ZF=0, SF=0
If (AL) < data8 then CF=1, ZF=0, SF=1
If (AL) = data8 then CF=0, ZF=1, SF=0

CMP AX, data16

Modify flags ← (AX) – data16
If (AX) > data16 then CF=0, ZF=0, SF=0
If (mem) < data16 then CF=1, ZF=0, SF=1
If (mem) = data16 then CF=0, ZF=1, SF=0

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8086 Microprocessor Instruction Set

AND A , data
AND AL, data8 ; (AL) (AL) & data8
AND AX, data16 ; (AX) (AX) & data8
3. Logical Instructions

AND reg/mem, data

AND reg, data ; (reg) (reg) & data
AND mem, data ; (mem) (mem) & data
AND reg2/mem, reg1/mem
AND reg2,reg1 ; (reg2) (reg2) & (reg1)
AND reg2,mem ; (reg2) (reg2) & (mem)
AND mem,reg1 ; (mem) (mem) & (reg1)
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8086 Microprocessor Instruction Set

OR A, data
OR AL, data8 ; (AL) (AL)|(data8)
OR AX, data16 ;(AX) (AX)|(data16)
3. Logical Instructions

OR reg/mem, data
OR reg, data ; (reg) (reg)|(data)
OR mem, data ;(mem) (mem)|(data)
OR reg2/mem, reg1/mem
OR reg2, reg1 ; (reg2) (reg2)|(reg1)
OR reg2, mem ; (reg2) (reg2)|(mem)
OR mem, Reg1 ;(mem) (mem)|(reg1)
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8086 Microprocessor Instruction Set

TEST A, data
TEST AL, data8 ;Modify flags (AL)&(data8)

TEST AX, data16 ; Modify flags (AX)&(data16)

3. Logical Instructions

TEST reg/mem, data

TEST reg, data ; Modify flags (reg)&(data)

TEST mem, data ;Modify flags (mem)&(data)

TEST reg2/mem, reg1/mem

TEST reg2, reg1 ; Modify flags (reg2)&(reg1)

TEST reg2, mem ;Modify flags (reg2)&(mem)

TEST mem, Reg1 ; Modify flags (mem)&(reg1)

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8086 Microprocessor Instruction Set

SHR reg/mem Shift logical right

0 B7 B6 B5 B4 B3 B2 B1 B0 CF
3. Logical Instructions

SHR reg
SHR reg, 1 ; Shift to the right only once
SHR reg, CL

SHR mem
SHR mem, 1
SHR mem, CL

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8086 Microprocessor Instruction Set

SHL reg/mem Shift logical left

CF B7 B6 B5 B4 B3 B2 B1 B0 0
3. Logical Instructions

SHL reg
SHL reg, 1
SHL reg, CL
SHL mem
SHL mem, 1
SHL mem, CL

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8086 Microprocessor Instruction Set

RCR reg/mem Rotate through carry right

3. Logical Instructions

B7 B6 B5 B4 B3 B2 B1 B0 CF

RCR reg
RCR reg, 1
RCR reg, CL
RCR mem
RCR mem, 1
RCR mem, CL

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8086 Microprocessor Instruction Set

RCL reg/mem Rotate through carry left

3. Logical Instructions

CF B7 B6 B5 B4 B3 B2 B1 B0

RCL reg
RCL reg, 1
RCL reg, CL
RCL mem
RCL mem, 1
RCL mem, CL
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8086 Microprocessor Instruction Set

Reading assignment

Check for status of flags for all above

3. Logical Instructions

instructions

Study the following instructions

ROR Rotate right

ROL Rotate Left

SAL Shift Arithmetic Left

SAR Shift arithmetic right

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8086 Microprocessor Instruction Set

String : Sequence of bytes or words

4. String Manipulation Instructions

8086 instruction set includes instructions for

string
✔ movement,
✔ comparison,
✔ scan,
✔ load and store.
String instructions end with S or SB or SW.
✔ S represents string,
✔ SB represents string byte and
✔ SW represents string word.

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8086 Microprocessor Instruction Set

Offset or effective address of the

4. String Manipulation Instructions

✔ source operand is stored in SI register and

✔ destination operand is stored in DI
register.
Depending on the status of DF; SI and DI
registers are automatically updated.
✔ If DF = 0 ⇒ SI and DI are incremented by 1 for
byte and 2 for word.
✔ If DF = 1 ⇒ SI and DI are decremented by 1
for byte and 2 for word.

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8086 Microprocessor Instruction Set

REP Repeat
4. String Manipulation Instructions

used to repeat execution of string

instructions

REPZ/ REPE ; While CX ≠ 0 and ZF = 1, repeat

; execution of string instruction and
; (CX) ← (CX) – 1
Example
(Repeat CMPS or SCAS until ZF = 0)

REPNZ/ REPNE ; While CX ≠ 0 and ZF = 0, repeat

; execution of string instruction and
; (CX) ← (CX) – 1
Example
(Repeat CMPS or SCAS until ZF = 1)

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8086 Microprocessor Instruction Set

MOVS Move string of data

4. String Manipulation Instructions

MOVSB ;MAs = (DS) x 1610 + (SI)

;MA D = (ES) x 1610 + (DI)

;(MA D) ← (MAs)

;If DF = 0, then (DI) ← (DI) + 1; (SI) ← (SI) + 1

;If DF = 1, then (DI) ← (DI) - 1; (SI) ← (SI) - 1

MOVSW ;MAs= (DS) x 1610 + (SI)

;MA D = (ES) x 1610 + (DI)

;(MA D ; MAS + 1) ← (MAs; MAs + 1)

;If DF = 0, then (DI) ← (DI) + 2; (SI) ← (SI) + 2

;If DF = 1, then (DI) ← (DI) - 2; (SI) ← (SI) - 2

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8086 Microprocessor Instruction Set

CMPS Compare strings

4. String Manipulation Instructions

CMPSB
CMPSW ;MAs = (DS) x 1610 + (SI)
;MA D = (ES) x 1610 + (DI)

;Modify flags ← (MAs) - (MAD)

;If (MAs) > (MAD), then CF = 0; ZF = 0; SF = 0

;If (MAs) < (MAD), then CF = 1; ZF = 0; SF = 1
;If (MAs) = (MAD), then CF = 0; ZF = 1; SF = 0

For byte operation

If DF = 0, then (DI) ← (DI) + 1; (SI) ← (SI) + 1
If DF = 1, then (DI) ← (DI) - 1; (SI) ← (SI) - 1

For word operation

If DF = 0, then (DI) ← (DI) + 2; (SI) ← (SI) + 2
If DF = 1, then (DI) ← (DI) - 2; (SI) ← (SI) - 2

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8086 Microprocessor Instruction Set

SCAS Scan (compare) a string byte or

4. String Manipulation Instructions

word with accumulator

SCASB ;MA E = (ES) x 1610 + (DI)
;Modify flags ← (AL) - (MAE )

; If (AL) > (MAE ), then CF = 0; ZF = 0; SF = 0

; If (AL) < (MAE ), then CF = 1; ZF = 0; SF = 1
; If (AL) = (MAE ), then CF = 0; ZF = 1; SF = 0

; If DF = 0, then (DI) ← (DI) + 1

; If DF = 1, then (DI) ← (DI) – 1
SCASW ;MAE = (ES) x 1610 + (DI)
;Modify flags ← (AX) - (MA E )

;If (AX) > (MAE ; MAE + 1), then CF = 0; ZF = 0; SF = 0

;If (AX) < (MAE ; MAE + 1), then CF = 1; ZF = 0; SF = 1
;If (AX) = (MAE ; MAE + 1), then CF = 0; ZF = 1; SF = 0

If DF = 0, then (DI) ← (DI) + 2

If DF = 1, then (DI) ← (DI) – 2 37
8086 Microprocessor Instruction Set

LODS Load string byte in to AL or string word in to AX

4. String Manipulation Instructions

LODSB MA = (DS) x 1610 + (SI)

(AL) ← (MA)

If DF = 0, then (SI) ← (SI) + 1

If DF = 1, then (SI) ← (SI) – 1

LODSW
MA = (DS) x 1610 + (SI)
(AX) ← (MA ; MA + 1)

If DF = 0, then (SI) ← (SI) + 2

If DF = 1, then (SI) ← (SI) – 2

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8086 Microprocessor Instruction Set

STOS Store byte from AL or word from AX in to string

4. String Manipulation Instructions

STOSB
MAE = (ES) x 1610 + (DI)
(MAE) ← (AL)

If DF = 0, then (DI) ← (DI) + 1

If DF = 1, then (DI) ← (DI) – 1

STOSW
MAE = (ES) x 1610 + (DI)
(MAE ; MAE + 1 ) ← (AX)

If DF = 0, then (DI) ← (DI) + 2

If DF = 1, then (DI) ← (DI) – 2

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8086 Microprocessor Instruction Set

Mnemonics Explanation
5. Processor Control Instructions

STC Set CF ← 1
CLC Clear CF ← 0

CMC Complement carry CF ← /CF

STD Set direction flag DF ← 1

CLD Clear direction flag DF ← 0

STI Set interrupt enable flag IF ← 1

CLI Clear interrupt enable flag IF ← 0

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8086 Microprocessor Instruction Set

Mnemonics Explanation
5. Processor Control Instructions

NOP No operation
HLT Halt after interrupt is set

WAIT Wait for TEST pin active

LOCK Lock bus during next instruction

ESC opcode mem/ reg

Used to pass instruction to a coprocessor
which shares the address and data bus with
the 8086
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8086 Microprocessor Instruction Set

• Transfer the control to a specific

6. Control Transfer Instructions

destination or target instruction

• Do not affect flags

1. Unconditional transfers
Mnemonics Explanation
CALL reg/mem/disp16 Call subroutine
RET Return from subroutine
JMP reg/ mem/ disp8/ disp16 Unconditional jump

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8086 Microprocessor Instruction Set

2. Conditional branch instructions

6. Control Transfer Instructions

✔ signed conditional branch instructions

✔ unsigned conditional branch instructions
Checks flags
If conditions are true, the program
control is transferred to the new
memory location in the same segment
by modifying the content of IP

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8086 Microprocessor Instruction Set

signed conditional unsigned conditional

Name Alternate Name Alternate

6. Control Transfer Instructions

name name
JE disp8 JZ disp8 JE disp8 JZ disp8
Jump if Jump if Jump if Jump if
equal result is 0 equal result is 0

JNE disp8 JNZ disp8 JNE disp8 JNZ disp8

Jump if not Jump if not Jump if not Jump if not
equal zero equal zero

JG disp8 JNLE disp8 JA disp8 JNBE disp8

Jump if Jump if not Jump if Jump if not
greater less or equal above below or
equal

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8086 Microprocessor Instruction Set

signed conditional unsigned conditional

Name Alternate Name Alternate
6. Control Transfer Instructions

name name
JGE disp8 JNL disp8 JAE disp8 JNB disp8
Jump if Jump if not Jump if Jump if not
greater than less above or below
or equal equal

JL disp8 JNGE disp8 JB disp8 JNAE disp8

Jump if less Jump if not Jump if Jump if not
than greater than below above or
or equal equal

JLE disp8 JNG disp8 JBE disp8 JNA disp8

Jump if less Jump if not Jump if Jump if not
than or equal greater below or above
equal

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8086 Microprocessor Instruction Set

Other conditional flags

6. Control Transfer Instructions

Mnemonics Explanation

JC disp8 Jump if CF = 1
JNC disp8 Jump if CF = 0
JP disp8 Jump if PF = 1
JNP disp8 Jump if PF = 0
JO disp8 Jump if OF = 1
JNO disp8 Jump if OF = 0
JS disp8 Jump if SF = 1
JNS disp8 Jump if SF = 0
JZ disp8 Jump if result is zero, i.e, Z = 1
JNZ disp8 Jump if result is not zero, i.e, Z = 0
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