Exp. No.

1 Date:

AIM:
Study Basics of CRO, Function Generator and Multimeter
Exp. No. 2 Date:

AIM:
Study Characteristics and datasheet of an op-amp 741
Exp. No. 3 Date:

AIM:
Implement Inverting amplifier using an op-amp 741

APPARATUS:
Op-amp,741, resistors, function generator, CRO

THEORY:
An inverting amplifier using op-amp is a type of amplifier using op-amp where the output
waveform will be phase opposite to the input waveform. The input waveform will be amplified by
the factor Av (voltage gain of the amplifier) in magnitude and its phase will be inverted. Inthe
inverting amplifier circuit, the signal to be amplified is applied to the inverting input of the op-
amp through the input resistance R1. Rf is the feedback resistor. Rf and Rin together determine
the gain of the amplifier. Inverting operational amplifier gain can be expressed using the equation
Av = – Rf/R1. A negative sign implies that the output signal is negated. The circuit diagram of a
basic inverting amplifier using op-amp is shown below.

The input and output waveforms of an inverting amplifier using op-amp is shown in figure. The
graph is drawn assuming that the gain (Av) of the amplifier is 2 and the input signal is a sine wave.
It is clear from the graph that the output is twice in magnitude when compared to the input (Vout
= Av x Vin) and phase opposite to the input.
A simple practical inverting amplifier using 741 IC is shown in figure uA 741 is a highperformance
and of course the most popular operational amplifier. It can be used in a verity of applications like
integrator, differentiator, voltage follower, amplifier etc. uA 741 has a wide supply voltage range
(+/-22V DC) and has a high open-loop gain. The IC has an integrated compensation network for
improving stability and has short circuit protection.
Signal to be amplified is applied to the inverting pi (pin2) of the IC. Non non-inverting pin (pin3)
is connected to the ground. R1 is the input resistor and Rf is the feedback resistor. Rf and R1
together set the gain of the amplifier. With the used values of R1 and Rf the gain will be 10 (Av
= -Rf/R1 = 10K/1K = 10). RL is the load resistor and the amplified signal will be available
across it. POT R2 can be used for nullifying the output offset voltage. If you are planning to
assemble the circuit, the power supply must be well regulated and filtered. Noise from the power
supply can adversely affect the performance of the circuit. When assembling on PCB it is
recommended to mount the IC on the board using an IC base.

OBSERVATION:

Inverting op-amp observation

CONCLUSION
Exp. No. 4 Date:

AIM:
Implement Non-Inverting amplifier using an op-amp 741

APPARATUS:
Op-amp,741, resistors, function generator, CRO

THEORY:
The circuit diagram of an ideal non-inverting amplifier is as shown in the figure below

From the circuit, it can be seen that the output voltage is potentially divided across resistors R1
and R2, before it is applied to the inverting input.
When the non-inverting input is connected to ground, i.e. VIN = 0, the voltage at the inverting
input terminal must also be at ground level; if not, any voltage difference between the input
terminals would be amplified to move the inverting input terminal back to ground level, because
of the concept of virtual ground. Since the inverting input terminal is at ground level, the junction
of the resistors R1 and R2 must also be at ground level. This implies that the voltage drop across
R2 will be zero. As a result, the current flowing through R1 and R2 must be zero. Thus, there are
zero voltage drops across R1, and therefore the output voltage is equal to theinput voltage, which
is 0V.
When a positive-going input signal is applied to the non-inverting input terminal, the output
voltage will shift to keep the inverting input terminal equal to that of the input voltage applied.
Hence, there will be a feedback voltage developed across resistor R2,
VR2 = VIN = I2R2
Where, I2 is the current flowing at the junction of resistors R1 and R2
VOUT = I2 (R1 + R2)
CIRCUIT DIAGRAM:

OBSERVATION:
CONCLUSION:
 Exp. No. 5 Date:

AIM:
Implement Inverting Op-amp as Adder, Subtractor and Scaler using an op-amp 741

APPARATUS:
Op-amp,741, resistors, function generator, CRO

THEORY:

Inverting amplifier is the most widely used configuration of all the op-amp circuits. The input signal
Vin is applied to the inverting terminal through resistor R1 while the non-inverting terminal of the
op-amp is grounded. The output voltage Vout is feedback to the inverting terminal through a
feedback resistor Rf. Based on the relation between the input and feedback resistors, applications
such as summing, scaling and averaging amplifiers can be designed

In this circuit the input signals are effectively isolated from one another by the ‘virtual earth’ at the
inverting input terminal of the op-amp. Some consideration has to be given about the resistor values
used in this circuit. The resistors should have a high enough value to prevent signal source loading,
but low enough to prevent input bias current from causing offset errors. If large values of input
resistor are necessary, use a low bias current FET input op-amp in order to minimize the offset error.
In the ideal circuit there is no limit to the number of input voltages that can be summed, but in the
practical circuit the number of inputs is limited by the need to maintain an adequate loop gain. All
paths to the inverting input terminal of the op-amp should be taken into account when assessing
loop gain, closed-loop signal bandwidth and drift error. Note that the closed loop gain 1/β for the
circuit is
Procedure

1.From the dropdown list select any desired component and place it on the canvas.
2.The number of resistors that can be selected is also restricted by the task provided.
3.Repeat the above step till all the required components are placed on the canvas.
4.Select the type of input the dropdown list provided and select the number of input sources as
mentioned in the task of the experiment.
5.Now click on the ‘Connect’ button and then click on the bubbles of the respective component to
establish a connection between them.
6.‘Undo’ button is to undo the previous task performed on the experiment.
7.‘Clear’ button is used to clear the canvas to start the experiment again.
8.‘Move’ button helps to relocate the components. Click on the button and then click on the
component to be moved on the canvas.
9.The ‘On’ button the right top corner of the canvas is used to start and stop the simulation.
10.The ‘Click’ button on the CRO helps to show the waveforms of the experiment.
11.The output waveform will only be shown if the simulation is running.

TASK 1 AND ITS OBSERVATIONS:

Design an inverting summing amplifier using op-amp to obtain the output
expression as: V0=-(0.1V1+V2+10 V3) , where V1, V2 and V3 are the inputs.
Verify the results for V1= V2 = V3 = 1 V

TASK 2 AND ITS OBSERVATIONS:

A three input weighted amplifier with following specifications:
Ra = ½ Rf, Rb = 1/4 Rf & Rc = 1/8 Rf.
Verify the design using simulator.
 TASK 3 AND ITS OBSERVATIONS:

Construct a three input inverting stage averaging circuit. Verify using simulator
the result for following inputs: v1=1.5 v, v2=2.5 v and v3=3.5 v. What is the
expected output?

CONCLUSION:
Exp. No. 6 Date:

AIM:
Implement op-amp Integrator circuit using op-amp

APPARATUS:
Resistor, Capacitor, Op-amp, Function Generator, CRO

THEORY:
An integrator circuit which consists of active devices is called an Active integrator. An active
integrator provides a much lower output resistance and higher output voltage than is possible
with a simple RC circuit.
Op-amp differentiating and integrating circuits are inverting amplifiers, with appropriately placed
capacitors. Integrator circuits are usually designed to produce a triangular wave output from a
square wave input.
Integrating circuits have frequency limitations while operating on sine wave input signals.
An op-amp integrating circuit produces an output voltage which is proportional to the area
(amplitude multiplied by time) contained under the waveform.
An ideal op-amp integrator uses a capacitor C1, connected between the output and the op-amp
inverting input terminal, as shown in the figure below.

The negative feedback to the inverting input terminal ensures that the node X is held at ground
potential (virtual ground). If the input voltage is 0 V, there will be no current through the input
resistor R1, and the capacitor is uncharged.
Hence, the output voltage is ideally zero.
If a constant positive voltage (DC) is applied to the input of the integrating amplifier, the output
voltage will fall negative at a linear rate, in an attempt to keep the inverting input terminal at ground
potential.
Conversely, a constant negative voltage at the input results in a linearly rising (positive) voltage at
the output. The rate of change of the output voltage is proportional to the value of the applied input
voltage.
CALCULATION:
From the circuit, it is seen that node Y is grounded through a compensating resistor R1. Node X
will also be at ground potential, due to the virtual ground.
VX = VY = 0
Since the input current to an op-amp is ideally zero, the current flowing through the input
resistor, due to Vin, also flows through the capacitor Cf.
From the input side, the current I is given as,
I = (Vin – VX) / R1 = Vin / R1
From the output side, the current I is given as,
I = Cf [d(VX – Vout)/dt] = -Cf [d(Vout)/dt]
Equating the above two equations of I, we get,
[Vin / R1] = – Cf [d(Vout)/dt]
Integrating both the sides of the above equation,

In the above equation, the output is {1/(R1.Cf)} times the integral of the input voltage, where
the term (R1.Cf) is known as the time constant of the integrator.
The negative sign indicates that there is a phase shift of 180o between input and output, because
the input is provided to the inverting input terminal of the op-amp.
The main advantage of an active integrator is the large time constant, which results in the
accurate integration of the input signal.

OBSERVATION:
If the step input of the integrating amplifier is replaced by a continuous time square wave, the
change in the input signal amplitude charges and discharges the feedback capacitor.
This results in a triangular wave output with a frequency that is dependent on the value of (R1.Cf),
which is referred to as the time constant of the circuit. Such a circuit is commonly called a Ramp
Generator.
During the positive half-cycle of the square wave input, a constant current I flows through the
input resistor R1. Since the current flowing into the op-amp internal circuitry is zero, effectively
all of the current flows through the feedback capacitor Cf. This current charges the capacitor.
Since the capacitor connected to the virtual ground, the voltage across the capacitor is the output
voltage of the op-amp.
During the negative half-cycle of the square wave input, the current I is reversed. The capacitor
is now linearly charged and produces a positive-going ramp output.
CONCLUSION
Exp. No. 7 Date:

AIM:
Implement evaluate op-amp Differentiator circuit using op-amp

APPARATUS:
Resistor, Capacitor, Op-amp, Function Generator, CRO

THEORY:
In an op-amp differentiator circuit, the output voltage is directly proportional to the input voltage
rate of change with respect to time, which means that a quick change of the input voltage signal,
then the high o/p voltage will change in response. As the output of an op-amp differentiator circuit
is proportional to the change in input. When the inputs of the differentiator circuit are standard
waveforms like sine, square, triangular then the output waveforms will be very different.

If the input is square wave then there will be small spikes in other output waveforms. These spikes
will be imperfect with the slope of the ends of the input waveform and maximum circuit output.
If the input is triangular waveform then the output changes to a square waveform in the ow with
the increasing and declining levels of the input waveform.
If the input is sine wave from then it is changed to a cosine waveform which gives the signal
with 90° phase shift, which is very useful in some situations.

CALCULATION:
This is one type of amplifier, and the connection of this amplifier can be done among the input as
well as output and includes very-high gain. The operational amplifier differentiator circuit can be
used in analog computers to perform mathematical operations such as summation, multiplication,
subtraction, integration, and differentiation.
The operational amplifier circuit generates an output voltage which is proportional to the time
derivative input voltage. So this op-amp circuit is called as the differentiator. Assume the ground
terminal which is denoted with G in the above circuit, where the flow of current through the ground
terminal is equivalent to the flow of current out, we can write is as
In the above circuit, the op-amp node voltage at inverting terminal is zero then the flow of
current through the capacitor can be written as
Iin = If
Where If = -Vout/Rf
The capacitor charge equals the voltage with capacitance times across the capacitor
Q = C X Vin
Therefore the charge rate change is
dQ/dt = C dVin/dt
But the dQ/dt is the current through the capacitor
Iin = C dVin/dt = If
-Vout/Rf = C dVin/dt
An ideal output voltage (Vout) for the operational amplifier differentiator is written as
Vout = – Rf C dVin/dt
Thus, the output voltage is a constant input voltage derivative – Rf C times of the input Vin voltage
with respect to time. Here sign minus (–) specifies the phase shift (180o) as the input signal is
given to the input inverting terminal of the op-amp.
OBSERVATION:

CONCLUSION:
Exp. No. 8 Date:

AIM:
Design and evaluate performance of active high pass filter

APPARATUS:
Op-amp 741, resistor, capacitor, function generator, cro,connecting wires

THEORY:
By connecting a passive RC high pass filter circuit to the inverting or non-inverting terminal of
the op-amp gives us first order active high pass filter.
The operation is same as that of the passive high pass filter, but the input signal is amplified by the
amplifier at the output. The amount of amplification depends on the gain of the amplifier. The
magnitude of the pass band gain is equal to 1 + (R3/R2). Where R3 is the feedback resistor in Ω
(ohms) and R2 is the input resistor. The circuit of active high pass filter with amplificationis
given below.

Voltage Gain Av = Amax (f/fc) / √{1 + (f/fc)²}

Where f = operating frequency
fc = cut-off frequency
Amax = pass band gain of the filter = 1 + (R3/R2)
At low frequencies means when the operating frequency is less than the cut-off frequency, the
voltage gain is less than the pass band gain Amax. At high frequencies means when the operating
frequency is greater than the cut-off frequency, the voltage gain of the filter is equal to pass band
gain. If operating frequency is equal to the cut-off frequency, then the voltage gain of the filter is
equal to 0.707 Amax.
Voltage Gain in (dB):
The magnitude of voltage gain is generally taken in decibels (dB):
Av(dB) = 20 log10 (Vout/Vin)
-3 dB = 20 log10 (0.707 * Vout/Vin)
The cut-off frequency which separates both pass band and stop band can be calculated using the
below formula
fC = 1 / (2πRC)
The phase shift of the active high pass filter is equal to that of the passive filter. It is equal to the
+45° at the cut-off frequency fC and this phase shift value is equated as
Ø = tan-1(1/2πfcRC)
Frequency Response of Active High Pass Filter
The frequency response curve with respect to the amplifiers open loop gain is shown below.

In frequency response of the active high pass filter the maximum pass band frequency is limited
by the bandwidth or the open loop characteristics of the operational amplifier. Due to this limitation
the active high pass filter response will appears like the wide band filter response. By using this
op-amp based active high pass filter we can achieve high accuracy with the use of low tolerance
resistors and capacitors.

CALCULATION:
Let us consider cut-off frequency value as 10 KHz, pass band gain Amax as 1.5 and capacitor
value as 0.02 µF.
The equation of the cut-off frequency is
fC = 1 / (2πRC)
By re-arranging this equation, we have
R = 1 / (2πfC)
R = 1/ (2π * 10000 * 0.02 * 10-6) = 795.77 Ω
The pass band gain of the filter is
Amax = 1 + (R3/R2) = 1.5
R3 = 0.5 R2
If we consider the R2 value as 10KΩ, then R3 = 5 kΩ
We can calculate the gain of the filter as follows:
Voltage Gain for High Pass filter :
| Vout / Vin | = Amax * (f/fc) /√[1 + (f/fc)²]
Av(dB) = 20 log10 (Vout/Vin)
OBSERVATION:

By using this equation let us tabulate the responses for the range of frequencies to plot the response
curve of the filter. These responses are assumed as 10 Hz to 100 KHz.

Sr. Frequency Out-put Voltage Gain Gain in dB

no.
1 10 Hz

2 100 Hz

3 1 KHz

4 10 KHz

5 100 KHz

6 1 MHz

BODE-PLOT
To analyze the circuit frequency response this bode plot is used. It is nothing but a graph of the
transfer function of linear, time variant verses frequency. This is plotted with the log frequency
axis. It consists of mainly two plots; one is magnitude plot and the other is phase plot. The
magnitude plot will express the magnitude of the frequency response i.e., gain and the phase plot
is used to express the response of the frequency shift.
The frequency response bode-plot according to the values which are tabulated above is given
below:
According to the values calculated, at frequency 10 Hz the gain of the filter obtained in dB is -
56.48. If we increase the value of frequency to 100 Hz the obtained gain is -36.48 dB and at
frequency 500 Hz the gain of the filter is -22.51 dB, at frequency 1000 Hz gain in dB is - 16.52.By
this we can say that if frequency increases the gain of the filter increases at the rate of 20dB/decade.
Till the cut-off frequency 10 KHz the gain of the filter increases but after the cut-off frequency the
gain reaches maximum value and it is constant.

CONCLUSION:
Exp. No. 9 Date:

AIM:
To design and evaluate performance of active low pass filter

APPARATUS:
Op-amp 741, resistor, capacitor, function generator, CRO, connecting wires

THEORY:
Low Pass filter is a filter which passes all frequencies from DC to upper cut-off frequency fH
and rejects any signals above this frequency. In ideal case, the frequency response curve drops at
the cut-off frequency. Practically the signal will not drop suddenly but drops gradually from
transition region to the stop band region. Cut-off frequency means the point where the response
drops -3 dB or 70.7% from the pass band. Transition region means the area where falloff occurs.
Stop band region means the area where the attenuation occurs mostly to the input signals. So this
filter is also called as high-cut filter or treble cut filter. The ideal response is shown below.

Rather than the passive components the Active Low Pass Filter is formed by active components
like Op-Amps, FETs and transistors. These filters are very effective when compared with the
passive filters. Active filters are introduced to overcome the defects of passive filters.
A simple active low pass filter is formed by using an op-amp. The operational amplifier will take
the high impedance signal as input and gives a low impedance signal as output. The amplifier
component in this filter circuit will increase the output signal amplitude. By this action of the
amplifier the output signal will become wider or narrower. The maximum frequency response of
the filter depends on the amplifier used in the circuit design.

When the input signals are at low frequencies the signals will pass through the amplifying circuit
directly, but if the input frequency is high the signals are passed through the capacitor C1. By
this filter circuit the output signal amplitude is increased by the pass band gain of the filter. We
know that, for non-inverting amplifier circuit the magnitude of the voltage gain is obtained by its
feedback resistor R2 divided by its corresponding input resistor R3. This is given as follows
Magnitude of the voltage gain = {1 + (R2/R3)}
CALCULATION:
We know that the gain can be obtained by the frequency components and this is given as
follows:
Voltage Gain = Vout / Vin = Amax / √{1+(f/fc)²}
where

• Amax = Gain of the pass band = {1 + (R2/R3)}

• f = operational frequency
• fc = Cut-off frequency
• Vout = Output voltage
• Vin = Input Voltage

When the frequency increases, then the gain decreases by 20 dB for every 10 time increment of
frequency. This operation is observed as below:
At low frequencies that is when operating frequency f is less than cut-off frequency, then
Vout / Vin = Amax
When operating frequency is equal to the cut off frequency, then
Vout / Vin = Amax / √2 = 0.707 Amax
When the operating frequency is less than the cut off frequency, then
Vout / Vin < Amax
By these equations we can say that at low frequencies the circuit gain is equal to maximum gain
and at high frequencies the circuit gain is less than maximum gain Amax. When actual frequency
is equal to the cut-off frequency, then the gain is equal to the 70.7% of the Amax. By this we can
say that for every tenfold (decade) increase of frequency the gain of the voltage is divided by 10.
Magnitude of the Voltage Gain (dB):
Amax = 20 log10 (Vout / Vin)
At -3 dB frequency the gain is given as:

-3 dB Amax = 20 log10 {0.707 (Vout / Vin)}

Let us consider a non-inverting active low pass filter having cut off frequency at 160 Hz and
input impedance as 15kΩ. Assume that at low frequencies this circuit has a voltage gain of 10.

The gain in dB is given as 20log (Amax) = 20log (10) = 20 dB

We know that the voltage gain is given as:

Amax = 10 = 1 + (R2/R1)

Let the resistor R1 be 1.2 kΩ

R2 = 9R1 = 9 x 1.2k = 10.8 kΩ

Therefore the obtained R2 is 10.8 kΩ. Since this value does not exist we can consider the nearest
preferred standard value as 11 kΩ.

By considering the cut off frequency equation we can get the capacitor value.

fC = 1/ 2πRC

By considering the C as main we can write the above equation as follows:

C = 1 / 2πfCR

Substitute input impedance value as 15 kΩ, fC value as 160 Hz.

Therefore the C = 0.068µF.

From the obtained values we can get the active low pass filter as follows:
Frequency Response
The response of the active filter is as shown in below figure:

OBSERVATION:

Sr. Frequency Out-put Voltage Gain Gain in dB

no.
1 10 Hz

2 100 Hz

3 1 KHz

4 10 KHz

5 100 KHz

6 1 MHz

CONCLUSION:
Exp. No. 10 Date:

AIM:
Design and evaluate voltage comparator circuit using op-amp 741
APPARATUS:
Op-amp 741, resistor, Zener diode, Transistor, function generator, CRO

THEORY:
The Op-amp comparator compares one analogue voltage level with another analogue voltage level,
or some preset reference voltage, VREF and produces an output signal based on this voltage
comparison. In other words, the op-amp voltage comparator compares the magnitudes of two
voltage inputs and determines which is the largest of the two.

Voltage comparators either use positive feedback or no feedback at all (open-loop mode) to switch
its output between two saturated states, because in the open-loop mode the amplifiers voltage gain
is basically equal to AVO. Then due to this high open loop gain, the output from the comparator
swings either fully to its positive supply rail, +Vcc or fully to its negative supply rail,
-Vcc on the application of varying input signal which passes some preset threshold value.Vin
> Vref -> Vout = Vout+ Vsat
Vin < Vref -> Vout = Vout- Vsat

With reference to the op-amp comparator circuit above, lets first assume that VIN is less than the
DC voltage level at VREF, ( VIN < VREF ). As the non-inverting (positive) input of thecomparator
is less than the inverting (negative) input, the output will be LOW and at the negative supply
voltage, -Vcc resulting in a negative saturation of the output.If we now
increase the input voltage, VIN so that its value is greater than the reference voltage VREF on the
inverting input, the output voltage rapidly switches HIGH towards the positive supply voltage,
+Vcc resulting in a positive saturation of the output. If we reduce again the input voltage VIN, so
that it is slightly less than the reference voltage, the op-amp’s output switches back to its
negative saturation voltage acting as a threshold detector.

Then we can see that the op-amp voltage comparator is a device whose output is dependant on
the value of the input voltage, VIN with respect to some DC voltage level as the output is HIGH
when the voltage on the non-inverting input is greater than the voltage on the inverting input, and
LOW when the non-inverting input is less than the inverting input voltage. This condition is true
regardless of whether the input signal is connected to the inverting or the non-inverting input of
the comparator.
Following circuit shows the voltage to current converter using operational amplifier. It consist of
simple resistance connected to the inverting and non inverting terminals of op amp.

OBSERVATION:

EXPERIMENTAL TABLE

Input Voltage Reference Voltage Output Voltage

SN.
(Vin) (VRef) (Vout)
1
2
3
4
5
6
7
8

CONCLUSION:
Exp. No. 11 Date:

AIM:
Design and evaluate voltage to current converter circuit using op-amp 741
APPARATUS:
Op-amp 741, resistor, function generator, CRO
THEORY:
In most of the cases we get the output of measuring devices in the form of voltage. It is not good
to transmit this output voltage to the destination directly. Due to addition of noise and wire
impedance the output voltage may get corrupted. So in such cases we have convert that voltage
into current form. So let us see voltage to current converter.

Op-amp is implemented to simply convert the voltage signal to corresponding current signal.
The Op-amp used for this purpose is IC LM741. This Op-amp is designed to hold the precise
amount of current by applying the voltage which is essential to sustain that current through out the
circuit.
The output current is given by

Io = Vin/R

Following circuit shows the voltage to current converter using operational amplifier. It consist of
simple resistance connected to the inverting and non inverting terminals of op amp.
OBSERVATION:

EXPERIMENTAL TABLE

Input voltage Resistance(R) Output current

SN.
(V) (KΩ) (mA)
1 1 10
2 2 10
3 3 10
4 4 10
5 5 10
6 6 10
7 7 10
8 8 10
9 9 10

CONCLUSION:
Exp. No. 12 Date:

AIM:
Design and evaluate monostable multivibrator using IC 555
APPARATUS:
Timer IC 555, resistor, capacitor, function generator, CRO
THEORY:

The operation and output of the 555 timer monostable is exactly the same as that for the
transistorised one we look at previously in the Monostable Multivibrators tutorial. The difference
this time is that the two transistors have been replaced by the 555 timer device. Consider the 555
timer monostable circuit below.

When a negative ( 0V ) pulse is applied to the trigger input (pin 2) of the Monostable configured
555 Timer oscillator, the internal comparator, (comparator No1) detects this input and “sets” the
state of the flip-flop, changing the output from a “LOW” state to a “HIGH” state. This action in
turn turns “OFF” the discharge transistor connected to pin 7, thereby removing the short circuit
across the external timing capacitor, C1.
This action allows the timing capacitor to start to charge up through resistor, R1 until the voltage
across the capacitor reaches the threshold (pin 6) voltage of 2/3Vcc set up by the internal voltage
divider network. At this point the comparators output goes “HIGH” and “resets” the flip-flop back
to its original state which in turn turns “ON” the transistor and discharges the capacitor to ground
through pin 7. This causes the output to change its state back to the original stable “LOW” value
awaiting another trigger pulse to start the timing process over again. Then as before, the
Monostable Multivibrator has only “ONE” stable state.

The Monostable 555 Timer circuit triggers on a negative-going pulse applied to pin 2 and this
trigger pulse must be much shorter than the output pulse width allowing time for the timing
capacitor to charge and then discharge fully. Once triggered, the 555 Monostable will remain in
this “HIGH” unstable output state until the time period set up by the R1 x C1network has elapsed.
The amount of time that the output voltage remains “HIGH” or at a logic “1” level, is given
by the following time constant equation.

Where, t is in seconds, R is in Ω’s and C in Farads.

CALCULATION:

A Monostable 555 Timer is required to produce a time delay within a circuit. If a 10uF timing
capacitor is used, calculate the value of the resistor required to produce a minimum output time
delay of 500ms.
500ms is the same as saying 0.5s so by rearranging the formula above, we get the calculated value
for the resistor, R as:

The calculated value for the timing resistor required to produce the required time constant of
500ms is therefore, 45.5KΩ’s. However, the resistor value of 45.5KΩ’s does not exist as a standard
value resistor, so we would need to select the nearest preferred value resistor of 47kΩ’s which is
available in all the standard ranges of tolerance from the E12 (10%) to the E96 (1%), giving us a
new recalculated time delay of 517ms.

If this time difference of 17ms (500 – 517ms) is unacceptable instead of one single timing resistor,
two different value resistor could be connected together in series to adjust the pulse width to the
exact desired value, or a different timing capacitor value chosen.

We now know that the time delay or output pulse width of a monostable 555 timer is determined
by the time constant of the connected RC network. If long time delays are required in the 10’s of
seconds, it is not always advisable to use high value timing capacitors as they can be physically
large, expensive and have large value tolerances, e.g, ±20%.

One alternative solution is to use a small value timing capacitor and a much larger value resistor
up to about 20MΩ’s to produce the require time delay. Also by using one smaller value timing
capacitor and different resistor values connected to it through a multi-position rotary switch, we
can produce a Monostable 555 timer oscillator circuit that can produce different pulse widths at
each switch rotation such as the switchable Monostable 555 timer circuit shown below.

OBSERVATION:

1. Change RA and apply trigger signal in simulator window and observe effect on Output
waveform ON Time.

2. Change C and apply trigger signal in simulator window and observe effect on Output
waveform ON Time.

3. Find Values of RA and C to extande ON Time of 1 Second.

4. Observe current Sink and Source load configuration.

CONCLUSION:
Exp. No. 13 Date:

AIM:
Design and evaluate Astable multivibrator using IC 555
APPARATUS:
Timer IC 555, resistor, capacitor, function generator, CRO
THEORY:

Astable Multivibrator Theory

555 timer IC in an Astable mode can be used to produce a very stable 555 Oscillator circuit for
generating highly accurate free running waveforms whose output frequency can be adjusted by
means of an externally connected RC tank circuit consisting of just two resistors and a capacitor.
Whereas the 555 monostable circuit stopped after a preset time waiting for the next trigger pulse
to start over again, in order to get the 555 Oscillator to operate as an astable multivibrator it is
necessary to continuously re-trigger the 555 IC after each and every timing cycle. This
re-triggering is basically achieved by connecting the trigger input (pin 2) and the threshold input
(pin 6) together, thereby allowing the device to act as an astable oscillator. Then the 555 Oscillator
has no stable states as it continuously switches from one state to the other. Also the single timing
resistor of the previous monostable multivibrator circuit has been split into two separate resistors,
R1 and R2 with their junction connected to the discharge input (pin 7) as shown below.
In the 555 Oscillator circuit above, pin 2 and pin 6 are connected together allowing the circuit to
re-trigger itself on each and every cycle allowing it to operate as a free running oscillator. During
each cycle capacitor, C charges up through both timing resistors, R1 and R2 but discharges itself
only through resistor, R2 as the other side of R2 is connected to the discharge terminal, pin 7.

Then the capacitor charges up to 2/3Vcc (the upper comparator limit) which is determined by the
0.693(R1+R2)C combination and discharges itself down to 1/3Vcc (the lower comparator limit)
determined by the 0.693(R2.C) combination. This results in an output waveform whose voltage
level is approximately equal to Vcc – 1.5V and whose output “ON” and “OFF” time periods are
determined by the capacitor and resistors combinations. The individual times required to complete
one charge and discharge cycle of the output is therefore given as: Astable 555
Oscillator Charge and Discharge Times

When connected as an astable multivibrator, the output from the 555 Oscillator will continue
indefinitely charging and discharging between 2/3Vcc and 1/3Vcc until the power supply is
removed. As with the monostable multivibrator these charge and discharge times and therefore the
frequency are independent on the supply voltage.
The duration of one full timing cycle is therefore equal to the sum of the two individual times that
the capacitor charges and discharges added together and is given as:

The output frequency of oscillations can be found by inverting the equation above for the total
cycle time giving a final equation for the output frequency of an Astable 555 Oscillator as:
555 Oscillator Frequency Equation

By altering the time constant of just one of the RC combinations, the Duty Cycle better known as
the “Mark-to-Space” ratio of the output waveform can be accurately set and is given as the ratio
of resistor R2 to resistor R1. The Duty Cycle for the 555 Oscillator, which is the ratio of the “ON”
time divided by the “OFF” time is given by: 555 Oscillator
Duty Cycle
The duty cycle has no units as it is a ratio but can be expressed as a percentage ( % ). If both timing
resistors, R1 and R2 are equal in value, then the output duty cycle will be 2:1 that is, 66% ON time
and 33% OFF time with respect to the period.

OBSERVATION:

1. Change RA and RB in simulator window and observe effect on Output waveform

frequency and dutycycle.

2. Change C in Simulator window and observe effect on output waveform frequency and
dutycycle.

3. Find Values of RA RB and C to generate 100Hz Square Wave and observe the same on
simulator.

4. Find Values of RA RB and C to generate 1KHz 70% Duty Cycle rectangular Waveform
and observe the same using Simulator.

5. Observe current Sink and Source load configuration.

CONCLUSION: