DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

ADVANCED MICROCONTROLLERS – 17EC35

1. What is the difference between 8051 and PIC?
 8051 is a 8 bit microcontroller by Motorola. It contains 128 byte of RAM, 4KB of ROM, four I/O ports and two timers.
 PIC refers to Peripheral Interface Control. PIC is a Harvard architecture microcontroller 8 bit and 16 bit by Microchip
Technology.
 It is based on RISC, 32 KB of ROM , five I/O ports and four timers.
2. What are the groups of instruction set in PIC micro controller?
1. Bit oriented Instructions
2. Instructions using a literal value
3. Byte oriented instructions
4. Table read and writes instructions
5. Control instructions using branch and call.
3. List out the features of PIC microcontroller.
SALIENT FEATURES
Speed :When operated at its maximum clock rate at its 200Mhz , i.e, PIC executes most of its instructions in
0.2 µs or five instructions per microsecond.(i.e 1 instruction cycle = 4 clock cycles.)
Instruction set Simplicity :
The instruction set is so simple that it consists of only just 35 instructions (as opposed to 111 instructions for
8051).
Power on Reset:
PIC will be Reset whenever the power is on,. A watch dog timer resets the PIC if the chip malfunctions or
deviates from its normal operation at any time.
Brown out Reset:
PIC will be Reset whenever voltage drops under 4.0 volts.
Programmable timer options:
Three timers can characterize inputs, control outputs and provide internal timing for the program execution.
Powerful output pin control:
A single instruction can select and drive a single output pin high or low in its 0.2 s instruction execution
time. The PIC can drive a load of up to 25µA.
 I/O port expansion:

 With the help of built in serial peripheral interface the number of I/O ports can be expanded.
EPROM/DIP/ROM options are provided.
 High performance RISC CPU
 Operating speed: DC – 20 MHz clock input, DC – 200 ns instruction cycle
 Eight level deep hardware stack
 Direct, indirect and relative addressing modes
 Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)
 Three Timers Timer0,Timer 1 and Timer 2.
 Watchdog Timer (WDT) with its own on-chip RC oscillator for reliable operation
  Programmable code-protection
 Power saving SLEEP mode
 10-bit multi-channel Analog-to-Digital converter
 Selectable oscillator options
 One USART /SCI port with 9-bit address detection.
 Low-power, high-speed CMOS EPROM/ROM technology
 Fully static design
 Wide operating voltage range: 2.5V to 6.0V
 Commercial, Industrial and Extended temperature ranges
 Low-power consumption: <2mA @5V, 4MHz, 15 µA typical @ 3V, 32 kHz, <1 µA typical standby
current
4. What are PIC microcontrollers? Discuss the difference between PIC and 8051 microcontroller.
The PIC 16F8XX Microcontrollers are basically RISC microcontrollers with very small instruction set of only
35 instructions and a two-stage pipeline concept fetch and execution of instructions. As a result, all
instructions execute in a single cycle except for program branches.
It has two types of internal memories .One is program memory and the other is data memory. Program memory
is provided by 8K words (or 8K*14 bits) of FLASH Memory, and data memory has two sources. One type of
data memory is a 368-byte RAM (random access memory) and the other is256-byte EEPROM (Electrically erasable
programmable ROM). Power consumption is less than 2 mA in 5V operating condition.
Low-end Architectures
Microchip PIC microcontrollers are available in various types. When PIC − MicroCU first became available from
General Instruments in early 1980’s, the microcontroller consisted of a very simple processor executing 12-bit wide
instructions with basic I/O functions and limited program memory. These devices are known as low-end
architectures.
Example: PIC 12C5XX, PIC 16C5XX, PIC 16C505
Mid-range Architectures
Mid-range Architectures are built by upgrading low-end architecture with more number of peripherals, more
numbers of register and more data memory. Some of the mid-range devices are PIC 16C6X PIC16C7X,
PIC16F87X. C and F indicates the types of program memory.
Type C = EPROM F = Flash and RC = Mask ROM
8051 is a 8 bit microcontroller by Motorola. It contains 128 byte of RAM, 4KB of ROM, four I/O ports and two timers.
PIC refers to Peripheral Interface Control. PIC is a Harvard architecture microcontroller 8 bit and 16 bit by Microchip
Technology. It is based on RISC, 32 KB of ROM , five I/O ports and four timers.
5. Explain the difference between Harvard and Princeton architecture.
Harvard Architecture
The high performance of the PIC16CXX family can be attributed to a number of architectural features
commonly found in RISC microprocessors. To begin with, the PIC 16CXX uses a Harvard architecture, in
which, program and data are accessed from separate memories using separate buses. This improves
bandwidth over traditional Von Neumann architecture where program and data may be fetched from the same
memory using the same bus.As the PIC 16c6x/7x family of micro-controllers uses Harvard Architecture it
enables the devices exceptionally fast execution speed for a given clock rate. In the Harvard Architecture
separate buses are used for Data and Instruction as shown in the diagram.
Instructions are fetched from program memory using buses that are distinct from the buses used for accessing
variables in data memory, I/O ports etc. Every instruction is coded as a single 14-bit word and fetched over a
14-bit wide bus Separating program and data buses further allows instructions to be sized differently than 8-
 bit wide data words. Instruction op-codes are 14-bits wide making it possible to have all single word
instructions. A 14-bit wide program memory access bus fetches a 14-bit instruction in a single cycle

Point of
Harvard Architecture Von Neumann Architecture
Comparison
In Von-Neumann architecture, there is no
In Harvard architecture, the CPU is connected
separate data and program memory. Instead, a
Arrangement with both the data memory (RAM) and program
single memory connection is given to the
memory (ROM), separately.
CPU.
It requires more hardware since it will be In contrast to the Harvard architecture, this
Hardware
requiring separate data and address bus for each requires less hardware since only a common
requirements
memory. memory needs to be reached.
Space Von-Neumann Architecture requires less
This requires more space.
requirements space.
Speed of execution is slower since it cannot
Speed of Speed of execution is faster because the processor
fetch the data and instructions at the same
execution fetches data and instructions simultaneously .
time.
It results in wastage of space since if the space is
Space is not wasted because the space of the
left in the data memory then the instructions
Space usage data memory can be utilized by the
memory cannot use the space of the data memory
instructions memory and vice-versa.
and vice-versa.
Controlling becomes complex since data and Controlling becomes simpler since either data
Controlling
instructions are to be fetched simultaneously. or instructions are to be fetched at a time.
6. Write down various CPU registers of PIC microcontroller andexplain them.
CPU REGISTERS
The CPU registers are used in the execution of the instruction of the PIC microcontroller. The PIC PIC16F877 Microcontroller
has the following registers.
1. Working Register-W (Similar to Accumulator)
2. Status Register
3. FSR – File Select Register (Indirect Data memory address pointer)
4. INDF
5. Program Counter
 1. Working Register:
Working Register is used by many instructions as the source of an operand. It also serves as the destination for the result of
instruction execution and it is similar to accumulator in other cs and ps.
2.Status Register:
This is an 8-bit register which denotes the status of ALU after any arithmetic operation and also RESET status and the bank
select bits for the data memory.

C: Carry/borrow bit DC: Digit carry/borrow bit Z: Zero bit

NOT_PD : Reset Status bit (Power-down mode bit)
NOT_TO : Reset Status bit (tme- out bit)
RPO: Register bank Select
The bits 7 and 6 of Status Register are unused by 16c6x/7x. The ‗C‘ bit is set when two 8-bit operands are added together and a
9-bit result occurs. This 9-bit is placed in the carry bit.The DC or Digit carry bit indicates that a carry from the lower 4 bits
occurred
during an 8-bit addition.
The reset status bits NOT_TO and NOT_PD are used in conjunction with PIC‘s sleep mode. The micro controller can put itself
to sleep mode to save power during intervals when it has nothing to do. It can be reset by any of three kinds. Upon reset the
CPU can check these two reset status bits to determine which kind of event resettled it and then respond accordingly.
The Register bank select bit RPO is used to select either bank or bank.When RPO=0, select Bank 0, RPO=1, select Bank 1.
Example: bcf STATUS, RPO ; Select bank 0
bsf STATUS, RPO ; Select bank 1.
3.FSR – (File Select Register):
It is the pointer used for indirect addressing. In the indirect addressing mode the 8-bit register file address is first written into
FSR. It is a special purpose register that serves as an address pointer to any address through out the entire register file.
4.INDF – (Indirect File):
It is not a physical register addressing but this INDF will cause indirect addressing.Any instruction using the INDF register
actually access the register pointed to by the FSR.
5 .PROGRAM COUNTER
PIC PIC16F877A has a 13 bit program counter in which PCL is the lower 8-bits of the PC and PCLATH is the write buffer for
the upper 5 bits of the PC.

PCLATH (program counter Latch can be read or from or written to without affecting the Program Counter(PC).The upper 3 bits
of PCLATH remain zero.It is only when PCL is written to that PCLATH is automatically written into the PC at the same time.
7. Explain the structure of program memory in PIC microcontroller.

Program Memory:
 A memory that contains the program , after the user write it. Program Counter executes commands stored in the program
memory, one after the other.
 PIC16F87XA devices have a 13-bit program counter capable of addressing an 8K word x 14 bit program memory space. This
memory is used to store the program after we burn it to the microcontroller.
 Program Counter (PC) keeps track of the program execution by holding the address of the current instruction. It is
automatically incremented to the next instruction during the current instruction execution.
 PIC16F87XA family has a 13-bit wide hardware stack. The stack space is not part of either program or data space and the
 stack pointer is not readable or writable. In the PIC microcontrollers, this is a special block of RAM memory used only for
this purpose.
 The CALL instruction is used to jump to a subroutine, which must be terminated with the RETURN instruction. CALL has
the address of the first instruction in the subroutine as its operand. When the CALL instruction is executed, the destination
address is
 copied to the PC. The PC is PUSHed onto the stack when a CALL instruction is executed, or an interrupt causes a branch.
The stack is POP‘ed in the event of a RETURN, RETLW or a RETFIE instruction execution.
 The stack operates as a circular buffer. This means that after the stack has been PUSHed eight times, the ninth push
overwrites the value that was stored from the first push. The tenth push overwrites the second push (and so on).
 Each time the main program execution starts at address 0000 - Reset Vector. The address 0004 is reserved‖ for the interrupt
service routine‖ (ISR). Program Memory is divided into pages, where the program is stored. Data Memory is divided into
banks. The banks are located inside the RAM, where the special registers and the data located
8. Explain the status Register of 16C61/71 microcontroller.
Status Register:
This is an 8-bit register which denotes the status of ALU after any arithmetic operation and also RESET status and the bank select bits
for the data memory.

C : Carry/borrow bit
DC : Digit carry/borrow bit
Z : Zero bit
NOT_PD : Reset Status bit (Power-down mode bit)
NOT_TO : Reset Status bit (tme- out bit)
RPO : Register bank Select
The bits 7 and 6 of Status Register are unused by 16c6x/7x. The ‗C‘ bit is set when two 8-bit operands are added together and a 9-bit
result occurs. This 9-bit is placed in the carry bit.The DC or Digit carry bit indicates that a carry from the lower 4 bits occurred
during an 8-bit addition.
The reset status bits NOT_TO and NOT_PD are used in conjunction with PIC‘s sleep mode. The micro controller can put itself to sleep
mode to save power during intervals when it has nothing to do. It can be reset by any of three kinds. Upon reset the
CPU can check these two reset status bits to determine which kind of event resettled it and then respond accordingly.
The Register bank select bit RPO is used to select either bank or bank.When RPO=0, select Bank 0, RPO=1, select Bank 1.
Example: bcf STATUS, RPO ; Select bank 0
bsf STATUS, RPO ; Select bank 1.

9. What are the different addressing modes of PIC microcontroller.

Addressing Modes of PIC Microcontroller
Addressing modes
RAM memory locations can be accessed directly or indirectly.
1. Direct Addressing
Direct Addressing is done through a 9-bit address. This address is obtained by connecting 7th bit of direct address of an
instruction with two bits (RP1, RP0) from STATUS register as is shown on the following picture. Any access to SFR registers is
an example of direct addressing.
CODE:

Bsf STATUS, RP0 ;Bankl

movlw 0xFF ;w=0xFF
movwf TRISA ;address of TRISA register is taken from ;instruction movwf
 2. Indirect Addressing
Indirect unlike direct addressing does not take an address from an instruction but derives it from IRP bit of STATUS and FSR
registers. Addressed location is accessed via INDF register which in fact holds the address indicated by a FSR. In other words,
any instruction which uses INDF as its register in reality accesses data indicated by a FSR register. Let's say, for instance, that
one general purpose register (GPR) at address 0Fh contains a value of 20. By writing a value of 0Fh in FSR register we will get a
register indicator at address 0Fh, and by reading from INDF register, we will get a value of 20, which means that we have read
from the first register its value without accessing it directly (but via FSR and INDF). It appears that this type of addressing does
not have any advantages over direct addressing, but certain needs do exist during programming which can be solved smoothly
only through indirect addressing.

Such examples include sending a set of data via serial communication, working with buffers and indicators (which will be
discussed further in a chapter with examples), or erasing a part of RAM memory (16 locations) as in the following instance.

Reading data from INDF register when the contents of FSR register is equal to zero returns the value of zero, and writing to it
results in NOP operation (no operation).

Reading from EEPROM Memory

Setting the RD bit initializes transfer of data from address found in EEADR register to EEDATA register. As in reading data we
don't need so much time as in writing, data taken over from EEDATA register can already be used further in the next instruction.
Sample of the part of a program which reads data in EEPROM, could look something like the following:
 After the last program instruction, contents from an EEPROM address zero can be found in working register w.

Writing to EEPROM Memory

In order to write data to EEPROM location, programmer must first write address to EEADR register and data to EEDATA
register. Only then is it useful to set WR bit which sets the whole action in motion. WR bit will be reset, and EEIF bit set
following a writing what may be used in processing interrupts. Values 55h and AAh are the first and the second key whose
disallow for accidental writing to EEPROM to occur. These two values are written to EECON2 which serves only that purpose,
to receive these two values and thus prevent any accidental writing to EEPROM memory. Program lines marked as 1, 2, 3, and 4
must be executed in that order in even time intervals. Therefore, it is very important to turn off interrupts which could change the
timing needed for executing instructions. After writing, interrupts can be enabled again.
Example of the part of a program which writes data 0xEE to first location in EEPROM memory could look something like the
following:

10. Explain in detail about register file structure in PIC microcontroller.

In PIC Microcontrollers the Register File consists of two parts namely
a) General Purpose Register File b)Special Purpose Register File
a) General Purpose Register File:
The general purpose register file is another name for the microcontroller‘s RAM . Data can be written to each 8-bit location
updated and retrieved any number of times.
b) Special Purpose Register File:
The special function register file consists of input, output ports and control registers used to configure each 8-bit port either as
input or output. It contains registers that provide the data input and data output to a chip resources like Timers, Serial Ports and
Analog to Digital converter and also the registers that contains control bits for selecting the mode of operation and also enabling
or disabling its operation.
11. Explain the instruction set of PIC microcontroller.
INSTRUCTION SET
While writing the instructions the following guidelines are followed.
a) Write the instructions mnemonics in lower case (example: xorwf)
b) Write special Register names, RAM variable names and bit names in upper case (example: STATUS, RPO….)
c) Write instruction and subroutine labels in mixed case (example: Mainline, LoopTime..)
The instruction set of PIC is divided into Three based on size. They are
(a) Byte oriented Instructions
(b) Bit oriented Instructions
(c) Literal and Control Instructions
Byte Oriented Instructions:
In a byte oriented Instructions f represents a file register and d represents destination register.The destination specifies where the
result of operation is to be placed. If D= 0 the result is placed in W register(Accumulator) and if d = 1 , the result is placed in the
file register specified in the instruction.
ADDWF f, d ; Add W and f
CLRF f ; Clear f
MOVWF f ,d ; Move f
NOP ; No operation
SUBWF f ,d ; Subtract W from f
Bit Oriented Instruction
In bit oriented instructions, b represents a bit field designator which selects the number of the bit affected by the operation and f
represents the number of the file in which the bit is located.
BCF f , b ; Bit clear f
BSF f, b ; Bit set f
BTFSC f , b ; Bit test f ,skip if set
Literal and Control Instructions
In literal and control instructions K represents an 8 or 11 bit constant or literal value.
ADDLW k ; Add literal and W
ANDLW k ; AND literal with W
CALL k ; Call subroutine
MOVLW k ; Move literal to W
SUBLW k ; Subtract W from literal
Based on the type of operation PIC supports various Instructions.
CLASSIFICATION OF INSTRUCTIONS
All the instructions of the PIC microcontroller are classified into nearly 9 groups. They are
given below with examples.
(i).Arithmetic Operations :
ADDLW k ; Add literal value k to W
ADDWF f, d ; The contents of the W register are added with the register f.
SUBWF f ,d ; the contents of W register are subtracted from register f
(ii).Logical Instructions :
ANDLW k ; The contents of W register are ANDED with the 8-bit litweral k .The result is stored in the W register.
IORLW k ;Inclusive OR the literal value into W register
XORWF f,d ; The contents of W register are XORed with register f and the result is stored in W or f.
COMF f, d ; Complement f .
(iii).Increment/Decrement Instructions
INCF f ,d ; Increment contents of f register by 1
DECF f , d ; Decrement f by 1
(iv).Data Transfer instructions :
MOVF f,d ; Move f to W i.e The contents of register f is moved to a destination depending on d
MOVLW k ; Move literal k to W
MOVWF f ; Move W to f
 (v) Clear Instructions
CLRF ;Clear file f
CLR W ; Clear the contents of W register and zero bit is set
CLRWDT ; Clear Watch dog timer
BCF ; Clear bit b of register f.

(vi)Rotate Instructions
RLF ; Rotate Left f through carry
RRF ; Rotate Right f through carry

(vii). Branch Instructions : There are two types of Branch instructions.(i)Conditional Branch and (ii) Un conditional Branch
instructions.

(a) Conditional Branch Instructions

BTFSC f , b ; Bit Test skip if clear
BTFSS f , b ; Bit test f , skip if set
DECFSZ f,d ; Decrement f ,skip if zero.
INCFSZ f,d ;Increment f ,skip if zero
(b) Unconditional Instructions
CALL k ; Call the subroutine k unconditionally
GOTO k ; Unconditional k branch
RETURN ; Return from subroutine
REETLW k ; Return with literal in W register.
(viii) Miscellaneous
BSF f,b ; Set bit b of register f
SLEEP ; Go into stand by mode
NOP ; No operation i.e Do nothing , wait one clock cycle.
12. Describe the function of I/O Port Registers of PIC microcontroller.
PORT REGISTERS:
1. PORTA is a 6-bit wide, bidirectional port. The corresponding data direction register is TRISA. Setting a TRISA bit (= 1) will
make the corresponding PORTA pin an input. Clearing a TRISA bit (= 0) will make the corresponding PORTA pin an output.
2. PORTB is an 8-bit wide, bidirectional port. The corresponding data direction register is TRISB. Setting a TRISB bit (= 1) will
make the corresponding PORTB pin an input. Clearing a TRISB bit (= 0) will make the corresponding PORTB pin an output.
3. PORTC is an 8-bit wide, bidirectional port. The corresponding data direction register is TRISC. Setting a TRISC bit (= 1) will
make the corresponding PORTC pin an input. Clearing a TRISC bit (= 0) will make the corresponding PORTC pin an output.
4. PORTD is an 8-bit port with Schmitt Trigger input buffers. Each pin is individually configurable as an input or output.
5. PORTE has three pins (RE0/RD/AN5, RE1/WR/AN6 and RE2/CS/AN7) which are individually configurable as inputs or
outputs. These pins have Schmitt Trigger input buffers.
13. Discuss in detail about memory organization of a PIC microcontroller.
Memory of the PIC16F877 divided into 3 types of memories:
Program Memory :
A memory that contains the program , after the user write it. Program Counter executes commands stored in the program
memory, one after the other.
Data Memory :
This is RAM memory type, which contains a special registers like SFR (Special Faction Register) and GPR (General Purpose
 Register). The variables that we store in the Data Memory during the program are deleted after we turn of the micro.
Data EEPROM (Electrically Erasable Programmable Read-Only Memory) :
A memory that allows storing the variables as a result of burning the written program. Each one of them has a different role.
Program Memory and Data Memory two memories that are needed to build a program, and Data EEPROM is used to save data
after the microcontroller is turn off.Program Memory and Data EEPROM they are non-volatile memories, which store the
information even after the power is turn off. These memories called Flash or EEPROM .
14. Architecture of PIC 16C6X/16C7X (8 – Bit Microcontroller)
The PIC16FXX is a family of low-cost, high-performance, CMOS, fullystatic, 8-bit microcontrollers. All PIC microcontrollers
employ an advanced RISC architecture. The PIC16FXX microcontroller family has enhanced core features, eight-level deep
stack, and multiple internal and external interrupt sources. The two-stage instruction pipeline allows all instructions to execute in
a single cycle, except for program branches (which require two cycles). A total of 35 instructions (reduced instruction set) are
available. Also, a large register set helps to achieve a very high performance. The PIC 16FXX uses Harvard architecture, in
which, program and data are accessed from separate memories using separate buses. This improves bandwidth over traditional
Von Neumann architecture where program and data may be fetched from the same memory using the same bus. Separating
program and data buses further allows instructions to be sized differently than 8-bit wide data words. Instruction opcodes are 14-
bits wide making it possible to have all single word instructions. A 14-bit wide program memory access bus fetches a 14-bit
instruction in a single cycle. A two-stage pipeline overlaps fetch and execution of instructions. Consequently, all instructions
execute in a single cycle (200 ns@ 20MHz) except for program branches. The PIC 16C6X devices have a 13-bit program
counter capable of addressing an 8Kx14 program memory space. The PIC 16FF876/877 devices have 8Kx 14 words of Flash
program memory.
The architecture is divided into three parts, such as fetching, decoding and executing.
Clock generation:
The clock input(from OSC1) is internally divided by four to generate four clocks namely Q1, Q2, Q3 and Q4. Internally, the
program counter is incremented every Q1, the instruction is fetched from the program memory and latched into the instruction
register in Q4. The instruction is decoded and executed during the following Q1 through Q4.

Fetching and Decoding:

Program counter (PC) is used to point the next instruction to be fetched. Fetched instruction from the program memory will be
stored in the instruction register and it will be decoded in the instruction decoding unit.

i) Program Counter (PC – 13 bit):

The low byte comes from the PCL register, which is readable and writable register. The upper bits are not readable but are
indirectly writable through PCLATH register. On any reset, the upper bits of the PC will be cleared.
ii) Stack pointer(SP – 13 bit):
The Stack Pointer is not part of either program or data space. The Program counter is pushed on to the stack when a CALL
instruction is executed or an interrupt or branch instruction to store the return address. The stack is Popped in the event of return
instruction execution (retrieving return address from stack).
Block diagram of PIC 16C67 Microcontroller
Block diagram of PIC 16C77 Microcontroller
Execution:
iii) Arithmetic & logic Unit (ALU): (8-bit)
The ALU is a general purpose arithmetic unit. It performs arithmetic and boolean operation between the data in the working
register and any register file. The ALU is 8 bits wide and capable of addition, subtraction, shift and logical operations.
In two operand instructions, typically one operand is the working register (W register) the other operand is a file register or an
immediate constant. In a single operand instructions, the operand is either the W register or a file register.

iv) Working Register (W- 8 bit):

The W register is an 8 bit working register used for ALU operations. It is used by many instructions as the source of an operand.
It also serves as the destination for the result of instruction execution (similar to accumulator). It is not an addressable register.

v) Status Register (8 bit):

This is an 8-bit register which denotes the status of ALU after any arithmetic operation and also RESET status and the bank
select bits for the data memory.

BIT 7: IRP: Register Bank Select bit (used for indirect addressing)
0 = Bank 0, 1 (00h - FFh)
1 = Bank 2, 3 (100h - 1FFh)
The IRP bit is not used by the PIC16F8X. IRP should be maintained clear.
BIT 6-5: RP1:RP0: Register Bank Select bits (used for direct addressing)
00 = Bank 0 (00h - 7Fh)
01 = Bank 1 (80h - FFh)
10 = Bank 2 (100h - 17Fh)
11 = Bank 3 (180h - 1FFh)
BIT 4: NOT_TO: Time-out bit
1 = After power-up, CLRWDT instruction, or SLEEP instruction
0 = A WDT time-out occurred
BIT 3: NOT_PD: Power-down bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
BIT 2: Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
BIT 1: DC: Digit carry/borrow
1 = A carry-out from the 4th low order bit of the result occurred
0 = No carry-out from the 4th low order bit of the result bit
BIT 0: C: Carry/borrow
1 = A carry-out from the most significant bit of the result occurred
0 = No carry-out from the most significant bit of the result occurred

vi) File Select Register (FSR – 8 bit):

It is the pointer used for indirect addressing. It is a special purpose register that serves as an address pointer to any address
throughout the entire register file.
vii) Indirect File:
It is not a physical register addressing but this INDF will cause indirect addressing. Any instructions using the INDF register
actually access the register pointed to by the FSR.
viii) Parallel I/O Ports
Most of the PIC16cx/7x family controllers have 33 I/O lines and five I/O ports They are PORT A, PORT B, PORT C , PORT D
and PORT E.:
PORT A:
Port A is a 6-bit wide bi-directional port. Its data direction register is TRISA setting TRISA bit to 1 will make the corresponding
PORT A Pin an input. Clearing a TRIS a bit will make the corresponding pin as an output.
PORT B:
Port B is an 8-bit wide, bi-directional port. Four of the PORT B pins RB7 – RB4 have an interrupt-on- change feature. Only the
pins configured as inputs can cause this interrupt to occur.
PORT C:
Port C is an 8-bit wide, bidirectional port. Bits of the TRISC Register determine the function of its pins. Similar to other ports, a
logic one 1 in the TRISC Register configures the appropriate port pin as an input.
PORT D:
Port D is an 8-bit wide bi-directional port. In addition to I/O port, Port D also works as 8-bit parallel slave port or microprocessor
port. When control bit PSPMODE (TRISE:4) is set.
PORT E:
It is a 3-bit bi-directional port. Port E bits are multiplexed with analog inputs of ADC and they serve as control signals (RD ,
WR, CS) for parallel slave port mode of operation
ix) Timers:
It has 3 timer modules such as Timer 0 (8 – bit overflow counter), Timer 1 (16 – bit Timer/counter), Timer 2 (8 – bit timer). Each
module can generate an interrupt to indicate that an event has occurred (i.e timer overflow)

x) Watch Dog Timer (WDT):

A Watch dog timer is a simple timer circuit that performs a specific operation after a certain period of time if something goes
wrong. Suppose we have written a program which is compiled successfully and when we simulate if every time seems to work
fine. Then we program the PIC. However after a long period of time the program gets stuck somewhere. What needs it this case
is some kind of reset if the program is gets stuck. This is a purpose of a watchdog timer circuit. When the WDT is enable counter
starts at 00 and increment by 1 until it reaches FF. When it goes from FF to 00 the PIC will be reset, irrespective of what it is
doing. The only way we can stop the WDT, from resetting the WDT back to 00 throughout the program which is done by the
processor. Which indicates that the processor functioning is going on. Watch dog timer is thus increase the system reliability.

xi) Capture – Compare – PWM (CCP):

 Capture mode captures the 16-bit value of TMR1 into the CCPRxH:CCPRxL register pair. The capture event can be
programmed for either the falling edge, rising edge, fourth rising edge, or sixteenth rising edge of the CCPx pin.
 Compare mode compares the TMR1H:TMR1L register pair to the CCPRxH:CCPRxL register pair. When a match occurs,
an interrupt can be generated and the output pin CCPx can be forced to a given state (High or Low) and Timer1 can be reset.
This depends on control bits CCPxM3:CCPxM0.
 PWM mode compares the TMR2 register to a 10-bit duty cycle register (CCPRxH:CCPRx) as well as to an 8-bit period
register (PR2). When the TMR2 register=Duty Cycle register, the CCPx pin will be forced low. When TMR2=PR2, TMR2
is cleared to 00h, an interrupt can be generated, and the CCPx pin (if an output) will be forced high.
 Mnemonic, 14-Bit Instruction Word Status
Operands Description Cycles MSb LSb Affected Notes
BYTE-ORIENTED FILE REGISTER OPERATIONS
ADDWF f, d Add W and f 1 00 0111 dfff ffff C,DC,Z 1,2
ANDWF f, d AND W with f 1 00 0101 dfff ffff Z 1,2
CLRF f Clear f 1 00 0001 lfff ffff Z 2
CLRW - Clear W 1 00 0001 0xxx xxxx Z
COMF f, d Complement f 1 00 1001 dfff ffff Z 1,2
DECF f, d Decrement f 1 00 0011 dfff ffff Z 1,2
DECFSZ f, d Decrement f, Skip if 0 1(2) 00 1011 dfff ffff 1,2,3
INCF f, d Increment f 1 00 1010 dfff ffff Z 1,2
INCFSZ f, d Increment f, Skip if 0 1(2) 00 1111 dfff ffff 1,2,3
IORWF f, d Inclusive OR W with f 1 00 0100 dfff ffff Z 1,2
MOVF f, d Move f 1 00 1000 dfff ffff Z 1,2
MOVWF f Move W to f 1 00 0000 lfff ffff
NOP - No Operation 1 00 0000 0xx0 0000
RLF f, d Rotate Left f through Carry 1 00 1101 dfff ffff C 1,2
RRF f, d Rotate Right f through Carry 1 00 1100 dfff ffff C 1,2
SUBWF f, d Subtract W from f 1 00 0010 dfff ffff C,DC,Z 1,2
SWAPF f, d Swap nibbles in f 1 00 1110 dfff ffff 1,2
XORWF f, d Exclusive OR W with f 1 00 0110 dfff ffff Z 1,2
BIT-ORIENTED FILE REGISTER OPERATIONS
BCF f, b Bit Clear f 1 01 00bb bfff ffff 1,2
BSF f, b Bit Set f 1 01 01bb bfff ffff 1,2
BTFSC f, b Bit Test f, Skip if Clear 1 (2) 01 10bb bfff ffff 3
BTFSS f, b Bit Test f, Skip if Set 1 (2) 01 11bb bfff ffff 3
LITERAL AND CONTROL OPERATIONS
ADDLW k Add literal and W 1 11 111x kkkk kkkk C,DC,Z
ANDLW k AND literal with W 1 11 1001 kkkk kkkk Z
CALL k Call subroutine 2 10 0kkk kkkk kkkk
CLRWDT - Clear Watchdog Timer 1 00 0000 0110 0100 TO,PD
GOTO k Go to address 2 10 1kkk kkkk kkkk
IORLW k Inclusive OR literal with W 1 11 1000 kkkk kkkk Z
MOVLW k Move literal to W 1 11 00xx kkkk kkkk
RETFIE - Return from interrupt 2 00 0000 0000 1001
RETLW k Return with literal in W 2 11 01xx kkkk kkkk
RETURN - Return from Subroutine 2 00 0000 0000 1000
SLEEP - Go into standby mode 1 00 0000 0110 0011 TO,PD
SUBLW k Subtract W from literal 1 11 110x kkkk kkkk C,DC,Z
XORLW k Exclusive OR literal with W 1 11 1010 kkkk kkkk Z