IT 2012A Panel Signal Analysis Multi 10 20K 3ph Cada 300403 Scma

You might also like

Download as pdf or txt
Download as pdf or txt
You are on page 1of 7

Technical Information/ Informazione tecnica.

IT-2012A pagina 1 di 5
Subject : panel signal analysis Multi 10-20K 3ph
Edit.: D.Caniglia Date: 16.12.02 Approv: M. Scarpone Date: 16.12.02
Variations: ///

INDEX
Explanation............................................................................................................................................................................................ 1
[ in= value1, …, …%v ] line input voltage, phase 1..................................................................................................................... 2
[ in= …, value2, …%v ] line input voltage, phase 2...................................................................................................................... 2
[ in= …, …, value3 %v ] line input voltage, phase 3..................................................................................................................... 2
[ out= value1, …, …vln; ] ups output voltage, phase 1............................................................................................................... 2
[ out= …, value2, … vln; ] ups output voltage, phase 2.............................................................................................................. 3
[ out= …, …, value3 vln; ] ups output voltage, phase 3............................................................................................................... 3
[ out= …….., value 1, …, …%a; ] ups output current, phase1.................................................................................................... 3
[ out= …….., …, value 2, … %a; ] ups output current, phase2................................................................................................... 3
[ out= …….., …, …, value 3 %a; ] ups output current, phase3.................................................................................................. 4
[by= value1, …, …vl; ] bypass input voltage, phase1................................................................................................................... 4
[by= …, value2, …vl; ] bypass input voltage, phase2................................................................................................................... 4
[by= …, …, value3 vl; ] bypass input voltage, phase3.................................................................................................................. 4
[ bat= +value, ………. V; ] battery input voltage, positive branch........................................................................................... 5
[ bat= +…., - value v; ] battery input voltage, negative branch................................................................................................. 5
[i = … v, v dc+ = positive value, v dc- = …….; ] inverter input voltage, positive....................................................................... 5
[i = … v, v dc+ =……., v dc- = negative value; ] inverter input voltage, negative...................................................................... 5
[ i = value v, …v+, … v-; ] inverter output voltage....................................................................................................................... 6
[ ts = 25, tr =…, ti =…, tc =… °c ] temperature of the micro system card ................................................................................ 6
[ts =…, tr = 23, ti =…, tc =… °c] temperature of the booster power card ................................................................................. 6
[ts =…, tr = …, ti = 27, tc =… °c] temperature of the inverter power card ............................................................................... 6
[ts =…, tr = …, ti =…, tc = 25 °c] temperature of the channel.................................................................................................... 6
[ in= …, …, …%v, value hz ] input frequency............................................................................................................................... 6
[ by= …, …, …vl, value hz ] frequency of bypass......................................................................................................................... 7
[ out= _, value hz.] Output frequency of the ups (calculated value)............................................................................................ 7
[ in= value% a;] ups feeding line input current (calculated value). ............................................................................................ 7
[ value% w;] output power of the ups (calculated value). ............................................................................................................. 7
Inverter output current (normal operation). ..................................................................................................................................... 7
[+ value a; ] battery current (calculated value)................................................................................................................................ 7

Explanation
This document shows some tables with the electric signals path related to the values visualized on the UPS panel.
The measure of the electric signals of alternate voltage " Vac " and of continuous voltage " Vdc " is reported to the
conditions of operation with nominal voltage and load.
For each value present on the panel we consider:
- the meaning of the correlated signal,
- the symbol and the value correspondents, visible on the computer in DEBUG connection,
- the name and the code of the cards on which is present the signal.
- The name with which has identified the signal on each card
- The terminals of the connector on which has connected the signal.
Technical Information/ Informazione tecnica. IT-2012A pagina 1 di 5

- A component and a point of reference between which is possible to measure with digital multimeter.
- The values of alternate voltage "Vac" and continuous voltage "Vdc" measurable when the ups works in
condition of voltage and nominal load.
The connection "debug" between the UPS and computer can be realized by connecting the serial doors RS232 of the
two unity, with the cable supplied.
For visualizing the values on the computer in DEBUG mode it must be used the program WINDOWS TERMINAL or
MREM.

[ IN= value1, …, …%V ] Line input voltage, phase 1.


Initial on Debug Vacin1_boost (V): value1
Input card 8-20KVA Phase1: from right side of R11 (230 Vac, 0 Vdc, Ref: Neutral) to J1_2.
9AATB2048xxxx
Booster control card Phase1: from J1_2 to pin3 of U5A,
9AATB2022xxxx Signal-phase-in-1: from internal side pin of R211 (0 Vac, 2.8 Vdc, Ref: case of U13) to
J3_1.
micro sistem card from J4_1 to R89 to pin 13 of U22 (0 Vac, 2.8 Vdc, Ref: ground of the logic on the
9AATB2032xxxx. CASE of X1)

[ IN= …, value2, …%V ] Line input voltage, phase 2.


Initial on Debug Vacin2_boost (V): value2,
Input card 8-20KVA Phase 2: from right side of R13 (230 Vac, 0 Vdc, Ref: Neutral) to J1_3;
9AATB2048xxxx
Booster control card Phase 2: from J1_3 to pin3 of U6A;
9AATB2022xxxx Signal-phase-in -2: from internal side pin of R136 (0 Vac, 2.8 Vdc, Ref: case of U13) to
J3_2;
micro sistem card from J4_2 to R95 to pin 14 of U22 (0 Vac, 2.8 Vdc, Ref: ground of the logic on the
9AATB2032xxxx. CASE of X1)

[ IN= …, …, value3 %V ] Line input voltage, phase 3.


Initial on Debug Vacin3_boost (V): valore3;
Input card 8-20KVA Phase3: from right side of R15 (230 Vac, 0 Vdc, Ref: Neutral) to J1_4;
9AATB2048xxxx
Booster control card Phase3: from J1_4 to pin2 of U7A;
9AATB2022xxxx Signal-phase-in -3: from internal side pin of R65 (0 Vac, 2.8 Vdc, Ref: case of U13) to
J3_3;
micro sistem card from J4_3 a R97 to pin 15 di U22 (0 Vac, 2.8 Vdc, Ref: ground of the logic on the CASE
9AATB2032xxxx. of X1)

[ OUT= value1, …, …Vln; ] UPS output voltage, phase 1


Initial on Debug Vout1_ups (V): value1;
Three-phase bypass card Phase1: from FS1 (230 Vac, 0 Vdc, Ref: Neutral ) to R34 to J7_7;
9AATB2054xxxx
Three-phase inverter power Phase1: from J3_7 to pin 3 of U2A;
card 9AATB2031xxxx Signal-phase-out1: from pin 1 of U2A (1.27 Vac, 2.3 Vdc, Ref: pin of R6 side C8) to
J6_1;
Micro sistem card From J5_1 to R98 to pin 35 of U21;
9ATB2032xxxx
Technical Information/ Informazione tecnica. IT-2012A pagina 1 di 5

[ OUT= …, value2, … Vln; ] UPS output voltage, phase 2


Initial on Debug Vout2_ups (V): value2;
Three-phase bypass card Phase 2: from FS2 (230 Vac, 0 Vdc, Ref: Neutral) to R36 to J7_12;
9AATB2054xxxx
Three-phase inverter power Phase 2: from J3_12 to pin 5 of U2B;
card 9AATB2031xxxx Signal-phase-out2: from pin 7 of U2B (1.27 Vac, 2.3 Vdc, Ref: pin of R6 side C8) to
J6_2;
Micro sistem card From J5_2 to R94 to pin 39 of U21;
9ATB2032xxxx

[ OUT= …, …, value3 Vln; ] UPS output voltage, phase 3


Initial on Debug Vout3_ups (V): value3;
Three-phase bypass card Phase3: from FS3 (230 Vac, 0 Vdc, Ref: Neutral ) to R38 to J7_16;
9AATB2054xxxx
Three-phase inverter power Phase3: from J3_16 to pin 12 of U2D;
card 9AATB2031xxxx Signal-phase-out3: from pin 14 of U2D (1.27 Vac, 2.3 Vdc, Ref: pin of R6 side C8) to
J6_3;
Micro sistem card Phase3: from J5_3 to R103 to pin 41 of U21;
9ATB2032xxxx

[ OUT= …….., value 1, …, …%A; ] UPS output current, phase1.


Initial on Debug Iout1_ups (A): value1;
Three-phase bypass card Phase1: from R1 ( 0.626 Vac , 0 Vdc , Ref: the two pin of R1) to J7_1;
9AATB2054xxxx
Three-phase inverter power Phase1: from J3_1 to J2_35;
card 9AATB2031xxxx
tri/mono inverter control Phase1: from J2_35 (0.626 Vac from measure to the heads of R120, 2.3 Vdc from
card 9AATB2030xxxx measure to the heads of bottom of R120 and logic ground on CASE of X1) to J1_2;
Micro sistem card Phase1: from J3_2 to R4 (0.626 Vac, 2.3 Vdc, Ref: logic ground on case of X1) to pin 36
9ATB2032xxxx of U21;

[ OUT= …….., …, value 2, … %A; ] UPS output current, phase2


Initial on Debug Iout2_ups (A): value2;
Three-phase bypass card Phase2: From R3 ( 0.626 Vac , 0 Vdc , Ref: the two pin of R3) to J7_3;
9AATB2054xxxx
Three-phase inverter power Phase2: From J3_3 a J2_37;
card 9AATB2031xxxx
tri/mono inverter control Phase2: From J2_37 (0.626 Vac from measure to the heads of R122, 2.3 Vdc from
card 9AATB2030xxxx measure to the heads of bottom of R122 and logic ground on CASE of X1) to J1_3;
Micro sistem card Phase2: From J3_3 to R11 (0.626 Vac, 2.3 Vdc, Ref: logic ground on case of X1) to pin
9ATB2032xxxx 40 of U21;
Technical Information/ Informazione tecnica. IT-2012A pagina 1 di 5

[ OUT= …….., …, …, value 3 %A; ] UPS output current, phase3


Initial on Debug Iout3_ups (A): value3;
Three-phase bypass card Phase3: from R6 ( 0.626 Vac , 0 Vdc , Ref: the two pin of R6) to J7_5;
9AATB2054xxxx
Three-phase inverter power Phase3: from J3_5 to J2_39;
card 9AATB2031xxxx
tri/mono inverter control Phase3: from J2_39 (0.626 Vac from measure to the heads of R125, 2.3 from measure to
card 9AATB2030xxxx the heads of bottom of R125 and logic ground on CASE of X1) to J1_4;
Micro sistem card Phase3: from J3_4 to R9 (0.626 Vac, 2.3 Vdc, Ref: logic ground on case of X1) to pin 42
9ATB2032xxxx of U21;

[BY= value1, …, …Vl; ] Bypass input voltage, phase1


Initial on Debug Vbyp1 (V): value1;
Three-phase bypass card Vbyp1 : from FS4 (230 Vac, 0 Vdc, Ref: Neutral) to J7_15;
9AATB2054xxxx
Three-phase inverter power Vbyp1 : from J3_15 to J2_29;
card 9AATB2031xxxx
tri/mono inverter control Vbyp1 : from J2_29 to pin 3 of U17A;
card 9AATB2030xxxx signal-byp-1: from external side pin of R69 (0 Vac, 3.65 Vdc, Ref: logic ground on screw
of U3) to J1_13;
Micro sistem card signal-byp-1: from J3_13 to R38 to pin 13 of U11 (0 Vac, 3.65 Vdc, Ref: logic ground on
9ATB2032xxxx case of X1);

[BY= …, value2, …Vl; ] Bypass input voltage, phase2


Initial on Debug Vbyp2 (V): value2;
Three-phase bypass card Vbyp2 : from FS5 (230 Vac, 0 Vdc, Ref: Neutral) to J7_14;
9AATB2054xxxx
Three-phase inverter power Vbyp2 : from J3_14 to J2_30;
card 9AATB2031xxxx
tri/mono inverter control Vbyp2 : from J2_30 to pin 3 of U20A;
card 9AATB2030xxxx signal-byp-2: from internal side pin of R90 (0 Vac, 3.65 Vdc, Ref: logic ground on screw
of U3) to J1_14;
Micro sistem card signal-byp-2: from J3_14 to R39 to pin 14 of U11 (0 Vac, 3.65 Vdc, Ref: logic ground on
9ATB2032xxxx case di X1);

[BY= …, …, value3 Vl; ] Bypass input voltage, phase3


Initial on Debug Vbyp3 (V): value3;
Three-phase bypass card Vbyp3 : from FS6 (230 Vac, 0 Vdc, Ref: Neutral) to J7_13;
9AATB2054xxxx
Three-phase inverter power Vbyp3 : from J3_13 to J2_31;
card 9AATB2031xxxx
tri/mono inverter control Vbyp3 : from J2_31 to pin 3 of U7A;
card 9AATB2030xxxx signal-byp-3: from external side pin of R8 (0 Vac, 3.65 Vdc Ref: logic ground on screw
of U3) a J1_15;
Micro sistem card signal-byp-3: from J3_15 to R40 to pin 15 of U11 (0 Vac, 3.65 Vdc, Ref: logic ground on
9ATB2032xxxx case of X1);
Technical Information/ Informazione tecnica. IT-2012A pagina 1 di 5

[ BAT= +value, ………. V; ] Battery input voltage, positive branch.


Initial on Debug Vbat+_boost (V): positive value,
booster power card UPS 10kVA, 16 battery 12V:
9AATB2023xxxx Vbatt+: from top side pin of R4 (0 Vac, 64Vdc, Ref: neutral) to J1_1;
UPS 15kVA to 20kVA, 24 battery 12V:
Vbatt+: from top side pin of R4 (0 Vac, 96Vdc, Ref: neutral) to J1_1;
Booster control card UPS 10kVA, 16 battery 12V:
9AATB2022xxxx Vbatt+: from J2_1 to pin 12 of U5D; from pin 14 of U5D (0 Vac, 2,4Vdc, Ref: logic
ground on case of U13) to J3_10;
UPS 15kVA to 20kVA, 24 battery 12V:
Vbatt+: from J2_1 to pin 12 of U5D; from pin 14 of U5D (0 Vac, 3,9Vdc, Ref: logic
ground on case of U13) to J3_10;
micro sistem card UPS 10kVA, 16 battery 12V:
9AATB2032xxxx. from J4_10 to R71 to pin 2 of U22 (0 Vac, 2,4Vdc, Ref: logic ground on case of X1);
UPS 15kVA a 20kVA, 24 batterie 12V:
from J4_10 to R71 to pin 2 of U22 (0 Vac, 3,9Vdc, Ref: logic ground on case of X1);

[ BAT= +…., - value V; ] Battery input voltage, negative branch.


Initial on Debug Vbat-_boost (V): negative value,
booster power card UPS 10kVA, 16 batterie 12V:
9AATB2023xxxx Vbatt-: from top side pin of R36 (0 Vac, 64Vdc, Ref: neutral) to J1_2;
UPS 15kVA to 20kVA, 24 batterie 12V:
Vbatt-: from top side pin of R36 (0 Vac, 96 Vdc, Ref: neutral) to J1_2;

Booster control card UPS 10kVA, 16 batterie 12V:


9AATB2022xxxx Vbatt-: from J2_2 to pin 13 of U6D; from pin 14 of U6D (0 Vac, 2,4Vdc Ref: logic ground
on case of U13) to J3_11;
UPS 15kVA a 20kVA, 24 batterie 12V:
Vbatt-: from J2_2 to pin 13 of U6D; from pin 14 of U6D (0 Vac, 2,4Vdc, Ref: logic ground
on case of U13) to J3_11;
micro sistem card UPS 10kVA, 16 battery 12V:
9AATB2032xxxx. from J4_11 to R82 to pin 4 of U22 (0 Vac, 2,4Vdc, Ref: logic ground on case of X1);
UPS 15kVA a 20kVA, 24 battery 12V:
from J4_11 to R82 to pin 4 of U22 (0 Vac, 2,4Vdc, Ref: logic ground on case of X1);

[i = … V, V dc+ = positive value, V dc- = …….; ] Inverter input voltage, positive


Initial on Debug Vdc+_inv (V): positive value,
three-phase inverter power from top side pin of R8 (0 Vac, from 100 to 130 Vdc, Ref: neutral) to J2_23;
card 9AATB2031xxxx
tri/mono inverter control from J2_23 to pin 12 of U15D;
card 9AATB2030xxxx signal-voltage-dc+: from pin 14 of U15D (0 Vac, 3.5 Vdc, Ref: logic ground on screw of
U3) to J1_11;
micro sistem card from J3_11 to R35 (0 Vac, 3.5 Vdc, Ref: logic ground on case of X1) to pin 27 of U21;
9AATB2032xxxx.

[i = … V, V dc+ =……., V dc- = negative value; ] Inverter input voltage, negative


Initial on Debug Vdc-_inv (V): negative value,
three-phase inverter power from top side pin of R79 (0 Vac, from -100 a -130 Vdc, Ref: neutral) to J2_25;
card 9AATB2031xxxx
tri/mono inverter control from J2_25 to pin 13 of U11D;
card 9AATB2030xxxx Signal-voltage-dc-: from pin 14 of U11D (0 Vac, 3.5 Vdc, Ref: logic ground on screw of
U3) to J1_12;
micro sistem card from J3_12 to R36 (0 Vac, 3.5 Vdc, Ref: logic ground on case of X1) to pin 28 of U21;
9AATB2032xxxx.
Technical Information/ Informazione tecnica. IT-2012A pagina 1 di 5

[ i = value V, …V+, … V-; ] Inverter output voltage


Initial on Debug Vout1_inv (V): value1, Vdc+_inv (V): ……, Vdc-_inv (V): ……..;
three-phase inverter power From right side pin of R2 (76 Vac, 0 Vdc, Ref: neutral) to J2_26;
card 9AATB2031xxxx
tri/mono inverter control from J2_26 to pin 3 of U15A;
card 9AATB2030xxxx signal-output-inv-1: from pin 1 of U15A (1.27 Vac, 2.3 Vdc, Ref: logic ground on screw
of U3) to J1_8;

micro sistem card J3_8 to R17 to pin 29 of U21 (1.27 Vac, 2.3 Vdc, Ref: logic ground on case of X1).
9AATB2032xxxx.

[ Ts = 25, Tr =…, Ti =…, Tc =… °C ] Temperature of the micro system card


Initial on Debug Temp_sys (C) : 25
micro sistem card From J3 side pin of NT1 (0 Vac, 2.33 Vdc, Ref: logic ground on case of X1) to pin 2 of
9AATB2032xxxx. U16;

[Ts =…, Tr = 23, Ti =…, Tc =… °C] Temperature of the booster power card
Initial on Debug Temp1_boost (C) : 23
booster power card from J2_2 to J1_4;
9AATB2023xxxx
Booster control card From J2_4 to J3_7;
9AATB2022xxxx
micro sistem card from J4_7 to pin 13 of U16 (0 Vac, 3.08 Vdc, Ref: logic ground on case of X1);
9AATB2032xxxx.

[Ts =…, Tr = …, Ti = 27, Tc =… °C] Temperature of the inverter power card


Initial on Debug Temp1_inv (C): 27
three-phase inverter power from J1_1 to J2_42;
card 9AATB2031xxxx
tri/mono inverter control From J2_42 to J1_16;
card 9AATB2030xxxx
micro sistem card from J3_16 to R42 to pin 12 of U11 (0 Vac, 3 Vdc, Ref: logic ground on case of X1);
9AATB2032xxxx.

[Ts =…, Tr = …, Ti =…, Tc = 25 °C] Temperature of the channel


Initial on Debug Temp_Chan (C): 25
Three-phase inverter power From J5_2 to J6_4;
card 9AATB2031xxxx
micro sistem card from J5_4 to R107 to pin 4 of U11 (0 Vac, 3.09 Vdc, Ref: logic ground on case of X1);
9AATB2032xxxx.

[ IN= …, …, …%V, value Hz ] Input frequency


Initial on Debug To terminal this measure has not represented
Booster control card from pin 1 of U5A to R117;
9AATB2022xxxx signal-frequency-in: from pin 1 of U9A (2.5 Vac, 2.6 Vdc, Ref: logic ground on screw of
U10) to J3_26;
micro sistem card from J4_26 to pin 11 of U28 to pin 16 of U21.
9AATB2032xxxx.
Technical Information/ Informazione tecnica. IT-2012A pagina 1 di 5

[ BY= …, …, …Vl, value Hz ] Frequency of bypass


Initial on Debug To terminal this measure has not represented
Three-phase bypass card from FS4 (230 Vac, 0 Vdc, Ref: neutral) to J7_15;
9AATB2054xxxx
tri/mono inverter control from J2_29 pin 3 of U17A;
card 9AATB2030xxxx signal-frequency-bypass: from pin 1 of U17A ( 3.5 Vac, 0 Vdc, Ref: logic ground on
screw of U3) to pin 3 of U9A to pin 1 of U9A (2.5 Vac, 2.6 Vdc, Ref: logic ground on
screw of U3) to J1_29;
micro sistem card from J3_29 to pin 11 of U1 to pin 9 of U21;
9AATB2032xxxx.

[ OUT= _, value Hz.] Output frequency of the UPS (calculated value)


If the UPS is in normal operation, the value represents the frequency from the inverter. If the UPS is
in state of Bypass, the value is the frequency of Bypass.

[ In= value% A;] UPS feeding line input current (calculated value).
Value calculated by means of output load, input voltage and internal losses of the UPS.

[ value% W;] Output power of the UPS (calculated value).


Calculated value considering the output current measured from the “TA” inverter when the UPS is
in normal operation. For the analysis of the signal consider the path of the signal " inverter output
current ":

Inverter output current (normal operation).


Initial on Debug Iout1_inv (A): …..; Patt1_inv (W): value;
three-phase inverter power From top pin of R22 (0,53 Vac, 0 Vdc, Ref: from measure to the heads of R20) to J2_32;
card 9AATB2031xxxx
tri/mono inverter control from bottom pin of R74 (0,53 Vac, 0 Vdc, Ref: logic ground on screw of U3) to pin of
card 9AATB2030xxxx U11;
signal-current-out-inverter: from pin 1 of U11 to J1_5;
micro sistem card from J3_5 to J3 side pin of R14 ( 0,53 Vac , 2,3 Vdc , Ref: logic ground on case of X1) to
9AATB2032xxxx. pin 30 of U21;

[+ value A; ] Battery current (calculated value).


When the UPS main line feeding is present, the value is negative and it is equal to the value fixed
by the charger, if the I_HIGH signal on pin 1 of U14 of the card 9AATB2019xxx is 5V, otherwise
the current value is 0.
When the UPS main line feeding is not present, the value is positive and it is calculated by means of
the load active power in the inverter, output and inverter losses.

You might also like