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TOPIC 1: Basic Structures of Computers

I. This set of Computer Organization Assessment Questions and Answers


focuses on “Functional Units of a Computer”.

Compulsory

1. The ______ format is usually used to store data.


a) BCD
b) Decimal
c) Hexadecimal
d) Octal
View Answer
Answer: a
Explanation: The data usually used by computers have to be stored and represented in
a particular format for ease of use.

2. The 8-bit encoding format used to store data in a computer is ______


a) ASCII
b) EBCDIC
c) ANCI
d) USCII
View Answer
Answer: b
Explanation: The data to be stored in the computers have to be encoded in a particular
way so as to provide secure processing of the data.

3. A source program is usually in _______


a) Assembly language
b) Machine level language
c) High-level language
d) Natural language
View Answer
Answer: c
Explanation: The program written and before being compiled or assembled is called as
a source program.

4. Which memory device is generally made of semiconductors?


a) RAM
b) Hard-disk
c) Floppy disk
d) Cd disk
View Answer
Answer: a
Explanation: Memory devices are usually made of semiconductors for faster
manipulation of the contents.
5. The small extremely fast, RAM’s are called as _______
a) Cache
b) Heaps
c) Accumulators
d) Stacks
View Answer
Answer: a
Explanation: These small and fast memory devices are compared to RAM because they
optimize the performance of the system and they only keep files which are required by
the current process in them

6. The ALU makes use of _______ to store the intermediate results.


a) Accumulators
b) Registers
c) Heap
d) Stack
View Answer
Answer: a
Explanation: The ALU is the computational center of the CPU. It performs all
mathematical and logical operations. In order to perform better, it uses some internal
memory spaces to store immediate results.

7. The control unit controls other units by generating ___________


a) Control signals
b) Timing signals
c) Transfer signals
d) Command Signals
View Answer
Answer: b
Explanation: This unit is used to control and coordinate between the various parts and
components of the CPU.

8. ______ are numbers and encoded characters, generally used as operands.


a) Input
b) Data
c) Information
d) Stored Values
View Answer
Answer: b
Explanation: None.

9. ______ bus structure is usually used to connect I/O devices.


a) Single bus
b) Multiple bus
c) Star bus
d) Rambus
View Answer
Answer: a
Explanation: BUS is a bunch of wires which carry address, control signals and data. It is
used to connect various components of the computer.

10. The I/O interface required to connect the I/O device to the bus consists of ______
a) Address decoder and registers
b) Control circuits
c) Address decoder, registers and Control circuits
d) Only Control circuits
View Answer
Answer: c
Explanation: The I/O devices are connected to the CPU via BUS and to interact with the
BUS they have an interface.

11. To reduce the memory access time we generally make use of ______
a) Heaps
b) Higher capacity RAM’s
c) SDRAM’s
d) Cache’s
View Answer
Answer: d
Explanation: The time required to access a part of the memory for data retrieval.

12. ______ is generally used to increase the apparent size of physical memory.
a) Secondary memory
b) Virtual memory
c) Hard-disk
d) Disks
View Answer
Answer: b
Explanation: Virtual memory is like an extension to the existing memory.

13. The time delay between two successive initiations of memory operation _______
a) Memory access time
b) Memory search time
c) Memory cycle time
d) Instruction delay
View Answer
Answer: c
Explanation: The time is taken to finish one task and to start another.

Recommendation

1. The Input devices can send information to the processor.


a) When the SIN status flag is set
b) When the data arrives regardless of the SIN flag
c) Neither of the cases
d) Either of the cases
View Answer
Answer: a
Explanation: The input devices use buffers to store the data received and when the
buffer has some data it sends it to the processor.

2. MFC stands for ___________


a) Memory Format Caches
b) Memory Function Complete
c) Memory Find Command
d) Mass Format Command
View Answer
Answer: b
Explanation: This is a system command enabled when a memory function is completed
by a process.

II. This set of Computer Organization and Architecture Multiple Choice


Questions & Answers (MCQs) focuses on “Basic Operational Concept”.
1. The decoded instruction is stored in ______
a) IR
b) PC
c) Registers
d) MDR
View Answer
Answer: a
Explanation: The instruction after obtained from the PC, is decoded and operands are
fetched and stored in the IR.

2. Which registers can interact with the secondary storage?


a) MAR
b) PC
c) IR
d) R0
View Answer
Answer: a
Explanation: MAR can interact with secondary storage in order to fetch data from it.

3. During the execution of a program which gets initialized first?


a) MDR
b) IR
c) PC
d) MAR
View Answer
Answer: c
Explanation: For the execution of a process first the instruction is placed in the PC.

4. Which of the register/s of the processor is/are connected to Memory Bus?


a) PC
b) MAR
c) IR
d) Both PC and MAR
View Answer
Answer: b
Explanation: MAR is connected to the memory BUS in order to access the memory.
5. ISP stands for _________
a) Instruction Set Processor
b) Information Standard Processing
c) Interchange Standard Protocol
d) Interrupt Service Procedure
View Answer
Answer: a
Explanation: None.

6. The internal components of the processor are connected by _______


a) Processor intra-connectivity circuitry
b) Processor bus
c) Memory bus
d) Rambus
View Answer
Answer: b
Explanation: The processor BUS is used to connect the various parts in order to provide
a direct connection to the CPU.

7. The registers, ALU and the interconnection between them are collectively called as
_____
a) process route
b) information trail
c) information path
d) data path
View Answer
Answer: d
Explanation: The Operational and processing part of the CPU are collectively called as a
data path.
Recommendation
1. _______ is used to store data in registers.
a) D flip flop
b) JK flip flop
c) RS flip flop
d) None of the mentioned
View Answer
Answer: a
Explanation: None.

2. The instruction -> Add LOCA, R0 does _______


a) Adds the value of LOCA to R0 and stores in the temp register
b) Adds the value of R0 to the address of LOCA
c) Adds the values of both LOCA and R0 and stores it in R0
d) Adds the value of LOCA with a value in accumulator and stores it in R0
View Answer
Answer: c
Explanation: None.

3. ______ is used to choose between incrementing the PC or performing ALU operations.


a) Conditional codes
b) Multiplexer
c) Control unit
d) None of the mentioned
View Answer
Answer: b
Explanation: The multiplexer circuit is used to choose between the two as it can give
different results based on the input.

III. This set of Computer Organization and Architecture Multiple Choice


Questions & Answers (MCQs) focuses on “BUS Structure”.
1. The main virtue for using single Bus structure is ____________
a) Fast data transfers
b) Cost effective connectivity and speed
c) Cost effective connectivity and ease of attaching peripheral devices
d) None of the mentioned
View Answer
Answer: c
Explanation: By using a single BUS structure we can minimize the amount of hardware
(wire) required and thereby reducing the cost.

2. ______ are used to overcome the difference in data transfer speeds of various
devices.
a) Speed enhancing circuitory
b) Bridge circuits
c) Multiple Buses
d) Buffer registers
View Answer
Answer: d
Explanation: By using Buffer registers, the processor sends the data to the I/O device at
the processor speed and the data gets stored in the buffer. After that the data gets
sent to or from the buffer to the devices at the device speed.

3. To connect other peripheral devices that require a direct connection with the
processor we use ________
a) PCI bus
b) SCSI bus
c) Controllers
d) Multiple bus
View Answer
Answer: a
Explanation: PCI BUS is used to connect other peripheral devices that require a direct
connection with the processor.
4. The bus used to connect the monitor to the CPU is ______
a) PCI bus
b) SCSI bus
c) Memory bus
d) Rambus
View Answer
Answer: b
Explanation: SCSI BUS is usually used to connect video devices to the processor.

5. ANSI stands for __________


a) American National Standards Institute
b) American National Standard Interface
c) American Network Standard Interfacing
d) American Network Security Interrupt
View Answer
Answer: a
Explanation: None.

6. The main advantage of multiple bus organisation over a single bus is _____
a) Reduction in the number of cycles for execution
b) Increase in size of the registers
c) Better Connectivity
d) None of the mentioned
View Answer
Answer: a
Explanation: None.

7. The ISA standard Buses are used to connect ___________


a) RAM and processor
b) GPU and processor
c) Harddisk and Processor
d) CD/DVD drives and Processor
View Answer
Answer: c
Explanation: None.
Recommendation
1. IBM developed a bus standard for their line of computers ‘PC AT’ called _____
a) IB bus
b) M-bus
c) ISA
d) None of the mentioned
View Answer
Answer: c
Explanation: None.

2. _____ register Connected to the Processor bus is a single-way transfer capable.


a) PC
b) IR
c) Temp
d) Z
View Answer
Answer: d
Explanation: The Z register is a special register which can interact with the processor
BUS only.

3. In multiple Bus organisation, the registers are collectively placed and referred as
______
a) Set registers
b) Register file
c) Register Block
d) Map registers
View Answer
Answer: b
Explanation: None.

IV. This set of Computer Organization and Architecture Multiple Choice


Questions & Answers (MCQs) focuses on “Performance of a System”.
1. During the execution of the instructions, a copy of the instructions is placed in the
______
a) Register
b) RAM
c) System heap
d) Cache
View Answer
Answer: d
Explanation: None.

2. Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz
respectively. Suppose A can execute an instruction with an average of 3 steps and B
can execute with an average of 5 steps. For the execution of the same instruction which
processor is faster?
a) A
b) B
c) Both take the same time
d) Insufficient information
View Answer
Answer: a
Explanation: The performance of a system can be found out using the Basic
performance formula.

3. A processor performing fetch or decoding of different instruction during the


execution of another instruction is called ______
a) Super-scaling
b) Pipe-lining
c) Parallel Computation
d) None of the mentioned
View Answer
Answer: b
Explanation: Pipe-lining is the process of improving the performance of the system by
processing different instructions at the same time, with only one instruction
performing one specific operation.
4. For a given FINITE number of instructions to be executed, which architecture of the
processor provides for a faster execution?
a) ISA
b) ANSA
c) Super-scalar
d) All of the mentioned
View Answer
Answer: c
Explanation: In super-scalar architecture, the instructions are set in groups and they’re
decoded and executed together reducing the amount of time required to process
them.

5. The clock rate of the processor can be improved by _________


a) Improving the IC technology of the logic circuits
b) Reducing the amount of processing done in one step
c) By using the overclocking method
d) All of the mentioned
View Answer
Answer: d
Explanation: The clock rate(frequency of the processor) is the hardware dependent
quantity it is fixed for a given processor.

6. An optimizing Compiler does _________


a) Better compilation of the given piece of code
b) Takes advantage of the type of processor and reduces its process time
c) Does better memory management
d) None of the mentioned
View Answer
Answer: b
Explanation: An optimizing compiler is a compiler designed for the specific purpose of
increasing the operation speed of the processor by reducing the time taken to compile
the program instructions.
7. The ultimate goal of a compiler is to ________
a) Reduce the clock cycles for a programming task
b) Reduce the size of the object code
c) Be versatile
d) Be able to detect even the smallest of errors
View Answer
Answer: a
Explanation: None.

8. SPEC stands for _______


a) Standard Performance Evaluation Code
b) System Processing Enhancing Code
c) System Performance Evaluation Corporation
d) Standard Processing Enhancement Corporation
View Answer
Answer: c
Explanation: SPEC is a corporation that started to standardize the evaluation method of
a system’s performance.

9. As of 2000, the reference system to find the performance of a system is _____


a) Ultra SPARC 10
b) SUN SPARC
c) SUN II
d) None of the mentioned
View Answer
Answer: a
Explanation: In SPEC system of measuring a system’s performance, a system is used as
a reference against which other systems are compared and performance is
determined.

10. When Performing a looping operation, the instruction gets stored in the ______
a) Registers
b) Cache
c) System Heap
d) System stack
View Answer
Answer: b
Explanation: When a looping or branching operation is carried out the offset value is
stored in the cache along with the data.

11. The average number of steps taken to execute the set of instructions can be made
to be less than one by following _______
a) ISA
b) Pipe-lining
c) Super-scaling
d) Sequential
View Answer
Answer: c
Explanation: The number of steps required to execute a given set of instructions is
sufficiently reduced by using super-scaling. In this method, a set of instructions are
grouped together and are processed.

12. If a processor clock is rated as 1250 million cycles per second, then its clock period
is ________
a) 1.9 * 10-10 sec
b) 1.6 * 10-9 sec
c) 1.25 * 10-10 sec
d) 8 * 10-10 sec
View Answer
Answer: d
Explanation: None.

13. CISC stands for _______


a) Complete Instruction Sequential Compilation
b) Computer Integrated Sequential Compiler
c) Complex Instruction Set Computer
d) Complex Instruction Sequential Compilation
View Answer
Answer: c
Explanation: CISC is a type of system architecture where complex instructions are
grouped together and executed to improve system performance.
14. As of 2000, the reference system to find the SPEC rating are built with _____
Processor.
a) Intel Atom SParc 300Mhz
b) Ultra SPARC -IIi 300MHZ
c) Amd Neutrino series
d) ASUS A series 450 Mhz
View Answer
Answer: b
Explanation: None.

Recommendation

1. If the instruction, Add R1, R2, R3 is executed in a system that is pipe-lined, then the
value of S is (Where S is a term of the Basic performance equation)?
a) 3
b) ~2
c) ~1
d) 6
View Answer
Answer: c
Explanation: S is the number of steps required to execute the instructions.

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