Professional Documents
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Circuit Cellar 215 - June 2008
Circuit Cellar 215 - June 2008
Circuit Cellar 215 - June 2008
High-Current Wiring, Safety, & Fusing p. 30 • Crystal Oscillators Explained p. 70 • New Touch Sensor Gadgetry p. 78
www.circuitcellar.com
COMMUNICATIONS
Build A Call-Monitoring Device
Coding Techniques For An
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A Design For Decoding AIS
Transmissions
Simple Human-To-Circuit
Communication
Implement A Ray Tracer
On An FPGA
A Drive System For
Pump Control
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TASK MANAGER
Communications Hub FOUNDER/EDITORIAL DIRECTOR CHIEF FINANCIAL OFFICER
I n its early days, Circuit Cellar was known as the essential monthly print maga-
zine for computer applications. By the late-1990s, it was known as the essential
Steve Ciarcia
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Jeannette Ciarcia
MEDIA CONSULTANT
C. J. Abate Dan Rodrigues
monthly print magazine that also offered some useful online content. Today, the WEST COAST EDITOR CUSTOMER SERVICE
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For some, the name simply meant the interesting print magazine started by Ingo Cyliax
Robert Lacoste ART DIRECTOR
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John Gorsky Carey Penney
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On page 14, Peter Csaszar and Monica Flores describe their PIC18F4520- AUTHORIZED REPRINTS INFORMATION
860.875.2199, E-mail: reprints@circuitcellar.com
based voicemail monitoring system. In “Pump Control,” Richard Wotiz describes AUTHORS
his award-winning spa pump controller system (p. 20). Turn to page 30 for Ed Authors’ e-mail addresses (when available) are included at the end of each article.
switch with a capacitive touch pad. For information about crystals, turn to page Circuit Cellar® makes no warranties and assumes no responsibility or liability of any kind for errors in these programs or schematics or for the
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COLUMNS
30 ABOVE THE GROUND PLANE 70 THE DARKER SIDE
Resistance Soldering Let’s Be Crystal Clear
Ed Nisley Robert Lacoste
62 FROM THE BENCH 78 SILICON UPDATE
Self-Destructive Behavior Touch Me
Processor Action Requires Power Supply Removal Tom Cantrell
Jeff Bachiochi
New Touch Sense Technology (p. 78)
DEPARTMENTS
4 TASK MANAGER 94 INDEX OF ADVERTISERS
Communications Hub July Preview
C. J. Abate
96 PRIORITY INTERRUPT
8 NEW PRODUCT NEWS It’s All In The Whiskers
edited by John Gorsky Steve Ciarcia
93 CROSSWORD
Jennic
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WWW.TOMCHRANE.COM
Lemos International
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Ironwood Electronics
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Lumex, Inc.
www.lumex.com
www.circuitcellar.com CIRCUIT CELLAR® Issue 215 June 2008 13
FEATURE ARTICLE by Peter Csaszar & Monica Flores
Message Acquisition
Ring Signal Detection And Interpretation
You’ll never miss another voicemail message with Peter and Monica’s voicemail monitoring
system. Their device monitors the signal from an analog phone line, analyzes it, tracks the
number of calls and messages, and displays the number on a VFD.
a) b)
Photo 1a—This is the fully assembled circuit board, without the display. b—This is the monitoring system in operation. The end user will interact only with the blue Call Count
Reset button.
(where a message can be left by there is a possibility that a message Harvard architecture. In addition, we
means other than calling the recipi- was left. Mathematically speaking, the needed a chip that was widely avail-
ent’s own phone number), it suffices desired ring count is only a necessary able, had enough code space to reason-
to poll the line after the phone rings, condition for the message. Callers ably support firmware development in
or after the subscriber gets off the often let the voicemail kick in, but C language, had plenty of features for
phone. However, phone companies hang up before the outgoing message experimentation, and had a PDIP
don’t like polling because it keeps is over. These false positives are not a packaging that enabled prototyping in
their circuits unnecessarily busy. major problem. A bigger criticism of a solderless breadboard. In terms of
A technology that is gaining more this method is its inherent false nega- the I/O resources, the PIC18F4520 is
popularity is frequency shift keyed tives: messages that are left while the more generous than necessary. But due
(FSK) proactive voicemail notification. phone was off-hook. However, for a to our aforementioned needs, it was
In this approach, the phone exchange user who doesn’t use the phone too our final choice.
sends a burst of data signals, similar to often (and for whom this device is One of our primary design goals was to
signals carrying caller ID information, intended), the odds of this situation keep the entire circuit as simple as pos-
which is recognized by the FSK receiv- remain negligible. sible. Power is supplied from a 9-VDC
er on the subscriber’s side. wall adapter. The 5 V for the PIC18F4520
In addition to these methods, some HARDWARE DESIGN and the display is supplied by a 7805
PBX systems put a high-voltage DC Figure 1 shows the system’s circuitry. regulator. Although the fundamental
signal on the line. This drives a neon The heart and soul of the circuit is U1, task of the firmware is time measure-
bulb that is typically built into the a Microchip Technology PIC18F4520 ment performed on the ring signal,
phone set. microcontroller. We selected the parts the precision of these measurements
Our PBX provided only a stutter dial for this design based on a few techni- is not critical. Therefore, it is possible
tone for message indication. Designing cal and educational considerations. As to run the microcontroller from its
a circuit that reliably detects the stut- part of the computer engineering cur- internal oscillator, which requires no
ter dial tone and picks the right riculum at Lawrence Technological additional hardware components
moments for polling is not an easy University, students gain significant whatsoever.
task. Instead, we chose a more experience with 16-bit Freescale Semi- The microcontroller receives two
straightforward approach: monitoring conductor microcontroller devices, such input signals: the ring pulses from the
ring signals. If the number of rings in a as the 68HCS12 microcontroller. We optocoupler (U2) and the Call Count
given call reaches the ring limit (i.e., used a PIC microcontroller for this proj- Reset button. The output peripheral of
the number after which the call is ect so that we could work with this the PCMF is a dot-matrix vacuum fluo-
automatically forwarded to voicemail), chip family’s significantly different rescent display (VFD1) module, which
PSoC includes programmable analog and digital blocks, a fast MCU, flash
and SRAM memory, all in a compact package (as small as 3mm x 3mm).
© 2008 Cypress Semiconductor Corporation. All rights reserved. PSoC is a registered trademark, PSoC Express and PSoC Designer are trademarks of Cypress Semiconductor Corporation. All other trademarks are properties of their respective owners.
*50% off applies to the PSoC Development Kit featured on www.cypress.com/go/changepaper.
FEATURE ARTICLE by Richard Wotiz
Pump Control
FIRST PLACE CONTEST WINNER
power consumption of 2.5 kW. Refer current when the MOSFET switch is Low-voltage power for the various
to Olin Lathrop’s article titled “Digi- on), which is amplified and sent to an parts of the system comes from a pair
tally Control Power Factor Correc- ADC input. It’s also compared to a fixed of power supply modules. I chose two
tion” for a more in-depth introduction threshold to generate an overcurrent evaluation boards for STMicroelec-
to power factor correction (Circuit fault signal. Refer to the PFC_design.doc tronics’s VIPer12A line of offline
Cellar 174, 2005). file on the Circuit Cellar FTP site for switcher components, mainly due to
The operating theory of a CCM PFC more details about the PFC hardware their availability and wide tempera-
is fairly straightforward. The boost design. ture range of 0° to 80°C. I had to
converter operates with two control modify the modules to adapt them to
loops. A fast inner loop controls the POWER SOURCE work with my design. Refer to the
MOSFET switch duty cycle to main- The Spa Pump Controller connects LVPS_mods.doc file on the Circuit
tain an input current that is propor- to a 230-VAC line, and can accept Cellar FTP site for a complete list of
tional to the instantaneous power line between 200 and 264 V. It draws up to changes.
voltage. This simulates a resistive 12 A RMS at 200 V. I used an EMI fil-
load. A slower outer loop gradually ter with low leakage current to elimi- SPA INTERFACE
adjusts the average input current over nate the possibility of tripping the I wanted to be able to control the
a long period of time (several power spa’s ground fault circuit interrupter. pump speed using the control keypad
line cycles) to maintain the output DC When power is first applied, the DC mounted on top of the spa. It has eight
bus voltage at the proper level, which bus capacitors charge up to the peak membrane push buttons and a four-
is 400 V in my case. line voltage through a pair of surge- digit LCD with several status icons. It
The AC input and bus voltages have withstand resistors. (Refer to R81 and connects to the main spa control unit
101:1 voltage dividers feeding ADC R82 in Figure 5.) Once the bus voltage with an eight-wire cable, which I set
inputs. A sense resistor measures the is high enough, a relay turns on to out to reverse engineer. Pressing a but-
input current (equal to the inductor bypass the resistors. ton connects a particular tap of an
IS Dev Kit-2
eight-step voltage divider to a single- ADC, as well as enough pins to 512 bytes of RAM. It uses almost all
output wire. The LCD data is sent accommodate future improvements. of the CPU’s processing capacity
using a three-wire SPI, with a block of An MCP4011-103E/SN digital poten- while running at 20 MIPS.
13 bytes sent every 16.7 ms. The tiometer generates virtual key presses I was careful to avoid any potential-
remaining wires provide 5 V, ground, to send to the spa control. I included a ly hazardous coding practices to
and power for the panel backlight. For 32.768-kHz crystal and a backup bat- reduce the possibility of a crash, con-
more information, refer to the Inter- tery for a real-time clock, another sidering the damage that could result.
face_Schematic.doc file on the Circuit future enhancement. There are no loops anywhere in the
Cellar FTP site. code outside of one main loop. There
I designed the interface as a separate DRIVE UNIT SOFTWARE are no pointer variables (other than
board that sits next to the spa control I wrote the drive unit code in C with function parameters), and I check for a
unit, connecting it and the keypad. It Microchip’s MPLAB 7.5.2 and MPLAB nonzero denominator before all divide
can interpret user key presses and C30 v2.05. I used an ICD2 for initial operations.
modify the data sent to the LCD. It debugging. Later on, I used the electri- Refer to the Flowcharts.doc file on
communicates with up to two drive cally isolated serial port to output the Circuit Cellar FTP site. The main
units over a logic-level serial port to debugging data when operating the sys- loop makes repeated passes through a
control the motor speed. I chose a tem from line power. The code weighs state machine. When the system is
PIC16F687 microcontroller because it in at just over half of the 12 KB of first powered up, the DC bus capaci-
had the requisite SPI, UART, and flash memory, and about 75% of the tors charge up for about 150 ms. Then
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Figure 4—The PFC converter is the noisiest part of the entire system. I put plenty of filtering around the current sense amplifier (U6) and used a shielded optoisolator to keep
noise from coupling into the control circuitry. I used paired resistors for the voltage sense dividers so a single failure wouldn’t send hundreds of volts into a microcontroller pin.
the inrush control relay is turned on The dead time is a short gap during on the Circuit Cellar FTP site for
to bypass the current-limiting resis- the transitions of complementary more details.
tors and the PFC system is started up. PWM signals where neither output is The two motor windings are physi-
Once the bus voltage reaches its final on. This gives one IGBT switch in the cally spaced 90° apart from each other.
value, the motor drive inverter is three-phase driver module time to To get a 90° phase shift between the
started. The main loop also calls the turn off before the opposite one turns voltages across the two windings, the
serial handler to process any incoming on to avoid a momentary short circuit. individual inverter output voltages
commands and flashes the LED at a I set the dead time to 3 µs. This means need to be driven 180° apart from each
rate proportional to the motor speed. I’m not controlling the output voltage other (see Figure 6). The resulting
In the event of a hardware fault, the for 3 µs twice out of every 56-µs period winding voltages will be 283-V peak,
PFC and inverter are immediately (once per transition). This causes dis- or 200-V RMS. This is 3% below the
shut down. Only a command from the tortion at very high or low duty motor’s 230-V ±10% operating range. I
serial port or a power cycle can restart cycles, where 3 µs is a significant por- felt this wouldn’t be a problem and
them. tion of the on or off time. found that the motor had no trouble
To compensate for this distortion, accommodating such a minor
INVERTER PROCESSING you can take advantage of the induc- brownout condition.
Low-level motor drive processing is tive nature of the motor windings. If The magnetic field inside the motor
done in the PWM interrupt routine at an current is flowing out to the motor, it is actually determined by the winding
18-kHz PWM rate, which is just above will continue to flow even when both currents. You want these currents, not
my hearing threshold and below the switches are off, pulling the output the voltages, to have the proper 90°
power module’s 20-kHz limit. It gener- voltage low to ground. If it’s flowing phase shift and appropriate ampli-
ates the properly phased sinusoidal out- inward, it will pull the voltage up to tudes. The interrupt routine finds the
put signals and captures motor current 400 V during the dead time. I imple- phase difference between the main
samples from the ADC. The waveforms mented an algorithm that shifts the and aux winding current zero crossing
are generated by incrementing a phase PWM duty cycle by 3 µs just before points (see Listing 1). It also computes
accumulator by a fixed amount each the motor current changes direction.[1] the sum of the square of the currents
interrupt and using that value as an It’s more complicated than simply (RMS squared). Once each cycle of the
index into a cosine table. The result is waiting for the zero crossing, but it output waveform, the mainline code
scaled by the desired amplitude and provides a cleaner signal. Refer to looks at these values and adjusts the
adjusted to reduce dead time distortion. Duty_adjust() in the Inverter.c file PWM phase values as needed to maintain
SERIAL PORT
The drive unit connects
to the spa interface unit
over a serial port running
at 9,600 bps. Both act as
watchdogs for each other.
The drive unit expects to
receive commands at regu-
lar intervals. If not, it
immediately shuts down.
Conversely, the spa inter-
face unit expects to receive
a response to its commands
within 100 ms. If not, it
sends a virtual key press to
the spa control pack to
shut off the pump relay,
removing power from the
drive unit. The commands
are described in the Seri-
al_Commands.doc file on
the Circuit Cellar FTP site.
PROJECT FILES
To download code and additional files,
go to ftp://ftp.circuitcellar.com/pub/
Circuit_Cellar/2008/215.
Resistance Soldering
In his last two columns, Ed discussed transformer action and the simulated triac control of an
inductive load. This month, he describes a real-world application: circuitry connected directly
to an AC power line.
highly inductive load, I planned to use from April. The first trigger pulse Firing half-cycles into a real transformer
maximum-voltage switching at 90° occurs at the voltage peak, with suc- isn’t good practice, because the unipo-
into the cycle. For a bit more flexibili- cessive negative and positive pulses lar current draws DC power from the
ty, I set up Timer0 to generate eight maintaining conduction for another AC line-voltage supply and biases the
interrupts per power-line cycle at each complete cycle. The Gate voltage core magnetization. That bias can
45° point. The nominal time between modulation isn’t as crisp as in the cause large transients as a subsequent
interrupts is therefore: simulation, but the effect is still obvi- current of the other polarity drags the
ous. Again, the actual circuit shuts off core flux across the entire hysteresis
1
2.083 ms = cleanly when the triac current hits loop. Although I programmed several
8 × 60 Hz [4]
zero after the final trigger pulse, even half-cycle patterns to match the simu-
I subtracted 20 µs from that value as the triac’s main-terminal voltage lations, they’re just for comparison
to account for the instructions snaps downward. purposes.
between each IRQ event and The firmware distributes
its ensuing timer reload. A triggering pulses over six con-
410-µs Finagle Constant for secutive power-line cycles to
the first delay put the first provide duty-cycle control in
90° output at 2.083 ms after 17% increments. Each six-
the exact line-voltage zero cycle pattern lasts for 100 ms,
crossing, thus aligning the so the transformer thumps at
remaining seven interrupts at 10, 20, or 30 Hz as the triac
their nominal phase angles. switches on and off. An over-
Each zero-crossing interrupt all “burn timer” controls the
resynchronizes the Timer0 power-on duration in incre-
interrupts to eliminate any ments of 100 ms.
accumulated timing error. It’s Each tap on the foot switch
a simple matter of software! produces a single, well-
defined heating event that can
LOOKING AT CYCLES Photo 2—Zero-cross triggering involves a slight delay while the circuitry turns
range from 100 ms (a single
Photo 3 corresponds to the on and the interrupt-handler firmware gets control. Unlike the simulated circuit, six-cycle pattern) up to 255.9 s
simulation results in Figure 3 the triac turns off cleanly when Trace 2, the main current, reaches zero. (probably a mistake!). The tip
FPGA designs on an Altera DE2 board, axis and have them move without
which contains a Cyclone II FPGA adding significant complexity to the
and an array of peripherals, such as hardware. Switches and push buttons
Ethernet, RS-232, and a VGA port. In were used to allow motion of the
this article, we will describe a ray light source, motion of the origin,
tracer implemented on an FPGA that’s rotation of the scene, selection of the
capable of rendering, rotating, and resolution, the level of reflections,
moving spheres and depicting planes. the level of antialiasing, reset, the
Figure 1—This is a 3-D view of the coordinate system
Our initial goal was to realistically option to render planes, and finally that was used in the ray tracer design. x and y form
render and shade spheres with reflec- the telescoping and widening of the planes that are parallel to the screen, while z repre-
tions while navigating through the camera. sents the depth of an object.
scene and enabling the spheres to
bounce and roll around. Once we RAY TRACING where many calculations can occur
achieved this goal, we added antialias- Ray tracing can be implemented in in parallel. The basic idea is to trace
ing and the ability to render planes as software without much difficulty; the path of a photon, through a
well. Planes can be used as polygons however, it is more suited to FPGAs scene, to the eye. Because we are
concerned only with the photons
that hit the eye, we simulate rays
Reset coming out of the eye, through the
Reset
Initialize ray tracer
Send done screen, and into the scene and see
Sphere list signal to
Reflection ray
what objects they hit. The ray picks
Initial ray loaded CPU
Yes
Yes (Hit a sphere?)
End of frame
(Hit a sphere?) up color based on the reflectivity as
Apply No Load spheres from CPU
Launch
No Apply it collides with objects in the scene.
Lambertian reflection Lambertian
lighting New ray Send done
ray lighting Eventually, the ray is stopped
signal to
Initial ray CPU Reflection ray because it misses objects in the
(Hit a plane?) (Hit a plane?) scene or picks up negligible color in
Yes No Set up next ray No Yes
subsequent reflections. Shadows are
Launch Launch (Ray intersection?) Launch Launch
Determine Determine
shadow shadow
color of (More reflections?) color of
shadow shadow determined by shooting rays from
ray ray ray ray
pixel and if pixel and if
pixel done
(Antialiasing?)
pixel done intersection points back toward the
Shadow ray (End of line?) Reflection shadow ray
(Hit sphere before light?) (End of frame?) (Hit sphere before light?) light source or sources in the scene
and seeing if there is an object in the
Figure 2—This is a high-level state machine diagram for the FPGA ray tracer. It shows the decisions the ray tracer way to block the light. Shading is
goes through after reset to display one frame on the screen. also performed by weighting light
d OC2 = OC2
The general form of a quadratic equa-
d 2 = d OC2 − t CA2 tion is:
t HC2 = s R 2 − d 2 = s R 2 − d OC2 + t CA2
a • t2 + b • t + c = 0
( )
t I = t CA − sqrt t HC2
In this case:
Intersection = R I = [x I yI zI ] = [x 0 + x D • t I y0 + yD • t I z 0 + z D • t I ]
⎡( x − x C ) ( x I − x C ) ( x I − x C )⎤
Normal = R N = [x N yN zN ] = ⎢ I
sR sR sR
⎥ • • •
⎣ ⎦
• • •
Figure 3—These are essential equations to solve in order to determine whether a ray intersects with a sphere.
All vectors in our calculations are normalized. Values are represented in 24-bit fixed points with 12 integer and
12 decimal bits. You can then solve the quadratic
equation for t and find the closet
intersection point, if any. This is
that hits a surface perpendicularly for the closest intersection, if any, exactly what we do. However, we use
greater than light that merely glances with the spheres in the scene. If it our knowledge of the geometry of the
off. The coordinate system we used hits one, Lambertian lighting is situation to come up with a sequence
is shown in Figure 1. Depth is in the applied to give it a color based on the of steps that delays the square root of
z direction. amount of shadow. If the intersection the quadratic equation and offers
Each ray that intersects with an is completely in a shadow, no shad- checks to bail out of the calculations
object shoots a shadow sooner if an intersection
ray and possibly a reflec- is impossible.
tion ray depending on First, we check if the
the switches and weight Definition of Ray ray originates inside the
given to the reflection Origin = R 0 = [ x 0 y 0 z 0 ] sphere by calculating a
ray to be launched. If Direction = R D = [ x D y D z D ] vector from the ray origin
less than 1% of the light R (t ) = R 0 + R D • t to the center of the
will be reflected, a sphere and the square of
reflection ray won’t be Definition of Plane its magnitude:
launched. We also Normal = P N = [a b c] , where a 2 + b 2 + c 2 = 1 OC = SC − R 0
impose the restriction of d is distance from origin [0 0 0] to plane
d OC2 = OC2
a maximum of three Equation: a • x + b • y + c • z + d = 0
reflection rays to limit If dOC2 is less than SR2,
the time spent per pixel. Calculation of Intersection then we know the ray
A high-level state dia-
tI =
(PN • R 0 + d ) originated inside the
gram for the ray tracer is PN • R D sphere. If the ray origi-
shown in Figure 2. At Intersection = R I = [ x I y I z I ] = [ x 0 + x D • t I y 0 + y D • t I z 0 + z D • t I ] nates inside any sphere,
reset, the tracer is ini- we color the pixel black
tialized and the sphere and move on because no
Figure 4—Fewer equations are needed to determine plane intersections. The intersection
list is loaded from the point is used to determine what color to apply when a pattern (e.g., checkerboard) is light penetrates our
CPU. A ray then checks applied to the plane. spheres. Note that this is
tI =
(PN • R 0 + d)
PN • R D
We calculate the denominator first.
Figure 5—This is a detailed version of the ray tracer state machine. The states are grouped by color based on their
If PN · RD equals zero, the ray is paral-
functions. There are states that perform functions that are shared by all states and states dedicated to drawing
shadows, planes, and spheres. lel to the plane and we can disregard
it. Likewise, if PN · RD is positive, the
plane’s normal is pointing away from
not true of shadow rays because they Following that comparison, we cal- the origin and we disregard it in our
may originate (RI) under the surface culate the half-chord distance
because of the limited precision of squared, where the half-chord dis-
our calculations. We ignore the result tance is the distance from the point
of this comparison for shadow rays. found by tCA and the surface of the
1/16 1/8 1/16 1/8 1/8
Next, we calculate the distance sphere:
from the origin to the point along the d 2 = d OC2 − t CA2 1/8 1/4 1/8 1/2
ray that is closest to the sphere’s
t HC2 = s R 2 − d 2 = s R 2 − d OC2 + t CA2
center: 1/16 1/8 1/16 1/8 1/8
REFLECTIONS
Physics tells us that the following
two statements are true:
θI = θR
VR = θ • VI + θ • VN
VR = VI − 2 • ( VN • VI ) • VN
The resulting reflection vector VR is
also normalized when the incident
vector VI and the normal vector VN are
also normalized.
SOFTWARE/HARDWARE TRADE-OFF
Many of the functions in the ray trac-
er can be performed by either the hard- Photo 3—Six small spheres are embedded on a larger
green sphere, with two more equally sized purple
ware or the software. We tried to take
spheres farther in the background. The light source is at
advantage of the hardware parallelism the lower-right corner. One purple sphere is experiencing
as much as possible by calculating an eclipse due to the green sphere and is barely visible.
www.microchip.com/MASTERs www.microchip.com/PPS
NIOS II
8 16 24 24 24 12 12 24 12
sphere color x1 y1 z1 reflect radius r2 R_inv valid rotz done
SRAM
Figure 7—This is a hardware-software interface. The ray tracer communicates with the embedded NIOS II processor with an array of parallel I/O lines. The software runs on
the NIOS II processor and uses SDRAM for its instruction and data cache. The ray tracer communicates with the VGA control via a writeback buffer and SRAM.
sphere movement and rotation are point unit, the software also has the which coordinates with the VGA con-
performed by the software while the advantage of having a higher precision troller to access the SRAM. The VGA
hardware draws the frames. This than the hardware, which uses a fixed controller reads the screen values
maximizes the efficiencies of both point. from SRAM and sends them to the
parts so the hardware state machine The ray tracing hardware consists of VGA DAC along with the necessary
can run as fast as possible while the a large state machine responsible for clock and synch signals. The ray tracing
software does not sit idle waiting for calculating the color of all the pixels. hardware interfaces with the NIOS II
the hardware. By using a real floating- Pixel data is written to a write buffer, CPU through the sphere table and one
state in the state machine where it
reads values from the CPU.
The detailed state machine is
shown in Figure 5. The initial ray is
normalized over several cycles, which
requires a magnitude calculation, a
square root, and a division. Then for
each sphere, we check whether the ray
origin is inside a sphere. If a ray origin
is inside a sphere, the ray is not drawn
because it would be impossible to see
it. If it is, the pixel is drawn black and
we can move on to the next one. Oth-
erwise, we check to see if a sphere is
in front of the ray and whether or not
it intersects.
If an initial ray does not intersect
with a sphere, it would then be
checked with the plane list. The same
is true for a reflection ray. Also, if a
shadow ray intersects with any sphere
closer than the light source, a shad-
ow is cast on the origin of the shad-
ow ray. Because we are concerned
with the closest intersection, we
must check every sphere after an
intersection is detected, so the clos-
est distance and its intersection
point are stored until all spheres
have been checked. Shadow rays can
Figure 8—These charts show the performance of the ray tracer for two images with different complexities and at various antialiasing and reflection settings. The performance of
the ray tracer in terms of frames per second decreased greatly when additional features, such as reflection and antialiasing, were turned on.
and the back porch begins. Once the gradient). data on the buses is valid to read. Rotz
back porch is completed, the VGA [7:0] (input) sets the different modes
controller uses the horizontal and ver- NIOS II & FPGA COMMUNICATION for rotating all of the spheres around
tical counters to produce coordinates Several buses are used to interface the x, y, and z axes. Done (input)
for the current pixel being drawn. between the C code running on the means that only when done is high
Once the visible resolution is complet- NIOS II processor and the hardware in will the software send out the sphere
ed, the front porch begins. Following the FPGA. Sphere [7:0] (output) con- information one by one.
the front porch, the process repeats trols the total number of spheres As soon as the hardware gets all of
with a synch signal. Similar actions drawn and the number of spheres that the updated sphere information, it
are taken by the vertical line counter, are currently being drawn. Color [15:0] will draw the frame. In the meantime,
except the clock is the end of a line (output) specifies the color of a sphere. the software will call motion and rota-
rather than a pixel. While the VGA X1 [23:0] (output) is the x location of tion functions to calculate the new
controller was synching, the write the current sphere. All locations are locations of the spheres.
buffer was free to write to SRAM at represented in fixed-point format,
one pixel per cycle. with 12 bits each for integer and deci- SOFTWARE
The coordinates produced by the mal portions. On the software side, The hardware-software interface for
VGA controller were used to access the location needs to be multiplied by the ray tracer is shown in Figure 7.
memory at the word level. We used 4,096 (i.e., 212) so the hardware will The software running on the NIOS II
the lower 9 bits from each of the x get the correct value. Y1 [23:0] (out- has three main functions. It stores the
and y coordinates to index SRAM. put) is the y location of the current list of spheres to be drawn on the
This limited our resolution to 512 sphere. Z1 [23:0] (output) is the z loca- screen, performs motion calculations
pixels wide, but it made indexing tion of the current sphere. Reflect on the spheres, and rotates the camera
easy. Because SRAM can hold 16-bit [11:0] (output) is reflectivity of a angle to enable you to “look around”
words, we used 1 bit to indicate that sphere in a 12-bit integer. Radius the environment. Each data entry for a
a pixel was the light source and 5 to [11:0] (output) is the radius of a sphere sphere contains information such as
represent the red, blue, and green in a 12-bit integer. R2 [23:0] (output) is its location, color, velocity, radius,
content of a pixel. When read back the radius squared of a sphere in a 24-bit and reflectivity. The NIOS II processor
from SRAM, the RGB values were integer. R_inv [11:0] (output) is the was designed as a DRAM controller,
used as the upper 5 bits of the 10-bit inverse of the radius of a sphere in a enabling us to store a large number of
RGB lines going to the DAC. If the 12-bit decimal point. The valid signal spheres and polygons on the DRAM
pixel being drawn was part of the (output) tells the hardware that the without writing a separate memory
light source, the lower bits were set controller. Putting the scene object
high to enable us to produce “pure” Family Cyclone II list on the DRAM frees up the SRAM
white. Otherwise, they were left as 0. Device EP2C35F672C6 for the VGA memory.
Representing each color in 5 bits, Total logic elements 32529/33216 (98%) The motion function software
however, lead to some quantization Total registers 6,348 updates the current location for each
of color. This is most clearly visible Total memory bits 94,688 (20%) sphere by its current velocity. It also
in the Lambertian shading where Total PLL 2/4 (50%) performs boundary and collision
there are small concentric rings of a detection with other spheres. A 2-D
Table 2—These are the FPGA usage statistics from the
shade of the sphere color before sphere-collision algorithm is expanded
compilation report of the final design. In the end, our
jumping to the next slightly different design was limited by the number of logic elements to work in 3-D.
shade (rather than being a smooth available on the FPGA. The rotation function rotates all of
RX DATA
been interested in decoding off-air data Audio from
CMX589A GMSK
RX CLK
LM3S811
U0Tx
To host
RX S/N FT2232C USB
receiver USB
transmissions. From an early interest discriminator
Modem PLLAcq Microcontroller
U0Rx Device controller computer
RXDCAcq
in radio teletype (RTTY) transmis- RXHOLDn
sions, I moved on to DOS programs to
LM3S811 Evaluation board
decode the data from trunked radio
systems and paging systems. When I
Figure 1—This system features a GMSK modem interfaced to an LM3S811 evaluation board.
heard about a new marine data system
carrying ships’ positions, I just had to
have a go at decoding the data! Gaussian minimum shift-keying 161.975 and 162.025 MHz. To receive
The Universal Automatic Identifica- (GMSK) transmissions used by the AIS. the transmissions, a narrow-band FM
tion System (AIS) is a data system that I used a CML Microcircuits CMX589A (NBFM) receiver that is capable of cover-
operates on two frequencies in the modem for this purpose (see Figure 2). ing the VHF marine band is required. I
marine VHF FM band. Ships, and other My complete system, including the used an Icom IC-R7000 communications
fixed installations, make frequent modem and the LM3S811 module, is receiver. This is a fairly old, but very
broadcast transmissions that may be shown in Photo 1. able, communications receiver that
received by other vessels in range. The covers the 25-MHz to 2-GHz frequency
transmissions carry both “dynamic” HARDWARE range. My receiver was modified to
information (i.e., position and speed) AIS transmissions can be heard on two bring the discriminator output out to
and “static” information (i.e., name, frequencies in the marine VHF band, an RCA jack in the rear. This provides
call sign, and more). A decoder receiv-
ing the transmissions can display a
“virtual” radar screen showing the
position of other vessels in the area.
The Luminary Micro LM3S811 eval-
uation board seemed like the ideal
platform for developing an AIS
decoder (see Figure 1). The Stellaris
microcontroller has a low-interrupt
latency, and it is ideal for decoding a
serial stream in software. Also, a USB
COM port is connected to one of the
microcontroller’s UARTs. This is per-
fect for transferring data back to a PC
program with serial data.
In addition to the microcontroller, I
needed a modem to demodulate the Figure 2—This is the CMX589A GMSK modem section.
GMSK DEMODULATOR
Figure 2 shows the GMSK modem
section, which I constructed on strip-
board. I followed the recommendations
Photo 1—This is my AIS decoder board connected to the Icom IC-R7000 communications receiver. given in the CMX589A datasheet.
Note that the CMX589A is a full
the linearity and DC coupling required a busy shipping area in northwest modem, enabling both transmitting
by the GMSK modulation scheme. England. and receiving of GMSK signals, but
Of course, the receiver also requires a only the reception section is used in
suitable antenna to be within receiving DECODER BOARD this application.
range of shipping traffic! Luckily, I live Figure 1 shows the entire system. The discriminator audio is DC-cou-
within 10 miles of the River Mersey, Audio from my receiver’s discriminator pled into the modem with a gain and a
3 Levels of Choice
3 Levels of Savings
PACKET FIFO
To enable the interrupt routine to
continue receiving while the main pro-
gram is processing, I decided that a
FIFO structure was required to store
received packets. Because the packets
are of a variable length, I chose the
structure shown in Figure 6, which
uses indirect addressing.
The two index values—In_index and
Out_index—point to a table of eight
packet index values, which in turn
point into a 1,024-byte circular buffer.
The two values are used as indirect
pointers to the locations where the
next packet in may be written and the
next packet out read. Photo 2—This is a Tera Term screen showing typical AIVDM sentences output by my decoder.
RESOURCES
CML Microcircuits, “CMX589A
GMSK Modem datasheet,” D/589A/4,
2002, www.cmlmicro.com/products/
datasheets/Docs/cmx589ad.pdf.
Photo 1a—This is the assembled PCB. Player 1 has yellow paddle buttons on the right side of this photo. Player 2 has green paddle buttons. The speaker is on the solder side. b—This is
the boxed game. The enclosure lid has been replaced with a sheet of red perspex. The circuit board’s height was chosen so the switches protrude only slightly above the surface.
cathodes. A low in the bit pattern that cyclically calls the main game The background loop is interrupted
grounds the cathode it is connected to, routine and updates the display. Dis- every 10 ms by the AT90S2313
causing the LED in the selected row to play updating is done either in Message Timer0, which serves as the system’s
light up. Directly driving the LED mode by the routine show_msg(), “tick timer.” The tick timer governs
cathodes takes full advantage of the which refreshes all 14 rows, or in Pong the execution rate of the music player
20-mA current-sink capability of the mode by the routine show_pong(), and message scrolling routines, which
AT90S2313’s port pins. Cycling which refreshes only the three rows must be called at regular intervals to
through the rows is repeated rapidly so containing the two bats and the ball. ensure a constant music tempo and
the eye, due to persistence of vision,
perceives the entire display to be oper-
ating at once. Display multiplexing
10 x 14 LED M a t r ix
uses 14 of the 16 decoder outputs. The ma d e fr o m fo u r 5 x 7 dis p la y s
Four- to 16-lin e
fifteenth output turns off the display (LED1–L ED4)
de c o d e r (U 2,U3)
when changing the “column-select”
patterns. This avoids ghosting artifacts
caused by the slow turn-off times of
14
the high-side driver transistors.
Because there are so few pins on the
H ig h -sid e
AT90S2313, six of the 10 “column- dr iv e r s
(Q 1– Q 14)
select” port pins are periodically repro-
grammed as inputs to read the states of
the push button switches that share Swit c h
en a b l e
the port pins. To prevent the switches
from interfering with the display, they
are diode isolated and enabled by
selecting the sixteenth decoder output,
P u s h bu t t o n s
which guarantees that all display rows (S1–S6)
are disabled when switches are active.
The AT90S2313 port pin (PB3) drives 10 C o lu m n 4 Row
se le c t se le c t
the piezoelectric speaker directly. The
signal waveform is automatically gen-
erated by the AT90S2313’s Timer1, as I A T90S23 13
will describe in the next section. For (U 1)
SOFTWARE
At the highest level, the software is Figure 1—The design features a few key hardware elements: the microcontroller, the display, the row decoder/driv-
structured as an endless while loop er, and the push buttons.
The Newest
Products and
Technologies Are
At mouser.com
2,128 Pages
DEVELOPMENT ENVIRONMENT
Code for this project was developed New * Reset scores
game
with the WinAVR suite of open-source * Serve defaults to Player 1
Notes: The compiler is avr-gcc version 3.4.3. The shaded cell is baseline for percentage comparisons.
[1] Variable (data) storage = 51 bytes of RAM only
[2] Variable (data) storage = 15 char variables in registers plus 36 bytes of RAM
Table 1—The table shows how code size is affected by the various compiler optimization levels, as well as the impact of putting variables in registers.
utility supplied with the WinAVR when power is restored. If you want to explore the topic fur-
package works nicely under Windows Achieving C coding efficiency ther, David Spuler’s book, C++ and C
98 with the simple printer port cable comes at the cost of programmer effi- Efficiency, is worthwhile—and, come
shown in Figure 5. (Note that some ciency because more care (and time) to think of it, so is a happy 12-year-
versions of Windows do not allow has to be taken to monitor the com- old! I
direct access to the printer port.) To piler’s output and adjust your coding
program the AT90S2313, temporarily style to achieve the smallest code size. Andrew March (amarch@three.com.au)
solder the cable wires to the five Like any skill, this gets easier with is a systems engineer at Silverbrook
specified test points at the base of practice. For some projects, it might Research in Sydney, Australia, where
push button S1 on the underside of be easier to migrate to a microcon- he works on next-generation inkjet
the PCB, apply power, connect the troller with more code memory. How- printing technologies. He holds a
cable to the PC, and invoke avrdude ever, there will often be situations Bachelor’s degree in Computer Engi-
with the following command line: where the hardware design is fixed neering from the University of Wol-
and new features or bug fixes have to longong (New South Wales, Australia)
avrdude -p at90S2313 -P lpt1 -c fit in the available memory. In other and an MBA from Curtin University
bascom -U flash:w:upong.hex:i cases, production volumes may be so (Perth, Australia).
high that the hardware cost savings of
Programming takes only a few sec- using a part with a smaller memory
onds. When finished, disconnect the justifies the one-off programmer effort PROJECT FILES
cable from the PC, remove power, to minimize code size. Under these To download code, go to ftp://ftp.circuit
and desolder the temporary connec- circumstances, C coding efficiency is cellar.com/pub/Circuit_Cellar/2008/215.
tions. The game should spring to life paramount.
REFERENCE
[1] Atmel Corp., “AT90S2313: 8-bit AVR
J1
1 Microcontroller with 2K Bytes of In-
14
2 R1 PB5 (MOSI) System Programmable Flash,” Rev.
15
3
330 0839I, 2002, www.atmel.com/dyn/
16
R2 resources/prod_documents/DOC0839.
4 RST
17 330 PDF.
5
18
6 R3 PB7 (SCK)
19
7
330
RESOURCE
20
Solder flying leads to marked test points
8 D. Spuler, C++ and C Efficiency: How
under S1 from solder side of PCB
21
9 to Improve Program Speed and Mem-
22
10 ory Usage, Prentice Hall, Upper Sad-
23
11 PB6 (MISO) dle River, NJ, 1992.
24
12
25
13 SOURCE
DB25-M GND
AVR Studio 4 IDE and AT90S2313
microcontroller
Figure 5—The flying leads are temporarily soldered to test points on the bottom of the PCB under S1. They are Atmel Corp.
removed after programming. www.atmel.com
Self-Destructive Behavior
Processor Action Requires Power Supply Removal
Fed up with corrosion? Eliminate the contacts. Jeff replaced his old doorbell switch with a
capacitive touch pad using only the pair of wires available at the door. If you are not in the
market for a new doorbell, this solution could work well in a different project.
the resistor and capacitor are fixed plates. Parallel capacitors look like The RC junction hangs on the nega-
and produce a fixed frequency. The an increase in the plate size so the tive input to the comparator, with the
capacitor is made up of two fixed capacitance goes up. free end of the capacitor connected to
plates (usually PC traces) that have Although there are ways to make ground, while the free end of the
an inherent value. The fixed value of an oscillator without a microcon- resistor is connected to the compara-
a capacitor will be affected by an troller, some standard peripherals can tor’s output. The comparator’s output
object (usually a finger) that comes in simplify the circuitry. The most sim- can swing between ground and VCC.
close proximity to the plates. The ple circuit uses a comparator as the The positive input to the comparator
object looks like additional capaci- active part of the oscillator. Figure 1 is connected to the midpoint of equal
tance in parallel with the fixed shows how the circuit is configured. resistors (R2/R3), creating a voltage
your calculations. That’s τ = R × C. cycle consists of one charge and one or 50 kHz.
Using friendly values of R = 100k discharge time, the oscillator period Once the oscillator is running, it
and C = 10 pF, τ = 1 × 106 × 1 × 10–11 will be 2 × 10 µs. The oscillator fre- will charge and discharge between 1/3
or 1 × 10 –5 s (10 µs). Because one quency is therefore 1/period = 1/20 µs, and 2/3 VCC. The frequency will be
crystal?
This month, I will try to answer
these questions and a couple of others.
Follow me into the magical world of
crystal oscillators.
PIEZOELECTRICITY
Some crystals, quartz in particular,
are piezoelectric devices. Piezoelec-
tricity is on the border between elec- Equilibrium
tricity and mechanics: If you press a
piezoelectric device, a voltage will More << + >> on left:
Voltage appears
appear between its sides. Conversely,
if you apply a voltage between two of
Figure 1—Piezoelectricity appears when a crystal is not fully symmetrical. Look at the simplified figure on the left. With-
its faces, its physical size will
out any pressure, these atoms are centered and the overall electrical field is null. If you press vertically on the crystal,
change. you will slightly change its shape (right), the electrical charges will no longer be symmetrical, the left side will be a little
Piezoelectricity was first demonstrated more positive than the right, and a voltage will appear. Conversely, if you apply a voltage, the crystal will distort itself.
a) b)
Photo 1—This is the transmission response of an 8-MHz crystal oscillator (a), as grabbed on a Hewlett-Packard 3585 spectrum/network analyzer (b). The minimum impedance
corresponds to the maximum transmission, here at 8,000,250 Hz. This point is followed by a minimal transmission (maximal impedance) a couple of kilohertz higher and then several spurious
resonances are visible.
a) b)
Photo 5a—A Hewlett-Packard 5372A time interval analyzer enables you to capture the frequency behavior of the crystal at start up. b—Here the frequency first jumps to 40 MHz or so
and gets down and locks to 8 MHz after only 241 µs (marker position). Time is on the horizontal axis and frequency is on the vertical axis from 0 to 100 MHz. A nice instrument, isn’t it?
Touch Me
If you haven’t used touch sensors in your designs, you will soon.Tom explores the new touch
sensors from Cypress Semiconductor and Silicon Laboratories. Traditional keypads and
touchscreens beware!
d)
c)
Figure 1—These plan “.9” parts aren’t from outer space, they’re from Silicon Laboratories, and they pack a big analog punch (up to 23 channels) into a tiny footprint and
power budget.
USB
CROSSWARE
ARM
Tools for Embedded Development
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PSoC ®
Mixed-Signal Array
C Compiler
FREEWARE
New PRO compiler also operates in
Lite mode with no time or size limits:
cypress.htsoft.com/portal/CC20
www.solderbynumbers.com
2 3
6 7
8 9
10
11
12 13 14
15
16
17 18
19
Down Across
1. The “L” of an LC circuit 2. Assigning a “friend” to new employees when they are hired to
3. No affinity for H2O acquaint them to the company
4. Magnetic mineral used for navigation 7. A mobile phone that combines some capabilities of a PC, including
5. 1015 Internet connectivity
6. A long, shallow depression 8. A device that restrains voltage transients
10. A device that periodically reverses current in 9. 10,000 lux
an electric motor and maintains current flow 11. A circuit that mutes a receiver when an input signal is below a
in a generator certain level
13. The place in orbit that is farthest from the 12. The “C” of an LC circuit
Earth 15. Sn
14. A charge for using a mobile phone when 16. 0.001 inches
you’re outside your service area 17. English physicist and inventor (1783–1850) who designed the first
18. A low-pressure sodium lamp electromagnets. Think: electric motor
19. Voltage falls, lights dim
The answers are available at
www.circuitcellar.com/crossword.
92 All Electronics Corp. 92 FlyPCB China Co., Ltd. 90, 91 Micro Digital, Inc. 95 Saelig Co.
88 Apex Embedded Systems 83 Grid Connect, Inc. 92 Micro Digital, Inc. 91 Schmartboard
7 Atmel 89 HI-TECH Software LLC 92 microEngineering Labs, Inc. 11 SEGGER Microcontroller Systems LLC
29 Comfile Technology, Inc. 87 Ironwood Electronics 3 Noritake Co., Inc. 80, 81 Technologic Systems
87 Crossware Products, Inc. 64, 66 JKmicrosystems, Inc. 69 Nurve Networks LLC 90 Technological Arts
87 Custom Computer Services, Inc. 91 JKmicrosystems, Inc. 90 Ontrak Control Systems 89 Tern, Inc.
87 DLP Design 69 Jeffrey Kerr LLC C4 Parallax, Inc. 89 Tin Can Tools, LLC
69 Decade Engineering 42 Keil Software 90 Phytec America LLC 13 Total Phase, Inc.
34 Designnotes 58 LPFK Laser & Electronics 2 Pico Technology Ltd. USA 92 Trace Systems, Inc.
83 EMAC, Inc. 34 Lakeview Research 92 Pioneer Hill Software 91 Triangle Research Int’l, Inc.
89 Earth Computer Technologies 88 Lawicel AB 40 Pololu Corp. 64 WCSC (Willies Computer Software Co.)
LESSONS FROM THE TRENCHES Living & Working Off The Grid (Part 1): Planning & Design Call Shannon Barraclough
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Battery powered optional. updates. Inc. scope/FFT/logging No power supply needed, simple and UART monitoring. Includes analyzer and 125MS/s waveform gen. frequency counter; opt. 16-ch
PDS5022S (25MHz) $325 software, case, probes. USB 2.0 connection clipleads, USB cable and software. PS5203 32MS buffer $2237 gen. DG3061A $1895
PDS6062T (60MHz) $599 PS2203/4/5 from $318 PS3206 Bundle $1574 LAP-16128U $299 PS5204 128MS buffer $3360 DG3101A/DG3121A $2795/$3995
6 in 1 Scope Automotive Testing Mixed -Signal PC Oscilloscope Handheld Scope Pen Scope
100 MHz Scope and Logic Analyzer
lets you do complex triggering to find
hard-to-get-at glitches, spikes, etc.
Huge 4 or 8 MS buffer for deep data
drilling and zooming. Optional built-in
6-in-1 USB scope adapter! 200kHz 2-ch swept signal generator. 2 Analog 20MHz or 60MHz rugged PS2105 - 25MHz USB powered
10-bit scope, 2-ch spectrum analyzer, Auto Diagnostics - Award-winning channels x 10, 12, 14 bit with more handheld USB scope with 3.8” scope-in-a-probe! Up to
than 60 dB dynamic range. 8 digital
2-ch chart recorder, 16-ch 8MHz logic kits turn yours into vehicle-electrics color LCD. Built-in meter - 100MS/s, 24kS buffer C/VB/
inputs for mixed signal display/trigger.
analyzer, 5-ch signal gen, 8-ch pattern diagnostic tool. PS3423 kit $2293 CS328A-4 (4MS Buffer) $1259 great for your tool kit. Delphi/LabView/VEE drivers.
gen. SPI/I2C/1-w/UART decoding. 3-ch logger for 16-bit current/voltage/ CS328A-8 (8MS Buffer) $1474 HDS1022M (20MHz) $499 PS2105 (25MHz, 100MS/s) $372
PoScope with probes $199 temp msmt. KLARI-MOD MC $1500 CS700A (signal generator) $299 HDS2062M (60MHz) $699 PS2104 (10MHz, 50MS/s) $234
RF Testing Electronic DC Load DMM USB Bus Analyzers SPI Bus Analyzer GPS Logger
GO !
!
RI EW
EW
L
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10/100mpbs Ethernet hubs. W5100 (integrated PHY) $5.58 TCP/IP Ethernet network. merge data to single record IP/DHCP/PPPoE. 0.25s! Interchangeable without
eCOV-110-P $89 WIZ110SR $30 Ether-IO 24 $119 MSR145S from $468 Portbase-3010/RS232 from $149 recalibration. from $3 / $40
USB to I2C I2C for PCs RF Modules Wireless Modules 1/2/4/8/16 x RS232 Saelig
Alan Lowne
says: "I started
Saelig as an
engineer - for
engineers!
PCI93LV: industry-standard I2C card Saelig - an
Devasys - Provides a simple for PCs. WINI2C/PCI software RF TX/RX Modules - simultaneously Easily create mesh networks at Add COMports via your PC’s Olde English
“drop-in” solution for connecting gives windows-interface to develop transmit composite video and 910MHz - like Zigbee only better! USB Port. USB-COM-S $20 word meaning 'happy, prosperous,
blessed' - which is what I want for
your PC to 90kHz I2C + 20 I/O and debug I2C bus systems. stereo audio signals. 2.4 GHz Complete RF solution for fast & USB-2COM $48
my customers, my staff, and
lines. Free software. Use multiple UCA93LV is USB version. ISM band. 4-ch RF, 5V operation reliable data transmission. USB-4COM $105 myself! See my blog for behind-
boards for more I2C/IO. Transparently monitor at AWM630TX $16 B915FHtiny-plus/40-SMD-WA $64 USB-8COM $195 the-scenes company details,
business hints, kudos, etc. "
USB I2C/IO $89 400kHz! $499 AWM634RX $27 B915FHtiny-plus/40-DIP-EA $804 USB-16COM-RM (rackmount) $459
We search the world for unique, time-saving products - see our website for 100s more: volt/temp data loggers,
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eng. software, wireless boards, SMD adapters, I2C adapters, FPGA kits, GPS loggers, automotive testing,
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robots, DSP filters, PLCs, Remote MP3 players, etc. Don’t forget to ask for your FREE Starbucks card
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PRIORITY INTERRUPT
by Steve Ciarcia, Founder and Editorial Director
steve.ciarcia@circuitcellar.com