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LP2950CZ-5 0RPG中文资料
LP2950CZ-5 0RPG中文资料
LP2950CZ-5 0RPG中文资料
com
Due to the low input-to-output voltage differential and bias current PIN CONNECTIONS
specifications, these devices are ideally suited for battery powered
computer, consumer, and industrial equipment where an extension of Pin: 1. Input
2. Ground
useful battery life is desirable. The LP2950 is available in the three
1 2 3 3. Output
pin case 29 and DPAK packages, and the LP2951 is available in the
eight pin dual-in-line, SOIC-8 and Micro8 surface mount packages.
The ‘ A’ suffix devices feature an initial output voltage tolerance (Top View)
±0.5%. Heatsink surface (shown as terminal 4 in
case outline drawing) is connected to Pin 2.
Features
? NCV Prefix for Automotive and Other Applications Requiring Site CASE 846A 1
and Control Changes
PIN CONNECTIONS
LP2951 Additional Features Output 1 8 Input
DEVICE INFORMATION
Output Voltage
Operating Ambient
Package 3.0 V 3.3 V 5.0 V Adjustable Temperature Range
Input Output
5.0 V/100 mA
3 1
Battery or 1.0 mF
182 k
Unregulated DC
Error Amplifier 60 k
1.23 V
Reference
LP2950CZ-5.0
GND 2
5.0 V/100 mA
Battery or Input 8 Output 1 Sense 2
1.0 mF
Unregulated DC
182 k
VO Tap
6
60 k
7 330 k
Error Feedback
Amplifier
Shutdown
From 3 60 k
75 mV/
CMOS/TTL 50 k Error
60 mV
Output
To CMOS/TTL
5
1.23 V Error Detection
Reference Comparator
LP2951CD or CN
GND 4
This device contains 34 active transistors.
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ELECTRICAL CHARACTERISTICS (continued) (Vin = V O + 1.0 V, I O = 100 mA, C O = 1.0 mF, T A = 25 °C [Note 8],
unless otherwise noted.)
Error Comparator
Output Leakage Current (V OH = 30 V) I lkg - 0.01 1.0 mA
Hysteresis (V in = 6.0 V) V hy - 15 - mV
Shutdown Input
Input Logic Voltage V shtdn V
Logic “0” (Regulator “On”) 0 - 0.7
Logic “1” (Regulator “Off ”) 2.0 - 30
Shutdown Pin Input Current Ishtdn mA
Vshtdn = 2.4 V - 35 50
Vshtdn = 30 V - 450 600
Regulator Output Current in Shutdown Mode I off - 3.0 10 mA
(V in = 30 V, V shtdn = 2.0 V, V O = 0, Pin 6 Connected to Pin 7)
6. The Junction-to-Ambient Thermal Resistance is determined by PCB copper area per Figure 29.
7. ESD data available upon request.
8. Low duty pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
9. V O(nom) is the part number voltage option.
10.Noise tests on the LP2951 are made with a 0.01 mF capacitor connected across Pins 7 and 1.
*NCV prefix is for automotive and other applications requiring site and change control.
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DEFINITIONS
Dropout Voltage - The input/output voltage differential Output Noise Voltage - The RMS ac voltage at the
at which the regulator output no longer maintains regulation output, with constant load and no input ripple, measured
against further reductions in input voltage. Measured when over a specified frequency range.
the output drops 100 mV below its nominal value (which is Leakage Current - Current drawn through a bipolar
measured at 1.0 V differential), dropout voltage is affected transistor collector-base junction, under a specified
by junction temperature, load current and minimum input collector voltage, when the transistor is “ off ”.
supply requirements. Upper Threshold Voltage - V oltage applied to the
Line Regulation - The change in output voltage for a comparator input terminal, below the reference voltage
change in input voltage. The measurement is made under which is applied to the other comparator input terminal,
conditions of low dissipation or by using pulse techniques which causes the comparator output to change state from a
such that average chip temperature is not significantly logic “ 0” to “ 1”.
affected. Lower Threshold Voltage - V oltage applied to the
Load Regulation - The change in output voltage for a comparator input terminal, below the reference voltage
change in load current at constant chip temperature. which is applied to the other comparator input terminal,
Maximum Power Dissipation - The maximum total which causes the comparator output to change state from a
device dissipation for which the regulator will operate logic “ 1” to “ 0”.
within specifications. Hysteresis - The difference between Lower Threshold
Bias Current - Current which is used to operate the voltage and Upper Threshold voltage.
regulator chip and is not delivered to the load.
10 6.0
)A
m LP2951C
(
T ) 5.0 TA = 25°C
N V
E (
R E
R 1.0 G 4.0 RL = 50 kW
U A
C T
L
S O
A
IB V 3.0 RL = 50W
T
1 U
5 P
9 T
2 0.1 U 2.0
P O
L
/0 ,t
5
9 u
2 Vo 1.0
P
L
0.01 0
0.1 1.0 10 100 0 1.0 2.0 3.0 4.0 5.0 6.0
IL, LOAD CURRENT (mA) Vin , INPUT VOLTAGE (V)
5.00 6.0
LP2951C
)V )V 5.0
( 4.99 (
E E
G G 4.0
A A
T
L T
L
4.98
O O
V V 3.0
T T
U U
P 4.97 P
T T
U U 2.0
O O
,t ,t
u u 25°
C
Vo 4.96 Vo 1.0
LP2951C 125 °
C -40 °C
4.95 0
0 50 100 150 200 0 1.0 2.0 3.0 4.0 5.0 6.0
°
TA, AMBIENT TEMPERATURE
C)( Vin , INPUT VOLTAGE (V)
Figure 4. Output Voltage versus Temperature Figure 5. 5.0 V Dropout Characteristics with
R L = 50 W
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250 400
350
) TA = 25°C
200 V
) m
( 300
A 0.1 mA Load Current
μ E
( G
T A 250
N 150 T
L
E
R O
R V 200
U T
C 100 U
S O 150
P
IA No Load O
B R 100
D
50
50
0 0
0 5.0 10 15 20 25 0.1 1.0 10 100
Vin, INPUT VOLTAGE (V) IO, OUTPUT CURRENT (mA)
550 55 5.0
k LP2951C
0 0 RL = 330 k
5 5 )
=L 500 50 = V
( 4.0
L TA = 25°C
R E
)V )R G
V A
m
( m T Vin Decreasing
450 45 (E L 3.0
E O
G RL = 50 G V
A A T
T T U
L L P Vin Increasing
O 400 40 O T 2.0
V V U
T T O
U U ,t
O O u
P
O 350 35 P O Vo 1.0
R RL = 50 k R
D D
300 30 0
0 50 100 150 4.70 4.74 4.78 4.82 4.86 4.90
°
T, TEMPERATUREC)
( Vin, INPUT VOLTAGE (V)
Figure 10. Line Transient Response Figure 11. LP2951 Enable Transient
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200 80
)
CL = 1.0mF 400 V
m
(
Vout = 5.0 V
) 150 IL = 400mA to 75 mA
E
G )
B
A d
m TA = 25°C N
200 A ( 60
( Vout N
T H O
N C I
E 100 E T IL= 0.1 mA
R G C
R 0 A E
J 40
U T
L E
C 50 O R
D V E
A T L
O U P
L I Load P P
I 20 TA = 25° C
T R CL = 1.0mF
0 U
O Vin = 6.0 V
Vout = 5.0 V
0
0 0.5 1 1.5 2 2.5 3 3.5 4 1.0 10 100 1.0 k 10 k 100 k
t, TIME (ms) f, FREQUENCY (Hz)
4.0 ) 1.8
IL= 100 mA V
(
TA = 25°C E
G
)z CL = 1.0mF VO = 5.0 V A 1.6
H 3.0 T
L
LP2951C O
√
/ V
V
μ( D
L 1.4
E O
S
I 2.0 H
O S
E Output Off"
N R
E H 1.2
G T Output On"
A N
T
L 1.0 W
O CL = 100mF O
V D 1.0
T
U
H
S
0 0.8
100 1.0 k 10 k 100 k 0 20 40 60 80 100 120 140 160
f, FREQUENCY (Hz) t, TEMPERATURE°
C)
(
Figure 16. Maximum Rated Figure 17. Output Stability versus Output Capacitor
Output Current Change
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APPLICATIONS INFORMATION
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where Vref is the nominal 1.235 V reference voltage and FBI Vout
5.0 V±1.0%
is the feedback pin bias current, nominally -20 nA. The 8 0 to 1.0 A
minimum recommended load current of 1.0 mA forces an Vin
Error 5 1
upper limit of 1.2 M W on the value of R2, if the regulator Error Vout
Output
must work with no load. IFB will produce a 2% typical error 2
SNS
in V out which may be eliminated at room temperature by LP2951CN
adjusting R1. For better accuracy, choosing R2 = 100 k Shutdown 3
SD 6
VO T 220mF
reduces this error to 0.17% while increasing the resistor Input
program current to 12mA. Since the LP2951 typically draws GND FB
75 mA at no load with Pin 2 open circuited, the extra 12mA 4 7
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TYPICAL APPLICATIONS
+V = 2.0 to 30 V
IL
Load IL = 1.23/R
Unregulated Input
6.0 to 10 Vdc
8 0.1 mF
8
Vin
Error
5 Error
Vin
1 1N4001 4.2 V± 5
Error Vout 1
NC Vout Output
2
2 2.0 M SNS
SNS NC 330 pF
1.0% LP2951CN
0.1 mF LP2951CN Shutdown 3 6
3 6 NC SD VO T
SD VO T Input
806 k
GND FB Lithium Ion GND FB
2.2 mF 1.0%
4 7 Rechargeable 4 7
Cell
50 k
R 1.0 mF
GND
Figure 21. Lithium Ion Battery Cell Charger Figure 22. Low Drift Current Sink
+Vin
+Vin CMOS
*Sleep Gate
470 k 8 Input
Vin
5 1
2N3906 Error Vout Vout
470 k 8 470 k
47 k
2 Vin Vout
SNS NC 2N3906
Error 5 1
LP2951CN Vout
Reset Output Error
3 6 NC
SD VO T R1 2
SNS NC 200 k
Normally LP2951CN
Closed GND FB 1.0 mF Shutdown 3 6 3.3 mF
4 7 SD VO T NC
Input
100 k 100 pF
GND FB
R2 4 7
Figure 23. Latch Off When Error Flag Occurs Figure 24. 5.0 V Regulator with 2.5 V Sleep Function
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+Vin
8
Vin D2
5 1 Memory
Error Vout
V+
D1
2 1.0 mF
SNS 20
LP2951CN 3.6 V
3 SD #1 6 NiCad
NC VO T
GND FB
4 7
Early Warning
27 k D3 All diodes are 1N4148.
Reset
Early Warning flag on low input voltage.
2.7 M mP
Q1 D4 VDD Main output latches off at lower input voltages.
2N3906
8 Battery backup on auxiliary output.
330 k Vin
5
Error Vout 1 Operation: Regulator #1 ’s outVis programmed one
Main diode drop above 5.0 V. Its error flag becomes active
2 Output when V in < 5.7 V. When V in drops below 5.3 V, the
SNS
LP2951CN error flag of regulator #2 becomes active and via Q1
3 #2 6 1.0 mF latches the main output “off ”. Whenin again
V exceeds
SD VO T 5.7 V, regulator #1 is back in regulation and the early
warning signal rises, unlatching regulator #2 via D3.
GND FB
4 7
+Vin
Current Limit
Section
2N3906
MJE2955
10 k .33mF
4.7 M 8
Vin
Error 5 1
Error Vout
Flag
2
SNS NC 47 Vout @ 2.0 A
LP2951CN
220 3 SD 6 NC
VO T 4.7 mF
100 mF
Tant
20 k GND FB .01 mF R1
4 7
R2
0.033mF
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+5.0 V
4.7 k
Output*
1 5
4 20 mA
8
Vin
5 1 2 4
NC Error Vout
2
SNS NC
LP2951CN * High for
NC 3 SD 6 IL < 3.5 mA
VO T NC
1N457
1N457 360
1N457
8
Vin
2 5 1
NC Error Vout Main V+
1
MC34164P-5
2
SNS Memory V+
3 LP2951CN
1.0 mF
3 6 20
SD VO T NC
NiCad Backup
Gnd FB Battery
4 7
NC
)
100 2.4 W
(
PD(max) for TA = 50°C N
E Free Air O
I
C ) 90 2.0 T
N Mounted A
A W/ Vertically P
IS
T
I C
S °
( 2.0 oz. Copper
S
E R 80 L 1.6 SI
D
R IA
- R
L Minimum E
A O
M T- 70 Size Pad 1.2 WO
R N L P
E O
H IT M
T
, C 60 0.8 U
A N M
I
J U X
θJ A
R 50 0.4 M,
Rq JA PD
40 0
0 5.0 10 15 20 25 30
L, LENGTH OF COPPER (mm)
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LP2951ACDM-5.0R2 5.0 or Adj. 0.5 Micro8 4000 Units / Tape & Reel
LP2951CN-3.0 3.0 1.0 PDIP-8 50 Units / Rail
LP2951CN-3.0G 3.0 1.0 PDIP-8 50 Units / Rail
(Pb-Free)
LP2951ACN-3.0 3.0 0.5 PDIP-8 50 Units / Rail
LP2951ACN-3.0G 3.0 0.5 PDIP-8 50 Units / Rail
(Pb-Free)
LP2951CN-3.3 3.3 1.0 PDIP-8 50 Units / Rail
LP2951CN-3.3G 3.3 1.0 PDIP-8 50 Units / Rail
(Pb-Free)
LP2951ACN-3.3 3.3 0.5 PDIP-8 50 Units / Rail
LP2951ACN-3.3G 3.3 0.5 PDIP-8 50 Units / Rail
(Pb-Free)
LP2951CN 5.0 or Adj. 1.0 PDIP-8 50 Units / Rail
LP2951CNG 5.0 or Adj. 1.0 PDIP-8 50 Units / Rail
(Pb-Free)
LP2951ACN 5.0 or Adj. 0.5 PDIP-8 50 Units / Rail
LP2951ACNG 5.0 or Adj. 0.5 PDIP-8 50 Units / Rail
(Pb-Free)
?For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
?For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV prefix is for automotive and other applications requiring site and control changes.
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MARKING DIAGRAMS
TO-92 DPAK
Z SUFFIX DT SUFFIX
CASE 029 CASE 369C
2950 2950A
CZ-xx CZ-xx 50-yG 50-yyG 50A-yG 50AyyG
ALYWW G ALYWW G ALYWW ALYWW ALYWW ALYWW
G G
SOIC-8
D SUFFIX
CASE 751
8 8 8
51z * 51z-33 * 51z-3
ALYW ALYW ALYW
G G G
1 1 1
PDIP-8 Micro8
N SUFFIX DM SUFFIX
CASE 626 CASE 846A
8 8 8 8 8 8
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PACKAGE DIMENSIONS
TO-226AA/TO-92
Z SUFFIX
PLASTIC PACKAGE
CASE 29-11
ISSUE AL
NOTES:
A 1. DIMENSIONING AND TOLERANCING PER ANSI
B Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R
R IS UNCONTROLLED.
4. LEAD DIMENSION IS UNCONTROLLED IN P AND
P BEYOND DIMENSION K MINIMUM.
L
SEATING INCHES MILLIMETERS
PLANE K DIM MIN MAX MIN MAX
A 0.175 0.205 4.45 5.20
B 0.170 0.210 4.32 5.33
C 0.125 0.165 3.18 4.19
D 0.016 0.021 0.407 0.533
X X D G 0.045 0.055 1.15 1.39
G H 0.095 0.105 2.42 2.66
J 0.015 0.020 0.39 0.50
H J
K 0.500 --- 12.70 ---
V L 0.250 --- 6.35 ---
C N 0.080 0.105 2.04 2.66
SECTION X-X P --- 0.100 --- 2.54
1 R 0.115 --- 2.93 ---
N V 0.135 --- 3.43 ---
N
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PACKAGE DIMENSIONS
DPAK
DT SUFFIX
PLASTIC PACKAGE
CASE 369C-01
ISSUE O
V R E INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 0.235 0.245 5.97 6.22
4 B 0.250 0.265 6.35 6.73
Z C 0.086 0.094 2.19 2.38
A D 0.027 0.035 0.69 0.88
S E 0.018 0.023 0.46 0.58
1 2 3 F 0.037 0.045 0.94 1.14
U G 0.180 BSC 4.58 BSC
K H 0.034 0.040 0.87 1.01
J 0.018 0.023 0.46 0.58
K 0.102 0.114 2.60 2.89
F J L 0.090 BSC 2.29 BSC
R 0.180 0.215 4.57 5.45
L H S 0.025 0.040 0.63 1.01
U 0.020 --- 0.51 ---
D 2 PL V 0.035 0.050 0.89 1.27
Z 0.155 --- 3.93 ---
G 0.13 (0.005)M T
SOLDERING FOOTPRINT*
6.20 3.0
0.244 0.118
2.58
0.101
mm
SCALE 3:1 ǒ
inches ǔ
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PACKAGE DIMENSIONS
SOIC-8
D SUFFIX
PLASTIC PACKAGE
CASE 751-07
ISSUE AH
NOTES:
1. DIMENSIONING AND TOLERANCING PER
-X- ANSI Y14.5M, 1982.
A 2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
8 5 PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
B S 0.25 (0.010)M Y M PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
1 IN EXCESS OF THE D DIMENSION AT
4 MAXIMUM MATERIAL CONDITION.
-Y- K 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW
STANDARD IS 751-07.
G MILLIMETERS INCHES
DIM MIN MAX MIN MAX
C N X 45
_
A 4.80 5.00 0.189 0.197
B 3.80 4.00 0.150 0.157
SEATING
PLANE C 1.35 1.75 0.053 0.069
-Z- D 0.33 0.51 0.013 0.020
G 1.27 BSC 0.050 BSC
0.10 (0.004) H 0.10 0.25 0.004 0.010
H M J J 0.19 0.25 0.007 0.010
D K 0.40 1.27 0.016 0.050
M 0_ 8 _ 0 _ 8 _
N 0.25 0.50 0.010 0.020
0.25 (0.010)M Z Y S X S
S 5.80 6.20 0.228 0.244
SOLDERING FOOTPRINT*
1.52
0.060
7.0 4.0
0.275 0.155
0.6 1.270
0.024 0.050
mm
SCALE 6:1 ǒ
inches ǔ
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PACKAGE DIMENSIONS
PDIP-8
N SUFFIX
PLASTIC PACKAGE
CASE 626-05
ISSUE L
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
8 5 2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
-B- Y14.5M, 1982.
1 4 MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 9.40 10.16 0.370 0.400
B 6.10 6.60 0.240 0.260
F
C 3.94 4.45 0.155 0.175
NOTE 2 -A- D 0.38 0.51 0.015 0.020
F 1.02 1.78 0.040 0.070
L G 2.54 BSC 0.100 BSC
H 0.76 1.27 0.030 0.050
J 0.20 0.30 0.008 0.012
K 2.92 3.43 0.115 0.135
C L 7.62 BSC 0.300 BSC
M --- 10_ --- 10_
J N 0.76 1.01 0.030 0.040
-T-
SEATING N
PLANE
M
D K
H G
0.13 (0.005)M T A M B M
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PACKAGE DIMENSIONS
Micro8 E
DM SUFFIX
PLASTIC PACKAGE
CASE 846A-02
ISSUE G
D NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
HE E 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. 846A-01 OBSOLETE, NEW STANDARD 846A-02.
MILLIMETERS INCHES
DIM MIN NOM MAX MIN NOM MAX
PIN 1 ID
e A -- -- 1.10 -- -- 0.043
b 8 PL A1 0.05 0.08 0.15 0.002 0.003 0.006
b 0.25 0.33 0.40 0.010 0.013 0.016
0.08 (0.003)M T B S A S
c 0.13 0.18 0.23 0.005 0.007 0.009
D 2.90 3.00 3.10 0.114 0.118 0.122
E 2.90 3.00 3.10 0.114 0.118 0.122
e 0.65 BSC 0.026 BSC
SEATING L 0.40 0.55 0.70 0.016 0.021 0.028
-T- PLANE HE 4.75 4.90 5.05 0.187 0.193 0.199
0.038 (0.0015) A
A1 L
c
SOLDERING FOOTPRINT*
1.04 0.38
8X 8X
0.041 0.015
0.65
6X mm
0.0256 SCALE 8:1 ǒ
inches ǔ
*For additional information on our Pb-Free strategy and soldering
details please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical ” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals ” must be validated for each customer application by customer ’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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