Lecture 5

Memory Chips and Finite State Machines

4.1

More and More Bits

Flip-flop: one single bit Register: a set of bits Register file: a set of registers

Whats next?

4.2

Memory
n Address

Memory Chip
Width = word size = m bits m

Height = 2^n words Bit size = Height x Width

Dout [m 1..0]

Din [m 1..0]

Chip select

Write Output enable enable

4.3

Error Detection
   
parity bit
4.4

data

Parity Generator

Error Detection
    
comparator

data

Parity Generator

computed parity bit

stored parity bit

4.5

Types of Memory
Write to it off-line, read from it any time.

ROM: Read-Only Memory PROM: Programmable ROM EPROM: Erasable (by UV) PROM EEPROM: Electrically Erasable PROM RAM: Random Access Memory SRAM: Static RAM DRAM: Dynamic RAM
Write to it any time, read from it any time. 4.6

SRAM
Store each bit inside a latch and its value remains as long as the chip is powered up. Access time is fixed (may be different for read or write operations). Setup and hold times must be observed for writes.
4.7

DRAM
The bits are stored in capacitors rather than in latches. Catch: capacitors leak charge => must refresh periodically. Refreshing takes only 1% to 2% of active cycles. Cost is lower than SRAM, but access time is higher.
4.8

SSRAM and SDRAM

Dont have to access one word at a time, but rather in chunks or bursts. Give it a address and burst length for each access. Dont need to pass one address at a time, but must give it a clock signal to sequentialize operations within a burst.
4.9

Sequential Logic
Combinational Logic: No memory. What extra capabilities would a circuit with memory have?

Memory Combinational Logic

4.10

Clock

10

Whats in a state?
Study the problem and determine what information needs to be remembered by the circuit as time evolves. The state indicates the current contents of memory and what the value of any output lines the circuit may have.

4.11

11

Example: Sequence Generator (or Counter)

C/010 B/001 D/011

A/000

No need for inputs other than a reference signal for timekeeping.

E/100

F/101 H/111 G/110

4.12

12

Example: Sequence Generator (or Counter)

Current state (XYZ) 000 001 010 011 100 101 110 111 Next state (XYZ) 001 010 011 100 101 110 111 000

X ' = X Y + X Z + X YZ Y '= YZ + Y Z Z'= Z

4.13

13

Sequence Generator Circuit

Combinational logic = generates next state (state transition function)

Memory = stores current state

4.14

14

Example: Another Kind of Counter

W=1 W=1 C/010 W=1 B/001 W=0 A/000 W=1 W=0 W=0 D/011 W=0 Single bit input W tells circuit to either E/100 stop or go on counting. W=0 W=0 G/110 W=1 F/101 W=1
4.15

W=1

W=0 H/111 W=0

W=1

15

Example: Another Kind of Counter

Current state (XYZ) 000 000 001 001 010 010 011 011 W 0 1 0 1 0 1 0 1 Next state (XYZ) 001 000 010 001 011 010 100 011

4.16

16

A Sprinkle of Formalism
Moore Machines Circuit Output Output Generation Clock Memory

Current State Control Inputs

Next State Function

Next State
4.17

17

A Sprinkle of Formalism
Mealy Machines Output Generation Memory Circuit Output

Clock

Current State Control Inputs

Next State Function

Next State
4.18

18