Lecture 8

Binary Arithmetic

4.1

The 1-bit Adder Circuit (half-adder)

A

A B

Sum

CarryOut

4.2

The 1-bit Adder Circuit (full-adder)

CarryIn A Sum

A B

+
CarryIn

CarryOut

b CarryOut

4.3

The n-bit Adder

An 1 Bn 1 An 2Bn 2 A0 B0

CarryIn

CarryIn

+
CarryOut

+
CarryOut

+
CarryOut

Sumn 1

Sumn 2

Sum0

4.4

Operations on 2s Complement
Subtraction: Note that (A-B) is the same as (A+(-B)), so this operation can be done in two steps: a sign inversion and an addition.
Just as in addition, overflow can occur:

C = A B, A 0, B < 0 if C < 0, overflow C = A B, A < 0, B 0 if C 0, overflow

4.5

ALU: Arithmetic Logic Unit

Operation CarryIn a

1-bit version Note how it does all three operations in parallel, whether it is required or not.

0 1

Result

CarryOut

4.6

ALU: Arithmetic Logic Unit

CarryIn Operation a0 b0 CarryIn ALU0 CarryOut Result0

a1 b1

CarryIn ALU1 CarryOut

Result1

32-bit version
a2 b2

CarryIn ALU2 CarryOut

Result2

a31 b31

CarryIn ALU31

Result31

4.7

Operations on 2s Complement
Multiplication: Trivial when multiplier is a power of 2 (use a shift-register to do left shifts). Otherwise, we have to define an algorithm
Example:
A = 1110 = 10112 B = 1410 = 11102

C = A * B 8 bits

1011 1110 0000 1011 1011 1011 10011010

4.8

100110102 = 15410

Signing The Result of Unsigned Multiplication and Division

The algorithms well see ahead compute the unsigned product or quotient of two operands. To do signed multiplication and division, we can record the signs of the operands, do the unsigned operation and then correct the sign of the result. SA=Sign(A)
operand 1

SB=Sign(B)
operand 2

SC=Sign(C)
result

+ (0) + (0) - (1) - (1)

+ (0) - (1) + (0) - (1)

+ (0) - (1) - (1) + (0)

XOR SA,SB 0 1 1 0

4.9

Multiplication: In general, if the multiplicand has n bits and the multiplier has m bits, the product will have (n+m) bits. Note whats going on: we go through each bit in the multiplier and performing a sequence of left-shifts and additions. This is an indication that to implement multiplication in hardware, one needs a shift-register and an adder. What about the signs of the operands and the 4.10 sign of the result?

10

Start

Multiplier0 = 1

1. Test Multiplier0

Multiplier0 = 0

An Algorithm for Multiplication

Both operands are 32-bits long. What is the size of the product?

1a. Add multiplicand to product and place the result in Product register

2. Shift the Multiplicand register left 1 bit

3. Shift the Multiplier register right 1 bit

How many registers are needed to implement this in hardware? In general, how many repetitions are needed by this algorithm?
4.11

32nd repetition?

No: < 32 repetitions

Yes: 32 repetitions Done

11

A Simpler (?) Flowchart for the Basic Multiplication Algorithm

start 1 C=C+A A<<1 B>>1 reps? yes done no testB0 0

4.12

12

Start

Multiplier0 = 1

1. Test Multiplier0

Multiplier0 = 0

Another Algorithm for Multiplication

1a. Add multiplicand to the left half of the product and place the result in the left half of the Product register

2. Shift the Product register right 1 bit

3. Shift the Multiplier register right 1 bit

32nd repetition?

No: < 32 repetitions

Yes: 32 repetitions Done

4.13

13

The Multiplication Hardware for the Second Multiplication Algorithm

Multiplicand 32 bits

32-bit ALU

Multiplier Shift right 32 bits

Product 64 bits

Shift right Write

Control test

4.14

14

Operations on 2s Complement
Division: Trivial when multiplier is a power of 2 (use a shift-register to do right shifts). Otherwise, we have to define an algorithm, but first, lets think a bit. Quotient: How many times does the divisor fit into the dividend? Remainder: After a multiple of the divisor has been subtracted from the dividend, whats left?
4.15

15

Start

Division:
1001 1000 1001010 -1000 1010 -1000 10

1. Subtract the Divisor register from the Remainder register and place the result in the Remainder register

> Remainder 0

Test Remainder

Remainder < 0

2a. Shift the Quotient register to the left, setting the new rightmost bit to 1

2b. Restore the original value by adding the Divisor register to the Remainder register and place the sum in the Remainder register. Also shift the Quotient register to the left, setting the new least significant bit to 0

We do subtractions and shifts

3. Shift the Divisor register right 1 bit

33rd repetition?

No: < 33 repetitions

Yes: 33 repetitions

4.16
Done

16

The Division Hardware

Divisor Shift right 64 bits

64-bit ALU

Quotient Shift left 32 bits

Remainder 64 bits

Write

Control test

4.17

17