Basic Electronics Engineering

SUBJECT CODE : 104010
As per Revised Syllabus of

Savitribai Phule Pune University
F.E. (Common to All Branches) Semester - I/II
Basic Electronics Engineering

Atul P. Godse
M.S. Software Systems (BITS Pilani)
B.E. Industrial Electronics
Formerly Lecturer in Department of Electronics Engg.
Vishwakarma Institute of Technology
Pune.
Uday A. Bakshi
M.E. (Electrical)
Formerly Lecturer in Department of Electronics Engg.
Vishwakarma Institute of Technology
Pune.
Dr. Pradeep B. Mane

B.E., M.E. (E&TC), Ph.D.
Principal, AISSMS Institute of Information Technology,
Kennedy Road,
Pune.
® ®
TECHNICAL
PUBLICATIONS
SINCE 1993 An Up-Thrust for Knowledge
(i)
Basic Electronics Engineering
Subject Code : 104010
F.E. (Common to All Branches) Semester - I/II
ã Copyright with Authors

All publishing rights (printed and ebook version) reserved with Technical Publications. No part of this book
should be reproduced in any form, Electronic, Mechanical, Photocopy or any information storage and
retrieval system without prior permission in writing, from Technical Publications, Pune.
Published by :
® ®
TECHNICAL Amit Residency, Office No.1, 412, Shaniwar Peth, Pune - 411030, M.S. INDIA
PUBLICATIONS Ph.: +91-020-24495496/97
An Up-Thrust for Knowledge
SINCE 1993
Email : sales@technicalpublications.org Website : www.technicalpublications.org
Printer :
Yogiraj Printers & Binders
Sr.No. 10/1A,
Ghule Industrial Estate, Nanded Village Road,
Tal. - Haveli, Dist. - Pune - 411041.
ISBN 978-93-89180-79-4
9 789389 180794 SPPU 19
9789389180794 [3] (ii)

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TECHNICAL PUBLICATIONS - An up thrust for knowledge

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Ad
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Basic Electronics Engineering 1-2 Introduction to Electronics and Electronic Components
Mind Map - Introduction to Electronics and Electronic Components
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TECHNICAL PUBLICATIONS - An up thrust for knowledge @ LESS THAN PHOTOCOPY PRICE
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R R
Insulating
material
Lead
Carbon mixture acting

Moulded as resistive element
case
®
TM

 

  
Aluminium body
for heat dissipation
Connecting
lug
Cooling
fins
Mounting Resistive metal wire

feet wound in a spiral pattern

   
(X L  2 fL )
®
TM

Insulating
material Resistive
film
Lead
Spiral groove to
increase and
adjust resistance
  
  
®
TM

(a) Rheostat (b) Potentiometer
Carbon Track
Slip ring
Wiping contact
®
TM

Strip of insulating
Wiper material
Terminal lugs
T3 T3
T1
Former bent
into circular
form after
winding
Rotary potentiometer
resistance
(a) wire (b)
 
®
TM

Movable Winding
contact
Fixed contact
Fixed contact
Ceramic tube
Wiper
Resistive
element
Insulated
substrate
(a) Preset
1,3 Fixed lead
1
2
Wiper lead
3
Adjusting screw
(b) Trimpot
®
TM

4 th
®
TM


Two digits Decimal

value multiplier
nd rd th
Ring closest to one 2 3 4 (Tolerance)
st ring
end hence 1 ring ring ring
   
    
  
4.7  1  4.7 
5.6  10 3  5.6 k
6.8  10 6  6.8 M
F   1% G   2 % J   5 % k   10 % M   20 % 

®
TM

   
 k 
Dielectric
+Q –Q
+ –
+ –
Electric
+ –
charge
Charging
C
current
Conductive
plates
+ –
Symbol
Voltage V
Q
V
Dielectric with
d permittivity
 = 0  r
 Cross-sectional
F  area A
 
 
A

d
®
TM

 
r
 

r
XC 
f C
®
TM

Paper Foil
Paper
Foil
®
TM

Foil
Plate 2 The block
Mica is dipped
Foil in epoxy
Plate 1 Mica
Foil
Mica
Foil
Ceramic
disc
Plated electrode
on both sides
F
®
TM


Very thin
oxide film
as a dielectric
– +
Electrode
Symbol
Electrolytic
solution
®
TM

Aluminium foil
in contact with
Aluminium electrolyte solution
foil coated with
oxide film Paper
forms dielectric seperator
Solder
tag
Cathode
–
Anode
Silver
or copper Manganese
dioxide MnO2
(Dielectric)
®
TM

Seal
Anode
Electrolyte
Cathode
(n – 1)  0 A
d
®
TM

Movable
plates (Rotor)
Spindle
Fixed plates
(Stator)
Screw
Movable plate
Plastic
film
Fixed plate
®
TM

  
  
  
 
 
  
   1.0
 
 
®
TM

A (Brown)
B (Blue)
D (Orange)
V (Red)
A Red
B Violet
  D Yellow
    
T Silver
  
      

473 K 164 J
(a) (b)
®
TM

     
 
 
      
0.16  10  6 
di
dt
di
dt
di

dt
Air Iron Ferrite

l core core core
Core
A
o
ti
-e
rs
c
n
I I re
a
Coil
of N turns
Symbols
®
TM

N  0  r AN2
I


    r  
r



di
dt
XL  
®
TM

Metal Coil
case
Symbol
Laminate sheet
®
TM


1st 2nd
®
TM


47 H  10  470 H,  5 %
Gold
Brown
Yellow Violet
28 H  0.1  2.8 H,  10 %
Silver
Gold
Red Gray
®
TM

SPST Two way Two way center off
Intermediate DPST DPDT
Position
2
Position
1
®
TM

SPST SPDT DPDT
Normally open Normally closed

limit switch limit switch
Normally closed
Normally open
held open
held closed
limit switch
limit switch
Limit switch
®
TM

From the
circuit to be protected
Battery Trip
+ – circuit
Protective Relay
device contacts
Relay
Trip coil
Relay
coil
From supply
®
TM

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Basic Electronics Engineering 2-2 Introduction to Semiconductors and P-N Junction Diode
Mind Map - Introduction to Semiconductors and P-N Junction Diode
TM
Orbits or
shells
Central
nucleus
Electrons revolving
in orbits


®
TM

Nucleus
–
– –
Total 14 electrons
– –
Orbit 1 with 2 electrons
– + 14 –
– –
Orbit 2 with 8 electrons
– – Orbit 3 with 4 electrons
– –
–
– – –
–
– –
– –
– –
Nucleus – – Orbit 2 with 8 electrons
– + 32 –
– – – – Orbit 3 with 18 electrons

– – – –
– – –
– – Total 32 electrons
–
Energy level increases from

first shell to valence shell
as the distance from the nucleus
increases
Electrons
Nucleus +
Shell 1
Lowest energy level Shell 2
Valence shell
highest energy level
®
TM

Free electrons which
Energy can conduct
current
Conduction
band
Forbidden
Valence energy gap
band (EG)
nd
2 band Valence electrons
st under the force of
1 band attraction of nucleus
Edge of the nucleus
®
TM


Energy Energy Energy
Conduction
Conduction band Conduction
band
band
No
A large EG
forbidden A small EG
forbidden 7 eV
gap forbidden gap 1 eV
gap
Overlapping
of valence &
conduction
band Valence
Valence Valence band
band band
0 0 0
(a) Conductor (b) Insulator (c) Semiconductor
®
TM

Ge Ge
Shared
Ge Ge Ge valence
electrons
Ge
Conduction band
Free Free electron Electron-hole
electron pair
Valence Si
electron
Heat Heat
energy EG energy
Si
Hole is
created as
valence electron
becomes free Hole
electron Valence
band
(a) Breaking of covalent bond (b) Energy band diagram
®
TM

Valence Hole
electron
– – +
– ve of
– Ge – – Ge – – Ge –
battery
– – –
Atom 1 Atom 2 Atom 3
Hole
movement
– + –
– ve of
– Ge – – Ge – – Ge –
battery
– – –
Hole movement
+ – –
– ve of
– Ge – – Ge – – Ge –
battery
– – –
®
TM

Si Si Si
Pure silicon atom
(4 valence electrons)
Added Arsenic atom

Si As Si (5 valence electrons)
Impurity atom
Extra free electron
created
Si Si Si
®
TM

n-type material
Free electrons
large in number Holes small
(majority) in number
(minority)
Direction of
conventional
current Direction
of
+ _
electrons
Battery
Si Si Si
Pure Silicon atom
(4 valence electrons )
Added Gallium atom

(3 valence electrons )
Si Ga Si Impurity atom
Hole created due to

incomplete bond
Si Si Si
®
TM

p-type Holes (majority)
material
Direction of Direction
conventional of holes
current Electrons (minority)
+ –
Battery
®
TM

Semiconductor or conductor
Free electrons
large in number Free electron
(majority)
Drifting of Drifting of
electrons Atom electron due
to collision
with atom
Direction of electrons
I
conventional current
+ – direction
Applied voltage
®
TM

(a) Nonuniform concentration
Diffusion current due to

movement of charge carriers
High
charge
carrier
concentration
Repulsive forces
(b) Process of diffusion
®
TM

Direction of conventional current
Ohmic
contacts
J Anode Cathode
p n
Electrode 1 Electrode 2 p type n type
(a) Two electrodes (b) Symbol of a diode
Junction J
Immobile negative charge Immobile positive charge
p region – + n region
– – –
+
+ +
– + – –
Free
+ + – + electrons
Holes –
+ + –
– + –
+ + – +
– +
The region without any charge carrier

hence called depletion region
®
TM

Junction
– +
– +
p region n region
– +
– +
VJ
– +
®
TM

Current
limiting J
resistor
p n
R
Forward
current
+ –
+ –
V V
(a) Forward biasing (b) Symbolic representation
Junction
Hole current Electron current
Current p-region n-region

limiting R
resistor
+ –
Direction of V Electron movements

conventional current
®
TM

J D
R R
p n
Diode
– + – +
V V
(a) Reverse biasing (b) Symbolic representation
Wider depletion region
– – +
p n
–
– +
+ +
R
– +
V Direction of reverse current

(a) Flow of minority charge carriers
Reverse saturation current

0 is constant at constant temperature
R
0
– +
V
(b) Direction of reverse current
®
TM

®
TM

f
in mA
F
D
f
E
C
Knee
V P
Vf
O A B Vf
Cut-in in volts
voltage (v)
V
V
®
TM

Reverse
breakdown voltage (VBR)
– VR O
A I0
P Reverse
Sharp Knee I0 remains saturation
increase point constant current
in current
– IR
f(mA) Forward
characteristics
Normal
operating region
Reverse breakdown
voltage 
0 Knee
VBR
VR Vf
V
Knee 0 Cut in
Reverse voltage
Breakdown
saturation
region
current
Reverse
characteristics
R(A)
®
TM

f
Forward
current (mA)
Reverse
breakdown Ge Si
voltages
–VR 0
Vf
Reverse 0.3 0.7
Forward
voltage 0 in nA voltage (volts)
0 in A
Si Ge
Reverse
–R
current (A)
®
TM

A closed [zero
switch resistance] A open [Infinite
switch resistance]
R A B R A
B
Current
is zero
+ – – +
VF VR
Closed
IF swich
A B
Diode acts
as open switch Diode acts
as closed switch
VR VF
A B
Open switch
zero current
IR
®
TM

D
A
+
Rf
Rf = Forward resistance of diode
es EDC RL
Single phase RL = Load resistance
A.C.supply iL –
Input B
transformer
  
®
TM



D
+A –A D
Rf Open
circuit EDC
RL RL
=0V
iL
–B +B
(a) Diode forward biased (b) Diode reverse biased
D D D D es = Esm sint
ON OFF ON OFF
Esm
Secondary
voltage
 t
es 0 2 3 4
Im
Load
current Iav = IDC
iL t
0  2 3 4
EDC = Average values
Load
voltage
eL t
0  2 3 4
Voltage
across  2 3 4
diode t
0
Esm =PV
®
TM



 
     
 

  
   
   



 

   
   
  
 



   
 

®
TM

 
2
 (I m sin t) d(t) I 2m sin 2 t d( t)
 

     

Im d( t) Im
  

Im    Im   
   2
E sm

2
I 2DC
I 2DC  
    

  
I 2RMS
 I 2m
4
I 2m
RL
D. C. output power PDC 2 

A. C. input power PAC I 2m  
[R f  
®
TM

 RL 
  
 
 
  
R. M. S. value of a.c. component of output

 
Average or d.c.component of output
I 2ac  I 2DC
 I 2RMS  I 2DC
I ac I 2RMS  I 2DC  
  
I DC  
  I m 
 2 
  
   
 I m 

   
®
TM


(Vdc ) NL (Vdc ) FL
(Vdc ) NL – (Vdc ) FL
 
(Vdc ) FL
E sm

Im E sm
(Vdc ) FL R  RL
 L  R f  R s  R L ]
E sm E sm RL RL
  1
  [R f  R s  R L ] R f  Rs  RL R f  Rs
 100  100  100
 E sm RL RL RL

 R f  Rs  RL R f  Rs  RL
Rf
  100
RL
D. C. power delivered to the load

 A. C. power rating of the transformer
PDC  
  
 
sm

 
 
®
TM

 
 
N2 E s (rms)
E s (rms) 
N1 E p (rms)
 E sm  E s(rms) 
E sm 32.5269
 Im
Rf  RL 100  500
 I av I DC

Im
 I RMS
2
 E DC I DC R L
 I 2DC R L
PAC I 2RMS (R L  R f )
®
TM

PDC
   
PAC
E sm
(Vdc ) NL
 
(Vdc ) L
(Vdc ) NL – (Vdc ) L
 
(Vdc ) L
E DC E p (rms)
E sm
E DC

 E sm   E DC 
E sm 37.7
 E s (rms)
2 2
N1 E p (rms) 230

N2 E s (rms) 26.66
E sm
 
Rf = 20 
2  E rms 2 1
110 V RL
Em r.m.s. 1000 
Im
RL  R 
Im
I DC
 
Im
I RMS
E DC I DC R L 
PAC I 2RMS [R L  R f ] 
®
TM

E sm Em
(Vdc ) NL
  
(Vdc ) L E DC
(Vdc ) NL – (Vdc ) L 49.5172 – 48.54
  100
(Vdc ) L 48.54
 
 
N2 E s (rms)
E s (rms) 
N1 E p (rms)
 E sm  E s(rms) 
E sm 32.5269
 Im
Rf  RL 100  500
 I av I DC

Im
 I RMS
2
 E DC I DC R L
 I 2DC R L
PAC I 2RMS (R L  R f )
PDC
   
PAC
E sm
(Vdc ) NL (Vdc ) L
 
(Vdc ) NL – (Vdc ) L
 
(Vdc ) L
®
TM

es=Esmsin t D1
A iL
+
id1
EDC RL
A.C. supply
es
id2
Center tap B
transformer D2
D1, ON
A +
+ Load
id1 voltage
iL RL
A.C. supply
–
–
B D2, OFF
Load voltage
A D1, OFF
_
t
RL
iL
A.C. supply
id2
+ Load current
B direction
D2, ON remains same
®
TM

D1 ON D2 ON D1 ON D2 ON D1 ON
Secondary D2 OFF D1 OFF D2 OFF D1 OFF D2 OFF
voltage E
(one half) sm
es
t
0  2 3 4 5
id1
m
t
0  2 3 4 5
id2
m
t
0  2 3 4 5
iL
av = DC
m
t
0  2 3 4 5
Load voltage eL
Eav = EDC
Esm
t
0  2 3 4 5
®
TM

E sm
 Rs  Rf  RL
  
 
  i L d t 
Im t 
Im

    Im


Im


2I m
 I DC

Im sin t
Load
current
2I m R L
E DC I DC R L

2 E sm RL 2 E sm t
E DC o  2
 R f  R s  R L   R  Rs 
 1 f
 R L 
Rf  Rs
2E sm
 E DC

 
 [I m sin( t)] 2 d( t)

 

 
 
 
 Im   Im 
    
Im Im
     
®
TM

Im

Im
 RL
2
E DC I DC I 2DC R L
2
 2I m  R 4 E 2sm 4
 PDC    L 2  RL I 2m R L
   R s  R f  RL 
2

E DC I DC I 2DC R L
 Im 
2 I 2m R f  R s  R L 
 I 2RMSR f  R s  R L    R f  Rs  RL 
 2 2
E 2sm 1 E 2sm
 PAC   R f  R s  R L 
R f  Rs  RL 
2 2 2 R f  R s  R L 

4 2
Im R L
PDC output 2 8 RL
 
PAC input I 2m R f  R s  R L   R f  Rs  RL 
2
RL
8 RL

 R L  
8 RL
   
 R L  
2
 I RMS 
 I DC   1
 
I RMS Im 2I m 
®
TM

2
 Im / 2  
   2I /    1 
 m 
D1 Forward Voltage
biased across
+
D1  2 3 4
+ t
Esm 0
– –2Esm
+ +
Esm RL Vo Voltage
– across
A B – D2  2 3 4
– t
0
D2
Reverse –2Esm
biased
 id Im   t  t 
d1 2     
®
TM

2 E sm
(Vdc ) NL (Vdc ) FL I DC R L

(Vdc ) NL – (Vdc ) FL

(Vdc ) FL
2E sm
 ID C R L
 
I DC R L
E sm Im
Im E sm I m (R f  R L  R s ) I DC
Rf  RL  Rs 
2I m 2I
[R f  R L  R s ]  m R L Rf  RL  Rs  RL
    
2I m RL
RL

Rf  Rs
  100
RL
Rs
Rf
  100 Rf
RL
 
D. C. power to the load I 2DC R L  
 
A. C. power rating of secondary E RMS I rms



 

 
Average T. U. F. for T. U. F. of primary  T. U. F. of secondary 

full wave rectifier circuit 2
®
TM


E s (rms) RL 1 k
E sm
Im E sm 2E s (rms)  2  9  12.7279 V
RL
12.7279
 Im  12.7279 mA
1  10 3
2I m 2  12.7279
I DC   8.1028 mA
 
 E DC I DC R L  8.1028  10 –3  1  10 3  8.1028 V
Im 12.7279
I RMS   9 mA
2 2
2 2
I RMS   9  –1
 I DC  – 1   8.1028 
 
 
PDC I 2DC R L   8.1028 2  1  10 3  65.65 mW
PAC I 2RMS R L   9 2  1  10 3  81 mW
PDC 65.65
   100   100  81.04 %
PAC 81
VP Vo

Vp E sm RL k
2 Vm 
VDC
  VP
f
0  2 3
®
TM

VDC 6.366
I DC
RL 10  10 3
E sm 10
Im
RL 10  10 3
2
I RMS 
  I DC  – 1
 
Im 1
I RMS
2 2
2
  0.707  – 1
 0.6366 
 
Es RMS RL k
E sm 2 Es RMS
E sm 10 2
Im
RL 2  10 3
2I m 2  7.071
I DC
 
Im 7.071
I RMS
2
I RMS   5 
 I DC   4.502 
 
PDC I 2DC R L PAC I 2RMS R L

PDC 40.536
  
PAC 50
®
TM

A
D4 D1
Single
phase es = Esm sin t
50 Hz, +
A.C. supply
D2 EDC RL
D3
–
B
A
+
D1
A.C. supply
+
D2
RL
–
B –
®
TM

A
– Direction of
D4 load current
remains same
A.C. supply
+
D3 RL
+
B –
es
Esm
Transformer
secondary 3
voltage  t
0 2
D1,D2
ON D3,D4
Current through
ON
D1,D2
Im
t
Current through
D3,D4
Im
t
Esm
I m=
Load i Rs+ 2Rf + RL
current L
Im
Iav = IDC
t
Load
voltage Esm
eL
Eav = EDC
t
Voltage
across diode Decides PIV
rating of diode
D1
t
0
–Esm PV =Esm
®
TM

Rf
D1
es = Esm sin t
Rs
Rf
iL RL
D2
E sm
R s  2R f  R L
E sm
E sm Im E sm
RL RL
 2 2(R s  2R f  R L )
I 2DC R L I 2m R L

I 2m 2R f  R s  R L 
I 2RMS R s  2R f  R L 
2
8R L
 
 R s  2R f  RL 
®
TM

  
  
E p (rms) E p (rms)

E s (rms) 8

     


 

  
 
   
 
  

  
 
 
®
TM

  
 
 
VNL  VFL 
  
VFL
  
  
E p (rms) E p (rms)

E s (rms) 8

     


 

  
  
  
      
   
 
  


  
VNL  VFL 
  
VFL
®
TM


 
2 E sm  E sm
E DC
 

 E sm  V
E sm
 E RMS   10 V
Rs   Rf   RL  
E sm
 Im 
Rs  2 Rf  RL  
2 Im 
 E DC I DC R L   RL  8.5262 V
 
E s RMS RL k E sm 2 E s RMS
E sm 17.96
Im
RL 1  103
2I m 2  17.96
I DC
 
E DC I DC R L 11.434  10 –3  
Im 17.96
I RMS
2
E sm
I RMS  R L
®
TM

RL
iL
RL RL
iL
iL
IDC  Im 2I m 2I m
  
E DC  E sm 2E sm 2E sm
  
IRMS  Im Im Im
2 2 2
PDC I2m R L 4 2 4 2
Im RL Im RL
  
PAC  I2m R L  R f  R s I2m R f  R s  R L I2m 2R f  R s  R L

4 2 2

I m  E sm E sm E sm
Rs  R f  RL Rs  R f  RL Rs  R f  RL
 
®
TM

 
E sm
I 2DC

I 2m
I 2RMS
4
D. C. output power 

A. C. input power     
 
 
 max
 
  
 
D. C. Power delivered to the load

A. C. Power rating of the transformer
E pm N1 2I m
I DC
  E sm 1
 N  
2 2
 
2E sm Im
E DC

®
TM

4
PDC I 2DC I 2m R L

I 2m R f  R s  R L  E 2sm
I 2RMSR f  R s  R L 
2 2 R f  R s  R L 
8 RL
 
 R f  Rs  RL 
 
  
 
2E sm
(Vdc ) NL – (Vdc ) FL  ID C R L Rf  Rs
    100
(Vdc ) FL I DC R L RL
E sm 2I m
I DC
R s  2R f  R L 
2E sm Im
E DC

I 2DC R L I 2m R L I 2RMS R s  2R f  R L 

I 2m 2R f  R s  R L 
2
8R L
 
 R s  2R f  RL 
 
  
 
®
TM

®
TM

Basic Electronics Engineering 3-2 Special Purpose Diodes
Mind Map - Special Purpose Diodes
TM
Cathode K Current limiting
R R
+
Reverse
+ + break
V V VZ down
– If – voltage
–
Anode A
(a) Symbol (b) Forward biasing (c) Reverse biasing
VZ
Intense electric field is

responsible to generate
Due to high velocity when charge carriers
Generated carrier collides with atom,
hole generates charge carriers Narrow
depletion region Highly
p p n doped
Atom Highly
Generated
+ + free doped +
– –
electron
+ –
– – –
+
+ –
– + – +
Reverse V
voltage Atom Reverse
voltage
(a) Avalanche breakdown (b) Zener effect
®
TM

If
Forward characteristics
similar to the normal
diode.
VZ
VR Vf
I0
In reverse breakdown
Operating region Knee region, VZ remains constant
called zener region point though current increases
upto certain limit.
Reverse IR
characteristics
®
TM

VZ


IZ
ZZ
 
PD
IZ
PD(max)
If
If
Operating (mA)
regions
–V –V
V V
Operating
region
®
TM

– + + –
ID
IZ
Primary Secondary
+ + + Regulated
Rectifier Filter
Transformer D.C. D.C. Regulator smooth D.C.supply
circuit circuit circuit
– – –
A.C. A.C. Pulsating To load
Unregulated
mains voltage type
230 V, 50 Hz
®
TM

R
+ +
I IL
L
Vin + O
D V Vo RL
Unregulated –Z A
Iz D
I Zmin I Zmax
VZ –
–
Vin  VZ Vin  VZ
I R
IZ  IL
R
 L +
Z
Constant
Vin RL Vo = Vz
–
Vo VZ

RL RL
®
TM

IZ  IZmax
IZ  IZmin
 R
+
z L
+
Vin
RL Vo = Vz
Constant
–
–
Vin  VZ

R
Vin  VZ IZ  IZmax
R
Vin  VZ IZ  IZmin
R
  
®
TM

VZ
I R=1k +
I
IZ  IL
Vo VZ
IL Vin IZ Vo = VZ
RL
RL RL 1K

–
Vo VZ
V in (min) IZ I Zmin
 I Zmin  I L
Vin (min)  VZ  

R 
 Vin (min)
V in (max) IZ I Zmax
 I Zmax  I L
Vin (max)  VZ
Vin (max)
R
I 200  IL
IZ
+
24 V VL
– RL
Vin  VZ 24  12
IZ  IL
R 200
IZ I Zmax I L I Lmin
 I Zmax  I Lmin I Lmin  I Lmin
IZ I Zmin I L I Lmax
 1  I Lmax  I Lmax
Vo VZ 12
 R Lmin 
I Lmax I Lmax 59 103
Vo VZ 12
 R Lmax 
I Lmin I Lmin 1  103
 (min)
®
TM

PZ 

VZ
 
 
75 < R < 178.57  IL = 20 mA
R I +
IZ
Vin VZ
RL Vo = VZ = 5 V
12  2 V 5V
Light
Anode
Reflective
cup
Hole
Electron
+ p-type Layered
Active region structure
n-type
Cathode
Substrate
Anode Cathode
(a) Construction (b) Cup type structure (c) Symbol
®
TM

Light
Light
Electron Conduction LED

– band p n
+– +–
Forbidden Light
energy gap energy
Recombination
of electrons and holes
Valence I
band Hole
+ –
V
(a) Process of electroluminescence (b) Forward biased LED
®
TM

10
Light output (mW)

6
0 20 40 60 80 If (mA)
Forward current
®
TM

A
F B
G
E C
D
DP
®
TM

A A A
F B B B B F B
G G G
E C C E C C
D D D
(0) (1) (2) (3) (4)
A A A A A
F F B F B F B
G G G G
C E C C E C C
D D D D
(5) (6) (7) (8) (9)
Light
Electron
hole pair
p +– +– n
Depletion

region
– +
VR
(a) Construction (b) Symbol
®
TM


Reverse I(A)
VR(V) voltage–4 –3 –2 –1 0 Reverse
current
Dark current
2
10000 Lm/m
2
/m
15000 Lm
2
Dark
20000 Lm/m current
Reverse
current 2
Lm/m
increases with I 0 5000 10000 15000
intensity of light Reverse Light intensity
current
(a) (A) (b)
®
TM

Vin  VZ Vin  VZ
I R R
+ +
IZ  IL I IL
L
Vin + O
D V Vo RL
Unregulated –Z A
VZ Iz D
RL –
–
I max I min
Vin  VZ
R
I Lmin I Lmax
®
TM

®
TM

®
TM

®
TM

Emitter Base Collector
Emitter Base Collector
E C E C p n p
E
n p n
C
npn pnp E C
B
B
B
Types
JC, JE both
Cut-off
As a switch reverse biased
JC reverse biased
Applications Operating Regions Active
JE forward biased
As an Amplifier JC forward biased

Saturation JE forward biased
Bipolar Junction Transistor

Ri : Very low BJT
Ri : low Input
Input
|IB|(A)
Ro : Very high
Ro : high
Mind Map - Bipolar Junction Transistor
|IE|(mA)
80
|VCE| = 5 V
3.5 Configurations 70 |VCE| = 20 V
3.0 |VCB| = 10 V 60
2.5 |VCB| = 5 V  IB
50
2.0 VI Characteristics VI Characteristics
40
1.5 | IE|
1.0 CB CE 30
0.5 20
| VEB|
|VEB|(V) Current Current
10
0.5 1.0 1.5 2.0 Amplification Amplification  VBE
|VBE|(V)
Factor Factor 0.5 1.0 1.5
C
 = —— C
 = ——
E   B
 = ——  = ——
Output 1+ 1– Output
|IC|(mA) |IC|(mA)
Saturation
E Active region CC region
|E| = 5 mA Active region
5 VCB |B| = 80 A
80 C
Ri : high Ro : Low VCE
4 |E| = 4 mA
|B| = 60 A
60
Saturation region
3 |E| = 3 mA  C = 20 mA
|B| = 40 A
40
Current B = 20 A
2 |E| = 2 mA VI Characteristics
Amplification |B| = 20 A
Factor 20
1 |E| = 1 mA |B| = 0 A
E
|E| = 0 = Cut-off region
B 0 0.5 1.0 1.5 |VCE| (V)
–1 0 5 10 15 20 |VCB| (V)
Cut-off region
Input Output
|IB|(A)
|IE|(mA)
Important Formulae
120 Saturation
A region
IE = IB + IC 100 Active region
|B| = 80 A
|VCE| = 1 V |VCE| = 2 V
80 80 E
IC VCE
= 60 |B| = 60 A
IE
40 60
IC 20 1.7 2.7  E = 20mA
|B| = 40 A
=
IB B
|VCB| (V) 40
B = 20A
0 1 1.5 2 2.5 3
|B| = 20 A
IC =  IE + ICBO
20
|B| = 0 A
IC =  IB + ICEO Cut-off
region
ICEO = (1 + ) ICBO |VCE| (V)
0 0.5 1.0 1.5
®
TM

®
TM

Emitter Collector Emitter Collector
(E) (C) (E) (C)
Base (B) Base (B)
(a) n-p-n (b) p-n-p
Emitter Base Collector Emitter Base Collector
E n p n C E p n p C
(Emitter) (Collector) (Emitter) (Collector)
JE JC JE JC
B (Base) B (Base)
(a) n-p-n (b) p-n-p
JE
JC
®
TM

Current BE CB Current
RE RC limiting depletion depletion limiting
E C
resistor resistor
IE IC + – – – – + + +
+ – – – – + + +
–
+
VEE B VCC RE + – – – – + + + RC
E + – – – – + + + C
– n
+
p n
+ – – – – + + +
IB IE + – – – – + + + IC
– + – – – – + + + +
+ – – – – + + +
+ VEE VCC
B –
Emitter junction (JE) Collector junction (JC) Emitter junction Collector junction
forward biased reverse biased forward biased reverse biased
IB
(a) Biasing arrangement (b) Operation of npn transistor in active region
VEE
®
TM

IE
IC
IE IB + IC
Current BE CB Current
limiting depletion depletion limiting
RE RC resistor resistor
E C
– + + + + – – –
IE IC – + + + + – – –
RE – + + + + – – – RC
– E – – – – C
+
VEE B p + n + + + p
– VCC – + + + + – – –
IE IC
+
– + + + + – – –
IB + – + + + + – – – –
VEE – + + + + – – – VCC
– B
+
Emitter junction Collector junction

Emitter junction (JE) Collector junction (JC)
forward biased IB reverse biased
forward biased reverse biased
(a)
(b)
®
TM

IE IB + IC
C E
B B
E
C
®
TM

IE IC IE IC
E C E C
RE RC RE RC
B B
IB
IB
– + – + + – + –
VEE Common VCC VEE Common VCC
base base
(a) npn (b) pnp
VEB IE
VCB
|IE|(mA)
3.5
3.0 |VCB| = 10 V
Emitter-base current
2.5 |VCB| = 5 V
Note : While plotting input characteristics
2.0
the magnitudes of voltage and current are
1.5 | IE| considered. Practically the voltage and
current polarities are opposite for pnp and
1.0 npn transistors
0.5
| VEB|
|VEB|(V)
0.5 1.0 1.5 2.0
Emitter-base voltage
VEB
 IE VCB
®
TM



CB  constant
IE VEB
I E  VCB
VCB
IE(mA)
 
VCB = 10 V
VCB = 5 V
Emitter current IE2
increases from IE1 to
IE2 due to increase in
VCB at constant
VEB due to to early effect IE1
 VEB = 0
VEB(V)
IC VCB
IE
IC ( IE
( VCB )
I C  I E 
 C
Ro
  onstant
®
TM

|IC|(mA)
E Active region

|E| = 5 mA
5 VCB
4 |E| = 4 mA
Note : While plotting output
characteristics the magnitudes
Saturation region
Collector current
3 |E| = 3 mA of voltage and current are

considered. Practically the
voltage and current polarities
are opposite for pnp and npn
2 |E| = 2 mA transistors
1 |E| = 1 mA
|E| = 0
–1 0 5 10 15 20 |VCB| (V)
Collector-base voltage Cut-off region
IC VCB
IE
IC IC
C RC C RC
IB IB
B B
–
RB VCE + RB VCE
VBE VCC VBE + VCC
E – E
VBB VBB
IE IE
+ – – +
Common Common
emitter emitter
(a) npn (b) pnp
®
TM

IB IC
VBE
IB VCE
VBE
|IB|(A)
80
|VCE| = 5 V
70 |VCE| = 20 V
Note : While plotting
60 input characteristics the
Base current
 IB magnitudes of voltage and

50
current are considered
40 Practically the voltage and
current polarities are
30 opposite for pnp and
npn transistors
20
10
 VBE
|VBE|(V)
0.5 1.0 1.5
Base-emitter voltage
VBE 
I B  VCE
VBE
ri
 IB VCE  onstant
I B 
VBE 
VBE I B VCE
IC VCE
IB
 dc
IC IB  dc IC IB
®
TM

|IC|(mA)
Active region
|B| = 80 A
Saturation 80 C
region VCE
|B| = 60 A Note : While plotting output

60 characteristics the magnitudes
of voltage and current are
 C = 20 mA considered. Practically the
|B| = 40 A voltage and current polarities
Collector current
40 are opposite for pnp and npn

B = 20 A
transistors
|B| = 20 A
20
|B| = 0 A
0 0.5 1.0 1.5 |VCE| (V)

Collector-emitter voltage Cut-off region
VCE
I C IB

ro
  onstant  
VCE
VCE VCE (sat )
IB
IC
IB  
 dc
VCE  VCE (sat)
®
TM

IE IE
E E
RE RE
RB IB B RB IB B
–
+
+ VCC VCC
+ – –
VBB C VBB + C
–
IC IC
Common collector
IB
VCB VCE |IB|(A)
120
A
VCB 100
|VCE| = 1 V |VCE| = 2 V
80
60
40
20 1.7 2.7
B
0 1 1.5 2 2.5 3 |VCB| (V)
VCB
VCE
VCE VCB VBE
VCB VCE VBE
®
TM

|IE|(mA)
Active region
|B| = 80 A
IE VCE Saturation 80 E
region VCE
IB
|B| = 60 A
60
 E = 20mA
|B| = 40 A
Collector current
40
B = 20A
|B| = 20 A
IC IE 20
|B| = 0 A
0 0.5 1.0 1.5 |VCE| (V)

Collector - emitter voltage Cut-off region
IC
IC I C INJ  I CBO E RC
C
Emitter
open
I C INJ
B
IC = ICBO
I CBO – +
VCC
I CBO I C  INJ
®
TM

I C  I C  INJ
IC I CBO


IC
  
IE

IC IE – IB IB

IE IE IE

I C  INJ
IC  dcI E  I CBO
 
IC  dc I E  I CBO
I C – I CBO 6 mA – 15 A
 IE
 dc 0.99
IB IE – IC



IC
  
IB
IC  dc I B  (1   dc ) I CBO
IC  dc I B  I CEO   dc ) I CBO I CEO
®
TM

 
IC

IB
IE IC + IB IB IE – IC
IC

IE – IC
IE
IC IE

IE IE – IC IE
  IC
 
 IE
IC
 IE IB  IC
IE
IC

IB  IC
IB
IC IB

IB IB  IC I
  IC
 
1+  IB
  
 


  
 
  


 
 
 dc
I CEO 
  dc
I CBO 
  dc
®
TM

 dc
 dc
1+  dc 
 dc  dc IC  5 mA I B  50 A ICO A
I C  5 mA I B  50 A I CO  I CBO  1 A
 
I C  5 mA I B  50 A I CO  I CBO  1 A
IC  dcI B  1   dc  I CBO
 5  10 3  dc  50  10 6  1   dc   1  10 6
 5  10 3   
 
 dc
4.999  10 3
  dc  98
51  10 6
 dc
  dc
1+  dc 
 


 100
   0.99
1   1  100
  
 


 
 
  
 
IE IB IC IC  1
 
IB IB IB  1 
  
 

®
TM

IE IB IB
IC IC IE
IC IC IE
  
IE IB IB



 dc  dc
®
TM

+5 V
RC
IC
+ Vce (+5 V) Vcc (+5 V)

RB T T T
+5 V
Vin VCE = Vout OFF ON OFF
IB T VCE (sat) (0.2 V)
–
0V 0V
Vin
Vs
VCC
VBB
IC
RC Vc
0 C2 Vc
Vo
C1 RB
Vin
VCE
IB
Vc
Vs VBB + Vb
–
®
TM




    

   




 


+VCC
RC
R1
C1 C2
RL
Rs R2
RE CE
Vs
C1 C2 CE
1
XC
 fC
®
TM

C C CE
®
TM

®
TM

®
TM

+V +V +V +V
LDMOSFET VMOSFET TMOSFET
D D
Depletion Enhancement Power MOSFETs ON OFF

+V 0V
S S
Mind Map - Metal Oxide Semiconductor Field Effect Transistors (MOSFET)
Types
N-channel MOSFET and switch equivalent
As a Switch
Metal Oxide Field Applications

Effect Transistor
As an Amplifier
D(mA)
Enhancement MOSFET
+VDD 10
9
RD 8
Id
7
Q
Vout 6
Operating Regions C1
5
Vin 4
RL 3
RG 2
1
Saturation 0
Cut-off +VGS (V)
+VGS
0 1 2 3 4 5 6 7 8
CS MOSFET amplifier Vgs
Ohmic
Transfer characteristics
VI Characteristics
Transfer Characterisitics Drain Charateristics
D(mA)
2
D= K ( VGS – VT )
Ohmic
D(mA) region Saturation region
11 Locus of VDSsat
10 10 VGS = + 8 V
9 9
8 8
7 7 VGS = + 7 V
6 6 Enhancement
5 5 mode
VGS = + 6 V
4 4
3 3
VGS = + 5 V
2 2
VGS = + 4 V
1 1
VGS = + 3 V
VGS (V) VDS
0 1 2 3 4 5 6 7 8 0 5V 10 V 15 V 20 V 25 V
VT VGS = VT = 2 V
6V
Cut off region
®
TM

SiO2 
®
TM

(Drain)
D SiO2 n - doped region
No channel
n
Metallic
contacts
p - type Substrate
G Substrate SS
(Gate)
SiO2 n
S n - doped region
(Source)
(Drain)
D SiO2
No channel
p
Metal
Contacts
n - type
G SS
substrate
(Gate) (Substrate)
S p-doped region
(Source)
 VDS
 VGS
SiO2 VGS
VT
®
TM

SiO2
Electrons attracted to positive gate Region depleted of

(induced n - channel) p - type carriers (holes)
ID
Drain (D) n
e
+ e +
+ +
IG = 0 A e +
+ e + SS +
Gate (G) e + p VDS
+ –
+ e +
+ e +
VGS + +
– e
Source (S) n
IS = I D
Insulating layer Holes repelled
(SiO2) by positive gate
VGS
D D
G SS G SS
S S
Conventional symbol : (n-channel) Conventional symbol : (p-channel)
D D
G G
S S
Simplified symbol : (n-channel) Simplified symbol : (p-channel)
(a) Symbols for n-channel (b) Symbols for p-channel
enhancement type MOSFETs enhancement type MOSFETs
®
TM

VGS
VDS VGS
VGS
ID VGS (th) VT
ID(mA)
Ohmic
region Saturation region
ID(mA)
11 Locus of VDS(sat)
10 10 VGS = + 8 V
9 9
8 8
7 7 VGS = + 7 V
6 6 Enhancement
5 5 mode
VGS = + 6 V
4 4
3 3
VGS = + 5 V
2 2
VGS = + 4 V
1 1
VGS = + 3 V
VDS
0 1 2 3 4 5 6 7 8 VGS 0 5V 10 V 15 V 20 V 25 V
VT VGS = VT = 2 V
6V
Cut off region
(a) (b)
(VGS )
®
TM

ID (mA)
ID (mA) Ohmic
region Saturation region
8 8 VGS = – 6 V
7 7
6 6
5 5
VGS = – 5 V Enhancement
4 4 mode
3 3
VGS = – 4 V
2 2
1 1 VGS = – 3 V
–6 –5 –4 –3 –2 –1 0 VGS 0 VDS
VT VGS = VT = – 2 V
Cut off region

(a) (b)
ID
VGS
 
 
®
TM


+V +V +V +V +V +V +V +V
D D S S
ON OFF ON OFF
+V 0V 0V +V
S S D D
(a) n-channel MOSFET and switch equivalent (b) p-channel MOSFET and switch equivalent
®
TM

D(mA)
+VDD 10
9
RD 8
Id
7
Q
Vout 6
5
C1
Vin 4
RL 3
RG 2
1
0
+VGS (V)
+VGS
0 1 2 3 4 5 6 7 8
(a) CS MOSFET amplifier Vgs
(b) Transfer characteristics


®
TM

   

IB VGS
IC ID
D D
C C
B B
G G
E E
n-p-n p-n-p S S
n-channel p-channel
®
TM

rd
C
ID ID
 IC  ID
 gm
 IB  VGS
®
TM

®
TM

®
TM

Basic Electronics Engineering 6-2 Operational Amplifier
Mind Map - Operational Amplifier
TM
Positive
supply voltage
Inverting input terminal +VCC
– 7
2 6 Output terminal
Op-amps
3
+ 4
Non-inverting input terminal –VEE
Negative
supply voltage
VCC
VEE
®
TM

Vin
180º phase shift
+ VCC
t Vo
Vin
– Vo
Op-amps
t
+ Inverted
output with
– VEE
respect to input


(a) Input applied to inverting terminal
+ VCC Vo
–
Vin Op-amps Vo t
Vin
+
t – VEE Noninverted
output in phase with
input
VCC
– VEE Zero phase shift
(b) Input applied to noninverting terminal


  
+
V1
deal
Differential
Vo
Amplifier
V2 –
V1 V2 Vo
Vo  V1 V2
Ad
A d V1 V2
Ad
Ad
Ad
®
TM

V1 V2
 Vo A d Vd
Vo
Ad
Vd
Ad Log 10 A d
V1 V2
Vc
V1  V2
 Vc
2
Ac .
 Vo A c Vc
 Vo A d Vd  A c Vc

Ad Ac
Ad
 
Ac
®
TM

Ad Ac
Ad
 Ac
V1 = 300 V
+
Ad
 Ac Vo
CMRR –
V2 = 240 V Ad = 5000
 

Ac Ad  
Ad 100000
 500  103
Ac 0.2
 20 Log 500  10 3 113.979 dB
nput 2 –
nput ntermediate Buffer and Level Output Output
Stage Stage Shifting Stage Stage
nput 1 +
®
TM

®
TM

 VCC  VEE
 VCC
 V EE Output
voltage Ideally
saturation
 VCC  VEE levels are
+ VCC and – VEE
0 d.c.
level
 V
0.9  (  15 V)  13.5 V
Vo
 VCC Clipping due to
saturable property
 VEE +VCC
t
–VEE
A OL
R in
Ro
®
TM

Ib
| I b1 |  | I b2 |
2
Voos
dVo
dt maximum
®
TM


 Vios  Vios
 VCC constant VEE
 VEE constant VCC
AOL 
 
®
TM

OFFSET NULL 1 8 NO CONNECTION
+
INVERTING – V (+ VCC)
INPUT 2 7
741
NONINVERTING + OUTPUT
INPUT 3 6
–
V (– VEE) 5 OFFSET NULL
4
AOL  2  105
Z out 
Z in  
Iios
Vios
 
 
Ib
®
TM

–
VCC AOL
Vd Op amp Vo
VEE
V2 +
A OL
Vo V1 AOL 
( + Vsat ) ( – Vsat )
Vd
Vd
This introduces
negative feedback
Rf
Feedback resistor
V2 –
Op-amp Vo
V1 +
Overall finite gain
®
TM

Vd
Vd
Vo
Vo Vd A OL Vd A OL
A OL
 Vd (V1 – V2 ) V V
R1 Rf
Vo
I I
V1 Virtual I=0
short
®
TM

Rf –
+

+
R1
– 
+ –
Vin A b = 0
–  Op-amp +
B Vo
+ –
VA
Vin – VA Vin
 VA
R1 R1
Rf
VA – Vo – Vo
VA
Rf Rf
Vin Vo
–
R1 Rf
Vo Rf
 –
in R1
Rf
R1
®
TM

Vin
(nput)
Time t
0
Vo
Phase shift
(Output)
of 180º
Time t
0
Rf R
R R
R R
R R
R R
R R
  
  
Rf Vo
R1 Vin

®
TM

  
 
R1 A Rf
– + – + 


–
Vo
Op-amp +
B
+ + –
Vin
–
Vin
Vin
 VA VB Vin
Vo – VA Vo – Vin
VA Vin
Rf Rf
VA – 0 Vin
VA Vin
R1 R1
R
Vo – Vin Vin
Rf R1
Vo Vin Vin  (R + R f ) 
 Vin  1 
Rf Rf R1  R1 R f 
Vo (R1 + R f ) R f R1 + R f

Vin R1 R f R1
Vo Rf
Vin R1
®
TM

Vin
(nput)
Time t
0
Vo
(Output) No
phase
shift
Time t
0
Vin
VB Vin
Rf  R 
Vo   1  f  VB
R1  R1 
Rf R Rf R
  
  
 Rf     Vo
    
 R1    Vin

®
TM

 
 
 
 
R1   R1 Rf
V1 – + VCC
Ra V1 Vo
Va
+ – VCC
Rb
Vb
R1 Rf
I I
VA –
V1 VA
Ra Vo
Va – V1 Va V1
I1 +
Ra I1
Vb
Vb – V1
I2 Rb
Rb
I2
I1  I2
Va – V1 Vb – V1 Va R b + Vb R a
  V1
Ra Rb Ra  Rb
    
V1

V1
 Rf   
Vo    V1    
 R1    
 
20 k
+VCC
10 k (+12 V)
–
Vo
Rf k R 1 k +
(–12 V)
VP = 3 V –VCC
 Rf    20  
 Vo    Vp  10  t t
 R1   
®
TM

Vp
Vo
9V
Vin
3V
t
–3V
–9V
(a) Input (b) Output
A d Vd Vd V1 V2
V1  V2
A c Vc Vc
2
Ad

Ac
Ad
Ac
| I b1 |  | I b2 |
2
dVo
dt maximum
®
TM

®
TM

®
TM

®
TM

®
TM

Decimal Binary Octal Hexadecimal Decimal BCD code
0 0000 0 0
Digit 8 4 2 1
1 0001 1 1
2 0010 2 2 0 0 0 0 0
3 0011 3 3 1 0 0 0 1
4 0100 4 4 2 0 0 1 0
5 0101 5 5
3 0 0 1 1
6 0110 6 6
4 0 1 0 0
7 0111 7 7
8 1000 10 8 5 0 1 0 1
9 1001 11 9 6 0 1 1 0
10 1010 12 A 7 0 1 1 1
11 1011 13 B
8 1 0 0 0
12 1100 14 C
9 1 0 0 1
13 1101 15 D
14 1110 16 E
15 1111 17 F
Decimal 5 8
8-4-2-1 BCD 0 1 0 1 1 0 0 0
Relations
5 6 7 8  9
Mind Map - Number System
Decimal 5 × 10
3
6 × 10
2
7 × 10
1
8 × 10
0  9 × 10
–1
1 1 0 1  1 0 1
Binary
1×2
3
1×2
2
0×2
1
1×2
0  1×2
–1
0×2
–2
1×2
–3
Number
Systems 
5 6 3 2 4 7 1
Octal
5×8
3
6×8
2
3×8
1
2×8
0  4×8
–1
7×8
–2
1×8
–3
3 F D  8 4
Hex
3 × 16
2
F × 16
1
D × 16
0  8 × 16
–1
4 × 16
–2
Any Radix (Base) Decimal
Conversion
Integer Part by Successive Division Method
Decimal Any Radix (Base)
Fractional Part by Successive Multiplication Method
Addition
Binary
Arithmetic Using 1's Complement
Subtraction
Using 2's Complement
1. AB = A + B
DeMorgan's
Theorem
2. A + B = A B
®
TM

3 2 1 0 –1
10 10 10 10 10
5 6 7 8 . 9
3 2 1 0 –1
In power of 10 5  10 6  10 7  10 8  10 9  10
MSD LSD
3 2 1 0 –1 –2 –3 –4
2 2 2 2 2 2 2 2
MSB LSB
1101.101
Binary
point
®
TM

3 2 1 0 –1 –2 –3
2 2 2 2 2 2 2
N = 1 1 0 1 . 1 0 1
3 2 1 0 –1 –2 –3
12 12 02 12 12 02 12
3 2 1 0 –1 –2 –3
N = 12 + 12 + 02 + 12 + 12 + 02 + 12 = (13.625)10
3 2 1 0 –1 –2 –3
8 8 8 8 8 8 8
N = 5 6 3 2 . 4 7 1
3 2 1 0 –1 –2 –3
58 68 38 28 48 78 18
3 2 1 0 –1 –2 –3
N = 58 + 68 + 38 + 28 + 48 +78 +18 = (2970.611328)10
®
TM

2 1 0 –1 –2
16 16 16 16 16
N = 3 F D . 8 4
2 1 0 –1 –2
3  16 F  16 D  16 8  16 4  16
2 1 0 –1 –2
N = 3  16 + F  16 + D  16 + 8  16 + 4  16
2 1 0 –1 –2
= 3  16 + 15  16 + 13  16 + 8  16 + 4  16 = (1021.515625)10
    
(1111 1111 1111) 2 (4095) 10 (FFF) H
®
TM

Step 1. 0 1 0 1 0 1 1 0 1 0 1 1 1 0 0 Binary (Base 2)
Step 2. 2 5 5 3 4 Octal (Base 8)
Adding 0 to make Adding 0s to make

a group of 3-bits a group of 3-bits
 (10101101.0111) 2 (255.34) 8
1 2 5 6 2 Octal (Base 8)
Step 1. 0 0 1 0 1 0 1 0 1 1 1 0 0 1 0
Step 2. 1 0 1 0 1 0 1 1 1 0 0 1
Leading zeros Trailing zero
 (125.62) 8 (1010101.11001) 2
®
TM


Step 1. 0 0 1 1 0 1 1 0 1 1 1 0 1 0 0 1 1 0 1 0
Step 2. 3 6 E 9 A
Adding 0s to make Adding 0 to make

 (1101101110.1001101) 2 (36E.9A) 16
8 A 9 B 4
Step 1. 1 0 0 0 1 0 1 0 1 0 0 1 1 0 1 1 0 1 0 0
Step 2. 1 0 0 0 1 0 1 0 1 0 0 1 1 0 1 1 0 1
Trailing zeros
 (8A9. B4) 16 (1000 1010 1001.101101) 2
®
TM

6 1 5 2 5 Octal (Base 8)
Step 1. 1 1 0 0 0 1 1 0 1 0 1 0 1 0 1 Binary (Base 2)
Step 2. 0 0 0 1 1 0 0 0 1 1 0 1 0 1 0 1 0 1 0 0 Binary (Base 2)
Step 3. 1 8 D 5 4 Hex (Base 16)
Adding 0s to make Adding 0s to make

B C 6 6 A F Hex (Base 16)
Step 1. 1 0 1 1 1 1 0 0 0 1 1 0 0 1 1 0 1 0 1 0 1 1 1 1 Binary (Base 2)
Step 2. 0 0 1 0 1 1 1 1 0 0 0 1 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 Binary (Base 2)
Step 3. 1 3 6 1 4 6 5 3 6 Octal (Base 8)
Adding 0s to make Adding 0 to make

A n  1 r n  1  A n  2 r n  2  ...  A 1 r 1  A 0 r 0  A 1 r  1  A  2 r  2  ... C  m r  m
            
®
TM

(193) x
   
 (193) x 1 x2 + 9  x + 3  x0
 x2 + 9x + 3 
Q R Q R
 LSD
12 2 = 6 0 2 12 0 LSD
6  2 = 3 0 2 6 0
3  2 = 1 1 2 3 1
 1 2 1 1 MSD
1 2 = 0
0
MSD 1 1 0 0
(12)10 = (1 1 0 0) 2
®
TM

Fraction Base Product
0 MSD
0.125  2 = 0 . 25
0
0.25  2 0 . 50
1 LSD
0.50  2 1 . 00
(0.125)10 = (0.001)2 (12.125)10 = (1100.001) 2
Q R Q R
 LSD
658 8 = 82 2 8 658 2 LSD
82  8 = 10 2 8 82 2
10  8 = 1 2 8 10 2
 1 8 1 1 MSD
1 8 = 0
0
MSD 1 2 2 2
(658)10 = (1222) 8

6 MSD
0.825 × 8 = 6 . 6
4
0.6 × 8 = 4 . 8
6 LSD
0.8 × 8 = 6 . 4
(0.825)10 = (0.646) 8  (658.825)10 = (1222.646) 8
®
TM

Q R Q R
LSD
5386  16 = 336 10 10(A) LSD
16 5386
336  16 = 21 0 16 336 0
21  16 = 1 5 16 21 5
 1 16 1 1 MSD
1 16 = 0
0
MSD 1 5 0 A
(5386)10 = (150A) 16

5 MSD
0.345 × 16 = 5 . 52
8
0.52 × 16 = 8 . 32
5 LSD
0.32 × 16 = 5 . 12
(0.345)10 = (0.585) 16  (5386.345)10 = (150A.585) 16
Q R
2 130 0 LSD
2 65 1
2 32 0
2 16 0
2 8 0
2 4 0
2 2 0
2 1 1
0
MSD
(130) 10 (10000010) 2
             
®
TM

 (1011011) 2 (91) 10
0 0 1 0 1 1 1 0 1 1 1 1 Binary number
1 3 5 7 Octal number
Adding 0 to make
a group of 3-bits
 (1011101111) 2 (1357) 8
0 0 1 1 0 1 1 1 0 1 1 1 0 1 1 1 1 0 1 1
3 7 7 7 B
Adding 0 to make
a group of 4-bits
 (110111011101111011) 2 (3777B) 16
(4E7.2)16 ( )8 (521.3)8 ( )2
E
4 E 7 2 Hexadecimal
number
0 1 0 0 1 1 1 0 0 1 1 1 0 0 1 0 Binary number
 E
0 1 0 0 1 1 1 0 0 1 1 1 0 0 1 Binary number
2 3 4 7 1 Octal number
 (4E7.2) 16 (2347.1) 8
5 2 1 3 Octal number
1 0 1 0 1 0 0 0 1 0 1 1 Binary number
 (521.3) 8 (101010001.011) 2
®
TM

Integer part Fractional part
2 33 1
0
2 16 0 0.45  2 = 0.90
1
2 8 0
0.90  2 = 1.80
2 4 0 1
0.80  2 = 1.60
2 2 0
2 1 1
0
 (33.45)10 = (100001.011)2
1 1 0 1 0 1 0 0 Number
NOT operation
0 0 1 0 1 0 1 1 1's complement of number
1 1 0 0 0 1 0 0 Number
1 1 Carry
+ 1 Add 1
+ 200 = 0 1 1 0 0 1 0 0 0
– 200 = 1 0 0 1 1 0 1 1 1 1's complement

+ 1 Add 1
1 0 0 1 1 1 0 0 0 2's complement
®
TM

B7 B6 B5 B4 B3 B2 B1 B0
Sign Magnitude
Maximum positive number : 0 1 1 1 1 1 1 1 = +127

Maximum negative number : 1 1 1 1 1 1 1 1 = –127
Signed-magnitude representation : 1 0 0 0 0 1 1 0
Signed-1's complement representation : 1 1 1 1 1 0 0 1
Signed-2's complement representation : 1 1 1 1 1 0 1 0
®
TM

 2n  1  2n  1
1 0 0 0 1 1 0 1 – 13 in sign magnitude representation
1 1 1 1 0 0 1 0 – 13 in 1's complement representation
1 1 1 1 0 0 1 1 – 13 in 2's complement representation
®
TM

Cout
1 1 1 1 Carry
1 1 0 0 1 1 0 0 Number 1
+ 1 1 0 1 1 0 1 0 Number 2
1 1 0 1 0 0 1 1 0 Result (S)
1 1 1 Carry (28)10
0 0 1 1 1 0 0 Binary equivalent of (28)10 + (15)
Sign Extension + 10
0 0 0 1 1 1 1 Binary equivalent of (15)10
Sign (43)10
0 1 0 1 0 1 1 Result : Binary equivalent of (43)10
(28) 10 (011100) 2 (15) 10 (01111) 2

10
0 0 10 0 10
1 1 1 0 1 1 0 0 Number 1
0 0 1 1 0 0 1 0 Number 2
1 0 1 1 1 0 1 0 Result
Note : (10)2 – (1)2 = (1)2

®
TM



(28) 10 (011100) 2
(15) 10 (001111) 2
0 0 1 1 1 1 (15)10
Carry
1 1 0 0 0 0 1's complement of (15)10
1 1 Carry (28)10
0 1 1 1 0 0 Binary equivalent of (28)10 +
+ (–15)10
Sign Extension 1 1 0 0 0 0 1's complement of 15, i.e. (–15)10
1 0 0 1 1 0 0 Result (13)10
+ 1 Add end around carry
0 0 1 1 0 1 Final result : Binary equivalent of (13)10

(15) 10 (001111) 2
(28) 10 (011100) 2
0 1 1 1 0 0 Binary equivalent of (28)10
1 1 Carry
1 0 0 0 1 1 1's complement of (28)10
1 1 1 1 Carry
(15)10
+ (–28)10
1 0 0 0 1 1 1's complement of (28)10
1 1 0 0 1 0 Result = Binary equivalent of (–13)10 (–13)10
Verification 0 0 1 1 0 1 1's complement of result (Binary equivalent of (13)10)
®
TM



(28) 10 (011100) 2
(15) 10 (001111) 2
0 0 1 1 1 1 (15)10
Carry
1 1 0 0 0 0 1's complement of (15)10
+ 1 Add 1
1 1 0 0 0 1 2's complement of 15, i.e., (–15)10
1 1 Carry (28)10
+ (–15)10
Sign Extension 1 1 0 0 0 1 2's complement of 15, i.e. (–15)10
Ignore Carry 1 0 0 1 1 0 1 Result : Binary equivalent of (13)10 (13)10

(15) 10 (001111) 2
(28) 10 (011100) 2
0 1 1 1 0 0 Binary equivalent of (28)10
1 1 Carry
1 0 0 0 1 1 1's complement of (28)10
+ 1 Add 1
1 0 0 1 0 0 2's complement of (28)10, i.e., (–28)10
No carry 0 1 1 Carry
(15)10
+ (–28)10
1 0 0 1 0 0 2's complement of (28)10
1 1 0 0 1 1 No carry, thus result is negative (–13)10
and in 2's complement form
Verification 0 0 1 1 0 0 1's complement of result
+ 1 Add 1
0 0 1 1 0 1 – Result = Binary equivalent of (13)10
®
TM

0 1 0 0 1 Subtractor
1 0 1 1 0 1’s complement of subtractor
+ 1 Add 1
1 0 1 1 1 2’s complement of subtractor
0 1 0 0 0 Subtrahend
+ 1 0 1 1 1 2’s complement of subtractor
No carry, result is negative and in
1 1 1 1 1 2’s complement form
0 0 0 1 1 1 1 0 Subtractor
1 1 1 0 0 0 0 1 1’s complement of subtractor
+ 1 Add 1
1 1 1 Carry
0 0 1 1 1 0 0 1 Subtrahend
Discard carry 1 0 0 0 1 1 0 1 1 Result
 0011.1001 – 0001.1110 = 0001.1011
 13 10  0001101 2
 42 10  
0 1 0 1 0 1 0 + 42
1 0 1 0 1 0 1 1’s complement of 42
+ 1 Add 1
1 0 1 0 1 1 0 2’s complement of 42
1 1 1 Carry
0 0 0 1 1 0 1 13
1 0 1 0 1 1 0 2’s complement of 42
No carry, result is negative and in 2’s
1 1 0 0 0 1 1
complement form
®
TM

Decimal 5 8
8-4-2-1 BCD 0 1 0 1 1 0 0 0
(1000 0110) BCD (86) 10
2 86 0
 (86)10 = (1010110)2
2 43 1
2 21 1
0 0 1 0 1 0 1 1 0 Binary
2 10 0
1 2 6 Octal
2 5 1
2 2 0  (86)10 = (1010110)2 = (126)8

2 1 1
0
®
TM

  
   
  



A
A
®
TM



 
AB A B
AB A B
A+B A B
A+B A B
®
TM


A B  AB AB  AB (A  B)  (A  B) (A  B)  (A  B)
AA  AB  A B  BB AB  A B
AB  CD (A  B)  (C  D)
AB  CD A
AB CD AB A B
(A  B) (C  D) (A  B)  (C  D) A
(A  B)  (C  D) AB A B
     
(A  B)  (C  D) (A  B)  (C  D)
(A  B)  (C  D)
®
TM

®
TM

®
TM

Truth Tables Symbols
Input
Input Output
Output
A Y Symbols Truth Tables

NOT Gate
0 1 Input Output
1 0 A B Y
0 0 0
Input Output EX-OR Gate 0 1 1
A B Y 1 0 1
1 1 0
0 0 0
AND Gate
0 1 0 Input Output
1 0 0 A B Y
1 1 1 0 0 1
EX-NOR Gate 0 1 0
Input Output 1 0 0
A B Y 1 1 1
0 0 0
Mind Map - Logic Gates and Adder Circuits
OR Gate
0 1 1
Logic Gates
1 0 1
Basic Gates
and
1 1 1
Adder Circuits
Truth Tables Symbols Universal Gates
Input Output
A B Y
Adder Circuits
0 0 1
NAND Gate
0 1 1
1 0 1 Half Adder
1 1 0 A
Sum
B
Input Output
Carry
A B Y
0 0 1
NOR Gate
0 1 0
1 0 0
1 1 0
Realization of Basic Gates From Universal Gates
Using NAND Using NOR
Full Adder
NOT Gate
A
B Sum
Cin
B
AND Gate A
A
Carry
Cin
Cin
B
OR Gate
®
TM

A Y
+ R
V
–
S
1 VCC 14
Input Output
2 13
Switch open (Low) Lamp ON (High)
3 12 Switch close (High) Lamp OFF (Low)
IC 7404
4 11
VCC
A
5 10 R
Y
6 9
R
A
7 GND 8
A Y
14 13 12 11 10 9 8
VCC
IC 7407
GND
1 2 3 4 5 6 7
®
TM

A
Y + S1 S2
B
V
–
Input Output
1 VCC 14
S1 S2
2 13 Open (Low) Open (Low) Lamp OFF (Low)
Open (Low) Close (High) Lamp OFF (Low)
3 12
Close (High) Open (Low) Lamp OFF (Low)
IC 7408
4 11 Close (High) Close (High) Lamp ON (High)
5 10
+VCC
6 9
R

7 GND 8
A
B Y=A B
A S1
Y
B
+ S2
V
–
1 VCC 14
Input Output
2 13 S1 S2
Open (Low) Open (Low) Lamp OFF (Low)
3 12
IC 7432 Open (Low) Close (High) Lamp ON (High)
4 11 Close (High) Open (Low) Lamp ON (High)
5 10
Close (High) Close (High) Lamp ON (High)
6 9
7 GND 8
A
B Y=A+B
®
TM


A
Y
B 14 13 12 11 10 9 8
VCC
IC 7400
GND
1 2 3 4 5 6 7
+VCC
A Y
A
Y
B
14 13 12 11 10 9 8
VCC
IC 7402
GND
1 2 3 4 5 6 7
®
TM

A
Y
B 
14 13 12 11 10 9 8
VCC
IC 7486
GND
1 2 3 4 5 6 7

A
Y
B
14 13 12 11 10 9 8
VCC
IC 74266
GND
1 2 3 4 5 6 7
Input A 0 0 1 1 Input A 0 0 1 1
NOT 1 1 0 0 Input B 0 1 0 1
Input A 0 0 1 1 NAND 1 1 1 0
Input B 0 1 0 1 NOR 1 0 0 0
AND 0 0 0 1 EXOR 0 1 1 0
OR 0 1 1 1 EXNOR 1 0 0 1
®
TM

A A
B B
Y Y
C C
AB
A AB
B
Y =A  B  C
A A+B
A+B
B
Y = A+B+C
Input ‘A’
t (ms)
0 1 2 3 4 5
Input ‘B’
t (ms)
0 1 2 3 4 5
Input A t (ms)
Input B t (ms)
0 1 2 3 4 5
Output
AND t (ms)
Gate
Output
EX-OR t (ms)
Gate
®
TM

®
TM

A B Y
(Logic 1) A 1 0 1
Y
B
1 1 0
Y=B
Inverter
operation
®
TM

A B AB
A X=0 0 0 1 Y=1
X Y = AB = XX = X + X = X
B 0 1 1
1 0 1
X=1 1 1 0 Y=0
AB
AB AB
A A
Y = AB = AB Y = AB = AB
B B
A B A
AB
®
TM

A
A
A
Y=A.B Y=A.B
B
B
B
A
A
Y=A.B=A+B
B
B
 
A B
A B
AB A
A
A
A.B
Y=A.B
B
B
A
A
A.B
Y=A.B=A+B
B
B
®
TM

   
A
B
AB  AB
Y
A
B
A
A A AB
B
B B
 Y
A A
B
B
AB
Y  AB  A B
A
A
B
B
Y
Y
A A
A
B
B B
®
TM

A B A+B
A X=0 0 0 1 Y=1
X Y=A+B = X+X = X
B 0 1 0
1 0 0
X=1 1 1 0 Y=0
A B
A+B A+B
A A
Y=A+B=A+B Y=A+B=A+B
B B
A B A B
AB A
AB
®
TM

A
A
A+B A
Y=A+B
B
B
B
A
A
Y=A+B =A B
B
B
  
AB
A +B
AB A
A
A
A+B
Y=A+B
B
B A
A
A+B
Y=A+B =A B
B
B
®
TM

AB   
A
B
AB  A B  AB  AB Y
AB  AB  A  B   A  B A
B
A A
B A
B
B
Y
A
 Y
B A
B
A B A B
AB AB (A  B) (A  B)
A
B
Y
A
B
A
A
B
B Y
A
B
®
TM

A Carry
Inputs Half Outputs
Adder
B Sum
(AB) A
Sum
B
(AB)
(AB) Carry
A AB
B A B  A B = Sum
AB  AB C out
AB
AB  AB AB
AB A B = A B = Cout
A BA B
®
TM

Cin
A
Full
Sum
Adder
B
Cout
A B C in  A B C in  A B Cin  A B C in
 A B Cin  A B Cin    A B Cin  A B Cin    A B Cin  A B Cin 

B C in  A  A   A C in  B  B  A B  Cin  C in 
B C in  A C in  AB
A
A B
Cin
B A
B
A Cin
Cin Cout A
Sum
B
Cin
B
A
Cin B
Cin
A B Cin  A B Cin  A B Cin  A B Cin
Cin (A B  AB)  Cin (A B  A B)
®
TM

Cin (A  B)  Cin (A  B) A
B Sum
Cin
Cin (A  B)  Cin (A  B) B
A
Cin  A  B) A
Carry
Cin
B C  A C in  AB Cin
Cin  A  B)
A B Cin  A B Cin + A B Cin  A B Cin
(A B  A B)
A B Cin  A BCin
(Cin  1) A B Cin  A BCin
A B Cin  A BCin
(B  B)  A B Cin
A BCin
A BCin
A BCin
First Half-Adder Second Half-Adder

A
B Sum
Cout
Cin
®
TM

A B C in  A B C in  A B C in  A B C in
A
B
A
Cout
Cin
B
Cin
Cin
B
B
Cin Sum
A
A
B
Cin
®
TM

®
TM

®
TM

Circuit Diagram Truth Tables
S S R Qn+1
Q
0 0 No Change (NC)
SR Flip-flop 0 1 Reset
Clock signal
1 0 Set
Q
R 1 1 Indeterminate
Mind Map - Flip-Flops and Introduction to Microprocessor and Microcontroller
S
D
Q D Qn+1
0 0
D Flip-flop Clock signal 1 1
Q
X Qn
R
SR latch
S
J J K Qn+1
Q
0 0 Qn
JK Flip-flop
0 1 0
Clock signal
1 0 1
Q
K 1 1 Qn
R
J
T
Q
T Qn+1
T Flip-flop
Clock signal 0 Qn
K 1 Qn
Q
JK Flip Flop
Filp-Flops
Flip-Flops and
Introduction to
p &  c Microcontroller
(Block diagram)
Registers
Microprocessor
(Block diagram) Temp
register
Temp
register Accumulator
Parallel
/O
ports
General
purpose
registers
Data bus
Stack
ALU pointer Serial
Instruction General /O
A Temp register purpose Program ports
registers counter
Instruction Status Instruction

decoder PC
register register
Alu Address bus Interrupt
circuits
Control RAM Program

Control address address
Status unit bus register register
register
Timing Timer/
and counter
control circuit
EPROM/
RAM
ROM
Internal memory
®
TM

Q
Clock Outputs
Inputs Input
Q
 
A
A 1 Q A 1 Q A 1 Q
B 2 Q B 2 Q B 2 Q
B
(a) Using basic inverter (b) Using NAND gates (c) Using NOR gates
®
TM

S A
(Set) 3
1 Q
R B 2 Q
4
(Reset)
S R  1
Q Q S
R Q Q
S
Initial state : Q = 0, Q = 1 Initial state : Q = 1, Q = 0
0 S 1 0 S 1
S 3 Q=0 S 3 Q=1
A 1 A 1
1 0
0 1
0 R 2 Q=1 0 R 2 Q=0
R 4 R 4
B 1 B 1
S  0 1 S 0
S 3 1 Q=1
R  1 S  0 A
0
1
0 R 2 Q=0
R 4
R B 1
Q  0
®
TM

S  1 R  0 R  0, 0 S 1
Q  1 S 3 1 Q=0
A
Q S 1
0
1 R 2 Q=1
R 4
B 0
S
Q
Clock signal
Q
R
CP S R Qn Qn+1 State
 0 0 0 0 No Change(NC)
 0 0 1 1
 0 1 0 0
S Q Reset
 0 1 1 0
CP  1 0 0 1
Set
R Q  1 0 1 1
 1 1 0 X
Indeterminate
 1 1 1 X
0 X X 0 0
No Change(NC)
0 X X 1 1
(a) Logic symbol (b) Truth table for positive edge clocked
SR flip-flop
®
TM

S
D
Q

 Clock signal
R
SR latch
CP D Qn+1
D Q
 0 0
CP
 1 1
Q
Q n 1 0 X Qn
Q n 1
1
0
CP
1
0
D
1
0
Q
®
TM

JQ K Q
S
J
Q
Clock signal
Q
K
R
Q 1
Q 0
Q  0
Q 1
Q  1
Q 0
®
TM

Q 1
Q 0
Qn J K Qn+1
J K Qn+1
0 0 0 0
J Q 0 0 1 0 0 0 Qn
0 1 0 1
CP 0 1 1 1 0 1 0
K Q 1 0 0 1 1 0 1
1 0 1 0
1 1 0 1 1 1 Qn
1 1 1 0
(a) Logic symbol (b) Truth table
CP
0 1 0 1 1 1
J
1 1
0 0 1 1
K
(Reset)
Q
(toggle) (No change) (set) (toggle) (toggle)
(c)
t
t
®
TM

tp
CLK
K
a b c d e
Q
Propagation delay
t
t p  t t p  t
t p  t t
J
T
Q Q
T J
JK
CP flip-flop Clock
input
K Q
Q
K
®
TM

Qn T Qn+1
T Qn+1
T Q 0 0 0
CP 0 1 1 0 Qn
Q 1 0 1 1 Qn
1 1 0
(a) Logic symbol (b) Truth table
Data bus
Instruction General
A Temp register purpose
registers
Instruction
decoder PC
Alu Address bus
Control Control
Status unit bus
register
®
TM

®
TM

Registers
Temp Temp Parallel

register register Accumulator /O
ports
General
purpose
registers
Stack
ALU pointer Serial
/O
Program ports
counter
Status Instruction
register register
Interrupt
circuits
RAM Program
address address
register register
Timing Timer/
and counter
control circuit
EPROM/
RAM
ROM
Internal memory
®
TM

®
TM

®
TM

®
TM

®
TM

®
TM

Basic Electronics Engineering 10 - 2 Electronic Instrumentation
Mind Map - Electronic Instrumentation
TM
 
®
TM

Constant
current
source
Buffer
amplifier
Compensated
Rectifier
attenuator
Resistance
Rotary 1 2 Analog to
A.C.voltage
switch digital
+ Current to
3 converter
voltage
Input A.C. current converter
probes
5 4 Decade
D.C. D.C.
current Current to counter
voltage voltage
converter
Digital
display
Compensated
attenuator
®
TM

R1
Iin
R2
I in
R1 R1 Vo Iin
R3
Vo  I in –
R1 R2 R3 Vo  Iin
+
®
TM

   
®
TM

+i
Upper
constant –i
current
Frequency source
control
C
Frequency Voltage Output
control i amplifier
comparator
N/W i
M/V #1
Integrator
External
frequency Lower
control constant Resistance
current Output
diode
source amplifier
shaping
#2
circuit
®
TM

Vertical
amplifier
Data Data
Sample Analog - to- in out
Input Memory
Input and digital converter
attenuator
hold
Read - write
address
Trigger
circuit
Control
logic Vertical deflection
amplifier
D/A Cathode
ray tube
Horizontal
deflection
amplifier
Horizontal (digital)
D/A
®
TM


®
TM

®
TM

Var.Y1
Y1 Shift
Storage
+ Y C.R.O.
Y1 Y1 Beam
Y1 Output
Attenuator Preamplifier switch amplifier
–
Mag.X10 X shift
+ Y2 Y2 X
Y2 Display output
– Attenuator Preamplifier mode Amplifier Focus
Y2 Brill
Shift Y Y XY
1 2
Astig.
Var.Y2
Dual
High CRT
Chop Blanking
voltage control
oscillator circuit
regulator circuit
Tv
Sweep Hold off
sync
generator circuit
circuit
185V 120V12V 5V –12V
External Trigger Trigger Sweep

Trigger Power
trigger amplifier shaping gating
level supply
circuit multi
0.2 
Y1 Y2
®
TM

Y1 , Y2
Y1
Y2
®
TM

Y1 Y2
Primary Secondary
+ + + Regulated
Rectifier Filter
Transformer D.C. D.C. Regulator smooth D.C.supply
circuit circuit circuit
– – –
A.C. A.C. Pulsating To load
Unregulated
mains voltage type
230 V, 50 Hz
®
TM

I1 I2
A P
I2
I2
V1 N1 C I2 I1
Q N2 V2 Load
N2 V2 Load V1 N1
I2–I1 (I1–I2)
I1 B I2 I1 S I2
I2 I1
I2 I1
V2 I1 N2
V1 I2 N1
®
TM

I2
Single Mounting
phase VS for lamps
a.c. V2 Lamps
supply Lamp Lamp Lamp connected in
1 2 3 parallel across V2
Dimmerstat Controlling this variable contact

V2 can be controlled & hence
brightness of lamps can be controlled
®
TM

I
+
Im
Ish + Basic meter
Rsh Rm D' Arsonval
– movement
–
Shunt used for the
measurement of large
currents
Rm R sh
Im I sh
I sh Im
R sh Rm
Im R m
 I sh R sh Im R m R sh
I sh
Im R m
I sh Im R sh
I  Im 
Rm I
 R sh Im
m 1
I Rm
Im R sh
®
TM


  
Im R m

I  Im     
  1.0101 
     
   
2  1.0101  2.0202 
100
 i. e. 1000 I  1  49.5
 I 
  1
3
1  10 
 50.5 mA
R1 R2 R3 R4
+
Rm
–
Selector Basic
switch S meter
–
®
TM

 
Rs
+
Multiplier Im
+
V Rm
– Basic
meter
Rm Rs
Im
Im R m  R s  Im R m  Im R s
 Im R s Im R
V
 Rs  Rm
Im
Im R m
®
TM

V Im R m  R s 

v Im R m
Rs
 1
Rm
Rs  m  1 R m
R1 R2 R3 R4
V2 V3
V1 V4 +
S Rm
+
–
V Basic meter
®
TM

 
  

   
  
 


Rm  Im 
V
Rs  Rm  
Im  
50 
Rm  Im
I m Rm 1  10 3  50
 R sh 0.01 
I  Im 5  1  10 3
V 100
 Rs  Rm  50 k
Im 1  10 3
®
TM

Rm
R sh
m 1
V
Rs  Rm
Im
®
TM

®
TM

®
TM

®
TM

®
TM

Based on physical
quantity to be sensed } Flow, Level,Temperature, Pressure, Proximity and Displacement,
Acceleration, Image, Gas, Light, Humidity, Moisture, Viscosity
Based on sensors'
conversion phenomenon } Magneto electric, thermoelectric , photoelectric, Piezoelectric
Variable resistance, Opto electronic, Variable reactance
Based on output signal } Analog and Digital sensors
Based on the power

}
Mind Map - Sensors
Active sensors and Passive sensors

or signal requirement
Sensors
Industrial process control, Non - industrial use

measurement, and
Based on the applications
automatic
Classification Automobiles Medical Aircraft Consumer Other

products electronics sensors
Biosensors (Misc)
Sensors
Optical sensors Temperature sensors

Motion sensors Light dependent resistor
(LDR)
Thermocouple Thermistor RTD
LVDT Accelerometer
Semiconductor sensors
Gas sensors
Mechanical sensors
Strain Load cell Pressure

gauge sensor
®
TM

Recorder
Printer
Signal Data Data
Transducer/ Display
Measurand conditioning transmission presentation
Sensor
elements element element
Controller
®
TM

Transducer
Signal
Input Sensor + Output
conditioning
signals signals
®
TM

®
TM

Sensors
Industrial process control, Non - industrial use

measurement, and
automatic
Automobiles Medical Aircraft Consumer Other sensors

products electronics
®
TM

Varying voltage Signal Analog
Thermocouple
conditioner output signal
(Analog sensor)
Analog signal
Output signal
Liquid
Time
Heat
®
TM

Discrete digital signal
Digital output
ON Digital
counter
OFF
Time Display
Clock
Digital output signal

Photo sensor
Disk
Transmitter Detector
Squaring
circuit
Rotating
Rotating disc shaft
with slots LED
®
TM

A.C. input
Ein
P Eout
Primary
winding
Core arm
Displacement CORE
+ E – + E – Secondary
s1 s2
windings
Core
+ E –
out
®
TM

Output
voltage
A
0 B Core position
Core Core Core
Core at A Core at 0 Core at B

Es1  Es2 Es1 = Es2 Es1  Es2
Eout = Es1 – Es2
 
®
TM

®
TM

Seismic
mass
Piezoelectric
Acceleration
element
Output
Solid base
®
TM

Copper Copper e.m.f.
_ +
T1 T2 T1 T2
Hot Cold Hot Cold
Junction Junction Junction Junction
Iron Iron
(a) (b)
®
TM

Metal A(+) mV
Current i T1 T2
T1 T2 Hot Cold
junction junction
Hot junction Metal B(–) Cold junction
T2 > T1
(a) Basic circuit of thermocouple (b) Practical thermocouple circuit
K (T1  T2 )
®
TM

  
   
  
®
TM


10 K
Resistance in 1K Resistance decreases with

 increase in temperature
100 (Negative temperature coefficient) NTC
( Log scale ) 10
1
Temp ºC
0
100 200 300
 
  
   
  
  
     
 
Leads
Leads Glass coated
Glass
bead
(a) Bead (b) Probe

Lead
Lead
 
(c) Disc (d) Rod
®
TM


®
TM

 
Amp Output
R2
R1
+ B
VCC D
–
RTD
R3
 
®
TM

Mica strip
Platinum wire Mica strip
End
Connections


®
TM

     
®
TM

Sensor cap and
hydrophobic filter
Metal oxide surface
Sensor body
Sensing element
Electronic board
connectors Electrodes
(Underneath)
silicone base and
heating element
®
TM

Free
electrons
Light
Conduction
band
Energy
gap
+ + Valance
+ band
Holes
Light
+12 V
D Relay
LDR
R
Q
Variable
resistor
VR1
®
TM

+12 V
VR1 D Relay
R
Q
LDR


®
TM


  
Unbonded
strain gauges
Insulated pin
Force
Frame Q
Frame P
®
TM

Tension causes
resistance increase Wire grid
Solder tabs
Resistance measured
Gauge in between leads
sensitive
lateral forces
Compression
causes resistance decrease
Metal foil
Leads
®
TM

Semiconductor
Gold leads
Base
Electrodes
®
TM

3 - Element Rosette 3 - Element Rosette
60º Planar 60º Stacked
(foil) (wire)
FAER-25RB-12SX
90º Planar 45º Planar
(foil) (foil)
FAER-25B-35SX
90º Stacked 45º Planar
(foil) (foil)
®
TM

(a) Ring type (b) Rectangular (c) Cylindrical block (d) Proving frame type
block type type
®
TM

F
1 Axial Transverse
1 4 +
R1 R2
4 2 V Vin
4 2 + out –
R3 R4 –
3 Strain 2 3
gauge 3 Transverse Axial
(a) Load cell (b) Top view of (c) Wheatstone bridge

load cell circuit
Vout
®
TM

Axial gauges
1 and 3 Force F
F
1 t
b L
Axial gauges
2 and 4 on the
bottom surface
Top Bottom
1 2
Vout
4 3
Bottom Top
Vin
®
TM

®
TM

Vout +
_ V
Strain gauge
Diaphragm
R1 R2
V
Strain gauge
R3
Applied
pressure
(a) (b)
Rear cavity :
Static plate Terminations,
Etc.
Diaphragm
static position
Pressure Insulating
material
Deflected
diaphragm
Dielectric
®
TM

Applied Pressure
pressure sensing
diaphragm
Output
Base Crystal
Desired molecule
Signal
Bioreceptor Transducer Display
processing
Analyte
Biosensor
®
TM

Analyte
Data
recording
and Bioreceptor
display
Biosensing
principle
Molecular
Measurement recognition
Transducer
®
TM

   
®
TM

Glucose
oxidase Gas permeable
in gel membrane
Nylon
support
Electrolyte
Pt cathodes
Ag/AgCI
reference
®
TM

®
TM

®
TM

®
TM

Distortion
Communication
Information
Transmitter channel or Receiver Destination
source
medium Simplex Half duplex Full duplex Full/Full duplex
Encoding Decoding
modulation demodulation
Noise
source Modes of Transmission
Block Diagram of Communication System
Amplitude Modulation Frequency Modulation Communication/Transmission Media

(AM) (FM)
Modulation Wired media Wireless media
Twisted pair Coaxial Fiber-optic Radio Microwave Infrared

cable cable cable wave
Basic Communication System
Mind Map - Communication Systems
7
Electromagnetic Spectrum 30 Hz
ELF
10 m
6
300 Hz 10 m
VF
3 kHz 5
10 m
VLF
Applications Allotment of Frequency Band 30 kHz 4
10 m
LF
3
300 kHz 10 m
MF
2
3 MHz 10 m
HF
30 MHz 10 m
Wave length
Communication 300 MHz
VHF
1m
Frequency
Systems Block Diagrams 3 GHz
UHF
–1
10 m
SHF
30 GHz –2
10 m
EHF
Millimeter
–3
300 GHz
waves
AM Receiver 10 m
AM Transmitter
–4
10 m
Infrared
–5
10 m
FM Transmitter FM Receiver –6
0.7 10 m (Red)
Visible
light
–6
0.4 10 m (Violet)
Ultraviolet
X - rays
Mobile Communication System

Gamma
rays
Cosmic
rays
GSM System
HLR VLR
BSC Cellular Concept

PSTN
SIM MSC ISDN, CSPDN
PSPDN
BTS
Cell 2
BSC
ME Cell 7 Cell 3
BTS
Mobile EIR Au C
Abis Cell 1
station A
Um
Base station Network Cell 6 Cell 4
system system
Cell 5
SIM : Subscriber identity module BSC : Base station controller HLR : Home location register
ME : Mobile equipment BTS : Base transreceiver controller VLR : Visitor location register
EIR : Equipment identity register MSC : Mobile service switching
center
Au C : Authentication center
®
TM

Distortion
Communication
Information
Transmitter channel or Receiver Destination
source
medium
Encoding Decoding
modulation demodulation
Noise
source
®
TM

Transmission
Transmitter media Receiver
Transmission
OR
Transmission Transmitter
Receiver media
Transmission
Both at
AND same time
Transmission
Receiver media Transmitter
Station1 Station2
®
TM

At the same time
Transmission Receiver Transmitter

Transmitter media
Transmitter Transmission Receiver

Receiver media
Station3 Station1 Station2
®
TM

Transmission media
Wired media Wireless media
Twisted pair Coaxial Fiber-optic Radio Microwave Infrared

cable cable cable wave
Metal shield
Insulating cover Conductors
Conductors Plastic cover Insulating

cover
Plastic cover
(a) Unshielded twisted pair cable (b) Shielded twisted pair cable
®
TM

®
TM

Outer plastic
Insulation
Fine wire braid shield Solid copper

outer conductor inner conductor
Teflon or plastic insulation

as a dielectric insulator
®
TM

Protecting
covering
Glass cladding
Glass core
Light Rays Total Internal Reflection
Light
follows a
zigzag path
Core Cladding
®
TM

®
TM

Transmitting Receiving
antenna antenna
EM
waves
Transmitter Receiver
Data signal Data signal
®
TM

®
TM

Receiving
antenna
Transmitting
antenna
Line of sight
Receiving
station
Transmitting
station
®
TM

Satellite in space
Uplink Downlink
6 GHz 4 GHz
Transmitting Receiving
station on earth station on earth
®
TM

®
TM

®
TM

®
7
30 Hz 10 m
ELF
6
300 Hz 10 m
VF
3 kHz 5
10 m
VLF
TM
4
30 kHz 10 m
LF
3
300 kHz 10 m
MF
2
3 MHz 10 m
HF
30 MHz 10 m

VHF
300 MHz 1m

UHF
–1
3 GHz 10 m
Wave length
SHF
30 GHz –2
Frequency
10 m
EHF
–3
300 GHz 10 m
Frequency
Speed of light
–4
waves
10 m
Millimeter
f
c
–5
10 m
Infrared
–6
m (Red)
ev GHz
0.7  10
light
–6
Visible
0.4  10 m (Violet)
Ultraviolet
X - rays
rays
Gamma
rays
Cosmic
®
TM

Types of modulations
Analog (Continuous wave modulation) Pulse modulation
Amplitude Angle Digital Analog

modulation modulation modulation modulation
Frequency Phase Pulse code

modulation modulation modulation
PAM PDM PPM
®
TM

Em Baseband signal
0
Time
Carrier signal
Ec
0
Time
Maximum
amplitude Amplitude modulated wave
Minimum
amplitude
Ec+ Em
Em
0
Time
®
TM

Em Baseband signal
0
Time
Carrier signal
Ec
0
Time
Frequency modulated wave
Ec
0
Time
Maximum Minimum
frequency frequency
®
TM

Antenna
Stabilized Class A Class C Class C

RF RF RF RF Matching
crystal buffer power output network
oscillator amplifier amplifiers amplifier
AF Modulator
AF
Audio class B AF class B
pre -
input power output
amplifier
amplifiers amplifier
(a) AM Transmitter block diagram with high level modulation

Antenna
Stabilized Class A Class C Class B

Class C
RF RF RF linear RF linear Matching
power
crystal buffer power power network
amplifier
oscillator amplifier amplifier amplifier
AF Modulator
AF
Audio class B AF class B
Pre -
Input power output
amplifier
amplifier amplifier
(b) AM Transmitter block diagram with low level modulation
®
TM

Antenna AM with fc
Amplified AM signal replaced by IF Automatic
gain
fs control
IF
AM signal
R.F. (fo–fs) AF signal

IF
amplifier Mixer Detector
amplifier
stage
fo Audio
Carrier, fs
and
Amplified AM power
with fc replaced by IF Automatic amplifier
Local frequency
oscillator control
Ganged tuning
Amplified
AF signal
f f
®
TM

fC1 = 200 kHz fC2 = 32.4 MHz fC3 = 5 MHz fC4 = 90 MHz
 f1 = 25 Hz  f2 = 4.05 kHz  f3 = 4.05 kHz  f4 = 72.9 kHz
Frequency
Modulating Balanced Down Frequency
multiplier Power
signal  modulate  2×3×3×3×3
convertor multiplier
amplifier
(DSBSC) (Mixer) 3×3×2
(× 162)
Integrator (× 18)
90º Phase
shifted carrier
90º Phase Crystal

shifter oscillator
(27.4 MHz)
Carrier
Crystal
oscillator
(200 kHz) Carrier




®
TM

Integrator
Modulating R
NBFM
signal
Phase signal
modulator
C
Carrier
oscillator
®
TM

R.F. AGC
amplifier
I.F.
Mixer Limiter Discriminator
amplifier
Local
oscillator
A.F. A.F.
De- voltage power
emphasis amplifier amplifier
L.S.
®
TM

Base stations
Hexagonal Cells
Cell 2
Cell 7 Cell 3
Cell 1
Cell 6 Cell 4
Cell 5
®
TM

ink
ardL
F orw
ink Radio Transreceiver

er se L
Rev
Base Station
Mobile unit
Base Station
Mobile Telephone
Switching Office
(MTSO) Mobile unit
PSTN
Network
Interface
Equipment
®
TM

HLR VLR
BSC
PSTN
SIM MSC ISDN, CSPDN
PSPDN
BTS
BSC
ME
BTS
Mobile EIR Au C
station Abis A
Um
Base station Network
system system
SIM : Subscriber identity module BSC : Base station controller HLR : Home location register
ME : Mobile equipment BTS : Base transreceiver controller VLR : Visitor location register
EIR : Equipment identity register MSC : Mobile service switching
center
Au C : Authentication center
(Um )
®
TM

®
TM

I 200  IL
IZ
+
24 V VL
– RL
  dc  dc
®
TM

(4E7.2)16 ( )8 (521.3)8 ( )2

®
TM

®
TM

®
TM


 
SiO2
®
TM

(Drain)
D SiO2
No channel
p
Metal
contacts
G n - type
SS
(Gate) substrate
(Substrate)
S
p - doped region
(Source)
 VDS
VGS VGS SiO2

VGS
VT
SiO2
®
TM

Integer part Fractional part
2 105 1 LSD
0
2 52 0 0.15 x 2 = 0.30
0
2 26 0 0.30 x 2 = 0.60
1
2 13 1 0.60 x 2 = 1.20
0
2 6 0 0.20 x 2 = 0.40
0
2 3 1 0.40 x 2 = 0.80
0.80 x 2 = 1.60 1
2 1 1 MSD
Restricting fraction part to six digits we have

(105.15)10 = 1101001.001001
  
            
®
TM

1 1 1 0 0 1
0 0 0 1 1 0 1's complement of 111001
0 1 1 1 1
1 0 0 0 0 1's complement
+ 1 Add 1
1 0 0 0 1 2's complement
1 Carry
1 1 1 0 0 (11100)2
+ 1 0 0 0 1 2's complement of (01111)2
Ignore
carry 1 0 1 1 0 1 Result
 (11100 – 01111)2 = (1101)2
®
TM

 
Rref  Rt  
 
    
®
TM

®
TM

E sm t
E sm
2E sm 10
 E DC
 
E sm 5
 E RMS
E sm
 1  Vcc  15 V
Rf k R 1 k Vcc  15 V
Rf 20
 
R1 1
 V0  1 3
 15 V
®
TM



IB IE
 
 IC I E I B   
IC 1.98 mA

IB A
®
TM

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SUBJECT CODE : 104010

As per Revised Syllabus of

Dr. Pradeep B. Mane

F.E. (Common to All Branches) Semester - I/II

ã Copyright with Authors

9 789389 180794 SPPU 19

9789389180794 [3] (ii)

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