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Designing Silicon Carbide (SiC) based DC Fast Charging System:

Key Challenges, Design Considerations, and Building Validation

Session 2

Dual Active Bridge (DAB) Design and Control Architecture

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Content
• Past session :
− Session 1 (June 1): Project and 6-Pack Boost Active Front End AC-DC analyze
• Session 2 :
− Dual Active Bridge DC-DC converter
 Component selection, in particular magnetic devices
 Simulation approach
 Simulation results
 Outcomes
− AC-DC and DC-DC Control Architecture overview
• Next to come :
− Session 3 (June 15): Gate drivers, Auxiliary Supply and Thermal Approach
− Session 4 (June 29): Measurement Results

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Design Objectives

A brief Reminder…

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Complete System PFC + DC-DC Converter Specification
Voltage input rating Three-phase 400 Vac (EU), 480 Vac (US)
Max. input current 40 A
AC input Frequency 50/60 Hz
Power factor >0.99
Efficiency >96%
Output voltage 200 V to 1000 V
DC output Max. output power 25 kW
Max. output current 50 A
Output OVP, OCP, SC
Protections Input UVP, OVP, inrush current
Internal Desat (gate driver), thermal (NTC on power device)
Push buttons Yes
User Interface
GUI Yes.
Internal SPI, I2C
Communication buses
External Isolated CAN, USB, UART
Environmental Operating temperature 0°C to 40°C
Max. mechanical
PCB 450 x 300 x 280 mm (PFC and dc-dc stacked)
dimensions
Regulation Following guidelines described in EN55011 Class A Will not be tested
Standards
EV systems Following guidelines described in IEC 61851 Will not be tested

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Components Selection

First Step : Initial Approach

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DC-DC Block Diagram : Components Selection Proposal
V V
+ +
DC in/out
°C
800V
31.5A DC in/out
1x current sense
°C
LEM CKSR50-NP A 1x current sense
LEM CKSR50-NP A 800V (optimized),
200-1000V (supported)

- A A -
Rshunt SiC SiC SiC SiC Rshunt
Aux. PSU Module Module Module Module
SECO- NCS213R Isol. Gate Drv. NCS213R
PWM1-6
HVDCDC1362-
40W15V
Shunt OPAMP ` DESAT
Source
Shunt OPAMP
NCD57000 Sink
NCS20034
OPAMP
Vcc 8x
8x
seco-te0716-gevb -5V/24V

12bit, SAR, ADC SECO-


°C NCD9801x LVDCDC3064-
4x 8x
SIC-GEVB
NCS20034 8x
NCS2032 NCID9211 Ethernet
OPAMP 2x OPAMP Gal. isolator CAN NCV7342

DESAT
9x
PWM1-6
` ` `
5V 5V ETH/
VCC AVCC
ADC SPI PWM GPIO FPGA controller (UCB) ADC PWM
CAN

6 Public Information © onsemi 2022


Bill of Material

Function Part Number


Power Module NXH006P120MNF2 X4
SiC Gate Driver NCD57000 X8
Voltage Amplifier NCS20034
Current Amplifier NCS213R
NCS2032
General Purpose Amplifier
NCS20034
Digital Isolator NCID9211
SAR ADC NCD9801x
Ethernet - CAN NCV7342
SECO-HVDCDC1362-40W15V
Aux HV PSU
with NCP1362
SECO-LVDCDC3064-SIC-GEVB
Aux LV PSU
with NCV3064MNTXG

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Dual Active Bridge Design Considerations

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Transformer Design

• Turn ratio : Given by the Output Voltage


𝑁𝑁𝑃𝑃𝑃𝑃𝑃𝑃𝑃𝑃 𝑉𝑉𝑃𝑃𝑃𝑃𝑃𝑃𝑃𝑃
Resonant Inductor = External Inductor − = (1) noted 𝑁𝑁𝑃𝑃𝑃𝑃𝑃𝑃𝑃𝑃 ∶ 𝑁𝑁𝑆𝑆𝑆𝑆𝑆𝑆
𝑁𝑁𝑆𝑆𝑆𝑆𝑆𝑆 𝑉𝑉𝑆𝑆𝑆𝑆𝑆𝑆
+ Transformer Leakage Inductor
− With VSec = 650V to 800V, VPrim = 800 V
• Resonant Inductor : Given by the
Output Power and the Phase Shift (𝜑𝜑)
𝑉𝑉𝑃𝑃𝑃𝑃𝑃𝑃𝑃𝑃 �𝑉𝑉𝑆𝑆𝑆𝑆𝑆𝑆 �sin 𝜑𝜑
− 𝐿𝐿𝑅𝑅𝑅𝑅𝑅𝑅 = (2)
2𝜋𝜋�𝑓𝑓𝑆𝑆𝑆𝑆𝑆𝑆 �𝑃𝑃𝑂𝑂𝑂𝑂𝑂𝑂

• Magnetizing Inductor :
2 𝜇𝜇0 �𝜇𝜇𝑟𝑟
− 𝐿𝐿𝑀𝑀𝑀𝑀𝑀𝑀 = 𝑁𝑁𝑃𝑃𝑃𝑃𝑃𝑃𝑃𝑃 � 𝐴𝐴𝐿𝐿 with 𝐴𝐴𝐿𝐿 = � 𝐴𝐴𝑒𝑒
𝑙𝑙𝑒𝑒 +𝜇𝜇𝑟𝑟 �𝑒𝑒

− It doesn’t depend on input or output…

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Resonant Inductor Selection

• We have the following operating points :


Point or Case Input Voltage Output Voltage Output Current Output Power
1 1000 V 25 A 25 kW
2 800 V 500 V 50 A 25 kW
3 200 V 50 A 10 kW

• Choosing 𝐿𝐿𝑅𝑅𝑅𝑅𝑅𝑅 = 22 𝜇𝜇𝜇𝜇 and using equation (2) we get :

Calculated
Point or Case
So, the maximum resonant inductor value Output Power

should to 22 µH to comply with the specification 1 57.9 kW


2 28.9 kW
3 12.6 kW

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Magnetizing Inductance Discussion

• Here, the magnetizing current or inductor does not participate to the energy
transfer. Magnetizing current can be seen as a parasitic element to minimize.
• To minimize magnetizing current, as the voltage applied to the inductor is given by
the input voltage, the magnetizing inductor should be the higher possible.
• For a fix size of core (𝐴𝐴𝑒𝑒 ; 𝑙𝑙𝑒𝑒 ), the solution is to increase the primary turn number.

• BUT, increasing primary turn number, increases the winding resistance or require
to use big wire cross section.

• Choosing a magnetizing current around or maximum 10% of the input current is a


good practice.

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Transformer Core Saturation Elimination with Active Flux Balancing
Or (Volt x Time) balancing due to mismatches or tolerances

• Passive approach :
• A low peak flux density
and large core gap transformer
 Transformer efficiency drops

• Blocking capacitors in series


 Bulky and expensive
 High RMS current in capacitors

• Active approach using the DSP :


• Two control loops :
1. The first loop is to maintain the
average magnetizing current at
approximately zero level

2. The second loop is to keep the


average primary and secondary
currents close to zero

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Simulation Approach

Why and What ?

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Goals and Purpose

• Check Dual Active Bridge stage functionality before designing hardware


• Verify DC output voltages, currents and power at all operating points.
• Efficiency with the defined switching frequency (100 kHz)
• Estimation of power losses
• Gate drive requirements and gate resistors value
• Validate Resonant Inductor requirements/parameters (Current & Voltage)
• Transformer parameters selection
− Turn ratio optimization,
− Select reasonable Magnetizing Inductor,
− Obtain transformer parameters (Voltages & Currents)
− Determine Isolation requirements (Maximum Peak voltages Primary and Secondary)
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Input Values, Models Chosen and Parameters

• Input Voltage : 800 V (output of the Active FrontEnd)


• Output Voltage : 200 V to 1 kV
• Transformer turn ration : 1.0:1 , 1.2:1 , 1.4:1 with Magnetizing inductor = 720 µH
• Transformer Magnetizing Inductor impact : 150 µH, 300 µH and 720 µH
• Check Resonant Inductor effects with 22 µH and 18 µH
• Gate source and sink resistors (First pass 2 Ω)
• Driver model for NCD57001 using table for output impedance
• Flux Balancing control with Current Sensing and Sample and Hold included
• Verify Phase Shift control

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Expected Simulation Outputs

• Turn on and turn off speed (dv/dt)


• Select Transformer Turn ratio, Magnetizing Inductor and Resonant Inductor
• Check inductor and transformer current peak and shape, estimate losses
• Validate Flux Balancing operation
• Check input and output capacitors peak to peak current and shape,
estimate losses
• Evaluate switching behaviors and power needed to drive SiC modules
• Losses in SiC modules for thermal assembly validation
• Check overall Dual Active Bridge losses and performances

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Dual Active Bridge Simulation Results

Second Step : Verification

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Turn Ratio Impact on Magnetizing and Resonant Inductors
• Magnetizing Current • Resonant Inductor Voltage
Dual Active Bridge: Magnetizing peak current Dual Active Bridge: Inductor peak voltage
1.2:1, Lm 720µH, Ls 22µH, (P»S) 1.4:1, Lm 720µH, Ls 22µH, (P»S) 1.0:1, Lm 720µH, Ls 18µH, (P»S) 1.2:1, Lm 720µH, Ls 22µH, (P»S) 1.4:1, Lm 720µH, Ls 22µH, (P»S) 1.0:1, Lm 720µH, Ls 18µH, (P»S)
6 1000

900
5

800
4
Peak current [A]

Peak voltage [V]


700

600

2
500

1
400

0 300
200 300 400 500 600 700 800 900 1000 200 300 400 500 600 700 800 900 1000
Secondary side voltage [V] Secondary side voltage [V]
POUT = 25 kW (USEC ≥ 500 V), IOUT = 50 A (USEC < 500 V) Stefan Kosterec, 19. Jan 2021 POUT = 25 kW (USEC ≥ 500 V), IOUT = 50 A (USEC < 500 V) Stefan Kosterec, 19. Jan 2021

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Transformer Ratio Impact on Performances
• Total Losses • Overall Efficiency
Dual Active Bridge: Overall power loss Dual Active Bridge: Efficiency
1.2:1, Lm 720µH, Ls 22µH, (P»S) 1.4:1, Lm 720µH, Ls 22µH, (P»S) 1.0:1, Lm 720µH, Ls 18µH, (P»S) 1.2:1, Lm 720µH, Ls 22µH, (P»S) 1.4:1, Lm 720µH, Ls 22µH, (P»S) 1.0:1, Lm 720µH, Ls 18µH, (P»S)
900
100.0

800
99.5

700

99.0
600
Power loss [W]

Efficiency [%]
500 98.5

400
98.0

300
97.5

200

97.0
100

0 96.5
200 300 400 500 600 700 800 900 1000 200 300 400 500 600 700 800 900 1000

Secondary side voltage [V] Secondary side voltage [V]


POUT = 25 kW (USEC ≥ 500 V), IOUT = 50 A (USEC < 500 V) POUT = 25 kW (USEC ≥ 500 V), IOUT = 50 A (USEC < 500 V)
Core losses of resonant inductor and transformer are not included Stefan Kosterec, 19. Jan 2021 Core losses of resonant inductor and transformer are not included Stefan Kosterec, 19. Jan 2021

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Magnetizing Inductance value effects
• Total Losses • Overall efficiency
Dual Active Bridge: Overall power loss Dual Active Bridge: Efficiency
1.2:1, Lm 720µH, Ls 22µH, (P»S) 1.2:1, Lm 150µH, Ls 22µH, (P»S) 1.2:1, Lm 300µH, Ls 22µH, (P»S) 1.2:1, Lm 720µH, Ls 22µH, (P»S) 1.2:1, Lm 150µH, Ls 22µH, (P»S) 1.2:1, Lm 300µH, Ls 22µH, (P»S)
900
100.0

800
99.5

700

99.0
600
Power loss [W]

Efficiency [%]
500 98.5

400
98.0

300
97.5

200

97.0
100

0 96.5
200 300 400 500 600 700 800 900 1000 200 300 400 500 600 700 800 900 1000

POUT = 25 kW (USEC ≥ 500 V), IOUT = 50 A (USEC < 500 V) Secondary side voltage [V] POUT = 25 kW (USEC ≥ 500 V), IOUT = 50 A (USEC < 500 V) Secondary side voltage [V]
Core losses of resonant inductor and transformer are not included Stefan Kosterec, 19. Jan 2021 Core losses of resonant inductor and transformer are not included Stefan Kosterec, 19. Jan 2021

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Magnetizing Inductance Selection
• Magnetizing Current
• Parameters Selection
Dual Active Bridge: Magnetizing peak current
1.2:1, Lm 720µH, Ls 22µH, (P»S) 1.2:1, Lm 150µH, Ls 22µH, (P»S) 1.2:1, Lm 300µH, Ls 22µH, (P»S) • For the turn ratio :
− 1.2:1 because it gives almost flat losses
20

18
for output voltage from 200 V to 900 V
16 And lower losses in the output voltage
14 range form 200 V to 600 V than 1.0:1
• Magnetizing Inductor :
Peak current [A]

12

10
− 150 µH to 300 µH
8
for smaller transformer size
6

4
• Resonant Inductor :
2
− Maximum 22 µH is validated
0
200 300 400 500 600 700 800 900 1000
Secondary side voltage [V]
POUT = 25 kW (USEC ≥ 500 V), IOUT = 50 A (USEC < 500 V) Stefan Kosterec, 19. Jan 2021

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Simulation Outcomes

What Can We Extract ?

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Simulations’ Outcomes and Adjustments

• Functionality : DAB works as expected. Flux Balancing prevents saturation


• Resonant Inductor selection : 18 µH Nominal 22 µH Maximum, with ESR < 12 mΩ
− Current 51 Arms / Max 85A Peak : Inductor saturation level is acceptable (<30%).
• Losses/Efficiency : Max 140W @ VOut=800V and above 97.5% for all VOut
• Turn-on / Turn-off : dV/dt is very high (up to 60 V/ns) …
− Increase Source and Sink gate resistance to get closer to 20 V/ns.
• Operating conditions :
− Maximum Maximum
Parameter ESR
Winding Voltage RMS Current
Primary < 18 mΩ 1000 V 51 Arms
Secondary < 8 mΩ 1000 V 62.5 Arms
− Total losses and Efficiency are inline with design objectives.

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Control High Level Architecture

For Active Front End and Dual Active Bridge

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PFC Control Overview
Filter Dead-Time
Compensation Correction

Power Control
Pulse Width
Modulation

Phase Locked
Loop

DQ to ABC
Transformation
with 3rd
Harmonic
Injection

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Phase Locked Loop

• Transform the rotating grid voltages and currents to corresponding steady values.
• Achieved by creating a rotating reference frame synchronized to the grid voltage.

• Allows the grid current to be split into


iD (active) and iQ (reactive) components.

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Power Control

• Control the active current flow (iD) to


reach the desired dc-link voltage.
• Control the output voltage of the
inverter to achieve the active current
flow desired by the dc-link voltage
control and the reactive current desired
by the reference.

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Cross Compensation

• The ac-line filter of the PFC topology


introduces a phase-shift between grid
and inverter output voltage.
• This phase-shift is accounted for by the
cross compensation.

To be clarify
with Daniel

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Dead-Time Correction

• A dead-time between on state of the


upper and lower switch of each half-
bridge comprising the inverter is
required to prevent shoot through.
• This dead-time changes the output of
the half-bridge depending on the
current.
• A correction term for each half-bridge
depending on its current is calculated
and the PWM output is adjusted
accordingly.

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DQ to ABC Transformation

• The steady dq values are transformed


back into rotating voltages to be output
by the inverter.
• Injection of a 3rd harmonic component
to the output voltage increases the
modulation factor.

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Pulse Width Modulation

• The ratio of inverter output voltage and


dc-link voltage is used to calculate the
duty cycle of the PWM module.
• This duty cycle is corrected by the
value computed during the dead-time
compensation.

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DAB Control Overview
Current
Control
With Soft-
Pulse Width
Start
Modulation

Current / Power
Limit

Voltage Flux
Control Compensatio
n

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Current / Power Limit

• Limit the output of the voltage


controller by either the current
reference or voltage reference.
• The smaller of the two is chosen.
• This results in
typical CC/CV
charging
characteristics Start CC CV

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Voltage Control

• Increase Current until either limit or


desired output voltage is reached.
• Identical to dc-link voltage control
of the Active FrontEnd (or PFC).

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Current Control with Soft-Start

• Control the phase-shift between No Soft-Start


primary and secondary side H-bridge
to achieve desired power flow.
• Soft-start prevents large resonant
currents during start-up by gradually
increasing the phase-shift With Soft-Start

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Pulse Width Modulation

• Create two carrier waves with a phase-


shift between them.
• Generate phase-shifted rectangular
voltages at the H-bridge outputs based
on the carrier waves

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Flux Compensation
No Flux Comp
• Inaccuracies in modulation, parasitic
influences, and operating point
changes lead to dc-currents on primary
and secondary side of transformer.
• The flux compensation reduces these
currents by slightly shifting the duty-
cycles of each H-bridge individually. With Flux Comp

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Conclusion

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Conclusion

• During this session, we have seen :


− We have analyzed the second part of the power stage : the Dual Active Bridge (DAB),
− Critical components’ (transformer and resonant inductor) effects were analyzed,
− Components selection was explained,
− Power stage simulation was shown,
− Control architecture for both stages were described.

• Next to come :
− Session 3 (June 15): Gate drivers, Auxiliary Supply and Thermal Approach
− Session 4 (June 29): Measurement Results

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