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A B C D E

LCFC Confidential
1 1

NM_C511 M/B Schematics Document

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AMD FP5 PICASSO SOC with DDRIV

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2 2

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2019-05-28

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REV:1.0

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3 3
FC
LC

4 4

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/15 Deciphered Date 2013/08/15 Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date: Tuesday, May 28, 2019 Sheet 1 of 44
A B C D E
A B C D E

Memory BUS (DDR4)


Channel A DDR4-SO-DIMM X1
1.2V DDR4 2400MT/s
PCI-Express UP TO 16G x 1 Page 14
NGFF SSD1
1
PEIe GFX[3:0]
4x Gen3 Memory BUS (DDR4) 1

Page 30
Channel B DDR4 DRAM DOWN
1.2V DDR4 2400MT/s 4pcs x16 Page 15

HDMI x4 Lane Port1 USB Left


HDMI Conn. USB 3.0 1x
Page 19 USB 2.0 1x USB 2.0 Port3
USB 3.0 Port3
Page 20

AMD FP5 APU


eDP Conn USB Left

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eDP x2 Lane port0
Picasso USB 3.0 1x

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Int. Camera USB 2.0 1x USB 2.0 Port2
USB 2.0 Port0 USB 3.0 Port2
UMA Page 20

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Int. DMIC Conn.

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2 2

Page 17

BGA-1140P
SATA HDD SATA Gen3 USB 2.0 1x
SATA Port0 35mm*25mm USB2.0 Conn
USB 2.0 Port1

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Page 30
Page 21

NGFF Card
WLAN&BT PCIe 1x
Key E USB2.0 1x
PCIe Port0

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USB 2.0 Port Page 27 I2C BUS Touch Pad
Page 32

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Touch Screen USB HUB (Reserved)
(Reserved) GL850G-OHY50
USB 2.0 1x SPI BUS SPI ROM
Page 17 Page 16 W25Q64FWSSIQ
C 8MB Page 08

3 3
SD/MMC Conn.
Codec & C/R TPM (Reserved)
F
ST33HTPH2E32AHB4
Page 29
SPK Conn.
Realtek RTS5119
LC

USB2.0 x1
HP&Mic Combo Conn. HD Audio
USB2.0 Port0

IO Board
EC SMBUS
Battery
IT8586E-FX_LQFP128 Page 38
Page 31
SMBUS

Charger
Page 39
Thermistor Hall sensor
4 Int.KBD AH9247 4

Page 32 Page 26 Page 32


Thermal Sensor
NCT7718W
Page 26 reserve
Security Classification LC Future Center Secret Data Title
Issued Date 2013/08/15 Deciphered Date 2013/08/15 Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
S145 API 1.0

Date: Tuesday, May 28, 2019 Sheet 2 of 44


A B C D E
A B C D E

Voltage Rails ( O --> Means ON , X --> Means OFF )


SIGNAL
+5VS STATE SLP_S3# SLP_S5# +VALW +V +VS Clock
+3VS
S0 (Full ON) HIGH HIGH ON ON ON ON
+1.8VS
power +0.9VS S1 (Power On Suspend) HIGH HIGH ON ON ON LOW
plane B+
1 (+20VSB) +5VALW +1.2V +0.6VS 1
S3 (Suspend to RAM) LOW HIGH ON ON OFF OFF
+3VL +3VALW +2.5VS
(+3VALW_APU)
+5VLP +VDDC_VDD S4 (Suspend to Disk) LOW LOW ON OFF OFF OFF
+1.8VALW
+VDDCR_SOC
+0.9VALW S5 (Soft OFF) LOW LOW ON OFF OFF OFF
+VDDC
BOM Structure Table
+VDDCI
State BOM Structure BTO Item
+3VGS
Port List @ Not stuff
+1.8VGS
ME@ Connector
+1.35VGS HSIO Port Device
EMC@ EMC Part
0 WLAN
EMC_NS@ EMC reserve Part
1 LAN
RF@ RF Part
I2C Control Table 2 N/A
TPM@
S0 O O O O GPP 3 N/A
TPM part
HDT@ HDT Debug part
SOURCE Device
4 N/A
REDRV@ Redriver part

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S3
O O O X 5 N/A

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2
6 HDD 2

TP_I2C0_SCL APU Touch Pad 7 ODD


S5 S4/AC O O X X TP_I2C0_SDA +3VALW +3VS 0

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1 SSD
S5 S4/ Battery only
O X X X 2

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APU I2C address 3
GFX
Device Address 4
S5 S4/AC & Battery
don't exist X X X X Elan:SA469D-22HA 69x104x1.0 ? 5
Synaptics:TM-P3255-008 69x104x1.0 ? 6

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7
SMBUS Control Table 0 N/A
1 Type C
SOURCE GPU BATT IT8586 SODIMM WLAN Thermal APU Charger PMIC
USB3.0 2 LEFT USB (3.0) lower
3 LEFT USB (3.0) upper

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Sensor
4 N/A
3 3
EC_SMB_CK1 0 Camera

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EC_SMB_DA1
IT8586
+3VL X V X X X X V X 1 Type C
USB2.0
2 LEFT USB (3.0) lower
EC_SMB_CK2 3 LEFT USB (3.0) upper
EC_SMB_DA2
IT8586
+3VL X X X X V X X V 4 Touch
+3VS
5 BT
EC_SMB_CK3
C
EC_SMB_DA3
IT8586
+3VS V X X X X V X X
+3VS_VGA
F
APU_SCLK0
APU_SDATA0
APU
+3VS X X X V V X X X
LC

EC SM Bus1 address EC SM Bus2 address EC SM Bus3 address


Device Address Device Address Device Address
4 4
Battery ? PMIC 0X34 GPU 0x41(default)
Charger 0001 0010 b Thermal Sensor 1001_100xb(reserve) APU SB-TSI releate to F3x1E4[SbiAddr] or
Address Select Pins setting

APU SM Bus address Security Classification LC Future Center Secret Data Title

Device Address
Issued Date 2013/08/15 Deciphered Date 2013/08/15 Notes List
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
DDR4 SO-DIMM ? AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
WLAN RSVD
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date: Tuesday, May 28, 2019 Sheet 3 of 44
A B C D E
5 4 3 2 1

UC2B
PCIE

PCIE_CRX_DTX_P0 P8 N1 PCIE_CTX_DRX_P0 0.22U_0201_6.3V6-K 1 2 CC5 PCIE_CTX_C_DRX_P0


22 PCIE_CRX_DTX_P0 PCIE_CRX_DTX_N0 P_GFX_RXP0 P_GFX_TXP0 PCIE_CTX_DRX_N0 0.22U_0201_6.3V6-K 1 PCIE_CTX_C_DRX_N0 PCIE_CTX_C_DRX_P0 22
P9 N3 2 CC6
22 PCIE_CRX_DTX_N0 P_GFX_RXN0 P_GFX_TXN0 PCIE_CTX_C_DRX_N0 22
D PCIE_CRX_DTX_P1 PCIE_CTX_DRX_P1 0.22U_0201_6.3V6-K 1 PCIE_CTX_C_DRX_P1 D
N6 M2 2 CC7
22 PCIE_CRX_DTX_P1 PCIE_CRX_DTX_N1 P_GFX_RXP1 P_GFX_TXP1 PCIE_CTX_DRX_N1 0.22U_0201_6.3V6-K 1 PCIE_CTX_C_DRX_N1 PCIE_CTX_C_DRX_P1 22
N7 M4 2 CC8
M.2 SSD1 22 PCIE_CRX_DTX_N1 P_GFX_RXN1 P_GFX_TXN1 PCIE_CTX_C_DRX_N1 22
M.2 SSD1
PCIE_CRX_DTX_P2 M8 L2 PCIE_CTX_DRX_P2 0.22U_0201_6.3V6-K 1 2 CC9 PCIE_CTX_C_DRX_P2
22 PCIE_CRX_DTX_P2 PCIE_CRX_DTX_N2 P_GFX_RXP2 P_GFX_TXP2 PCIE_CTX_DRX_N2 0.22U_0201_6.3V6-K 1 PCIE_CTX_C_DRX_N2 PCIE_CTX_C_DRX_P2 22
M9 L4 2 CC10
22 PCIE_CRX_DTX_N2 P_GFX_RXN2 P_GFX_TXN2 PCIE_CTX_C_DRX_N2 22
PCIE_CRX_DTX_P3 L6 L1 PCIE_CTX_DRX_P3 0.22U_0201_6.3V6-K 1 2 CC11 PCIE_CTX_C_DRX_P3
22 PCIE_CRX_DTX_P3 PCIE_CRX_DTX_N3 P_GFX_RXP3 P_GFX_TXP3 PCIE_CTX_DRX_N3 0.22U_0201_6.3V6-K 1 PCIE_CTX_C_DRX_N3 PCIE_CTX_C_DRX_P3 22
L7 L3 2 CC12
22 PCIE_CRX_DTX_N3 P_GFX_RXN3 P_GFX_TXN3 PCIE_CTX_C_DRX_N3 22
K11 K2
J11 P_GFX_RXP4 P_GFX_TXP4 K4
P_GFX_RXN4 P_GFX_TXN4
H6 J2
H7 P_GFX_RXP5 P_GFX_TXP5 J4
P_GFX_RXN5 P_GFX_TXN5
G6 H1
F7 P_GFX_RXP6 P_GFX_TXP6 H3
P_GFX_RXN6 P_GFX_TXN6
G8 H2
C F8 P_GFX_RXP7 P_GFX_TXP7 H4 C
P_GFX_RXN7 P_GFX_TXN7

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PCIE_PRX_DTX_P0 N10 N2 PCIE_PTX_DRX_P0 0.1U_0201_6.3V6-K 1 2 PCIE_PTX_C_DRX_P0
WLAN 27 PCIE_PRX_DTX_P0 PCIE_PRX_DTX_N0 N9 P_GPP_RXP0 P_GPP_TXP0 P3 PCIE_PTX_DRX_N0 0.1U_0201_6.3V6-K 1 2
CC1
CC2 PCIE_PTX_C_DRX_N0 PCIE_PTX_C_DRX_P0 27 WLAN
27 PCIE_PRX_DTX_N0 P_GPP_RXN0 P_GPP_TXN0 PCIE_PTX_C_DRX_N0 27
L10 P4
L9 P_GPP_RXP1 P_GPP_TXP1 P2

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P_GPP_RXN1 P_GPP_TXN1
L12 R3

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M11 P_GPP_RXP2 P_GPP_TXP2 R1
P_GPP_RXN2 P_GPP_TXN2
P12 T4
P11 P_GPP_RXP3 P_GPP_TXP3 T2
P_GPP_RXN3 P_GPP_TXN3

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V6 W2
V7 P_GPP_RXP4 P_GPP_TXP4 W4
B P_GPP_RXN4 P_GPP_TXN4 B
T8 W3
T9 P_GPP_RXP5 P_GPP_TXP5 V2
P_GPP_RXN5 P_GPP_TXN5

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SATA_PRX_DTX_P0 R6 V1 SATA_PTX_DRX_P0
30 SATA_PRX_DTX_P0 SATA_PRX_DTX_N0 P_GPP_RXP6/SATA_RXP0 P_GPP_TXP6/SATA_TXP0 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0 30
R7 V3
HDD 30 SATA_PRX_DTX_N0 P_GPP_RXN6/SATA_RXN0 P_GPP_TXN6/SATA_TXN0 SATA_PTX_DRX_N0 30 HDD
R9 U2

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R10 P_GPP_RXP7/SATA_RXP1 P_GPP_TXP7/SATA_TXP1 U4
P_GPP_RXN7/SATA_RXN1 P_GPP_TXN7/SATA_TXN1

FP5 REV 0.90


PART 2 OF 13
@ C AMD-RAVEN-FP5_BGA1140

A A
F
Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/15 Deciphered Date 2013/08/15 FP5 (PCIE SATA I/F)
LC

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
S145 API 1.0

Date: Tuesday, May 28, 2019 Sheet 4 of 44


5 4 3 2 1
5 4 3 2 1

DDRB_DQS[0..7]
15 DDRB_DQS[0..7]
DDRB_DQS#[0..7]
DDRA_DQS[0..7] 15 DDRB_DQS#[0..7]
14 DDRA_DQS[0..7]
DDRA_DQS#[0..7]
14 DDRA_DQS#[0..7]
UC2I DQ bit swapping is allowed in a byte lane.
MEMORY B

15 DDRB_MA[13..0] DDRB_MA0 AG30


DDRB_MA1 MB_ADD0/MBB_CS0 DDRB_DQ0 DDRB_DQ[63..0] 15
AC32 B21
UC2A DDRB_MA2 AC30 MB_ADD1/RSVD MB_DATA0/MBA_DATA8 D21 DDRB_DQ1
MEMORY A DDRB_MA3 AB29 MB_ADD2/RSVD MB_DATA1/MBA_DATA9 B23 DDRB_DQ2
DDRB_MA4 AB31 MB_ADD3/RSVD MB_DATA2/MBA_DATA13 D23 DDRB_DQ3
14 DDRA_MA[13..0] DDRA_MA0 DDRB_MA5 MB_ADD4/RSVD MB_DATA3/MBA_DATA12 DDRB_DQ4
AF25 AA30 A20
D
DDRA_MA1 AE23 MA_ADD0/MAB_CS0
MA_ADD1/RSVD MA_DATA0/MAA_DATA8
J21 DDRA_DQ0 DDRA_DQ[63..0] 14 DDRB_MA6 AA29 MB_ADD5/RSVD
MB_ADD6/RSVD
MB_DATA4/MBA_DATA11
MB_DATA5/MBA_DATA10
C20 DDRB_DQ5 APU SO-DIMM DRAM D

DDRA_MA2 AD27 H21 DDRA_DQ1 DDRB_MA7 Y30 A22 DDRB_DQ6 DA0 DQ2 UD1.0
DDRA_MA3 AE21 MA_ADD2/RSVD MA_DATA1/MAA_DATA9 F23 DDRA_DQ2 DDRB_MA8 AA31 MB_ADD7/MBA_CA3 MB_DATA6/MBA_DATA15 C22 DDRB_DQ7
DDRA_MA4 AC24 MA_ADD3/RSVD MA_DATA2/MAA_DATA13 H23 DDRA_DQ3 DDRB_MA9 W29 MB_ADD8/MBA_CA4 MB_DATA7/MBA_DATA14
MA_ADD4/RSVD MA_DATA3/MAA_DATA12 MB_ADD9/MBA_CKE1
DA1 DQ7 UD1.3
DDRA_MA5 AC26 G20 DDRA_DQ4 DDRB_MA10 AH29 D24 DDRB_DQ8
DDRA_MA6 AD21 MA_ADD5/RSVD MA_DATA4/MAA_DATA11 F20 DDRA_DQ5 DDRB_MA11 Y32 MB_ADD10/MBB_CKE0 MB_DATA8/MBA_DATA0 A25 DDRB_DQ9 DA2 DQ6 UD1.4
DDRA_MA7 AC27 MA_ADD6/RSVD
MA_ADD7/MAA_CA3
MA_DATA5/MAA_DATA10
MA_DATA6/MAA_DATA15
J22 DDRA_DQ6 APU SO-DIMM DRAM DDRB_MA12 W31 MB_ADD11/MBA_CA5
MB_ADD12/MBA_CA2
MB_DATA9/MBA_DATA1
MB_DATA10/MBA_DATA5
D27 DDRB_DQ10
DDRA_MA8 AD22 J23 DDRA_DQ7 DA32 DQ39 UD3.1 DDRB_MA13 AL30 C27 DDRB_DQ11 DA3 DQ0 UD1.5
DDRA_MA9 AC21 MA_ADD8/MAA_CA4 MA_DATA7/MAA_DATA14 DDRB_MA14_WE# AK30 MB_ADD13_BANK2/RSVD MB_DATA11/MBA_DATA4 C23 DDRB_DQ12
DDRA_MA10 MA_ADD9/MAA_CKE1 DDRA_DQ8 15 DDRB_MA14_WE# DDRB_MA15_CAS# MB_WE_L_ADD14/MBB_CA2 MB_DATA12/MBA_DATA7 DDRB_DQ13
AF22 G25 DA33 DQ36 UD3.6 AK32 B24 DA4 DQ1 UD1.2
DDRA_MA11 MA_ADD10/MAB_CKE0 MA_DATA8/MAA_DATA0 DDRA_DQ9 15 DDRB_MA15_CAS# DDRB_MA16_RAS# MB_CAS_L_ADD15/MBB_CA4 MB_DATA13/MBA_DATA6 DDRB_DQ14
AA24 F26 AJ30 C26
DDRA_MA12 MA_ADD11/MAA_CA5 MA_DATA9/MAA_DATA1 DDRA_DQ10 15 DDRB_MA16_RAS# MB_RAS_L_ADD16/MBB_CA3 MB_DATA14/MBA_DATA2 DDRB_DQ15
AC23 L24 DA34 DQ35 UD3.2 B27 DA5 DQ5 UD1.7
DDRA_MA13 AJ25 MA_ADD12/MAA_CA2 MA_DATA10/MAA_DATA5 L26 DDRA_DQ11 MB_DATA15/MBA_DATA3
DDRA_MA14_WE# AG27 MA_ADD13_BANK2/RSVD MA_DATA11/MAA_DATA4 L23 DDRA_DQ12 DDRB_BA0 AH31 C30 DDRB_DQ16
14 DDRA_MA14_WE# MA_WE_L_ADD14/MAB_CA2 MA_DATA12/MAA_DATA7
DA35 DQ34 UD3.7 15 DDRB_BA0 MB_BANK0/MBB_CS1 MB_DATA16/MBA_DATA19
DA6 DQ4 UD1.1
DDRA_MA15_CAS# AG23 F25 DDRA_DQ13 DDRB_BA1 AG32 E29 DDRB_DQ17
14 DDRA_MA15_CAS# DDRA_MA16_RAS# MA_CAS_L_ADD15/MAB_CA4 MA_DATA13/MAA_DATA6 DDRA_DQ14 15 DDRB_BA1 MB_BANK1/MBB_CA0 MB_DATA17/MBA_DATA18 DDRB_DQ18
AG26 K25 DA36 DQ37 UD3.5 H29 DA7 DQ3 UD1.6
14 DDRA_MA16_RAS# MA_RAS_L_ADD16/MAB_CA3 MA_DATA14/MAA_DATA2 DDRA_DQ15 DDRB_BG0 MB_DATA18/MBA_DATA22 DDRB_DQ19
K27 V31 H31
MA_DATA15/MAA_DATA3 15 DDRB_BG0 DDRB_BG1 MB_BG0/MBA_CS1 MB_DATA19/MBA_DATA23 DDRB_DQ20
DA37 DQ32 UD3.3 V29 A28 DA8 DQ12 UD1.11
DDRA_BA0 DDRA_DQ16 15 DDRB_BG1 MB_BG1/MBA_CKE0 MB_DATA20/MBA_DATA20 DDRB_DQ21
AF21 M25 D28
14 DDRA_BA0 DDRA_BA1 MA_BANK0/MAB_CS1 MA_DATA16/MAA_DATA17 DDRA_DQ17 DDRB_ACT# MB_DATA21/MBA_DATA21 DDRB_DQ22
AF27 M27 DA38 DQ38 UD3.4 V30 F31 DA9 DQ13 UD1.9
14 DDRA_BA1 MA_BANK1/MAB_CA0 MA_DATA17/MAA_DATA16 DDRA_DQ18 15 DDRB_ACT# MB_ACT_L/MBA_CS0 MB_DATA22/MBA_DATA17 DDRB_DQ23
P27 G30
DDRA_BG0 MA_DATA18/MAA_DATA23 DDRA_DQ19 15 DDRB_DM[7..0] DDRB_DM0 MB_DATA23/MBA_DATA16
AA21 R24 DA39 DQ33 UD3.0 C21 DA10 DQ11 UD1.12
14 DDRA_BG0 DDRA_BG1 MA_BG0/MAA_CS1 MA_DATA19/MAA_DATA20 DDRA_DQ20 DDRB_DM1 MB_DM0/MBA_DM1 DDRB_DQ24
AA27 L27 C25 J29
14 DDRA_BG1 MA_BG1/MAA_CKE0 MA_DATA20/MAA_DATA19 DDRA_DQ21 DDRB_DM2 MB_DM1/MBA_DM0 MB_DATA24/MBA_DATA30 DDRB_DQ25
M24 DA40 DQ45 UD3.15 E32 J31 DA11 DQ10 UD1.14
DDRA_ACT# AA22 MA_DATA21/MAA_DATA18 P24 DDRA_DQ22 DDRB_DM3 K30 MB_DM2/MBA_DM2 MB_DATA25/MBA_DATA31 L29 DDRB_DQ26
14 DDRA_ACT# MA_ACT_L/MAA_CS0 MA_DATA22/MAA_DATA21 DDRA_DQ23 DDRB_DM4 MB_DM3/MBA_DM3 MB_DATA26/MBA_DATA26 DDRB_DQ27
P25 DA41 DQ44 UD3.9 AP30 L31 DA12 DQ9 UD1.13
14 DDRA_DM[7..0] DDRA_DM0 MA_DATA23/MAA_DATA22 DDRB_DM5 MB_DM4/MBB_DM2 MB_DATA27/MBA_DATA27 DDRB_DQ28
F21 AW31 H30
DDRA_DM1 G27 MA_DM0/MAA_DM1 M22 DDRA_DQ24 DDRB_DM6 BB26 MB_DM5/MBB_DM3 MB_DATA28/MBA_DATA28 H32 DDRB_DQ29
MA_DM1/MAA_DM0 MA_DATA24/MAA_DATA30
DA42 DQ47 UD3.14 MB_DM6/MBB_DM1 MB_DATA29/MBA_DATA29
DA13 DQ8 UD1.15
DDRA_DM2 N24 N21 DDRA_DQ25 DDRB_DM7 BD22 L30 DDRB_DQ30
DDRA_DM3 N23 MA_DM2/MAA_DM2 MA_DATA25/MAA_DATA31 T22 DDRA_DQ26 N32 MB_DM7/MBB_DM0 MB_DATA30/MBA_DATA25 L32 DDRB_DQ31
MA_DM3/MAA_DM3 MA_DATA26/MAA_DATA26 DA43 DQ46 UD3.8 RSVD_21 MB_DATA31/MBA_DATA24 DA14 DQ15 UD1.8
DDRA_DM4 AL24 V21 DDRA_DQ27
DDRA_DM5 AN27 MA_DM4/MAB_DM2 MA_DATA27/MAA_DATA27 L21 DDRA_DQ28 DDRB_DQS0 D22 AP29 DDRB_DQ32
MA_DM5/MAB_DM3 MA_DATA28/MAA_DATA28
DA44 DQ40 UD3.13 MB_DQS_H0/MBA_DQS_H1 MB_DATA32/MBB_DATA16
DA15 DQ14 UD1.10
DDRA_DM6 AW25 M20 DDRA_DQ29 DDRB_DQS#0 B22 AP32 DDRB_DQ33

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DDRA_DM7 AT21 MA_DM6/MAB_DM1 MA_DATA29/MAA_DATA29 R23 DDRA_DQ30 DDRB_DQS1 D25 MB_DQS_L0/MBA_DQS_L1 MB_DATA33/MBB_DATA17 AT29 DDRB_DQ34
C MA_DM7/MAB_DM0 MA_DATA30/MAA_DATA24
DA45 DQ41 UD3.11 MB_DQS_H1/MBA_DQS_H0 MB_DATA34/MBB_DATA21
DA16 DQ20 UD2.7 C
T27 T21 DDRA_DQ31 DDRB_DQS#1 B25 AU32 DDRB_DQ35

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RSVD_36 MA_DATA31/MAA_DATA25 DDRB_DQS2 F29 MB_DQS_L1/MBA_DQS_L0 MB_DATA35/MBB_DATA20 AN30 DDRB_DQ36
DA46 DQ43 UD3.12 MB_DQS_H2/MBA_DQS_H2 MB_DATA36/MBB_DATA19
DA17 DQ16 UD2.3
DDRA_DQS0 F22 AL27 DDRA_DQ32 DDRB_DQS#2 F30 AP31 DDRB_DQ37
DDRA_DQS#0 G22 MA_DQS_H0/MAA_DQS_H1 MA_DATA32/MAB_DATA16 AL25 DDRA_DQ33 DDRB_DQS3 K31 MB_DQS_L2/MBA_DQS_L2 MB_DATA37/MBB_DATA18 AR30 DDRB_DQ38
MA_DQS_L0/MAA_DQS_L1 MA_DATA33/MAB_DATA17
DA47 DQ42 UD3.10 MB_DQS_H3/MBA_DQS_H3 MB_DATA38/MBB_DATA23
DA18 DQ19 UD2.4
DDRA_DQS1 H27 AP26 DDRA_DQ34 DDRB_DQS#3 K29 AT31 DDRB_DQ39
DDRA_DQS#1 H26 MA_DQS_H1/MAA_DQS_H0 MA_DATA34/MAB_DATA22 AR27 DDRA_DQ35 DDRB_DQS4 AR29 MB_DQS_L3/MBA_DQS_L3 MB_DATA39/MBB_DATA22
MA_DQS_L1/MAA_DQS_L0 MA_DATA35/MAB_DATA20 DA48 DQ55 UD4.0 MB_DQS_H4/MBB_DQS_H2 DA19 DQ18 UD2.1
DDRA_DQS2 N27 AK26 DDRA_DQ36 DDRB_DQS#4 AR31 AU29 DDRB_DQ40
DDRA_DQS#2 N26 MA_DQS_H2/MAA_DQS_H2 MA_DATA36/MAB_DATA19 AK24 DDRA_DQ37 DDRB_DQS5 AW30 MB_DQS_L4/MBB_DQS_L2 MB_DATA40/MBB_DATA24 AV30 DDRB_DQ41
MA_DQS_L2/MAA_DQS_L2 MA_DATA37/MAB_DATA18
DA49 DQ49 UD4.3 MB_DQS_H5/MBB_DQS_H3 MB_DATA41/MBB_DATA25
DA20 DQ17 UD2.0
DDRA_DQS3 DDRA_DQ38 DDRB_DQS#5 DDRB_DQ42

t
R21 AM24 AW29 BB30
DDRA_DQS#3 P21 MA_DQS_H3/MAA_DQS_H3 MA_DATA38/MAB_DATA23 AP27 DDRA_DQ39 DDRB_DQS6 BC25 MB_DQS_L5/MBB_DQS_L3 MB_DATA42/MBB_DATA29 BA28 DDRB_DQ43
MA_DQS_L3/MAA_DQS_L3 MA_DATA39/MAB_DATA21
DA50 DQ54 UD4.2 MB_DQS_H6/MBB_DQS_H1 MB_DATA43/MBB_DATA28
DA21 DQ21 UD2.2
DDRA_DQS4 AM26 DDRB_DQS#6 BA25 AU30 DDRB_DQ44
DDRA_DQS#4 AM27 MA_DQS_H4/MAB_DQS_H2 AM23 DDRA_DQ40 DDRB_DQS7 BC22 MB_DQS_L6/MBB_DQS_L1 MB_DATA44/MBB_DATA31 AU31 DDRB_DQ45
DA51 DQ48 UD4.7 DA22 DQ22 UD2.6

en
DDRA_DQS5 AN24 MA_DQS_L4/MAB_DQS_L2 MA_DATA40/MAB_DATA30 AM21 DDRA_DQ41 DDRB_DQS#7 BA22 MB_DQS_H7/MBB_DQS_H0 MB_DATA45/MBB_DATA30 AY32 DDRB_DQ46
DDRA_DQS#5 AN25 MA_DQS_H5/MAB_DQS_H3 MA_DATA41/MAB_DATA31 AR25 DDRA_DQ42 N31 MB_DQS_L7/MBB_DQS_L0 MB_DATA46/MBB_DATA26 AY29 DDRB_DQ47
MA_DQS_L5/MAB_DQS_L3 MA_DATA42/MAB_DATA26
DA52 DQ53 UD4.5 RSVD_20 MB_DATA47/MBB_DATA27
DA23 DQ23 UD2.5
DDRA_DQS6 AU23 AU27 DDRA_DQ43 N29
DDRA_DQS#6 AT23 MA_DQS_H6/MAB_DQS_H1 MA_DATA43/MAB_DATA27 AL22 DDRA_DQ44 RSVD_18 BA27 DDRB_DQ48
MA_DQS_L6/MAB_DQS_L1 MA_DATA44/MAB_DATA28 DA53 DQ52 UD4.1 MB_DATA48/MBB_DATA11 DA24 DQ24 UD2.9
DDRA_DQS7 AV20 AL21 DDRA_DQ45 DDRB_CLK0 AC31 BC27 DDRB_DQ49
DDRA_DQS#7 MA_DQS_H7/MAB_DQS_H0 MA_DATA45/MAB_DATA29 DDRA_DQ46 15 DDRB_CLK0 DDRB_CLK0# MB_CLK_H0/MBA_CKT MB_DATA49/MBB_DATA10 DDRB_DQ50
AW20 AP24 DA54 DQ50 UD4.6 AD30 BA24 DA25 DQ28 UD2.11
MA_DQS_L7/MAB_DQS_L0 MA_DATA46/MAB_DATA24 DDRA_DQ47 15 DDRB_CLK0# MB_CLK_L0/MBA_CKC MB_DATA50/MBB_DATA14 DDRB_DQ51
V24 AP23 AD29 BC24
V23 RSVD_41 MA_DATA47/MAB_DATA25 AD31 MB_CLK_H1/MBB_CKT MB_DATA51/MBB_DATA15 BD28 DDRB_DQ52
RSVD_40
DA55 DQ51 UD4.4 MB_CLK_L1/MBB_CKC MB_DATA52/MBB_DATA12
DA26 DQ30 UD2.12
AW26 DDRA_DQ48 AE30 BB27 DDRB_DQ53
DDRA_CLK0 AD25 MA_DATA48/MAB_DATA11 AV25 DDRA_DQ49 AE32 RSVD_89 MB_DATA53/MBB_DATA13 BB25 DDRB_DQ54
14 DDRA_CLK0 MA_CLK_H0/MAA_CKT MA_DATA49/MAB_DATA10
DA56 DQ61 UD4.14 RSVD_90 MB_DATA54/MBB_DATA9
DA27 DQ26 UD2.8

fid
DDRA_CLK0# AD24 AV22 DDRA_DQ50 AF29 BD25 DDRB_DQ55
14 DDRA_CLK0# DDRA_CLK1 MA_CLK_L0/MAA_CKC MA_DATA50/MAB_DATA15 DDRA_DQ51 RSVD_91 MB_DATA55/MBB_DATA8
AE26 AW22 DA57 DQ56 UD4.10 AF31 DA28 DQ25 UD2.13
14 DDRA_CLK1 DDRA_CLK1# MA_CLK_H1/MAB_CKT MA_DATA51/MAB_DATA14 DDRA_DQ52 RSVD_92 DDRB_DQ56
AE27 AU26 BC23
14 DDRA_CLK1# MA_CLK_L1/MAB_CKC MA_DATA52/MAB_DATA12 DDRA_DQ53 DDRB_CS0# MB_DATA56/MBB_DATA6 DDRB_DQ57
AV27 DA58 DQ63 UD4.11 AJ31 BB22 DA29 DQ29 UD2.15
MA_DATA53/MAB_DATA13 DDRA_DQ54 15 DDRB_CS0# MB_CS_L0/MBB_CKE1 MB_DATA57/MBB_DATA7 DDRB_DQ58
AW23 AM31 BC21
MA_DATA54/MAB_DATA9 AT22 DDRA_DQ55 AJ29 MB_CS_L1/RSVD MB_DATA58/MBB_DATA2 BD20 DDRB_DQ59
MA_DATA55/MAB_DATA8
DA59 DQ58 UD4.12 RSVD_95 MB_DATA59/MBB_DATA3
DA30 DQ27 UD2.14
AM29 BB23 DDRB_DQ60
AW21 DDRA_DQ56 RSVD_97 MB_DATA60/MBB_DATA4 BA23 DDRB_DQ61
MA_DATA56/MAB_DATA5
DA60 DQ60 UD4.13 MB_DATA61/MBB_DATA5
DA31 DQ31 UD2.10
DDRA_CS0# AG21 AU21 DDRA_DQ57 BB21 DDRB_DQ62
14 DDRA_CS0# DDRA_CS1# MA_CS_L0/MAB_CKE1 MA_DATA57/MAB_DATA6 DDRA_DQ58 MB_DATA62/MBB_DATA1 DDRB_DQ63
AJ27 AP21 DA61 DQ57 UD4.9 BA21
14 DDRA_CS1# MA_CS_L1/RSVD MA_DATA58/MAB_DATA2 DDRA_DQ59 DDRB_CKE0 MB_DATA63/MBB_DATA0
AN20 U29
MA_DATA59/MAB_DATA3 DDRA_DQ60 15 DDRB_CKE0 MB_CKE0/MBA_CA0
AR22 T30 M31

n
MA_DATA60/MAB_DATA7
DA62 DQ59 UD4.15 MB_CKE1/MBA_CA1 RSVD_17
B AN22 DDRA_DQ61 V32 N30 B
MA_DATA61/MAB_DATA4 AT20 DDRA_DQ62 U31 RSVD_93 RSVD_19 P31
MA_DATA62/MAB_DATA1 DA63 DQ62 UD4.8 RSVD_94 RSVD_26
AR20 DDRA_DQ63 R32
DDRA_CKE0 Y23 MA_DATA63/MAB_DATA0 DDRB_ODT0 AL31 RSVD_29 M30
14 DDRA_CKE0 DDRA_CKE1 MA_CKE0/MAA_CA0 15 DDRB_ODT0 MB_ODT0/MBB_CA5 RSVD_16
Y26 T24 AM32 M29

Co
14 DDRA_CKE1 MA_CKE1/MAA_CA1 RSVD_34 MB_ODT1/RSVD RSVD_15
T25 AL29 P30
RSVD_35 W25 AM30 RSVD_96 RSVD_25 P29
RSVD_51 W27 RSVD_98 RSVD_24
DDRA_ODT0 AG24 RSVD_52 R26 DDRB_ALERT# W30
14 DDRA_ODT0 DDRA_ODT1 MA_ODT0/MAB_CA5 RSVD_27 15 DDRB_ALERT# MB_ALERT_L/MB_TEST DDRB_PAR
AJ22 R27 AG31
14 DDRA_ODT1 MA_ODT1/RSVD RSVD_28 MEM_MB_EVENT#AG29 MB_PAROUT/MBB_CA1 DDRB_PAR 15
V27
RSVD_43 V26 RC240 1 @ 2 0_0402_5% MEM_MB_RST#_R T31 MB_EVENT_L
RSVD_42 15 MEM_MB_RST# MB_RESET_L
FP5 REV 0.90
DDRA_ALERT# AA25 PART 9 OF 13
14 DDRA_ALERT# MA_ALERT_L/MA_TEST DDRA_PAR
AF24 @ AMD-RAVEN-FP5_BGA1140
MEM_MA_EVENT# AE24 MA_PAROUT/MAB_CA1 DDRA_PAR 14
14 MEM_MA_EVENT# MEM_MA_RST#_R Y24 MA_EVENT_L
RC283 1 @ 2 0_0402_5%
14 MEM_MA_RST# MA_RESET_L
FP5 REV 0.90 +1.2V
PART 1 OF 13
@ AMD-RAVEN-FP5_BGA1140
C Memory down
RC9 1 DRAM@ 2 1K_0402_5% MEM_MB_EVENT#

SO-DIMM
F
+1.2V

RC284 1 2 1K_0402_5% MEM_MA_EVENT#


LC

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/15 Deciphered Date 2013/08/15 FP5 (MEM)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
S145 API 1.0

Date: Tuesday, May 28, 2019 Sheet 5 of 44


5 4 3 2 1
5 4 3 2 1

+3VS_APU
RPC18 +1.8VS +1.8VS
UC2C
APU_DDC_CLK 1 4
DISPLAY/SVI2/JTAG/TEST
APU_DDC_DATA 2 3

2
APU_EDP_TX0+ C8 G15 DP_ENBKL
17 APU_EDP_TX0+ APU_EDP_TX0- A8 DP0_TXP0 DP_BLON F15 DP_ENVDD RC2 RC3101
+1.8VS 17 APU_EDP_TX0- DP0_TXN0 DP_DIGON L14 DP_EDP_PWM 2.2K_0404_4P2R_5%
DP_VARY_BL 39.2_0402_1% 1K_0402_5%
APU_EDP_TX1+ D8 APU_EDP_HPD RC35 1 2 100K_0402_5%
eDP 17 APU_EDP_TX1+ APU_EDP_TX1- B8 DP0_TXP1 D9 APU_EDP_AUX
@

APU_TEST31
17 APU_EDP_TX1- DP0_TXN1 DP0_AUXP APU_EDP_AUX 17

1
1

B9 APU_EDP_AUX# APU_TEST31 DP_STEREOSYNC


RC18 B6 DP0_AUXN C10 APU_EDP_HPD APU_EDP_AUX# 17 eDP M_TEST CONNECTION TBD
DP0_TXP2 DP0_HPD APU_EDP_HPD 17

2
300_0402_5% C7 +1.8VS
DP0_TXN2 G11 APU_DDC_CLK RC3131 RC3102
D
C6 DP1_AUXP F11 APU_DDC_DATA APU_DDC_CLK 19 D
DP0_TXP3 DP1_AUXN APU_DDC_DATA 19 HDMI 39.2_0402_1% 1K_0402_5%
2

APU_RST# D6 G13 APU_HDMI_HPD @ @


DP0_TXN3 DP1_HPD APU_HDMI_HPD 19 RPC47

1
PLACE CC16 CAPS CLOSE TO APU,CRB reserve 27pf APU_HDMI_TX2+ E6 J12 APU_TEST17 4 5
19 APU_HDMI_TX2+ APU_HDMI_TX2- D5 DP1_TXP0 DP2_AUXP H12 APU_TEST14 3 6
1 19 APU_HDMI_TX2- DP1_TXN0 DP2_AUXN K13 APU_TEST16 2 7
CC16 APU_HDMI_TX1+ E1 DP2_HPD APU_TEST15 1 8
56P_0201_50V8-J 19 APU_HDMI_TX1+ APU_HDMI_TX1- C1 DP1_TXP1 J10
2 19 APU_HDMI_TX1- DP1_TXN1 DP3_AUXP H10
@ 10K_0804_8P4R_5%
APU_HDMI_TX0+ F3 DP3_AUXN K8
HDMI 19 APU_HDMI_TX0+ APU_HDMI_TX0- E4 DP1_TXP2 DP3_HPD @
19 APU_HDMI_TX0- DP1_TXN2 K15 DP_STEREOSYNC
APU_HDMI_CLK+ F4 DP_STEREOSYNC
+1.8VS 19 APU_HDMI_CLK+ APU_HDMI_CLK- F2 DP1_TXP3 F14 1 @
19 APU_HDMI_CLK- DP1_TXN3 RSVD_4 F12 1 @
TC34 To EDP panel +3VS_APU
TC33
RSVD_3
1

F10 1 @ TC32
RSVD_2

1
PU FOR INTERNAL
RC19
300_0402_5% PD FOR CUSTOMER +3VALW_APU RC70
4.7K_0402_5%
2

2
APU_PWROK RC71
10K_0402_5%
PCH_EDP_PWM 17
PLACE CC17 CAPS CLOSE TO APU,CRB reserve 27pf
1 AP14 TEST4 1 @ TC204
TEST4

3
AN14 TEST5 1 @ TC205 QC8B
CC17 TEST5

D2
56P_0201_50V8-J F13 1 @ TC206 5
2 @ TEST6 G2
G18 APU_TEST14

S2
TEST14

6
H19 APU_TEST15 QC8A

l
APU_TEST15

TEST15 F18 APU_TEST16

D1
TEST16

4
C F19 APU_TEST17
APU_TEST17 DP_EDP_PWM 2 PJT7838_SOT363-6 C

ia
TEST17 G1
+3VS_APU W24 APU_TEST311 @ TC24

S1
TEST31/RSVD

1
RC11
PJT7838_SOT363-6

1
RPC60 AR11 1 @ TC23 100K_0402_5%
8 1 APU_SIC TEST41
7 2 APU_SID APU_TDI AU2 AJ21 TEST470 1 @ TC22

t
TDI TEST470

2
6 3 APU_PROCHOT#_R APU_TDO AU4 AK21 TEST471 1 @ TC21 RC2051 @ 2 0_0402_5%
5 4 ALERT# APU_TCK AU1 TDO TEST471
APU_TMS AU3 TCK
TMS

en
1K_0804_8P4R_5% APU_TRST# AV3
APU_DBREQ# AW3 TRST_L +3VS_APU
DBREQ_L +0.9VS

APU_RST# AW4 V4 SMU_ZVDDP RC3 1 2 196_0402_1%


RESET_L SMU_ZVDD

1
APU_PWROK AW2 +3VALW_APU
44 APU_PWROK PWROK +3VALW_APU RC74
RC3129 1 @ 2 0_0402_5% APU_SIC H14 AW11 CORETYPE RC3113 2 @ 1 1K_0402_5% 4.7K_0402_5%
+3VS_APU 31 EC_SMB_CK3 2 0_0402_5% APU_SID SIC CORETYPE
31 EC_SMB_DA3 RC3130 1 @ J14 @
SID

2
ALERT# J15
ALERT_L

2
fid
APU_THERMTRIP# AP16 AN11 APU_VDDP_RUN_FB_H 1 @ TC35 RC73
31 APU_THERMTRIP# 1 2 0_0402_5% APU_PROCHOT#_R L19 THERMTRIP_L VDDP_SENSE J19 VDDCR_SOC_VCC_SENSE PCH_ENVDD 17
RC31 10K_0402_5%
2 1K_0402_1% APU_THERMTRIP# 31,41 H_PROCHOT# PROCHOT_L VDDCR_SOC_SENSE VDDCR_VCC_SENSE VDDCR_SOC_VCC_SENSE 44
RC22 1 K18 @
VDDCR_SENSE VDDCR_VCC_SENSE 44

3
QC9B

1
RC213 1 @ 2 0_0402_5% APU_SVC_RA F16

D2
44 APU_SVC 1 2 0_0402_5% APU_SVD_RA H16 SVC0 J18 VDDCR_VSS_SENSE 5
RC215 @
44 APU_SVD 1 2 0_0402_5% APU_SVT_RA J16 SVD0 VSS_SENSE_A AM11 VSS_SENSEB 1 @ VDDCR_VSS_SENSE 44 G2
RC279 @ FP5 REV 0.90 TC40
44 APU_SVT SVT0 PART 3 OF 13
VSS_SENSE_B

S2
6
@ @ AMD-RAVEN-FP5_BGA1140 QC9A
CC1393 1 2 0.1U_0201_6.3V6-K APU_THERMTRIP# APU_SVC APU_SVD APU_SVT VDDCR_SOC_VCC_SENSE 1 @ TC52 @

D1

4
VDDCR_VCC_SENSE 1 @ TC207 DP_ENVDD 2 PJT7838_SOT363-6

n
@ VDDCR_VSS_SENSE 1 @ TC208 G1
1 1 1
B CC1394 1 2 0.1U_0201_6.3V6-K APU_PROCHOT#_R CC1281 CC1283 CC214 B

S1
1
1000P_0201_50V7-K 1000P_0201_50V7-K 1000P_0201_50V7-K
RC13 @
PJT7838_SOT363-6

1
2 2 2 100K_0402_5%
@ @ @

Co
@

2
RC206 1 @ 2 0_0402_5%
With HDT+ Header LCD Power IC can change for PCH_ENVDD for cost down

+1.8VALW +1.8VALW +3VS_APU


+1.8VALW +1.8VALW
+1.8VALW JHDT1 @ RPC5

2
1 2 APU_TCK 8 1
1 2 7 2 RC77
1

1
3 4 APU_TMS 6 3 +3VALW_APU 2.2K_0402_5%
3 4
2

5 4 CC25 RC32 RC36


RC7 5 6 APU_TDI 0.1U_0201_6.3V6-K 300_0402_5% 300_0402_5% @
5 6
C

1
2

2
1K_0402_5% 1K_0804_8P4R_5% HDT@ HDT@ HDT@
7 8 APU_TDO RC75
7 8 PCH_ENBKL 17

2
UC6 10K_0402_5%
1

APU_TRST# RC76 1 HDT@ 2 33_0402_5% APU_TRST#_R 9 10 APU_PWROK_BUF APU_PWROK 3 4 APU_PWROK_BUF @


9 10 2A 2Y

3
QC10B

1
11 12 APU_RST#_BUF 2 5
F
1

D2
11 12 GND VCC 5
CC84 13 14 APU_DBRDY APU_RST# 1 6 APU_RST#_BUF G2
0.01U_6.3V_K_X7R_0201 13 14 APU_DBRDY 12 1A 1Y

S2
2

6
15 16 RC273 1 HDT@ 2 33_0402_5% APU_DBREQ# HDT@ SN74LVC2G07YZPR_WCSP6 QC10A
15 16
LC

D1

4
PJT7838_SOT363-6
8
7
6
5

17 18 APU_PLLTEST0 DP_ENBKL 2
17 18 APU_PLLTEST0 12 G1
RPC17
10K_0804_8P4R_5% 19 20 APU_PLLTEST1
APU_PLLTEST1 12

S1
19 20

1
HDT@
A RC14 @ A
PJT7838_SOT363-6
1
2
3
4

1
100K_0402_5%
SAMTE_ASP-136446-07-B APU_DBREQ# APU_TDI @

2
1 2 RC2071 @ 2 0_0402_5%

CC213 CC212
0.01U_6.3V_K_X7R_0201 0.01U_6.3V_K_X7R_0201
2 HDT@ 1
@ Security Classification LC Future Center Secret Data Title
Issued Date 2013/08/15 Deciphered Date 2013/08/15 FP5 (DP/JTAG/SIV2/MISC)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OFSize
R&D Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
S145 API 1.0

Date: Tuesday, May 28, 2019 Sheet 6 of 44


5 4 3 2 1
5 4 3 2 1

+1.8VALW

+3VALW_APU
RC243 1 2 0_0402_5% 1

1
RC3198 CC8783 RC3199 PCIE_WAKE#_RA
RC88 1 2 0_0402_5%
10K_0402_5% 10U 6.3V M X5R 0402 10K_0402_5%
2 @ DC4 @
DC1 SYS_RESET# 1 2 SYS_PWRGD_R AGPIO5 RC92 1 2 0_0402_5% PCIE_WAKE# 27,31

2
1 2 RSMRST#_R
31 EC_RSMRST#

2
RB751V-40_SOD323-2 @
RB751V-40_SOD323-2 @ RC3065 1 2 0_0402_5% SYS_PWRGD_R @ 2 1 DC3
1 31 EC_SYS_PWRGD 1
CC1316 1
0.1U_0201_6.3V6-K CC38 SDM10U45LP-7_DFN1006-2-2
CC1314 0.1U_0201_6.3V6-K @
2 0.1U_0201_6.3V6-K 2
2
D D

RC3202 1 2 33_0402_5% PCIE_RST0#_R


22,27,29 PLT_RST# 1

1
RC3201 CC1389
100K_0402_5% 100P_0201_25V8J
@
2
2

RPC55
UC2D EGPIO149 1 8
ACPI/AUDIO/I2C/GPIO/MISC EGPIO150 2 7
EGPIO151 3 6
AW12 EGPIO152 4 5
EGPIO41/SFI_S5_EGPIO41 AU12
PCIE_RST0#_R BD5 AGPIO39/SFI_S5_AGPIO39 10K_0804_8P4R_5%
PCIE_RST1#_R BB6 PCIE_RST0_L/EGPIO26 AR13 EGPIO151
RSMRST#_R AT16 PCIE_RST1_L/EGPIO27 I2C0_SCL/SFI0_I2C_SCL/EGPIO151 AT13 EGPIO152
RSMRST_L I2C0_SDA/SFI0_I2C_SDA/EGPIO152
PBTN_OUT# RC191 1 2 0_0402_5% PWRBTN#_R AR15 AN8 EGPIO149
31 PBTN_OUT# SYS_PWRGD_R AV6 PWR_BTN_L/AGPIO0 I2C1_SCL/SFI1_I2C_SCL/EGPIO149 AN9 EGPIO150
SYS_RESET# AP10 PWR_GOOD I2C1_SDA/SFI1_I2C_SDA/EGPIO150
13 SYS_RESET# PCIE_WAKE#_RA SYS_RESET_L/AGPIO1 I2C2_SCL_APU
AV11 BC20 RC501 1 @ 2 0_0402_5%

l
WAKE_L/AGPIO2 I2C2_SCL/EGPIO113/SCL0 I2C2_SDA_APU APU_SMB_CLK 14,27
BA20 1 2 0_0402_5%
PM_SLP_S3# RC193 1 2 0_0402_5% PM_SLP_S3#_R AV13 I2C2_SDA/EGPIO114/SDA0
RC500 @
APU_SMB_DATA 14,27 SO-DIMM,Mini Card
31 PM_SLP_S3#

ia
PM_SLP_S5# RC194 1 2 0_0402_5% PM_SLP_S5#_R AT14 SLP_S3_L AM9 TP_I2C0_SCL_R
13,31 PM_SLP_S5# SLP_S5_L I2C3_SCL/AGPIO19/SCL1 TP_I2C0_SDA_R TP_I2C0_SCL_R 13,32
AM10
AR8 I2C3_SDA/AGPIO20/SDA1 TP_I2C0_SDA_R 13,32 Touch Pad
S0A3_GPIO/AGPIO10 L16 PSA_I2C_SCL
AC_PRESENT AT10 PSA_I2C_SCL M16 PSA_I2C_SDA
31 AC_PRESENT 1 2 10K_0402_5% BATLOW# AN6 AC_PRES/AGPIO23 PSA_I2C_SDA CRB connect to EC and PMIC
+3VALW_APU RC100 +1.8VS
LLB_L/AGPIO12

t
C AT15 BOARD_ID2 C
AGPIO3 PSA_I2C_SCL RC3126 2
Board ID Description Stuff R AW8
EGPIO42 AGPIO4/SATAE_IFDET
AW10 @ 1 4.7K_0402_5%
PSA_I2C_SDA RC3127 2 @ 1 4.7K_0402_5%

en
AP9 AGPIO5
AGPIO5/DEVSLP0
0 14 RC1616 AGPIO6/DEVSLP1
AU10
USBDEBUG 20
Board_ID0 SATA_ACT_L/AGPIO130
AV15 +3VS_APU

1 15 RC3231 AU7 BOARD_ID6 RPC21


AGPIO9 AU6 APU_SSD_RST# I2C2_SCL_APU 3 2
AGPIO40 AW13 BOARD_ID3 APU_SSD_RST# 22 I2C2_SDA_APU 4 1
AGPIO69
0 Reserved RC1614 AGPIO86
AW15
EC_SMI# 31
Board_ID1 HDA_BITCLK AR2 2.2K_0404_4P2R_5%
AZ_BITCLK/TDM_BCLK_MIC

fid
RC201 1 @ 2 0_0402_5% HDA_SDIN0_R AP7
28 HDA_SDIN0 HDA_SDIN1 AZ_SDIN0/CODEC_GPI INTRUDER_ALERT
1 Reserved RC1613 TC42 @ 1 AP1
AZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACK INTRUDER_ALERT
AU14 RC3100 2 @ 1 20M_0402_5% VCCRTC
TC210 @ 1 HDA_SDIN2 AP4 AU16 EC_SMI# RC3081 1 2 2.2K_0402_5%
HDA_RST# AZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK SPKR/AGPIO91 PCH_BEEP 28 PCH_TP_INT#
AP3 AV8 BLINK RC3213 1 2 10K_0402_5%
HDA_SYNC AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC BLINK/AGPIO11 APU_SSD_RST#
000 Hynix 8Gb RC1612 RC1610 RC1607 AR4
AZ_SYNC/TDM_FRM_MIC
RC3246 1 2 10K_0402_5%
HDA_SDOUT AR3 AW16 PCH_TP_INT#
AZ_SDOUT/TDM_FRM_PLAYBACK GENINT1_L/AGPIO89 BD15 PCH_TP_INT# 32
GENINT2_L/AGPIO90
001 Micron 8Gb RC1612 RC1610 RC1608 AT2
SW_MCLK/TDM_BCLK_BT
+3VALW_APU
AT4
AR6 SW_DATA0/TDM_DOUT_BT AR18
BOARD_ID0 AGPIO7/FCH_ACP_I2S_SDIN_BT FANIN0/AGPIO84 SSD_SATA_PCIE_DET1# 22

n
Board_ID 010 DIMM_ONLY RC1612 RC1609 RC1607 AP6 AT18 RPC56
AGPIO8/FCH_ACP_I2S_LRCLK_BT FANOUT0/AGPIO85 TP_I2C0_SDA_R 3 2
[2,3,4] FP5 REV 0.90
TP_I2C0_SCL_R
PART 4 OF 13 4 1
011 Samsung 8Gb RC1612 RC1609 RC1608 @ AMD-RAVEN-FP5_BGA1140
2.2K_0404_4P2R_5%

Co
100 HT Micron 8Gb RC1611 RC1610 RC1607 +3VALW_APU
RPC15
PBTN_OUT# 1 8
101 SMART 8Gb RC1611 RC1610 RC1608 PCIE_WAKE#_RA 2 7
AC_PRESENT 3 6
4 5
0 NON-TS RC123
Board_ID5 10K_0804_8P4R_5%

B 1 TS RC1606 Blink RC3119 1 @ 2 10K_0402_5% B


RPC4 PM_SLP_S3# RC203 1 @ 2 2.2K_0402_5%
PM_SLP_S5# RC208 1 @ 2 2.2K_0402_5%

Board_ID6
0 Reserved RC3224
C TC203 @ 1 HDA_RST_AUDIO# 1
2
8
7
HDA_RST#
HDA_SYNC
APU_SSD_RST# RC3247 1 @ 2 10K_0402_5%
28 HDA_SYNC_AUDIO 3 6 HDA_BITCLK
28 HDA_BITCLK_AUDIO HDA_SDOUT
1 Reserved RC3225 28 HDA_SDOUT_AUDIO
4 5

33_0804_8P4R_5%
F
PCH_TP_INT# RC248 1 @ 2 10K_0402_5%

2
RSMRST#_R RC87 1 2 100K_0402_5%

1K_0402_5%

1K_0402_5%

1K_0402_5%
SYS_PWRGD_R RC89 1 2 100K_0402_5%

RC260

RC261

RC262
LC

PCIE_RST1#_R RC3227 1 2 10K_0402_5%

1
@ @ @
+1.8VALW
+3VALW_APU +3VS_APU
1

RC3231
2K_0402_5%
1

BD15@
RC1613 RC1611 RC1608 RC1606 RC3225 RC1609
2

2K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 2K_0402_5%


@ @ @ TS@ @ @
For EMI For EMI For EMI For EMI
HDA_SDIN0_R HDA_BITCLK HDA_SYNC HDA_SDOUT
2

1 1 1 1
BOARD_ID0
BOARD_ID1 @ CC4222 CC4220 @ CC4221 @ CC4219
9 BOARD_ID1 BOARD_ID2 2P_25V_NPO_0201 56P_50V_J_NPO_0201 2P_25V_NPO_0201 2P_25V_NPO_0201
BOARD_ID3 2 2 EMC@ 2 2
BOARD_ID4
9 BOARD_ID4 BOARD_ID5 Close to PCH Close to PCH Close to PCH Close to PCH
A 9 BOARD_ID5 A
BOARD_ID6
3/18 CC4220 stuff for S145API EMC request
2

RC1616 RC1614 RC1612 RC1607 RC123 RC3224 RC1610


10K_0402_5% 10K_0402_5% 2K_0402_5% 10K_0402_5% 2K_0402_5% 10K_0402_5% 10K_0402_5%
BD14@ @ @ @ NOTS@ @ @
1

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/15 Deciphered Date 2013/08/15 FP5 AZ/I2C/ACPI/GPIO


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
S145 API 1.0

Date: Tuesday, May 28, 2019 Sheet 7 of 44


5 4 3 2 1
5 4 3 2 1

LPCCLK0 PCH_SPI_CLK

2
RC46 1 2 33_0402_5% LPC_RST#_R
13,31 APU_LPC_RST#
RC282
1 0_0201_5% RC139
CC1318 EMC_NS@ 10_0402_5%
150P_25V_J_NPO_0402 EMC_NS@

1
2
1 1
CC219 CC26
22P_0201_25V8 10P_0201_25V8G
EMC_NS@ EMC_NS@
2 2

UC2E EMC EMC


D D
CLK/LPC/EMMC/SD/SPI/eSPI/UART

SSD_1_CLKREQ# AV18
22 SSD_1_CLKREQ# WLAN_CLKREQ# AN19 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92
27 WLAN_CLKREQ# CLK_REQ1_L/AGPIO115
AP19
+3VS_APU PCH_BT_OFF# AT19 CLK_REQ2_L/AGPIO116
RPC59 27 PCH_BT_OFF# PCH_WLAN_OFF# AU19 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131
1 8 SSD_1_CLKREQ# 27 PCH_WLAN_OFF# AW18 CLK_REQ4_L/OSCIN/EGPIO132
2 7 WLAN_CLKREQ# AW19 CLK_REQ5_L/EGPIO120
3 6 PCH_BT_OFF# CLK_REQ6_L/EGPIO121
4 5 PCH_WLAN_OFF# BD13 EGPIO70
EGPIO70/SD_CLK BB14 LPCPD#
CLK_PCIE_SSD LPC_PD_L/SD_CMD/AGPIO21 LPCPD# 13
10K_0804_8P4R_5% RC3248 1 @ 2 0_0402_5% CLK_PCIE_SSD_R AK1 BB12 LAD0 RC3208 1 2 10_0402_5%
22 CLK_PCIE_SSD CLK_PCIE_SSD# 2 0_0402_5% CLK_PCIE_SSD#_R GPP_CLK0P LAD0/SD_DATA0/EGPIO104 LPC_AD0 13,31
PCIE CLK3 SSD1 RC3249 1 @ AK3 BC11 LAD1 RC3209 1 2 10_0402_5%
22 CLK_PCIE_SSD# GPP_CLK0N LAD1/SD_DATA1/EGPIO105 LPC_AD1 13,31 +3VS_APU
BB15 LAD2 RC3210 1 2 10_0402_5% LPC_AD2 13,31
CLK_PCIE_WLAN RC119 1 @ 2 0_0402_5% CLK_PCIE_WLAN_R AM2 LAD2/SD_DATA2/EGPIO106 BC15 LAD3 RC3211 1 2 10_0402_5%
27 CLK_PCIE_WLAN GPP_CLK1P LAD3/SD_DATA3/EGPIO107 LPC_AD3 13,31
PCIE CLK1 WLAN CLK_PCIE_WLAN# RC120 1 @ 2 0_0402_5% CLK_PCIE_WLAN#_R AM4 BA15 LPCCLK0RC126 2 1 3.3_0402_1%
27 CLK_PCIE_WLAN# GPP_CLK1N LPCCLK0/EGPIO74 BC13 CLK_PCI_EC 13,31 LPC_FRAME# 1 2 10K_0402_5%
RC152 @
AM1 LPC_CLKRUN_L/AGPIO88 BB13 LPC_CLKRUN# 13
EGPIO75
AM3 GPP_CLK2P LPCCLK1/EGPIO75 BC12 KBRST# RC3063 1 2 10K_0402_5%
GPP_CLK2N SERIRQ/AGPIO87 SERIRQ 13,31
BA12
LFRAME_L/EGPIO109 LPC_FRAME# 13,31
AL2 LDRQ0 RC3250 1 2 10K_0402_5%
+3VS_APU AL4 GPP_CLK3P BD11 LPC_RST#_R
GPP_CLK3N LPC_RST_L/SD_WP_L/AGPIO32 BA11
AN2 AGPIO68/SD_CD BA13
GPP_CLK4P LPC_PME_L/SD_PWR_CTRL/AGPIO22 EC_SCI# 31
AN4

l
RC10 2 @ 1 150_0402_1% XGBECLK0 GPP_CLK4N
RC6 2 @ 1 150_0402_1% XGBECLK1 AN3

ia
AP2 GPP_CLK5P BC8
GPP_CLK5N SPI_ROM_REQ/EGPIO67 BB8 +3VALW_APU
AJ2 SPI_ROM_GNT/AGPIO76
AJ4 GPP_CLK6P BB11 KBRST# EC_SCI# RC3091 1 @ 2 10K_0402_5%
GPP_CLK6N ESPI_RESET_L/KBRST_L/AGPIO129 KBRST# 31
BC6 LDRQ0 RC3141 1 @ 2 0_0402_5% LDRQ0# LDRQ0# 13
TC41 @ 1 48M_OSC AJ3 ESPI_ALERT_L/LDRQ0_L/EGPIO108
X48M_OSC BB7 SPI_CLK RC3083 1 2 10_0402_5% PCH_SPI_CLK

t
SPI_CLK/ESPI_CLK PCH_SPI_CLK 13,29
C BA9 SPI_D1 RC3084 1 @ 2 0_0402_5% PCH_SPI_D1 C
X48M_X1 BB3 SPI_DI/ESPI_DAT1 BB10 SPI_D0 RC3085 1 @ 2 0_0402_5% PCH_SPI_D0 PCH_SPI_D1 29 +1.8VS
X48M_X1 SPI_DO/ESPI_DAT0 BA10 SPI_D2 RC3087 1 @ 2 0_0402_5% PCH_SPI_D2 PCH_SPI_D0 29

en
SPI_WP_L/ESPI_DAT2 BC10 SPI_D3 RC3088 1 @ 2 0_0402_5% PCH_SPI_D3
SPI_HOLD_L/ESPI_DAT3 BC9 SPI_CS0# RC3089 1 @ 2 0_0402_5% PCH_SPI_CS0#
SPI_CS1_L/EGPIO118

1 RC3136 2

1 RC3212 2

1 RC3138 2

1 RC3139 2

1 RC3140 2
X48M_X2 BA5 BA8 AGPIO30

1K_0402_1%

1K_0402_1%

1K_0402_1%

1K_0402_1%

1K_0402_1%
X48M_X2 SPI_CS2_L/ESPI_CS_L/AGPIO30 BA6
SPI_CS3_L/AGPIO31 BD8 SPI_CS#_TPM
SPI_TPM_CS_L/AGPIO29 SPI_CS#_TPM 29
XGBECLK0 AF8
XGBECLK1 AF9 RSVD_76 BA16 APU_UART0_RXD
RSVD_77 UART0_RXD/EGPIO136 APU_UART0_TXD @ @ @ @ @
BB18
UART0_TXD/EGPIO138

fid
BC17 APU_UART0_RTS#
UART0_RTS_L/UART2_RXD/EGPIO137 BA18 APU_UART0_CTS#
AW14 UART0_CTS_L/UART2_TXD/EGPIO135 BD18 PCH_SPI_PIRQ#
22,27 SUSCLK RTCCLK UART0_INTR/AGPIO139 PCH_SPI_PIRQ# 29

X32K_X1 AY1 BC18


X32K_X1 EGPIO141/UART1_RXD BA17
EGPIO143/UART1_TXD BC16
EGPIO142/UART1_RTS_L/UART3_RXD BB19
RC45 X32K_X2 AY4 EGPIO140/UART1_CTS_L/UART3_TXD BB16
X32K_X2 AGPIO144/UART1_INTR

n
1 2
20M_0402_5%
YC3 FP5 REV 0.90
1 2 PART 5 OF 13
@ AMD-RAVEN-FP5_BGA1140

Co
32.768KHZ_12.5PF_202740-PG14

1 1

48MHz/10pF Crystal X48M_X1


CC21
10P_0402_50V8J
CC22
12P_0402_50V8-J
2 2
X48M_X2

B RC3204 1 2 1M_0402_5% EGPIO70 10K_0402_5% 1 @ 2 RC3157 B


Kevin H: change YC2 PN change to SJ10000MQ00,manual modify PN to SJ10000MQ00
AGPIO30 10K_0402_5% 1 2 RC3158
YC1
C EGPIO75 10K_0402_5% 1 2 RC3160
1 4
OSC1 NC2
2 3
NC1 OSC2
F
1 1
48MHZ_10PF_7V48000017
CC1390 CC1391 +1.8V_SPI +1.8VALW
8P_0402_50V8-B 8P_0402_50V8-B UC3
0.085 A
LC

2 2 PCH_SPI_CS0# 1 8 +1.8V_SPI RC435 1 @ 2 0_0402_5%


PCH_SPI_D1 2 /CS VCC 7 PCH_SPI_D3
PCH_SPI_D2 3 DO(IO1) /HOLDor/RESET(IO3) 6 PCH_SPI_CLK
/WP(IO2) CLK 1
4 5 PCH_SPI_D0
GND DI(IO0) CC220
0.1U_0201_6.3V6-K
W25Q64FWSSIQ_SO8 2

8MB(64Mb)
+1.8V_SPI

RC3235 1 2 10K_0402_5% PCH_SPI_CS0#


RC3236 1 2 10K_0402_5% PCH_SPI_D1
RC3237 1 @ 2 10K_0402_5% PCH_SPI_D2
RC3238 1 @ 2 10K_0402_5% PCH_SPI_D3

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/15 Deciphered Date 2013/08/15 FP5 CLK/LPC/SD/EMMC/UART


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
S145 API 1.0

Date: Tuesday, May 28, 2019 Sheet 8 of 44


5 4 3 2
Date: 1
Sheet
5 4 3 2 1

UC2J
USB

AD2 AE7 USB20_P2


USBC0_A2/USB_0_TXP0/DP3_TXP2 USB_0_DP0 USB20_N2 USB20_P2 28
AD4 AE6 CardReader
USBC0_A3/USB_0_TXN0/DP3_TXN2 USB_0_DM0 USB20_N2 28
AC2 AG10 USB20_P7
USBC0_B11/USB_0_RXP0/DP3_TXP3 USB_0_DP1 USB20_N7 USB20_P7 21
AC4 AG9 Left USB (2.0)
USBC0_B10/USB_0_RXN0/DP3_TXN3 USB_0_DM1 USB20_N7 21
D USB20_P6 D
AF4 AF12
USBC0_B2/DP3_TXP1 USB_0_DP2 USB20_N6 USB20_P6 20
AF2 AF11 LEFT USB (3.0) lower
USBC0_B3/DP3_TXN1 USB_0_DM2 USB20_N6 20
AE3 AE10 USB20_P5
USBC0_A11/DP3_TXP0 USB_0_DP3 USB20_N5 USB20_P5 20
AE1 AE9 LEFT USB (3.0) upper
USBC0_A10/DP3_TXN0 USB_0_DM3 USB20_N5 20
AG3 AJ12 USB20_P1_HUB
USB_0_TXP1 USB_1_DP0 USB20_N1_HUB USB20_P1_HUB 16
AG1 AJ11 USB HUB
USB_0_TXN1 USB_1_DM0 USB20_N1_HUB 16
AJ9 AD9 USB20_P0
USB_0_RXP1 USB_1_DP1 USB20_N0 USB20_P0 27
AJ8 AD8 BT
USB_0_RXN1 USB_1_DM1 USB20_N0 27
USB30_TX_P2 AG4 +1.8VALW
20 USB30_TX_P2 USB30_TX_N2 USB_0_TXP2
AG2
20 USB30_TX_N2 USB_0_TXN2
LEFT USB (3.0) lower
USB30_RX_P2 AG7 RPC57
20 USB30_RX_P2 USB30_RX_N2 USB_0_RXP2 USBC_I2C_SCL USBC_I2C_SCL
AG6 AM6 1 4
20 USB30_RX_N2 USB_0_RXN2 USBC_I2C_SCL USBC_I2C_SDA 2 3
USB30_TX_P1 AA2 AM7 USBC_I2C_SDA
20 USB30_TX_P1 USB30_TX_N1 USBC1_A2/USB_0_TXP3/DP2_TXP2 USBC_I2C_SDA
AA4 4.7K_0404_4P2R_5%
20 USB30_TX_N1 USBC1_A3/USB_0_TXN3/DP2_TXN2
LEFT USB (3.0) upper
USB30_RX_P1 Y1

l
20 USB30_RX_P1 USB30_RX_N1 USBC1_B11/USB_0_RXP3/DP2_TXP3
Y3
20 USB30_RX_N1 USBC1_B10/USB_0_RXN3/DP2_TXN3

ia
AC1
AC3 USBC1_B2/DP2_TXP1
USBC1_B3/DP2_TXN1 AK10 BOARD_ID1
USB_OC0_L/AGPIO16 USB_OC3#_R BOARD_ID1 7 USB_OC3#
AB2 AK9 RC3239 1 @ 2 0_0402_5%
USBC1_A11/DP2_TXP0 USB_OC1_L/AGPIO17 USB_OC2#_R USB_OC2# USB_OC3# 21
AB4 AL9 RC3233 1 @ 2 0_0402_5%

t
USBC1_A10/DP2_TXN0 USB_OC2_L/AGPIO18 USB_OC1# USB_OC2# 20
C AL8 C
USB_OC3_L/AGPIO24 BOARD_ID5 USB_OC1# 20
AH4 AW7
USB_1_TXP0 AGPIO14/USB_OC4_L BOARD_ID5 7

en
AH2 AT12 BOARD_ID4
USB_1_TXN0 AGPIO13/USB_OC5_L BOARD_ID4 7
AK7
AK6 USB_1_RXP0
USB_1_RXN0
FP5 REV 0.90
PART 10 OF 13 +3VALW _APU
@ AMD-RAVEN-FP5_BGA1140

fid
RPC58
USB_OC3#_R 1 8
USB_OC1# 2 7
USB_OC2#_R 3 6
4 5

10K_0804_8P4R_5%

n
Co
UC2L
RSVD
T11 AA9
RSVD_32 RSVD_62 AA8
AC7 RSVD_61 AC6
RSVD_66 RSVD_65
B B
Y9
RSVD_55
C Y10
RSVD_56 RSVD_72
AD11

W11 AC9
W12 RSVD_47 RSVD_67 AA11
RSVD_48 RSVD_63
F
V9 T12
V10 RSVD_38 RSVD_33 AD12
RSVD_39 RSVD_73
LC

Y6
RSVD_53 Y7
RSVD_54
AA12 W8
AC10 RSVD_64 RSVD_45 W9
RSVD_68 RSVD_46

FP5 REV 0.90


PART 12 OF 13
@ AMD-RAVEN-FP5_BGA1140

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/15 Deciphered Date 2013/08/15 FP5 USB/WIFI
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date: Tuesday, May 28, 2019 Sheet 9 of 44
5 4 3 2 1
5 4 3 2 1

D D

l
t ia
UC2M
CAMERAS

en
C C
A18 B15
C18 CAM0_CSI2_CLOCKP CAM0_CLK
CAM0_CSI2_CLOCKN D15
A15 CAM0_I2C_SCL C14
C15 CAM0_CSI2_DATAP0 CAM0_I2C_SDA
CAM0_CSI2_DATAN0 B13
B16 CAM0_SHUTDOWN
C16 CAM0_CSI2_DATAP1
CAM0_CSI2_DATAN1

fid
C19
B18 CAM0_CSI2_DATAP2
CAM0_CSI2_DATAN2
B17
D17 CAM0_CSI2_DATAP3
CAM0_CSI2_DATAN3
D12 B10
B12 CAM1_CSI2_CLOCKP CAM1_CLK
CAM1_CSI2_CLOCKN A11
C13 CAM1_I2C_SCL C11

n
A13 CAM1_CSI2_DATAP0 CAM1_I2C_SDA
CAM1_CSI2_DATAN0 D11
B11 CAM1_SHUTDOWN
C12 CAM1_CSI2_DATAP1 D13
CAM1_CSI2_DATAN1 CAM_PRIV_LED D10

Co
J13 CAM_IR_ILLU
FP5 REV 0.90
RSVD_6 PART 13 OF 13
@ AMD-RAVEN-FP5_BGA1140

B
CF
B
LC

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/15 Deciphered Date 2013/08/15 FP5 CAM


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
S145 API 1.0

Date: Tuesday, May 28, 2019 Sheet 10 of 44


5 4 3 2 1
5 4 3 2 1

+VDDC_VDD
+VDDCR_SOC
UC2F
10A M15
POWER
G7 35A
M18 VDDCR_SOC_1 VDDCR_1 G10
M19 VDDCR_SOC_2 VDDCR_2 G12
N16 VDDCR_SOC_3 VDDCR_3 G14
D D
N18 VDDCR_SOC_4 VDDCR_4 H8
N20 VDDCR_SOC_5 VDDCR_5 H11
P17 VDDCR_SOC_6 VDDCR_6 H15
P19 VDDCR_SOC_7 VDDCR_7 K7
R18 VDDCR_SOC_8 VDDCR_8 K12
R20 VDDCR_SOC_9 VDDCR_9 K14
T19 VDDCR_SOC_10 VDDCR_10 L8
U18 VDDCR_SOC_11 VDDCR_11 M7
U20 VDDCR_SOC_12 VDDCR_12 M10
V19 VDDCR_SOC_13 VDDCR_13 N14
W18 VDDCR_SOC_14 VDDCR_14 P7
W20 VDDCR_SOC_15 VDDCR_15 P10
+1.2V Y19 VDDCR_SOC_16 VDDCR_16 P13
VDDCR_SOC_17 VDDCR_17 P15
6A T32 VDDCR_18 R8
V28 VDDIO_MEM_S3_1 VDDCR_19 R14
W28 VDDIO_MEM_S3_2 VDDCR_20 R16
W32 VDDIO_MEM_S3_3 VDDCR_21 T7

22UC_6.3VC_MC_X5RC_0603
Y22 VDDIO_MEM_S3_4 VDDCR_22 T10

+VDDC_VDD
S145API EMC request for +VDDC_VDD +3VS_APU
Y25 VDDIO_MEM_S3_5
VDDIO_MEM_S3_6
VDDCR_23
VDDCR_24
T13
Y28 T15
+3VS VDDIO_MEM_S3_7 VDDCR_25
1000P_50V_K_X7R_0201

4700P_25V_K_X7R_0201

1000P_50V_K_X7R_0201
AA20 T17
180P_50V_J_NPO_0402

68P_25V_J_NPO_0201

AA23 VDDIO_MEM_S3_8 VDDCR_26 U14

68P_0402_50V8J
0.01U_0402_25V7K
AA26 VDDIO_MEM_S3_9 VDDCR_27 U16

1U_0402_6.3V6K

1U_0402_6.3V6K
1 1 1 1 1 VDDIO_MEM_S3_10 VDDCR_28

1
RC3112 1 2 0_0402_5% AA28 V13
EMC_NS@

EMC_NS@

EMC_NS@

EMC_R3F2@

EMC_R3F2@

EMC_R3F2@
CC1382

CC8785

CC8786

CC8787

CC8788

CC8789

CC8790
@ 1 1 1
AA32 VDDIO_MEM_S3_11 VDDCR_29 V15

22UC_6.3VC_MC_X5RC_0603

CC1375

CC1337

CC1338
AC20 VDDIO_MEM_S3_12 VDDCR_30 V17
VDDIO_MEM_S3_13 VDDCR_31

2
2 2 2 2 2 AC22 W7

l
2 2 2 AC25 VDDIO_MEM_S3_14 VDDCR_32 W10
AC28 VDDIO_MEM_S3_15 VDDCR_33 W14

ia
+1.8VS BO BU AD23 VDDIO_MEM_S3_16 VDDCR_34 W16
AD26 VDDIO_MEM_S3_17 VDDCR_35 Y8

1U_0402_6.3V6K

1U_0402_6.3V6K
CD@
3/19 CC8788,CC8789,CC8790 stuff for S145API EMC request AD28 VDDIO_MEM_S3_18 VDDCR_36 Y13
1 1 1 VDDIO_MEM_S3_19 VDDCR_37
AD32 Y15

CC1376

CC1336

CC1335
AE20 VDDIO_MEM_S3_20 VDDCR_38 Y17
AE22 VDDIO_MEM_S3_21 VDDCR_39 AA7
+VDDCR_SOC 2 2 2 AE25 VDDIO_MEM_S3_22 VDDCR_40 AA10

22UC_6.3VC_MC_X5RC_0603

t
+1.8VS +1.8VALW AE28 VDDIO_MEM_S3_23 VDDCR_41 AA14
BO BU AF23 VDDIO_MEM_S3_24 VDDCR_42 AA16
CD@ AF26 VDDIO_MEM_S3_25 VDDCR_43 AA18
1 1 VDDIO_MEM_S3_26 VDDCR_44

en
C +1.8VALW AF28 AB13 C
VDDIO_MEM_S3_27 VDDCR_45

2
AF32 AB15

1U_0402_6.3V6K

1U_0402_6.3V6K
CC1372 CC1383
10U 6.3V M X5R 0402 RC3154 RC3118 AG20 VDDIO_MEM_S3_28 VDDCR_46 AB17
10U 6.3V M X5R 0402 1 1 VDDIO_MEM_S3_29 VDDCR_47
2 2 AG22 AB19

CC1333

CC1334
1 @
0_0402_5% 0_0402_5%
AG25 VDDIO_MEM_S3_30 VDDCR_48 AC14

CC1377
+VDD_AUD_ALW AG28 VDDIO_MEM_S3_31 VDDCR_49 AC16

22UC_6.3VC_MC_X5RC_0603
@
VDDIO_MEM_S3_32 VDDCR_50

1
2 2 AJ20 AC18

0.22U_0201_6.3V6-K
2 AJ23 VDDIO_MEM_S3_33 VDDCR_51 AD7

1U_0402_6.3V6K
BO BU AJ26 VDDIO_MEM_S3_34 VDDCR_52 AD10
1 1 1 VDDIO_MEM_S3_35 VDDCR_53
AJ28 AD13
22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

CC8784

CC1385

CC1339
CD@
VDDIO_MEM_S3_36 VDDCR_54

fid
+3VALW_APU AJ32 AD15

10U 6.3V M X5R 0402

10U 6.3V M X5R 0402


AK28 VDDIO_MEM_S3_37 VDDCR_55 AD17

1U_0402_6.3V6K

1U_0402_6.3V6K
@
2 2 2 AL28 VDDIO_MEM_S3_38 VDDCR_56 AD19
1 1 1 1 VDDIO_MEM_S3_39 VDDCR_57
+1.2V AL32 AE8

CC1378

CC1350

CC1331

CC1332
VDDIO_MEM_S3_40 VDDCR_58 AE14
180P_0402_50V8-J BO BU
0.2A AP12 VDDCR_59 AE16
1U_0402_6.3V6K

1U_0402_6.3V6K

2 2 2 2 VDDIO_AUDIO VDDCR_60 AE18


0.25A

22UC_6.3VC_MC_X5RC_0603
1 1 1 1 1 1 1 1 1 1 1 1 VDDCR_61
AL18 AF7
CC1257

CC1341

CC1342

CC1343

CC1344

CC1345

CC1346

CC1347

CC1348

CC1373

CC1374

CC1384

BO BU AM17 VDD_33_1 VDDCR_62 AF10


VDD_33_2 VDDCR_63 AF13
2 2 2 2 2 2 2 2 2 2 2 2 +0.9VALW
CD@
2A AL20 VDDCR_64 AF15

n
AM19 VDD_18_1 VDDCR_65 AF17

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
CD@ CD@ CD@ VDD_18_2 VDDCR_66 AF19
1 1 1 0.5A AL19 VDDCR_67 AG14

CC1328

CC1329

CC1330
1 VDD_18_S5_1 VDDCR_68
All BU(on bottom side under SOC) AM18 AG16

CC1379
CD@
VDD_18_S5_2 VDDCR_69 AG18
2 2 2 0.25A VDDCR_70

Co
AL17 AH13
2 AM16 VDD_33_S5_1 VDDCR_71 AH15
VDD_33_S5_2 VDDCR_72 AH17
1A

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603
CD@ VDDCR_73
BO BU CD@ AL14 AH19
+1.2V +0.9VS AL15 VDDP_S5_1 VDDCR_74 AJ7
AM14 VDDP_S5_2 VDDCR_75 AJ10

180P_50V_J_NPO_0402
VDDP_S5_3 VDDCR_76 AJ14
4A

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
AL13 VDDCR_77 AJ16
180P_50V_J_NPO_0402
0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

1 1 1 1 1 1 1 1 1 1 1 VDDP_1 VDDCR_78
AM12 AJ18
180P_0402_50V8-J

CC1381

CC1380

CC1319

CC1320

CC1321

CC1322

CC1323

CC1324

CC1325

CC1326

CC1327
AM13 VDDP_2 VDDCR_79 AK13
1 1 1 1 1 1 VDDP_3 VDDCR_80
AN12 AK15
CC168

CC169

CC170

CC172

CC179

CC176

2 2 2 2 2 2 2 2 2 2 2 AN13 VDDP_4 VDDCR_81 AK17


VDDP_5 VDDCR_82 AK19
2 2 2 2 2 2 AT11 VDDCR_83

B
C BO(Bottom side outside SOC) BU VDDBT_RTC_G
FP5 REV 0.90
B
@ CD@ 1/17 Delete reserve capacitor C145 10uF,C147 1uF +RTCBATT +RTCBATT_APU
@
1 2 0.1A PART 6 OF 13

DECOUPLING BETWEEN PROCESSOR AND DIMMs RC3128 1K_0402_5%


@ AMD-RAVEN-FP5_BGA1140

0.22U_0201_6.3V6-K
ACROSS VDDIO AND VSS SPLIT

1U_0402_6.3V6K
F
1 1

CC1340

CC192
2 2
LC

BU

UC5
VCCRTC
RC231 1 2 10K_0402_5% 1
Vin
3 +RTCBATT
Vout
1U_0402_6.3V6K

1U_0402_6.3V6K

1
1 2 1
GND

1
CC37

CC194
RC8
470_0603_5%
AP2138N-1.5TRG1_SOT23-3 @
2 2 JCMOS1
@

12
D QC7
2 EC_RTCRST#_ON
G EC_RTCRST#_ON 31

1
S RC15
L2N7002KWT1G_SOT323-3

3
@ 100K_0402_5%
@

2
A A

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/15 Deciphered Date 2013/08/15 FP5 POWER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OFSize
R&D Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
S145 API 1.0

Date: Tuesday, May 28, 2019 Sheet 11 of 44


5 4 3 2 1
5 4 3 2 1

D D

UC2G UC2H UC2K


GND GND GND/RSVD
N12 K32 V8 AG8 AR5 BD16
A3 VSS_316 VSS_62 L5 V11 VSS_124 VSS_186 AG11 AR7 VSS_248 VSS_310 BD19
A5 VSS_1 VSS_63 L13 V12 VSS_125 VSS_187 AG12 AR12 VSS_249 VSS_311 BD21
A7 VSS_2 VSS_64 L15 V14 VSS_126 VSS_188 AG13 AR14 VSS_250 VSS_312 BD23
A10 VSS_3 VSS_65 L18 V16 VSS_127 VSS_189 AG15 AR16 VSS_251 VSS_313 BD26
A12 VSS_4 VSS_66 L20 V18 VSS_128 VSS_190 AG17 AR19 VSS_252 VSS_314 BD30
A14 VSS_5 VSS_67 L25 V20 VSS_129 VSS_191 AG19 AR21 VSS_253 VSS_315
A16 VSS_6 VSS_68 L28 V22 VSS_130 VSS_192 AH14 AR26 VSS_254
A19 VSS_7 VSS_69 M1 V25 VSS_131 VSS_193 AH16 AR28 VSS_255
A21 VSS_8 VSS_70 M5 W1 VSS_132 VSS_194 AH18 AR32 VSS_256
A23 VSS_9 VSS_71 M12 W5 VSS_133 VSS_195 AH20 AU5 VSS_257
A26 VSS_10 VSS_72 M21 W13 VSS_134 VSS_196 AJ1 AU8 VSS_258
A30 VSS_11 VSS_73 M23 W15 VSS_135 VSS_197 AJ5 AU11 VSS_259
C3 VSS_12 VSS_74 M26 W17 VSS_136 VSS_198 AJ13 AU13 VSS_260
C32 VSS_13 VSS_75 M28 W19 VSS_137 VSS_199 AJ15 AU15 VSS_261

l
D16 VSS_14 VSS_76 M32 W23 VSS_138 VSS_200 AJ17 AU18 VSS_262
D18 VSS_15 VSS_77 N4 W26 VSS_139 VSS_201 AJ19 AU20 VSS_263
VSS_16 VSS_78 VSS_140 VSS_202 VSS_264

tia
D20 N5 Y5 AK5 AU22
E7 VSS_17 VSS_79 N8 Y11 VSS_141 VSS_203 AK8 AU25 VSS_265 B20
E8 VSS_18 VSS_80 N11 Y12 VSS_142 VSS_204 AK11 AU28 VSS_266 RSVD_1 G3
E10 VSS_19 VSS_81 N13 Y14 VSS_143 VSS_205 AK12 AV1 VSS_267 RSVD_5 J20
E11 VSS_20 VSS_82 N15 Y16 VSS_144 VSS_206 AK14 AV5 VSS_268 RSVD_7 K3
E12 VSS_21 VSS_83 N17 Y18 VSS_145 VSS_207 AK16 AV7 VSS_269 RSVD_8 K6
E13 VSS_22 VSS_84 N19 Y20 VSS_146 VSS_208 AK18 AV10 VSS_270 RSVD_9 K20
E14 VSS_23 VSS_85 N22 AA1 VSS_147 VSS_209 AK20 AV12 VSS_271 RSVD_10 M3
E15 VSS_24 VSS_86 N25 AA5 VSS_148 VSS_210 AK22 AV14 VSS_272 RSVD_11 M6
E16 VSS_25 VSS_87 N28 AA13 VSS_149 VSS_211 AK25 AV16 VSS_273 RSVD_12 M13

en
C C
E18 VSS_26 VSS_88 P1 AA15 VSS_150 VSS_212 AL1 AV19 VSS_274 RSVD_13 P6
E19 VSS_27 VSS_89 P5 AA17 VSS_151 VSS_213 AL5 AV21 VSS_275 RSVD_22 P22
E20 VSS_28 VSS_90 P14 AA19 VSS_152 VSS_214 AL7 AV23 VSS_276 RSVD_23 T3
E21 VSS_29 VSS_91 P16 AB14 VSS_153 VSS_215 AL10 AV26 VSS_277 RSVD_30 T6
E22 VSS_30 VSS_92 P18 AB16 VSS_154 VSS_216 AL12 AV28 VSS_278 RSVD_31 T29
E23 VSS_31 VSS_93 P20 AB18 VSS_155 VSS_217 AL16 AV32 VSS_279 RSVD_37 W6
E25 VSS_32 VSS_94 P23 AB20 VSS_156 VSS_218 AL23 AW5 VSS_280 RSVD_44 W21
E26 VSS_33 VSS_95 P26 AC5 VSS_157 VSS_219 AL26 AW28 VSS_281 RSVD_49 W22
E27 VSS_34 VSS_96 P28 AC8 VSS_158 VSS_220 AM5 AY6 VSS_282 RSVD_50 Y21

id
F5 VSS_35 VSS_97 P32 AC11 VSS_159 VSS_221 AM8 AY7 VSS_283 RSVD_57 Y27
F28 VSS_36 VSS_98 R5 AC12 VSS_160 VSS_222 AM15 AY8 VSS_284 RSVD_58 AA3
G1 VSS_37 VSS_99 R11 AC13 VSS_161 VSS_223 AM20 AY10 VSS_285 RSVD_59 AA6
G5 VSS_38 VSS_100 R12 AC15 VSS_162 VSS_224 AM22 AY11 VSS_286 RSVD_60 AC29
G16 VSS_39 VSS_101 R13 AC17 VSS_163 VSS_225 AM25 AY12 VSS_287 RSVD_69 AD3
G19 VSS_40 VSS_102 R15 AC19 VSS_164 VSS_226 AM28 AY13 VSS_288 RSVD_70 AD6
G21 VSS_41 VSS_103 R17 AD1 VSS_165 VSS_227 AN1 AY14 VSS_289 RSVD_71 AF3
VSS_42 VSS_104 VSS_166 VSS_228 VSS_290 RSVD_74

nf
G23 R19 AD5 AN5 AY15 AF6
G26 VSS_43 VSS_105 R22 AD14 VSS_167 VSS_229 AN7 AY16 VSS_291 RSVD_75 AF30
G28 VSS_44 VSS_106 R25 AD16 VSS_168 VSS_230 AN10 AY18 VSS_292 RSVD_78 AJ6
G32 VSS_45 VSS_107 R28 AD18 VSS_169 VSS_231 AN15 AY19 VSS_293 RSVD_79 AJ24
H5 VSS_46 VSS_108 R30 AD20 VSS_170 VSS_232 AN18 AY20 VSS_294 RSVD_80 AK23
H13 VSS_47 VSS_109 T1 AE5 VSS_171 VSS_233 AN21 AY21 VSS_295 RSVD_81 AK27
H18 VSS_48 VSS_110 T5 AE11 VSS_172 VSS_234 AN23 AY22 VSS_296 RSVD_82 AL3
H20 VSS_49 VSS_111 T14 AE12 VSS_173 VSS_235 AN26 AY23 VSS_297 RSVD_83 AN29

Co
H22 VSS_50 VSS_112 T16 AE13 VSS_174 VSS_236 AN28 AY25 VSS_298 RSVD_87 AN31
H25 VSS_51 VSS_113 T18 AE15 VSS_175 VSS_237 AN32 AY26 VSS_299 RSVD_88
H28 VSS_52 VSS_114 T20 AE17 VSS_176 VSS_238 AP5 AY27 VSS_300 +5VALW
K1 VSS_53 VSS_115 T23 AE19 VSS_177 VSS_239 AP8 BB1 VSS_301
K5 VSS_54 VSS_116 T26 AF1 VSS_178 VSS_240 AP13 BB20 VSS_302
K16 VSS_55 VSS_117 T28 AF5 VSS_179 VSS_241 AP15 BB32 VSS_303 M14 RC3103
UNNAMED_15_FP5_I216_RSVD14
1 @ 2 0_0402_5% APU_PLLTEST0
K19 VSS_56 VSS_118 U13 AF14 VSS_180 VSS_242 AP18 BD3 VSS_304 RSVD_14 AL6 1 2 APU_PLLTEST0 6
RC3104
UNNAMED_15_FP5_I216_RSVD84
@ 0_0402_5%
K21 VSS_57 VSS_119 U15 AF16 VSS_181 VSS_243 AP20 BD7 VSS_305 RSVD_84 AL11 RC3105
UNNAMED_15_FP5_I216_RSVD85
1 @ 2 0_0402_5% APU_PLLTEST1
VSS_58 VSS_120 VSS_182 VSS_244 VSS_306 RSVD_85 APU_PLLTEST1 6
K22 U17 AF18 AP25 BD10 AN16 RC3106
UNNAMED_15_FP5_I216_RSVD86
1 @ 2 0_0402_5% APU_DBRDY
K26 VSS_59 VSS_121 U19 AF20 VSS_183 VSS_245 AP28 BD12 VSS_307 RSVD_86 APU_DBRDY 6
K28 VSS_60 VSS_122 V5 AG5 VSS_184 VSS_246 AR1 BD14 VSS_308
VSS_61 VSS_123 VSS_185 VSS_247 VSS_309
FP5 REV 0.90 FP5 REV 0.90 FP5 REV 0.90

B
@
PART 7 OF 13
AMD-RAVEN-FP5_BGA1140
CF
@
PART 8 OF 13
AMD-RAVEN-FP5_BGA1140 @
PART 11 OF 13
AMD-RAVEN-FP5_BGA1140
B
LC

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/15 Deciphered Date 2013/08/15 FP5 GND


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
S145 API 1.0

Date: Tuesday, May 28, 2019 Sheet 12 of 44


5 4 3 2 1
5 4 3 2 1

+1.8VS +1.8VALW +3VALW_APU

1
RC3134 RC3133 RC156
10K_0402_5% 10K_0402_5% 10K_0402_5%
@

2
D D
PCH_SPI_CLK
8,29 PCH_SPI_CLK 7 SYS_RESET#

1
RC159 RC163
2K_0402_5% 2K_0402_5%
@ @

2
STRAP PINS SYS_RESET#

l
tia
1:USE 48MHZ CRYSTAL CLOCK AND
GENERATE BOTH INTERNAL AND EXTERNAL CLOCKS(DEFAULT)
PCH_SPI_CLK 0:USE 100MHZ PCIE CLOCK AS REFERENCE CLOCK AND
GENERATE INTERNAL CLOCKS ONLY

en
C C

1:NORMAL RESET MODE(DEFAULT)


SYS_RESET# 0:SHORT RESET MODE

id
nf
LPC ROM EMULATOR HEADER

Co
+3VALW_APU +3VS_APU
15P_0402_50V8J
RC3147 PIN4 should be removed as a Key
2

CC1387 2 1 1
UNNAMED_16_CAP_I116_B 2 33_0402_5%
RC3146 RC3145
@ @ 0_0402_5% 0_0402_5%
DAISY CHAIN ROUTING FOR LPC SIGNALS
LPC@
C LPC@
1

B B
CLK_PCI_EC
8,31 CLK_PCI_EC LPC_FRAME# J601
1 2
8,31 LPC_FRAME# APU_LPC_RST# RC3144 1 LPC@ 2 0_0402_5% 3 4
8,31 APU_LPC_RST# LPC_RST#_H 5 6 UNNAMED_16_CON20_I130_P6
RC3142 1 @ 2 0_0402_5% PM_SLP_S5#
F
LPC_AD3 LPC_AD2 PM_SLP_S5# 7,31
7 8
8,31 LPC_AD3 LPCRUNPWR 9 10 LPC_AD1 LPC_AD2 8,31
LPC_AD0 LPC_AD1 8,31
11 12
8,31 LPC_AD0 I2C2_SCL_LPC I2C2_SDA_LPC RC3153 1 LPC@
RC3152 1 LPC@ 2 0_0402_5% 13 14 2 0_0402_5%
LC

7,32 TP_I2C0_SCL_R TP_I2C0_SDA_R 7,32


15 16 SERIRQ
LPC_CLKRUN# SERIRQ 8,31
17 18
19 20 LPC_CLKRUN# 8
LPCPD# LDRQ0#
8 LPCPD# LDRQ0# 8
2 2 HEADER_2X10
CD347 @
CD345 0.1U_6.3V_K_X5R_0201
0.1U_6.3V_K_X5R_0201 LPC@
LPC@ 1 1

RC3152 RC3153 should be put on APU side to reduce stub when MP

+3VS_APU

RC3214 1 LPC@ 2 10K_0402_5% LPCPD#

RC3215 1 @ 2 10K_0402_5% LPC_CLKRUN#

RC3216 1 LPC@ 2 100K_0402_5% APU_LPC_RST#


A A
CC1392 1 @ 2 150P_0402_50V8-J

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/15 Deciphered Date 2013/08/15 FP5 Straps


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
Size DocumentNumber
Document Number Rev
Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
S145 API 1.0

Date:
Date: Tuesday, May 28, 2019 Sheet
Sheet 13 of 44
5 4 3 2 1
5 4 3 2 1

DDRA_DQ[0..63]
DDRA_DQ[0..63] 5
DDRA_DQS[0..7]
DDRA_DQS[0..7] 5
DDRA_DQS#[0..7]
DDRA_DQS#[0..7] 5
DDRA_MA[0..13]
+1.2V +1.2V DDRA_MA[0..13] 5
update JDDR1 symbol 1129 DDRA_DM[0..7]
DDRA_DM[0..7] 5
JDDR1A JDDR1B
Swap Table
1 2 DDRA_MA3 131 132 DDRA_MA2
DDRA_DQ1 3 VSS_1 VSS_2 4 DDRA_DQ4 DDRA_MA1 133 A3 A2 134 MEM_MA_EVENT#
DQ5 DQ4 A1 EVENT_n MEM_MA_EVENT# 5 Pin Name Net Name
5 6 135 136
DDRA_DQ6 7 VSS_3 VSS_4 8 DDRA_DQ5 DDRA_CLK0 137 VDD_9 VDD_10 138 DDRA_CLK1
DQ1 DQ0 5 DDRA_CLK0 CK0_t CK1_t DDRA_CLK1 5 DQ0 DDRA_DQ6
9 10 DDRA_CLK0# 139 140 DDRA_CLK1#
D
DDRA_DQS#0 VSS_5 VSS_6 DDRA_DM0 5 DDRA_CLK0# CK0_c CK1_c DDRA_CLK1# 5 DQ1 DDRA_DQ5 D
11 12 141 142
DDRA_DQS0 13 DQS0_C DM0_n/DBIO_n/NC 14 143 VDD_11 VDD_12 144 DDRA_MA0 DQ2 DDRA_DQ2
DQS0_t VSS_7 DDRA_DQ0 5 DDRA_PAR Parity A0 DQ3 DDRA_DQ3
15 16
DDRA_DQ7 17 VSS_8 DQ6 18 DQ4 DDRA_DQ4
19 DQ7 VSS_9 20 DDRA_DQ2 DDRA_BA1 145 146 DDRA_MA10 DQ5 DDRA_DQ0
DDRA_DQ3 VSS_10 DQ2 5 DDRA_BA1 BA1 A10/AP
21 22 147 148 DQ6 DDRA_DQ1
23 DQ3 VSS_11 24 DDRA_DQ12 DDRA_CS0# 149 VDD_13 VDD_14 150 DDRA_BA0
DDRA_DQ8 25 VSS_12 DQ12 26 5 DDRA_CS0# DDRA_MA14_WE# 151 CS0_n BA0 152 DDRA_MA16_RAS# DDRA_BA0 5 DQ7 DDRA_DQ7
27 DQ13 VSS_13 28 DDRA_DQ13 5 DDRA_MA14_WE#
153 WE_n/A14 RAS_n/A16 154 DDRA_MA16_RAS# 5 DQS#0 DDRA_DQS#0
DDRA_DQ9 29 VSS_14 DQ8 30 DDRA_ODT0 155 VDD_15 VDD_16 156 DDRA_MA15_CAS# DQS0 DDRA_DQS0
31 DQ9 VSS_15 32 DDRA_DQS#1 5 DDRA_ODT0 DDRA_CS1# 157 ODT0 CAS_n/A15 158 DDRA_MA13 DDRA_MA15_CAS# 5
DDRA_DM1 VSS_16 DQS1_c DDRA_DQS1 5 DDRA_CS1# CS1_n A13
33 34 159 160 DQ8 DDRA_DQ13
35 DM1_n/DBl1_n/NC DQS1_t 36 DDRA_ODT1 161 VDD_17 VDD_18 162 +VREF_CA
DDRA_DQ14 VSS_17 VSS_18 DDRA_DQ10 5 DDRA_ODT1 ODT1 C0/CS2_n/NC DQ9 DDRA_DQ9
37 38 163 164
39 DQ15 DQ14 40 165 VDD_19 VREFCA 166 DDRA0_SA2 DQ10 DDRA_DQ14
DDRA_DQ11 41 VSS_19 VSS_20 42 DDRA_DQ15 167 C1/CS3_n/NC SA2 168 DQ11 DDRA_DQ10
43 DQ10 DQ11 44 DDRA_DQ33 169 VSS_53 VSS_54 170 DDRA_DQ37 DQ12 DDRA_DQ12
DDRA_DQ17 45 VSS_21 VSS_22 46 DDRA_DQ16 171 DQ37 DQ36 172 DQ13 DDRA_DQ8
47 DQ21 DQ20 48 DDRA_DQ32 173 VSS_55 VSS_56 174 DDRA_DQ36
VSS_23 VSS_24 DQ33 DQ32 DQ14 DDRA_DQ15
DDRA_DQ21 49 50 DDRA_DQ20 175 176
51 DQ17 DQ16 52 DDRA_DQS#4 177 VSS_57 VSS_58 178 DDRA_DM4 DQ15 DDRA_DQ11
DDRA_DQS#2 53 VSS_25 VSS_26 54 DDRA_DM2 DDRA_DQS4 179 DQS4_c DM4_n/DBl4_n/NC 180 DQS#1 DDRA_DQS#1
DDRA_DQS2 55 DQS2_c DM2_n/DBl2_n/NC 56 181 DQS4_t VSS_59 182 DDRA_DQ39 DQS1 DDRA_DQS1
57 DQS2_t VSS_27 58 DDRA_DQ18 DDRA_DQ35 183 VSS_60 DQ39 184
DDRA_DQ22 59 VSS_28 DQ22 60 185 DQ38 VSS_61 186 DDRA_DQ38
DQ23 VSS_29 VSS_62 DQ35
DQ16 DDRA_DQ20

l
61 62 DDRA_DQ23 DDRA_DQ34 187 188
DDRA_DQ19 VSS_30 DQ18 DQ34 VSS_63 DDRA_DQ45
DQ17 DDRA_DQ21
63 64 189 190
DQ19 VSS_31 VSS_64 DQ45 DQ18 DDRA_DQ22

tia
65 66 DDRA_DQ24 DDRA_DQ40 191 192
DDRA_DQ25 67 VSS_32 DQ28 68 193 DQ44 VSS_65 194 DDRA_DQ44 DQ19 DDRA_DQ19
69 DQ29 VSS_33 70 DDRA_DQ28 DDRA_DQ41 195 VSS_66 DQ41 196 DQ20 DDRA_DQ16
DDRA_DQ29 71 VSS_34 DQ24 72 197 DQ40 VSS_67 198 DDRA_DQS#5 DQ21 DDRA_DQ17
73 DQ25 VSS_35 74 DDRA_DQS#3 DDRA_DM5 199 VSS_68 DQS5_c 200 DDRA_DQS5
VSS_36 DQS3_c DM5_n/DBl5_n/NC DQS5_t DQ22 DDRA_DQ23
DDRA_DM3 75 76 DDRA_DQS3 201 202
77 DM3_n/DBl3_n/NC DQS3_t 78 DDRA_DQ46 203 VSS_69 VSS_70 204 DDRA_DQ42 DQ23 DDRA_DQ18
DDRA_DQ30 79 VSS_37 VSS_38 80 DDRA_DQ26 205 DQ46 DQ47 206 DQS#2 DDRA_DQS#2
81 DQ30 DQ31 82 DDRA_DQ47 207 VSS_71 VSS_72 208 DDRA_DQ43 DQS2 DDRA_DQS2
DDRA_DQ31 83 VSS_39 VSS_40 84 DDRA_DQ27 209 DQ42 DQ43 210

en
C DQ26 DQ27 VSS_73 VSS_74 C
85 86 DDRA_DQ52 211 212 DDRA_DQ53 DQ24 DDRA_DQ28
87 VSS_41 VSS_42 88 213 DQ52 DQ53 214
CB5/NC CB4/NC DDRA_DQ49 VSS_75 VSS_76 DDRA_DQ48
DQ25 DDRA_DQ29
89 90 215 216
+1.2V +1.2V 91 VSS_43 VSS_44 92 +1.2V 217 DQ49 DQ48 218 DQ26 DDRA_DQ31
93 CB1/NC CB0/NC 94 DDRA_DQS#6 219 VSS_77 VSS_78 220 DDRA_DM6 DQ27 DDRA_DQ27
RD273 1 @ 2 240_0402_1% 95 VSS_45 VSS_46 96 DDRA_DQS6 221 DQS6_c DM6_n/DBl6_n/NC 222 DQ28 DDRA_DQ24
RD274 1 @ 2 240_0402_1% 97 DQS8_c DM8_n/DBI8_n/NC 98 223 DQS6_t VSS_79 224 DDRA_DQ54 DQ29 DDRA_DQ25
99 DQS8_t VSS_47 100 DDRA_DQ50 225 VSS_80 DQ54 226
VSS_48 CB6/NC DQ55 VSS_81 DQ30 DDRA_DQ30
101 102 227 228 DDRA_DQ51
for MEM_MB_RST# overshoot issue DQ31 DDRA_DQ26

id
103 CB2/NC VSS_49 104 DDRA_DQ55 229 VSS_82 DQ50 230
105 VSS_50 CB7/NC 106 231 DQ51 VSS_83 232 DDRA_DQ56 DQS#3 DDRA_DQS#3
107 CB3/NC VSS_51 108 MEM_MA_RST# DDRA_DQ60 233 VSS_84 DQ60 234 DQS3 DDRA_DQS3
DDRA_CKE0 109 VSS_52 RESET_n 110 DDRA_CKE1 MEM_MA_RST# 5 235 DQ61 VSS_85 236 DDRA_DQ61
5 DDRA_CKE0 CKE0 CKE1 DDRA_CKE1 5 DDRA_DQ57 VSS_86 DQ57
111 112 237 238 DQ32 DDRA_DQ33

0.1U_0201_6.3V6-K
DDRA_BG1 113 VDD_1 VDD_2 114 DDRA_ACT# 239 DQ56 VSS_87 240 DDRA_DQS#7
5 DDRA_BG1 DDRA_BG0 BG1 ACT_n DDRA_ALERT# DDRA_ACT# 5 1
DDRA_DM7 VSS_88 DQS7_c DDRA_DQS7
DQ33 DDRA_DQ37
115 116 241 242

nf
5 DDRA_BG0
117 BG0 ALERT_n 118
DDRA_ALERT# 5
243 DM7_n/DBl7_n/NC DQS7_t 244 DQ34 DDRA_DQ34
DDRA_MA12 119 VDD_3 VDD_4 120 DDRA_MA11 DDRA_DQ63 245 VSS_89 VSS_90 246 DDRA_DQ58 DQ35 DDRA_DQ38
CD120
DDRA_MA9 121 A12 A11 122 DDRA_MA7 2 247 DQ62 DQ63 248 DQ36 DDRA_DQ32
123 A9 A7 124 @ DDRA_DQ62 249 VSS_91 VSS_92 250 DDRA_DQ59 DQ37 DDRA_DQ36
DDRA_MA8 125 VDD_5 VDD_6 126 DDRA_MA5 251 DQ58 DQ59 252
A8 A5 +VDDSPD VSS_93 VSS_94 DQ38 DDRA_DQ35
DDRA_MA6 127 128 DDRA_MA4 APU_SMB_CLK 253 254 APU_SMB_DATA
129 A6 A4 130 7,27 APU_SMB_CLK 255 SCL SDA 256 DDRA0_SA0 APU_SMB_DATA 7,27 DQ39 DDRA_DQ39
VDD_7 VDD_8 VDDSPD SA0 DQS#4 DDRA_DQS#4

Co
257 258
+2.5V VPP_1 VTT DDRA0_SA1 +0.6VS DQS4 DDRA_DQS4
1 1 259 260
CD28 CD29 VPP_2 SA1
1
ARGOS_D4AR0-26001-1P40 1U_0402_6.3V6K 0.1U_0201_6.3V6-K CD121 261 262 DQ40 DDRA_DQ44
22P_0402_50V8-J GND_1 GND_2
ME@
2 2 ARGOS_D4AR0-26001-1P40
DQ41 DDRA_DQ40
RF RF_NS@
2 DQ42 DDRA_DQ47
ME@
DQ43 DDRA_DQ43
DQ44 DDRA_DQ41
DQ45 DDRA_DQ45
+3VS +VDDSPD
DQ46 DDRA_DQ46
1 2 0_0402_5%
DQ47 DDRA_DQ42
RD271 @
B
+1.2V
+2.5VS
C DQS#5
DQS5
DDRA_DQS#5
DDRA_DQS5 B
+1.2V RD272 1 @ 2 0_0402_5%
+2.5V +2.5VS DQ48 DDRA_DQ48
1

DQ49 DDRA_DQ49
F
1

RD10 3 1

D
RD258 +VREF_CA QD1
DQ50 DDRA_DQ55
1K_0402_1%
1K_0402_1% LP2301ALT1G_SOT23-3 DQ51 DDRA_DQ50
DQ52 DDRA_DQ52
15mil Layout Note: Place near JDDR1

G
LC
2

2
@
@
DQ53 DDRA_DQ53
2

DQ54 DDRA_DQ54
1000P 25V K X7R 0201
0.1U_0201_6.3V6-K
2

DDRA_ALERT#
DQ55 DDRA_DQ51
1U_0402_6.3V6K

19,33 SUSP
RD11 1 1 1
1K_0402_1% +0.6VS +1.2V DQS#6 DDRA_DQS#6
DQS6 DDRA_DQS6
follow CRB 1pcs 4.7uf + 1pcs 0.1uf follow CRB 6pcs 0.1uf
CD262

CD116

CD117
1

2 2 2 DQ56 DDRA_DQ60

180P_50V_J_NPO_0402
0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

27P 25V J NPO 0201

0.1U_0201_6.3V6-K

27P 25V J NPO 0201

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
DQ57 DDRA_DQ56
0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

4.7U_0402_6.3V6M

1 1 1 1 1 1 1 1 1 1 1 1 1 DQ58 DDRA_DQ63
1 1 1 1 CD16 CD17 CD18 CD20 CD21 CD22 CD23 CD58 CD59 CD60 CD61 CD62 CC211
CD249 CD251 CD250 CD248 @ EMC_NS@ @ EMC_NS@ @ @ DQ59 DDRA_DQ59
@ @ DQ60 DDRA_DQ61
2 2 2 2 2 2 2 2 2 2 2 2 2 DQ61 DDRA_DQ57
2 2 2 2
DQ62 DDRA_DQ58
DQ63 DDRA_DQ62
+3VS +3VS +3VS DQS#7 DDRA_DQS#7
DQS7 DDRA_DQS7
1

RD26 RD269 RD270 +2.5V +1.2V

10K_0402_5% 10K_0402_5% 10K_0402_5% follow CRB 1pcs 1uf + 2pcs 0.1uf + 1pcs 180pf
22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

@ @ @
2

DDRA0_SA0 DDRA0_SA1 DDRA0_SA2


180P_50V_J_NPO_0402

10U_0603_6.3V6M

10U_0603_6.3V6M
1U_0402_6.3V6K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

1 1 1 1 1 1 1 1 1
2

1 1 1 1 CD261 CD63 CD66 CD67 CD19 CD260 CD12 CD348 CD349


A RD268 RD28 RD29 CD122 CD123 CD124 CC206 @ @ 22P_0402_50V8-J 22P_0402_50V8-J 22P_0402_50V8-J 22P_0402_50V8-J 22P_0402_50V8-J A
@ 0_0402_5% @ 0_0402_5% @ 0_0402_5% RF_NS@ RF_NS@ RF_NS@ RF_NS@ RF_NS@
2 2 2 2 2 2 2 2 2
2 2 2 2
RF
1

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/15 Deciphered Date 2013/08/15 DDRIV SO-DIMM A
SPD Address = A2H THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL Size Document
Document Number
Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
S145 API 1.0

Date:
Date: Tuesday, May 28, 2019 Sheet
Sheet 14 of 44
5 4 3 2 1
5 4 3 2 1

DDRB_DQ[0..63]
DDRB_DQ[0..63] 5
DDP@ DDRB_DQS[0..7]
DRAM_DDRB_BG1 DDRB_BG1 DDRB_DQS[0..7] 5
RD238 2 1 0_0201_5%
DDRB_BG1 5 DDRB_DQS#[0..7]
UD1 UD2 DDRB_DQS#[0..7] 5
DDRB_MA[0..13]
DDRB_MA[0..13] 5

1
DDRB_MA0 P3 G2 DDRB_DQ3 DDRB_MA0 P3 G2 DDRB_DQ19
DDRB_MA1 P7 A0 DQ0 F7 DDRB_DQ7 DDRB_MA1 P7 A0 DQ0 F7 DDRB_DQ23 RD234 DDRB_DM[0..7]
DDRB_MA2 A1 DQ1 DDRB_DQ2 DDRB_MA2 A1 DQ1 DDRB_DQ22 DDRB_DM[0..7] 5
R3 H3 R3 H3 SDP@ 0_0201_5%
DDRB_MA3 N7 A2 DQ2 H7 DDRB_DQ0 DDRB_MA3 N7 A2 DQ2 H7 DDRB_DQ17
DDRB_MA4 N3 A3 DQ3 H2 DDRB_DQ6 DDRB_MA4 N3 A3 DQ3 H2 DDRB_DQ18
A4 DQ4 A4 DQ4

2
DDRB_MA5 P8 H8 DDRB_DQ5 DDRB_MA5 P8 H8 DDRB_DQ21
DDRB_MA6 P2 A5 DQ5 J3 DDRB_DQ1 DDRB_MA6 P2 A5 DQ5 J3 DDRB_DQ20
DDRB_MA7 R8 A6 DQ6 J7 DDRB_DQ4 DDRB_MA7 R8 A6 DQ6 J7 DDRB_DQ16
DDRB_MA8 A7 DQ7 DDRB_DQ11 DDRB_MA8 A7 DQ7 DDRB_DQ27 +1.2V
DDRB_MA9
R2
R7 A8 DQ8
A3
B8 DDRB_DQ8 DDRB_MA9
R2
R7 A8 DQ8
A3
B8 DDRB_DQ29 3/18 CD163 change from SE00000VX00 to SE102104K0J
DDRB_MA10 M3 A9 DQ9 C3 DDRB_DQ15 DDRB_MA10 M3 A9 DQ9 C3 DDRB_DQ31 DRAM@
DDRB_MA11 T2 A10/AP DQ10 C7 DDRB_DQ9 DDRB_MA11 T2 A10/AP DQ10 C7 DDRB_DQ25 UD1_DDRB_UZQ DDRB_CLK0# RD122 1 DRAM@ 2 1/20W _39_+-5%_0201 CD163 1 2 0.1U_0402_10V7K
DDRB_MA12 M7 A11 DQ11 C2 DDRB_DQ10 DDRB_MA12 M7 A11 DQ11 C2 DDRB_DQ26 DDRB_CLK0 RD123 1 DRAM@ 2 1/20W _39_+-5%_0201
DDRB_MA13 T8 A12/BC_N DQ12 C8 DDRB_DQ13 DDRB_MA13 T8 A12/BC_N DQ12 C8 DDRB_DQ28
D D
A13 DQ13 D3 DDRB_DQ14 A13 DQ13 D3 DDRB_DQ30 UD2_DDRB_UZQ
DDRB_MA14_W E# L2 DQ14 D7 DDRB_DQ12 DDRB_MA14_W E# L2 DQ14 D7 DDRB_DQ24 +0.6VS
5 DDRB_MA14_W E# DDRB_MA15_CAS# WE_N/A14 DQ15 DDRB_MA15_CAS# WE_N/A14 DQ15
M8 M8
5 DDRB_MA15_CAS# DDRB_MA16_RAS# CAS_N/A15 +1.2V DDRB_MA16_RAS# CAS_N/A15 +1.2V UD3_DDRB_UZQ
L8 L8
5 DDRB_MA16_RAS# RAS_N/A16 RAS_N/A16
D1 D1
DDRB_CLK0# K8 VDD1 J1 DDRB_CLK0# K8 VDD1 J1 DDRB_MA0 RD148 1 DRAM@ 2 1/20W _39_+-5%_0201
5 DDRB_CLK0# DDRB_CLK0 CK_C VDD2 DDRB_CLK0 CK_C VDD2 UD4_DDRB_UZQ DDRB_MA1
5 DDRB_CLK0
K7 L1 K7 L1 RD149 1 DRAM@ 2 1/20W _39_+-5%_0201
CK_T VDD3 R1 CK_T VDD3 R1 DDRB_MA2 RD124 1 DRAM@ 2 1/20W _39_+-5%_0201
DDRB_CKE0 K2 VDD4 B3 DDRB_CKE0 K2 VDD4 B3 DDRB_MA3 RD125 1 DRAM@ 2 1/20W _39_+-5%_0201
5 DDRB_CKE0 CKE VDD5 CKE VDD5 DDRB_MA4
G7 G7 RD126 1 DRAM@ 2 1/20W _39_+-5%_0201
VDD6 VDD6

1
DDRB_DQS#0 F3 B9 DDRB_DQS#2 F3 B9 DDRB_MA5 RD127 1 DRAM@ 2 1/20W _39_+-5%_0201

240_0402_1%

240_0402_1%

240_0402_1%

240_0402_1%
DDRB_DQS0 G3 LDQS_C VDD7 J9 DDRB_DQS2 G3 LDQS_C VDD7 J9 DDRB_MA6 RD128 1 DRAM@ 2 1/20W _39_+-5%_0201

RD233

RD232

RD231

RD228
DDRB_DQS#1 A7 LDQS_T VDD8 L9 DDRB_DQS#3 A7 LDQS_T VDD8 L9 DDRB_MA7 RD129 1 DRAM@ 2 1/20W _39_+-5%_0201
DDRB_DQS1 B7 UDQS_C VDD9 T9 DDRB_DQS3 B7 UDQS_C VDD9 T9 DDRB_MA8 RD130 1 DRAM@ 2 1/20W _39_+-5%_0201
UDQS_T VDD10 UDQS_T VDD10 DDRB_MA9 RD131 1 DRAM@ 2 1/20W _39_+-5%_0201

2
DDRB_DM1 E2 A1 DDRB_DM3 E2 A1 DDRB_MA10 RD132 1 DRAM@ 2 1/20W _39_+-5%_0201
DDRB_DM0 E7 NF/UDM_N/UDBI_N VDDQ1 C1 DDRB_DM2 E7 NF/UDM_N/UDBI_N VDDQ1 C1 DDRB_MA11 RD133 1 DRAM@ 2 1/20W _39_+-5%_0201
NF/LDM_N/LDBI_N VDDQ2 G1 NF/LDM_N/LDBI_N VDDQ2 G1 @ @ @ @ DDRB_MA12 RD134 1 DRAM@ 2 1/20W _39_+-5%_0201
DDRB_BA0 N2 VDDQ3 F2 DDRB_BA0 N2 VDDQ3 F2 DDRB_MA13 RD135 1 DRAM@ 2 1/20W _39_+-5%_0201
5 DDRB_BA0 DDRB_BA1 BA0 VDDQ4 DDRB_BA1 BA0 VDDQ4
RF 5 DDRB_BA1 N8
BA1 VDDQ5
J2 N8
BA1 VDDQ5
J2
DDRB_MA14_W E# RD138
F8 F8 1 DRAM@ 2 1/20W _39_+-5%_0201
DDRB_ACT# L3 VDDQ6 J8 DDRB_ACT# L3 VDDQ6 J8 DDRB_MA15_CAS# RD139 1 DRAM@ 2 1/20W _39_+-5%_0201
5 DDRB_ACT# DDRB_CS0# ACT_N VDDQ7 DDRB_CS0# ACT_N VDDQ7 DDRB_MA16_RAS# RD140
L7 A9 L7 A9 1 DRAM@ 2 1/20W _39_+-5%_0201
5 DDRB_CS0# DDRB_ALERT# CS_N VDDQ8 DDRB_ALERT# CS_N VDDQ8
P9 D9 P9 D9
5 DDRB_ALERT# ALERT_N VDDQ9 G9 +2.5V ALERT_N VDDQ9 G9 +2.5V RD233 RD232 RD231 RD228 will install different DDRB_ACT# RD144 1 DRAM@ 2 1/20W _39_+-5%_0201
5 DDRB_BG0
DDRB_BG0 M2
BG0
VDDQ10 DDRB_BG0 M2
BG0
VDDQ10 value base on SDP or DDP.control by Virtual symbol Swap Table
B1 B1 DDRB_ODT0 RD147 1 DRAM@ 2 1/20W _39_+-5%_0201
DDRB_ODT0 K3 VPP1 R9 DDRB_ODT0 K3 VPP1 R9 DDRB_CS0# 1 DRAM@ 2
5 DDRB_ODT0 ODT VPP2 ODT VPP2 DDRB_CKE0
RD145 1/20W _39_+-5%_0201 Pin Name Net Name
+VREF_CA_MD +VREF_CA_MD RD141 1 DRAM@ 2 1/20W _39_+-5%_0201
DDRB_PAR T3 M1 DDRB_PAR T3 M1 DQ0 DDRB_DQ3
5 DDRB_PAR PAR VREFCA PAR VREFCA +1.2V

1U_0402_6.3V6K

1U_0402_6.3V6K
DRAM_DDRB_BG1 1 DDP@ 2

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
1 1 1 1 RD229 1/20W _39_+-5%_0201 DQ1 DDRB_DQ6
10K_0402_5%1 DRAM@ 2 RD251 TEN1 N9 E1 10K_0402_5% 1 DRAM@ 2 RD253 TEN2 N9 E1
DQ2 DDRB_DQ2

CD202

CD203

CD232

CD233
TEN VSS1 K1 TEN VSS1 K1

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
1000P 25V K X7R 0201

1000P 25V K X7R 0201


VSS2 1 1 VSS2 1 1 DQ3 DDRB_DQ0

1
MEM_MB_RST# P1 N1 MEM_MB_RST# P1 N1 DDRB_BA0 RD142 1 DRAM@ 2 1/20W _39_+-5%_0201

CD189

CD188

CD230

CD231
5 MEM_MB_RST# RESET_N VSS3 2 2 RESET_N VSS3 DQ4 DDRB_DQ7
T1 DRAM@ DRAM@ T1 DRAM@2 2 RD276 DDRB_BA1 RD143 1 DRAM@ 2 1/20W _39_+-5%_0201
F1 VSS4 B2 F1 VSS4 B2 +VREF_CA_MD DQ5 DDRB_DQ5
0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
DRAM@ 1K_0402_1%
H1 VSSQ1 VSS5 G8 2 DRAM@2 H1 VSSQ1 VSS5 G8 2 2
1 VSSQ2 VSS6 UD1_DDRB_UZQ
DRAM@ 1 VSSQ2 VSS6 UD2_DDRB_UZQ
DRAM@ DRAM@ DQ6 DDRB_DQ4
A2 E9 A2 E9 DRAM@
15mil DQ7 DDRB_DQ1
CD132

CD160
VSSQ3 VSS7 VSSQ3 VSS7

2
D2 K9 D2 K9 DDRB_BG0 RD146 1 DRAM@ 2 1/20W _39_+-5%_0201
E3 VSSQ4 VSS8 M9 DRAM_DDRB_BG1 E3 VSSQ4 VSS8 M9 DRAM_DDRB_BG1 DDRB_PAR RD275 1 DRAM@ 2 1/20W _39_+-5%_0201
DQS#0 DDRB_DQS#0
2 VSSQ5 VSS9 2 VSSQ5 VSS9 DQS0 DDRB_DQS0

2
A8 A8

0.1U_0201_6.3V6-K
@ R10170 @ R10171
UD1

1000P 25V K X7R 0201


VSSQ6 VSSQ6

1U_0402_6.3V6K
D8 T7 1 2 D8 T7 1 2 RD277 1 1 1
E8 VSSQ7 NC E8 VSSQ7 NC
DDP@ 0_0402_5% DDP@ 0_0402_5% 1K_0402_1% DQ8 DDRB_DQ9

DRAM@

DRAM@

DRAM@
l
C9 VSSQ8 C9 VSSQ8 DRAM@ +1.2V
DQ9 DDRB_DQ11

CD357

CD358

CD359
C
H9 VSSQ9 H9 VSSQ9 C
VSSQ10 VSSQ10 DQ10 DDRB_DQ12

1
2 2 2
DQ11 DDRB_DQ8

tia
F9 F9 DDRB_ALERT# RD86 1 DRAM@ 2 1/20W _1K_1%_0201
ZQ ZQ DQ12 DDRB_DQ15
1

1
DQ13 DDRB_DQ13
RD116 RD117 DQ14 DDRB_DQ14
MT40A512M16HA083EA_FBGA96 MT40A512M16HA083EA_FBGA96
Layout Note: Place near DRAM DQ15 DDRB_DQ10
240_0402_1% 240_0402_1%
@ DRAM@ @
DQS#1 DDRB_DQS#1
DQS1 DDRB_DQS1
2

2
DRAM@ +1.2V
3A@1.5V UD1
+1.2V
DQ16 DDRB_DQ7
DQ17 DDRB_DQ3
follow SCL 20pcs 0.22uf DQ18 DDRB_DQ4
DQ19 DDRB_DQ0

en
DQ20 DDRB_DQ6

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K
CD266 1 CD267 1 CD268 1 CD269 1 CD270 1 CD271 1 CD272 1 CD273 1 CD274 1 CD275 1 CD276 1 CD277 1
DQ21 DDRB_DQ5

47P_0201_25V8-J

27P 25V J NPO 0201

27P 25V J NPO 0201

27P 25V J NPO 0201

27P 25V J NPO 0201

27P 25V J NPO 0201

27P 25V J NPO 0201

47P_0201_25V8-J

27P 25V J NPO 0201

47P_0201_25V8-J

47P_0201_25V8-J

27P 25V J NPO 0201


1 1 1 1 1 1 1 1 1 1

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@
CD154 CD155 CD142 CD127 CD141 CD152 CD150 CD158 CD143 CD137 DQ22 DDRB_DQ2
2 2 2 2 2 2 2 2 2 2 2 2 DQ23 DDRB_DQ1
2 2 2 2 2 2 2 2 2 2 DQS#2 DDRB_DQS#2
DQS2 DDRB_DQS2
UD3
UD4
UD2
DQ24 DDRB_DQ15
DDRB_MA0 P3 G2 DDRB_DQ39 DRAM@ DRAM@ DRAM@ DRAM@ DRAM@ DRAM@ DRAM@ DRAM@ DRAM@ DRAM@
DDRB_MA1 A0 DQ0 DDRB_DQ35 DDRB_MA0 DDRB_DQ59
DQ25 DDRB_DQ11
P7 F7 P3 G2 3A@1.5V
DDRB_MA2 R3 A1 DQ1 H3 DDRB_DQ34 DDRB_MA1 P7 A0 DQ0 F7 DDRB_DQ57 DQ26 DDRB_DQ12
DDRB_MA3 N7 A2 DQ2 H7 DDRB_DQ37 DDRB_MA2 R3 A1 DQ1 H3 DDRB_DQ58 DQ27 DDRB_DQ8
DDRB_MA4 N3 A3 DQ3 H2 DDRB_DQ38 DDRB_MA3 N7 A2 DQ2 H7 DDRB_DQ61 +1.2V DQ28 DDRB_DQ13

id
DDRB_MA5 P8 A4 DQ4 H8 DDRB_DQ36 DDRB_MA4 N3 A3 DQ3 H2 DDRB_DQ63 DQ29 DDRB_DQ9
DDRB_MA6 P2 A5 DQ5 J3 DDRB_DQ32 DDRB_MA5 P8 A4 DQ4 H8 DDRB_DQ56
DDRB_MA7 A6 DQ6 DDRB_DQ33 DDRB_MA6 A5 DQ5 DDRB_DQ62 +1.2V +0.6VS
DQ30 DDRB_DQ14
R8 J7 P2 J3 DQ31 DDRB_DQ10
DDRB_MA8 R2 A7 DQ7 A3 DDRB_DQ47 DDRB_MA7 R8 A6 DQ6 J7 DDRB_DQ60
DDRB_MA9 R7 A8 DQ8 B8 DDRB_DQ40 DDRB_MA8 R2 A7 DQ7 A3 DDRB_DQ50 DQS#3 DDRB_DQS#3

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K
DDRB_MA10 M3 A9 DQ9 C3 DDRB_DQ46 DDRB_MA9 R7 A8 DQ8 B8 DDRB_DQ52 DQS3 DDRB_DQS3
DDRB_MA11 T2 A10/AP
A11
DQ10
DQ11
C7 DDRB_DQ44 DDRB_MA10 M3 A9
A10/AP
DQ9
DQ10
C3 DDRB_DQ55 CD362 1 2 0.22U_0201_6.3V6-K CD174
1
CD173
1
CD169
1
CD165
1
CD167
1
CD172
1
CD171
1
CD175
1
CD168
1
CD166
1
UD2
DDRB_MA12 M7 C2 DDRB_DQ42 DDRB_MA11 T2 C7 DDRB_DQ48 @ DQ32 DDRB_DQ6
DDRB_MA13 T8 A12/BC_N DQ12 C8 DDRB_DQ45 DDRB_MA12 M7 A11 DQ11 C2 DDRB_DQ54 CD363 1 2 0.22U_0201_6.3V6-K
A13 DQ13 DDRB_DQ43 DDRB_MA13 A12/BC_N DQ12 DDRB_DQ49 2 2 2 2 2 2 2 2 2 2 DQ33 DDRB_DQ7
D3 T8 C8 @
DQ34 DDRB_DQ2

nf
DDRB_MA14_W E# L2 DQ14 D7 DDRB_DQ41 A13 DQ13 D3 DDRB_DQ51 CD364 1 2 0.22U_0201_6.3V6-K
DDRB_MA15_CAS# M8 WE_N/A14 DQ15 DDRB_MA14_W E# L2 DQ14 D7 DDRB_DQ53 DRAM@ DQ35 DDRB_DQ1
DDRB_MA16_RAS# L8 CAS_N/A15 +1.2V DDRB_MA15_CAS# M8 WE_N/A14 DQ15 DQ36 DDRB_DQ5
RAS_N/A16 D1 DDRB_MA16_RAS# L8 CAS_N/A15 +1.2V DRAM@ DRAM@ DRAM@ DRAM@ DRAM@ DRAM@ DRAM@ DRAM@ DRAM@ DRAM@ DQ37 DDRB_DQ3
DDRB_CLK0# K8 VDD1 J1 RAS_N/A16 D1
B
DDRB_CLK0 CK_C VDD2 DDRB_CLK0# VDD1 +1.2V
DQ38 DDRB_DQ4 B
K7 L1 K8 J1 DQ39 DDRB_DQ0
CK_T VDD3 R1 DDRB_CLK0 K7 CK_C VDD2 L1 +1.2V
DDRB_CKE0 K2 VDD4 B3 CK_T VDD3 R1 DQS#4 DDRB_DQS#4
CKE VDD5 G7 DDRB_CKE0 K2 VDD4 B3 DQS4 DDRB_DQS4
DDRB_DQS#4 F3 VDD6 B9 CKE VDD5 G7 UD3
DDRB_DQS4 G3 LDQS_C VDD7 J9 DDRB_DQS#7 F3 VDD6 B9 S145API EMC request for 1.2V

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K
DQ40 DDRB_DQ9

Co
DDRB_DQS#5 LDQS_T VDD8 DDRB_DQS7 LDQS_C VDD7
DDRB_DQS5
A7
B7 UDQS_C
UDQS_T
VDD9
VDD10
L9
T9 DDRB_DQS#6
DDRB_DQS6
G3
A7 LDQS_T
UDQS_C
VDD8
VDD9
J9
L9 plane edge EMI CD215
1
CD218
1
CD212
1
CD211
1
1 1
DQ41
DQ42
DDRB_DQ15
DDRB_DQ12
B7 T9 @ @ @ @ CD133 CD153
DDRB_DM5 E2 A1 UDQS_T VDD10 +1.2V 22P_0402_50V8-J 22P_0402_50V8-J DQ43 DDRB_DQ14
DDRB_DM4 E7 NF/UDM_N/UDBI_N VDDQ1 C1 DDRB_DM6 E2 A1 2 2 2 2 RF_NS@ RF_NS@ DQ44 DDRB_DQ11
NF/LDM_N/LDBI_N VDDQ2 G1 DDRB_DM7 E7 NF/UDM_N/UDBI_N VDDQ1 C1 2 2 DQ45 DDRB_DQ13
DDRB_BA0 N2 VDDQ3 F2 NF/LDM_N/LDBI_N VDDQ2 G1
DDRB_BA1 BA0 VDDQ4 DDRB_BA0 VDDQ3
DQ46 DDRB_DQ10
N8 J2 N2 F2 DQ47 DDRB_DQ8
BA1 VDDQ5 F8 DDRB_BA1 N8 BA0 VDDQ4 J2
DDRB_ACT# L3 VDDQ6 J8 BA1 VDDQ5 F8
DQS#5 DDRB_DQS#5

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
DDRB_CS0# L7 ACT_N VDDQ7 A9 DDRB_ACT# L3 VDDQ6 J8 CD352 1 CD353 1 CD354 1 CD355 1 CD356 1 DQS5 DDRB_DQS5
DDRB_ALERT# P9 CS_N
ALERT_N
VDDQ8
VDDQ9
D9
+2.5V
DDRB_CS0#
DDRB_ALERT#
L7 ACT_N
CS_N
VDDQ7
VDDQ8
A9
+0.6VS
UD3
G9 P9 D9

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@
DDRB_BG0 VDDQ10 ALERT_N VDDQ9 +2.5V
DQ48 DDRB_DQ11
M2 G9 DQ49 DDRB_DQ13
BG0 DDRB_BG0 VDDQ10 2 2 2 2 2
DDRB_ODT0 K3 VPP1
B1
R9
M2
BG0 B1 follow SCL 10pcs 0.22uf DQ50 DDRB_DQ8
ODT VPP2 +VREF_CA_MD DDRB_ODT0 K3 VPP1 R9 DQ51 DDRB_DQ14
DDRB_PAR T3 M1 ODT VPP2 +VREF_CA_MD DQ52 DDRB_DQ9

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K
PAR VREFCA DDRB_PAR
1U_0402_6.3V6K

T3 M1 DQ53 DDRB_DQ15
0.1U_0201_6.3V6-K

1 1
C PAR VREFCA 1 1 1 1 1 1 1 1 1 1

1U_0402_6.3V6K
0.1U_0201_6.3V6-K
10K_0402_5%1 DRAM@ 2 RD255 TEN3 N9 E1 1 1 CD146 CD148 CD139 CD138 CD201 CD245 CD246 CD244 CD243 CD242 DQ54 DDRB_DQ12
CD236

CD237

TEN VSS1 K1 10K_0402_5%1 DRAM@ 2 RD257 N9 E1


0.1U_0201_6.3V6-K

TEN4
1000P 25V K X7R 0201

1 1 DQ55 DDRB_DQ10

CD240

CD241
MEM_MB_RST# P1 VSS2 N1 TEN VSS1 K1

0.1U_0201_6.3V6-K
1000P 25V K X7R 0201
1 1
CD234

CD235

RESET_N VSS3 T1 2 2 MEM_MB_RST# P1 VSS2 N1 2 2 2 2 2 2 2 2 2 2 DQS#6 DDRB_DQS#7

CD238

CD239
F1 VSS4 B2 DRAM@ RESET_N VSS3 T1 2 DRAM@ 2 DQS6 DDRB_DQS7
0.1U_0201_6.3V6-K

VSSQ1 VSS5 2 2 DRAM@ VSS4 DRAM@ UD4


0.1U_0201_6.3V6-K

1 H1 G8 F1 B2
A2 VSSQ2 VSS6 E9 UD3_DDRB_UZQ H1 VSSQ1 VSS5 G8 2 2
DRAM@ 1 DQ56 DDRB_DQ5
CD161

VSSQ3 VSS7 DRAM@ VSSQ2 VSS6 UD4_DDRB_UZQ DRAM@


F
D2 K9 A2 E9 DRAM@ DRAM@ DRAM@ DRAM@ DRAM@ DRAM@ DRAM@ DRAM@ DRAM@ DRAM@
S145API Place near UD1
DRAM@ DQ57 DDRB_DQ1
CD162

E3 VSSQ4 VSS8 M9 DRAM_DDRB_BG1 D2 VSSQ3 VSS7 K9


@ 2 A8 VSSQ5 VSS9 R10172 E3 VSSQ4 VSS8 M9 DRAM_DDRB_BG1 DQ58 DDRB_DQ2
D8 VSSQ6 T7 1 2 @ 2 A8 VSSQ5 VSS9 R10173 +1.2V +0.6VS +0.6VS DQ59 DDRB_DQ0
E8 VSSQ7 NC DDP@ 0_0402_5% D8 VSSQ6 T7 1 2 +2.5V DQ60 DDRB_DQ7
C9 VSSQ8 E8 VSSQ7 NC DDP@ 0_0402_5% DQ61 DDRB_DQ3
H9 VSSQ9 C9 VSSQ8
DQ62 DDRB_DQ6
LC

VSSQ10 H9 VSSQ9

180P_50V_J_NPO_0402
VSSQ10 DQ63 DDRB_DQ4
F9

10U 6.3V M X5R 0402

10U 6.3V M X5R 0402

0.22U_0201_6.3V6-K

0.22U_0201_6.3V6-K
ZQ 1 1 DQS#7 DDRB_DQS#6
F9 1 1 1 1 1 1 CD265

CC205
ZQ DQS7 DDRB_DQS6
1

CD350 CD351 CD259 CD252 CD263 CD264 22P_0402_50V8-J


UD4
1

RD118 @ @ 22P_0402_50V8-J 22P_0402_50V8-J RF_NS@


A MT40A512M16HA083EA_FBGA96 2 2 A

DRAM@

DRAM@
240_0402_1% @ RD119 RF_NS@ RF_NS@
MT40A512M16HA083EA_FBGA96
240_0402_1%
2 2 2 2 2 2
DRAM@ @
2

DRAM@
2

DRAM@

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/15 Deciphered Date 2013/08/15 DDRVI MD
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date: Tuesday, May 28, 2019 Sheet 15 of 44
Date: Sheet
5 4 3 2 1
5 4 3 2 1

for USB HUB update to OHY50, manual modify PN to GL850G-OHY50 +VDD


+3VS
RH15 1USB_HUB@
2 0_0603_5%
V5
RH1 1USB_HUB@
2 0_0603_5%
+5VALW
D UH1 +3VALW +VDD D

0604
1 @ 2 V5
USB20_N1_HUB_R 1 28 +VDD 1 2 RH2 0_0603_5%
USB20_P1_HUB_R 2 DM0 V33 27 V5 @ RH3 0_0603_5%
USB20_N1_C 3 DP0 V5 26 SDA_HUB 1 TP271 @
USB20_P1_C DM1 PWREN1#/SDA
4
DP1 GL850G OVCUR1#/SMC
25 ** External regulator mode:
+AVDD 5 24
USB20_N8 6 AVDD QFN28 OVCUR2#/SMD 23 PGANG
RH1 install,RH2 non-install,RH15 install
USB20_P8 7 DM2 PGANG 22 PSELF Internal regulator mode:
DP2 PSELF
RREF_HUB 8
RREF DVDD
21 RH4 1USB_HUB@2+VDD 1 RH1 non-install,RH2 install,RH15 non-install
+AVDD 9 20 0_0402_5% CH1
XTAL12_IN 10 AVDD1 OVCUR3# 19 0.1U_0201_6.3V6-K
XTAL12_OUT 11 X1 OVCUR4# 18 TEST/SCL 1 TP270 @ USB_HUB@
12 X2 TEST/SCL 17 HUB_RESET# 2
13 DM3 RESET# 16 +VDD +AVDD +AVDD
+AVDD 14 DP3 DP4 15
AVDD2 DM4

XTAL12_IN

XTAL12_OUT
YH1
0604
29 1USB_HUB@2 0_0603_5%

CH4

CH5

CH6

CH7

CH8
RH6

l
PAD

0.1U_0201_6.3V6-K

.1U_0402_10V6-K

1U_0402_6.3V6K

1U_0402_6.3V6K

.1U_0402_10V6-K
tia
1 3 1 1 1 1 1 1 1
OSC1 OSC2 CH2 CH3
2 4 10U_0603_6.3V6M 0.1U_0201_6.3V6-K
C GND1 GND2 C
GL850G-OHY50_QFN28_5X5 1 1 USB_HUB@ USB_HUB@ USB_HUB@ CD@
USB_HUB@ 2 2 2 2 2 2 2
CH9 CH10 @ CD@
15P_0402_50V8J 12MHZ_10PF_7V12000008 18P_0402_50V8J USB_HUB@

en
2 2
USB_HUB@ USB_HUB@ USB_HUB@ As close to GL850G
PORT1 Camera CH2 close to PIN28
CH3 PIN5 CH4/CH5 PIN9 CH6/CH15 PIN14
PORT2 Touch Screen As close to GL850G

id
nf
USB20_P1_HUB +5VALW +VDD
USB20_N1_HUB USB20_P1_HUB 9
USB20_N1_HUB 9
USB20_P1
USB20_N1 USB20_P1 17
USB20_N1 17 Camera

Co 1

1
USB20_P8 RH8 RH9
USB20_N8 USB20_P8 17
B USB20_N8 17 Touch Screen 10K_0402_5% 10K_0402_5%
RH11 B
@ USB_HUB@
RREF_HUB 1 2

2
HUB_RESET# 680_0402_1%
USB_HUB@
C
1
1
CH11 RH12
USB20_N1_HUB RH16 1 NOTS@ 2 0_0201_5% USB20_N1 1U_0402_6.3V6K 47K_0402_5% PGANG 1 RH13 2 Individual Mode
F
USB20_P1_HUB RH17 1 NOTS@ 2 0_0201_5% USB20_P1 USB_HUB@ @ 100K_0402_5%
2
USB_HUB@

2
USB_HUB@ +VDD
LC

USB20_N1_HUB RH18 1 2 0_0201_5% USB20_N1_HUB_R


USB_HUB@
USB20_P1_HUB RH19 1 2 0_0201_5% USB20_P1_HUB_R
PSELF 1 RH14 2 Self-power
USB_HUB@ 10K_0402_5%
USB20_N1_C RH20 1 2 0_0201_5% USB20_N1 USB_HUB@
USB_HUB@
USB20_P1_C RH21 1 2 0_0201_5% USB20_P1

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2016/08/16 Deciphered Date 2017/08/15 USB Hub
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
S145 API 1.0

Date: Tuesday, May 28, 2019 Sheet 16 of 44


5 4 3 2 1
5 4 3 2 1

LCD POWER CIRCUIT B+ to +LEDVDD POWER


+LCDVDD_CON
+3VS
U9 W=40 mils +LEDVDD
+3VS_CMOS
5 1 R52 1 2 0_0805_5% W=60mils F3 @ 0.5A_32V_ERBRD0R50X V20B+
IN OUT 1 2
+3VS
2A 80 mil
2 R22 1 20_0805_5%
1U_0402_6.3V6K

RF_NS@ @

0.1U_0201_6.3V6-K
1 GND

10U_0603_6.3V6M

0.1U_0201_6.3V6-K

4.7U_0805_25V6-K
C1

C25

33P_0402_50V8J
4.7U_0402_6.3V6M
PCH_ENVDD 4 3 @1 R17 2 @ 1 0_0402_5%
EN OCB 1 1 1 1 1 1
C1321 C3 F2 C23
2 0.1U_0402_25V6
D SY6288C20AAC_SOT23-5 @ @ 1 2 C23 0.1u for G HSW panel blink issue D
2 2 2 2 2 2 2

C2

C122

C123
3A_32V_0497003PKRHF

PCH_ENVDD
6 PCH_ENVDD For RF
1

R35
JEDP1
100K_0402_5%
1
+LEDVDD 1
2
2
2

3
4 3
5 4
APU_EDP_TX0+ C19 2 1 0.1U_0201_6.3V6-K EDP_TX0+ 6 5
APU output enable Voh min is 1.8V-0.45V=1.35V 6 APU_EDP_TX0+ APU_EDP_TX0- C16 EDP_TX0- 6
2 1 0.1U_0201_6.3V6-K 7
6 APU_EDP_TX0- 8 7
APU_EDP_TX1+ C17 2 1 0.1U_0201_6.3V6-K EDP_TX1+ 9 8
6 APU_EDP_TX1+ APU_EDP_TX1- C18 2 1 0.1U_0201_6.3V6-K EDP_TX1- 10 9
6 APU_EDP_TX1- 11 10
APU_EDP_AUX C20 2 1 0.1U_0201_6.3V6-K EDP_AUX 12 11

l
6 APU_EDP_AUX APU_EDP_AUX# C21 2 1 0.1U_0201_6.3V6-K EDP_AUX# 13 12
6 APU_EDP_AUX# 13

tia
14
PCH_EDP_PWM R19 2 1 0_0402_5% INVT_PWM DISPOFF# 15 14
6 PCH_EDP_PWM
@ AUX don't pull high and pull low for eDP panel INVT_PWM 16 15
17 16
6 APU_EDP_HPD 17
1

18
+LCDVDD_CON 18
R20 W=60mils 19
100K_0402_5% 20 19
@ 21 20
C 21 C

en
28 DMIC_CLK 22
22
2

23
28 DMIC_DATA 23
24
+3VS_CMOS 24
W=40mils 25
26 25
27 26
R182 2 @ 1 0_0402_5% USB20_P1_R 28 27

+3VS
CMOS Camera 16
16
USB20_P1
USB20_N1
R183 2 @ 1 0_0402_5% USB20_N1_R 29
30
28
29 GND1
31
32

id
30 GND2

HIGHS_FC5AF301-3181H
2

R10 ME@
4.7K_0402_5% L12 EMC_NS@
@ USB20_N1 1 2 USB20_N1_R

nf
1 2
1

R12 2 @ 1 0_0402_5% DISPOFF# USB20_P1 4 3 USB20_P1_R


31 BKOFF# 4 3
EXC24CH900U_4P
R14 2 @ 1 0_0402_5% ENBKL
6 PCH_ENBKL ENBKL 31

Co
1

R16 DMIC_CLK DISPOFF# INVT_PWM

470P_0201_50V7-K

470P_0201_50V7-K
100K_0402_5%
33P_0402_50V8J

EMC_NS@ EMC_NS@ EMC_NS@


C12

C13
1 1 1
2

C11

2 2 2

B
C B

EMC
F
@
LC

F12 1 2

0.5A_32V_ERBRD0R50X
+3VS

Touch Screen RTS1 1 @ 2 0_0402_5%

+5VS +5VS_TS

USB20_P8_CONN
RTS2 1 TS@ 2 0_0402_5%
L15 USB20_N8_CONN JTS1
1
USB20_P8 1 2 USB20_P8_CONN CTS1 1
1 2 1
3

+5VS_TS 0.1u_0201_10V6K 2
@ TS@ RTS3 2 TS@ 1 0_0402_5% TS_RS 3 2
USB20_N8 4 3 USB20_N8_CONN 2 31 EC_TS_ON 4 3
F11 1 2
4 3 4
1

D2 RTS4 1 TS@ 2 0_0402_5% USB20_N8_CONN 5


16 USB20_N8 USB20_P8_CONN 6 5
EXC24CH900U_4P 0.5A_32V_ERBRD0R50X RTS5 1 TS@ 2 0_0402_5%
1

16 USB20_P8 6 7
EMC_NS@ GND1 8
D757 GND2
AZC199-02S.R7G_SOT23-3 HIGHS_WS83061-S0171-HF
For EMI
2

EMC_NS@ ME@
A AZ5725-01F.R7GR_DFN1006P2X2 A
2

EMC_NS@ change symbol to SP021412291 by amy 0620


1

For ESD

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/08 Deciphered Date 2013/08/05 eDP/CMOS


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date: Tuesday, May 28, 2019 Sheet 17 of 44
5 4 3 2 1
5 4 3 2 1

D D

l
tia
C C

en
id
nf
Co
B
CF
B
LC

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2016/08/16 Deciphered Date 2017/08/15 Blank


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
S145 API 1.0

Date: Tuesday, May 28, 2019 Sheet 18 of 44


5 4 3 2 1
5 4 3 2 1

3/19
1
S145API EMC request for HDMI

HDMI_CLK-_CON
R300 +3VS
270_0402_1%
HDMI_CLK+_CON
EMC@
2

D D

D3

5
G
Q1B HDMI_DET 1 1 10 9 HDMI_DET
1

HDMI_TX0-_CON
R301 HDMICLK_R 2 2 9 8 HDMICLK_R
270_0402_1% APU_DDC_CLK 4 3 HDMICLK_R

S
HDMI_TX0+_CON 6 APU_DDC_CLK HDMIDAT_R HDMIDAT_R
4 4 7 7

D
EMC@ 2N7002KDWH_SOT363-6
2

2
+5VS_HDMI 5 5 6 6 +5VS_HDMI

G
Q1A
3 3
1

HDMI_TX1-_CON
R302 APU_DDC_DATA 1 6 HDMIDAT_R 8

S
6 APU_DDC_DATA
270_0402_1%

D
HDMI_TX1+_CON 2N7002KDWH_SOT363-6
EMC@ AZ1045-04F_DFN2510P10E-10-9
2

EMC_NS@

EMC
1

HDMI_TX2-_CON
R303
270_0402_1%
HDMI_TX2+_CON
EMC@
2

+5VS_HDMI

l
tia
+5VS +5VS_HDMI_F +5VS_HDMI

2
D4 D5
+3VS 2 @ F1
@ 1 1 2
C 3 C
BAT54S-7-F_SOT23-3 RB491D_SOT23-3 1.1A_8V_1206L110THYR

1
HDMI_CLK-_CON R29 1 2 499_0402_1%
Follow Zx05 and beema

1
HDMI_CLK+_CON R30 1 2 499_0402_1% C LP2301ALT1G_SOT23-3

en
1 2
Q43 2 R202 1 2 150K_0402_5% C34 CC1279
HDMI_TX0-_CON R31 1 2 499_0402_1% B 1 3 Q22 0.1u_0201_10V6K 10U 6.3V M X5R 0402

2
1
E MMBT3904WH_SOT323-3 @
2 1

3
HDMI_TX0+_CON R32 1 2 499_0402_1% RP2
6 APU_HDMI_HPD

1
2.2K_0404_4P2R_5%

G
2
1
HDMI_TX1-_CON R33 1 2 499_0402_1% R257
R910 100K_0402_5%
14,33 SUSP

3
4
HDMI_TX1+_CON R34 1 2 499_0402_1% 100K_0402_5%
HDMI_DET

id 2
HDMI_TX2-_CON R37 1 2 499_0402_1%

2
+5VS_HDMI
HDMI_TX2+_CON R38 1 2 499_0402_1% JHDMI1 ME@

18 15 HDMICLK_R
+5V_Power SCL 16 HDMIDAT_R

nf
SDA
1

D
2 Q13 APU_HDMI_TX0+ C38 2 1 0.1U_0201_6.3V6-K HDMI_TX0+_CON 7
+3VS 6 APU_HDMI_TX0+ TMDS_Data0+
G L2N7002KWT1G_SOT323-3 APU_HDMI_TX0- C37 2 1 0.1U_0201_6.3V6-K HDMI_TX0-_CON 9 13
6 APU_HDMI_TX0- APU_HDMI_TX1+ HDMI_TX1+_CON TMDS_Data0- CEC
C40 2 1 0.1U_0201_6.3V6-K 4 17
6 APU_HDMI_TX1+ APU_HDMI_TX1- HDMI_TX1-_CON TMDS_Data1+ DDC/CEC_Ground HDMI_DET
S C39 2 1 0.1U_0201_6.3V6-K 6 19
6 APU_HDMI_TX1- TMDS_Data1- Hot_Plug_Detect
3

APU_HDMI_TX2+ C42 2 1 0.1U_0201_6.3V6-K HDMI_TX2+_CON 1


6 APU_HDMI_TX2+ APU_HDMI_TX2- HDMI_TX2-_CON TMDS_Data2+
R42 1 @ 2 C41 2 1 0.1U_0201_6.3V6-K 3
6 APU_HDMI_TX2- TMDS_Data2-

Co
100K_0402_5% 8 14
5 TMDS_Data0_Shield Utility
2 TMDS_Data1_Shield
TMDS_Data2_Shield
B 20 B
11 GND1 21
APU_HDMI_CLK+ C36 2 1 0.1U_0201_6.3V6-K HDMI_CLK+_CON 10 TMDS_Clock_Shield GND2 22
6 APU_HDMI_CLK+ APU_HDMI_CLK- HDMI_CLK-_CON TMDS_Clock+ GND3
C35 2 1 0.1U_0201_6.3V6-K 12 23
6 APU_HDMI_CLK- TMDS_Clock- GND4
F C ALLTO_C128AF-K1935-L

D6 D7
HDMI_CLK+_CON 1 1 10 9 HDMI_CLK+_CON HDMI_TX1-_CON 1 1 10 9 HDMI_TX1-_CON

HDMI_CLK-_CON 2 2 9 8 HDMI_CLK-_CON HDMI_TX1+_CON 2 2 9 8 HDMI_TX1+_CON


LC

HDMI_TX0+_CON 4 4 7 7 HDMI_TX0+_CON HDMI_TX2-_CON 4 4 7 7 HDMI_TX2-_CON

HDMI_TX0-_CON 5 5 6 6 HDMI_TX0-_CON HDMI_TX2+_CON 5 5 6 6 HDMI_TX2+_CON

3 3 3 3

8 8

AZ1045-04F_DFN2510P10E-10-9 AZ1045-04F_DFN2510P10E-10-9
EMC_NS@ EMC_NS@

EMC
A A

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/15 Deciphered Date 2013/08/15 HDMI_CONN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date: Tuesday, May 28, 2019 Sheet 19 of 44
5 4 3 2 1
A B C D E

+USB_VCCA

C8815 @1 2 100U_1206_6.3V6M

LEFT SIDE USB3.0 PORT x2 C8806 1 2 150U_B2_6.3VM_R35M

+
C125 @1 2 1U_0402_10V6K
+5VALW +USB_VCCA C127 @1 2 1U_0402_10V6K
U2
5 1
IN OUT JUSB1 ME@
1
C128 2
1U_0402_10V6K GND USB30_TX_P1 C126 1 USB30_TX_C_P1
2 0.22U_6.3V_K_X5R_0402 R95 1 @ 2 0_0402_5% USB30_TX_R_P1 9
USB_OC1# 9 USB30_TX_P1 StdA_SSTX+
4 3 1
2 20,21,31 USB_ON# ENB OCB USB_OC1# 9 USB30_TX_N1 C124 1 USB30_TX_C_N1
2 0.22U_6.3V_K_X5R_0402 R96 1 @ 2 0_0402_5% USB30_TX_R_N1 8 VBUS
9 USB30_TX_N1 USB20_P5 USB20_P5_R StdA_SSTX-
SY6288D20AAC_SOT23-5 1 R97 1 @ 2 0_0402_5% 3
9 USB20_P5 D+
1 C140 7 1
1000P_0201_50V7-K USB20_N5 R93 1 @ 2 0_0402_5% USB20_N5_R 2 GND_DRAIN 10
9 USB20_N5 USB30_RX_P1 C8787 1 D- GND_2
Low Active 2A EMC_NS@ 2 0.33U 10V K X5R 0402USB30_RX_C_P1 R94 1 @ 2 0_0402_5% USB30_RX_R_P1 6 11
2 9 USB30_RX_P1 StdA_SSRX+ GND_3
4 12
USB30_RX_N1 C8788 1 2 0.33U 10V K X5R 0402USB30_RX_C_N1 R98 1 @ 2 0_0402_5% USB30_RX_R_N1 5 GND_1 GND_4 13
9 USB30_RX_N1 StdA_SSRX- GND_5

ALLTO_C19043-10905-L

L13 EMC_NS@
USB30_RX_C_N1 1 2 USB30_RX_R_N1
1 2

USB30_RX_C_P1 4 3 USB30_RX_R_P1
4 3
EXC24CH900U_4P USB20_P5_R
+USB_VCCA
USB20_N5_R D12 EMC@
L16 EMC_NS@ USB30_RX_R_N1 10 1 USB30_RX_R_N1
USB30_TX_C_N1 1 2 USB30_TX_R_N1 NC1 Line-1

AZ5725-01F.R7GR_DFN1006P2X2
1 2

2
D11 USB30_RX_R_P1 9 2 USB30_RX_R_P1
D13 NC2 Line-2

1
USB30_TX_C_P1 4 3 USB30_TX_R_P1 AZC199-02S.R7G_SOT23-3 USB30_TX_R_N1 7 4 USB30_TX_R_N1
4 3 EMC@ NC3 Line-3
EXC24CH900U_4P USB30_TX_R_P1 6 5 USB30_TX_R_P1
NC4 Line-4
3

2
EMC_NS@ GND1

2
L8 EMC@ 8
USB20_N5 1 2 USB20_N5_R GND2
1 2 AZ1143-04F-R7G_DFN2510P10E10

l
1
USB20_P5 4 3 USB20_P5_R
4 3
EXC24CH900U_4P

tia
EMC
EMC

2 2

en
USB3.0 PORT
L30 EMC_NS@
USB30_RX_C_N2 1 2 USB30_RX_R_N2 +5VALW +USB_VCCB
1 2 U25
5 1
USB30_RX_C_P2 4 3 USB30_RX_R_P2 IN OUT
4 3 1

id
C8813 2
EXC24CH900U_4P 1U_0402_10V6K GND
USB_ON# 4 3 USB_OC2#
20,21,31 2 USB_ON# ENB OCB USB_OC2# 9
L29 EMC_NS@ SY6288D20AAC_SOT23-5
USB30_TX_C_N2 1 2 USB30_TX_R_N2
1 2 +USB_VCCB
1
Low Active 2A C8814
USB30_TX_C_P2 4 3 USB30_TX_R_P2 1000P_0201_50V7-K
4 3 EMC_NS@

nf
EXC24CH900U_4P 2

C8816 @1 2 100U_1206_6.3V6M
L17 EMC@
USB20_N6_S 1 2 USB20_N6_R C8817 1 2 150U_B2_6.3VM_R35M

+
1 2
C2060 @1 2 1U_0402_10V6K
USB20_P6_S 4 3 USB20_P6_R
4 3 C2059 @1 2 1U_0402_10V6K
EXC24CH900U_4P

Co
JUSB2 ME@

USB30_TX_P2 C2058 1 USB30_TX_C_P2


2 0.22U_6.3V_K_X5R_0402 R3119 1 @ 2 0_0402_5% USB30_TX_R_P2 9
9 USB30_TX_P2 StdA_SSTX+
1
USB30_TX_N2 C2057 1 USB30_TX_C_N2
2 0.22U_6.3V_K_X5R_0402 R3116 1 @ 2 0_0402_5% USB30_TX_R_N2 8 VBUS
9 USB30_TX_N2 USB20_P6_S USB20_P6_R StdA_SSTX-
R3103 1 @ 2 0_0402_5% 3

For USB Debug Function USB30_RX_P2 C8789 1


USB20_N6_S
2 0.33U 10V K X5R 0402USB30_RX_C_P2
R942 1
R3117 1
@
@
2 0_0402_5%
2 0_0402_5%
UARTA_P80_EN
USB20_N6_R
USB30_RX_R_P2
7
2
6
D+
GND_DRAIN
D- GND_2
10
11
9 USB30_RX_P2 StdA_SSRX+ GND_3
4 12
USB30_RX_N2 C8790 1 2 0.33U 10V K X5R 0402USB30_RX_C_N2 R3114 1 @ 2 0_0402_5% USB30_RX_R_N2 5 GND_1 GND_4 13
9 USB30_RX_N2 StdA_SSRX- GND_5

ALLTO_C19043-10905-L
3 2 Debug@ 1 USB_UART_SEL 3
7 USBDEBUG
R531 0_0402_5%
C
1
R538
2 R537

2 Debug@
100K_0402_5%
F
U129 0_0402_5%
@

D45 EMC@
USB30_RX_R_N2 10 1 USB30_RX_R_N2
NC1 Line-1
1

R533 2 Debug@ 1 0_0402_5% EC_TX_C 1 10 R11 2 Debug@ 1 0_0402_5%


+3VALW
27,31 EC_TX 1D+ VCC USB30_RX_R_P2 USB30_RX_R_P2
9 2
NC2 Line-2
LC

R536 2 Debug@ 1 0_0402_5% EC_RX_C 2 9 USB_UART_SEL


27,31 EC_RX 1D- S USB30_TX_R_N2 USB30_TX_R_N2
7 4
3 8 USB20_P6_S NC3 Line-3
9 USB20_P6 2D+ D+ USB30_TX_R_P2 USB30_TX_R_P2
NCY3958Y 6 5
4 7 USB20_N6_S NC4 Line-4
9 USB20_N6 2D- D- 3
5 6 GND1
GND1 OE# 8
11 GND2
GND2 AZ1143-04F-R7G_DFN2510P10E10

NCT3958Y_DFN10_3X3
Debug@
FOR ESD Close to Connector
USB20_P6_R +USB_VCCB

USB20_N6_R
3

USB20_P6 R539 2 @ 1 0_0402_5% USB20_P6_S D43


AZ5725-01F.R7GR_DFN1006P2X2

AZC199-02S.R7G_SOT23-3
1

EMC@
USB20_N6 R541 2 @ 1 0_0402_5% USB20_N6_S D34
1

USBDEBUG Kernel debug EMC_NS@

Set input Set input


2

Set output Low ENABLE


2
1

+3VALW

4
UARTA_P80_EN POST 80 4
1

Set input DISABLE R547


Debug@ 10K_0402_5%
Set output Low ENABLE
2

USB_UART_SEL
1

D
UARTA_P80_EN 2
OE# S FUNCTION G L2N7002KWT1G_SOT323-3
Q56
H X DISABLE S Debug@
3

Security Classification LC Future Center Secret Data Title


L L D(+/-) to 1D(+/-)

L H D(+/-) to 2D(+/-) Issued Date 2016/08/16 Deciphered Date 2017/08/15 USB3.0 PORT (LEFT)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date: Tuesday, May 28, 2019 Sheet 20 of 44
A B C D E
5 4 3 2 1

D D

Follow S145WHL
+5VALW +USB_VCCD +USB_VCCD
U132
5 1
IN OUT
1
C8808 2
1U_0402_10V6K GND
USB_ON# 4 3 USB_OC3#
20,312 USB_ON# ENB OCB USB_OC3# 9
SY6288D20AAC_SOT23-5 1
C8809 C8810 @1 2 100U_1206_6.3V6M
1000P_0201_50V7-K
Low Active 2A EMC_NS@ C8804 1 2 150U_B2_6.3VM_R35M

+
l
2
C8811 @1 2 1U_0402_10V6K

tia
C8812 @1 2 1U_0402_10V6K

JUSB3
1
USB20_N7 R4713 1 @ 2 0_0402_5% USB20_N7_R 2 VBUS
9 USB20_N7 USB20_P7 USB20_P7_R D-
R4714 1 @ 2 0_0402_5% 3
9 USB20_P7 4 D+ 5
GND GND1 6

en
C C
GND2 7
GND3 8
GND4
ALLTO_C107G1-10803-L
ME@

12/30 Update USBConn

id
FOR ESD Close to Connector
USB20_P7_R +USB_VCCD

USB20_N7_R

nf
3

2
D755

AZ5725-01F.R7GR_DFN1006P2X2
AZC199-02S.R7G_SOT23-3

1
EMC@
D756

1
L34 EMC@
USB20_P7 4 3 USB20_P7_R EMC_NS@
4 3

Co
USB20_N7 1 2 USB20_N7_R

2
1 2

2
EXC24CH900U_4P

1
B
FC B
LC

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2016/08/16 Deciphered Date 2017/08/15 USB2.0


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
S145 API 1.0

Date: Tuesday, May 28, 2019 Sheet 21 of 44


5 4 3 2 1
5 4 3 2 1

+3VS Need short +3VS_SSD1

J8 @ Min 3A
1 2
1 2

10U 6.3V M X5R 0402

4.7U_0402_6.3V6M
C5
JUMP_43X79

0.1U_0201_6.3V6-K
C2037
1 1 1 1 1

10U 6.3V M X5R 0402


C2093

C2094

C2095
@

10U_0603_6.3V6M
D 2 2 2 2 2 D

CD@ CD@

+3VS_SSD1

JSSD1

1 2
3 GND_1 3.3V_1 4
5 GND_2 3.3V_2 6
4 PCIE_CRX_DTX_N3 PERN3 N/C_2 8
7
4 PCIE_CRX_DTX_P3 9 PERP3 N/C_3 10
PCIE_CTX_C_DRX_N3 11 GND_3 DAS/DSS# 12
4 PCIE_CTX_C_DRX_N3 PCIE_CTX_C_DRX_P3 PETN3 3.3V_3 14
13
4 PCIE_CTX_C_DRX_P3 15 PETP3 3.3V_4 16
17 GND_4 3.3V_5 18
4 PCIE_CRX_DTX_N2 19 PERN2 3.3V_6 20
4 PCIE_CRX_DTX_P2 PERP2 N/C_4 22
21
PCIE_CTX_C_DRX_N2 23 GND_5 N/C_5 24
4 PCIE_CTX_C_DRX_N2 PETN2 N/C_6 26

1
PCIE_CTX_C_DRX_P2 25
4 PCIE_CTX_C_DRX_P2 PETP2 N/C_7 28
27 R72
4 PCIE_CRX_DTX_N1 29 GND_6 N/C_8 30
PERN1 N/C_9 32 10K_0402_5%
31
4 PCIE_CRX_DTX_P1 PERP1 N/C_10 34 @
33

l
GND_7 N/C_11 36

2
PCIE_CTX_C_DRX_N1 35
4 PCIE_CTX_C_DRX_N1 PCIE_CTX_C_DRX_P1 PETN1 N/C_12 38
4 PCIE_CTX_C_DRX_P1 37
PETP1 DEVSLP 40

tia
39
41 GND_8 N/C_13 42
4 PCIE_CRX_DTX_N0 PERN0/SATA-B+ N/C_14 44
43
4 PCIE_CRX_DTX_P0 45 PERP0/SATA-B- N/C_15 46
PCIE_CTX_C_DRX_N0 47 GND_9 N/C_16 48
4 PCIE_CTX_C_DRX_N0 PCIE_CTX_C_DRX_P0 PETN0/SATA-A- N/C_17 50 SSD_RST#
49
4 PCIE_CTX_C_DRX_P0 PETP0/SATA-A+ PERST# 52 SSD_1_CLKREQ_Q# R4679 1
51 @ 2 0_0402_5% SSD_1_CLKREQ# 8
53 GND_10 CLKREQ# 54 1 @ TP265
8 CLK_PCIE_SSD# REFCLKN PEWAKE# 56
55
8 CLK_PCIE_SSD REFCLKP N/C_18 58
57

en
C C
GND_11 N/C_19
59 NC NC 60
@
61 NC NC 62 R3 1 2 0_0402_5%
63 NC NC 64 SUSCLK_R 27
65 NC NC 66
67 68 SUSCLK_SSD1 1 @ 2 0_0402_5%
R1
SUSCLK 8,27
SSD_DET1 69 N/C_1 SUSCLK 70
71 PEDET 3.3V_7 72
+3VS_SSD1
73 GND_12 3.3V_8 74

id
75 GND_13 3.3V_9
GND_14
77 76
PEG1 PEG2

ARGOS_NASM0-S6701-TS40
ME@

nf
change to new symbol NASM0-S6701-TS40 0711

Co +3VS_SSD1
B
C B

+3VS_SSD1

2
F
@
R2 1 2 0_0402_5%
RC33
10K_0402_5%
1

R9
LC

@ DV2

1
10K_0402_5%
PLT_RST# 2
7,27,29 PLT_RST# SSD_RST#
1
2

APU_SSD_RST# 3
SSD_DET1 7 APU_SSD_RST#
R13 1 2 0_0402_5%
7 SSD_SATA_PCIE_DET1#
LBAT54AWT1G_SOT323-3
@

0.1U_0201_6.3V6-K
1

1
1
SSD_DET#

C8800
10K_0402_5% @ R8
@
100K_0402_5%
R15 0--SATA 2
1--PCIE
2

2
@

+3V_GATE

5
U3

VCC
+3VS +3V_GATE PLT_RST# 1
IN1 4 SSD_RST#
R272 1 @ 2 0_0402_5% APU_SSD_RST# 2 OUT

GND
IN2

1
A MC74VHC1G08DFT2G_SC70-5 R270 A

3
@ 100K_0402_5%
@

2
Security Classification LC Future Center Secret Data Title

Issued Date 2016/08/16 Deciphered Date 2017/08/15 M.2 SSD


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Size DocumentNumber
Document Number Rev
Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
S145 API 1.0

Date:
Date: Tuesday, May 28, 2019 Sheet
Sheet 22 of 44
5 4 3 2 1
5 4 3 2 1

D D

l
tia
C C

en
id
nf
Co
B B

C
F
LC

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/15 Deciphered Date 2013/08/15 Blank
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
S145 API 1.0

Date: Tuesday, May 28, 2019 Sheet 23 of 44


5 4 3 2 1
5 4 3 2 1

D D

l
tia
C C

en
id
nf
Co
B B
CF
LC

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/08 Deciphered Date 2013/08/05 Blank


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
S145 API 1.0

Date: Tuesday, May 28, 2019 Sheet 24 of 44


5 4 3 2 1
5 4 3 2 1

D D

l
tia
C C

en
id
nf
Co
B B
F C
LC

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/08 Deciphered Date 2013/08/05 Blank
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
S145 API 1.0

Date: Tuesday, May 28, 2019 Sheet 25 of 44


5 4 3 2 1
5 4 3 2 1

Close to U1 REMOTE+_R R176 1 @ 2 0_0402_5% REMOTE2+


REMOTE2+
Near CPU core
1

1
REMOTE+_R C46 C
1 100P_0201_25V8J 2 Q16
C44 REMOTE-_R R177 1 @ 2 0_0402_5% REMOTE2- @ B MMBT3904WH_SOT323-3
2200P_0402_25V7-K 2 E @

3
@ REMOTE2-
2 REMOTE-_R

D D
REMOTE+/-_R, REMOTE1+/-, REMOTE2+/-: +3VALW +3VALW
Trace width/space:10/10 mil Near Board Edge Near CPU
Trace length:<8"

1
R18 R25
SMSC thermal sensor 13.7K_0402_1% 13.7K_0402_1%

placed near DIMM

2
NTC_V1 NTC_V2
+3VS

1
U1
1 8 THERMAL_SMB_CK2 PH1 PH3
VDD SCL THERMAL_SMB_CK2 31
100K_0402_1%_NCP15WF104F03RC 100K_0402_1%_NCP15WF104F03RC
1 REMOTE+_R 2 7 THERMAL_SMB_DA2
D+ SDA THERMAL_SMB_DA2 31
C47

2 2

2
0.1U_0201_6.3V6-K REMOTE-_R 3 6
D- ALERT#

l
@
2

2
R51 2 @ 1 4 5 R24

tia
+3VS T_CRIT# GND
10K_0402_5% @ @ 0_0402_5% R191 R192
NCT7718W_MSOP8 @ 0_0402_5% 0_0402_5%
Address 1001_101xb @

1
+5VLP +5VLP Delete AGND for layout

en
C C
+5VLP EC_AGND
+3VS +3VS

HW thermal sensor

2
1 R252 R253

2
1
C4 21.5K_0402_1% 21.5K_0402_1%

id
0.1U_0201_6.3V6-K @ @ R4688
@ 2.2K_0404_4P2R_5%

1
2

2
@ @

G
U4

3
4
1 8 TMSNS1 R26 1 @ 2 0_0402_5% NTC_V1 Q160A
VCC TMSNS1 NTC_V1 31

nf
2 7 PHYST1 R6 1 @ 2 10K_0402_5% THERMAL_SMB_CK2 R4689 1 @ 2 1 6 @

S
GND RHYST1 EC_SMB_CK2 31,41

D
EC_ON_R 3 6 TMSNS2 R197 1 @ 2 0_0402_5% NTC_V2 0_0402_5% 2N7002KDWH_SOT363-6
40 EC_ON_R OT1 TMSNS2 NTC_V2 31

5
G
4 5 PHYST2 R7 1 @ 2 10K_0402_5%

Co
OT2 RHYST2
Rename THERMAL_OT to EC_ON_R Q160B
G718TM1U_SOT23-8
THERMAL_SMB_DA2 R4690 1 @ 2 4 3 @

S
EC_SMB_DA2 31,41

D
over temperature threshold: 0_0402_5% 2N7002KDWH_SOT363-6
RSET=3*RTMH
92+/-30C
Hysteresis temperature threshold.
C
B
RHYST=(RSET*RTML)/(3*RTML-RSET) B

56+/-30C
F
LC

FAN Conn
JFAN1
+5VS 1
31 EC_FAN_PWM 1
31 EC_FAN_SPEED 2
3 2
R4682 1 @ 2 0_0603_SP +5VS_FAN 4 3
4
5
6 GND1
1 1 2 GND2
C2080 C2081 CC1280
10U_0603_10V6K 0.1u_0201_10V6K 10U 6.3V M X5R 0402
@
2 2 1 HIGHS_WS33040-S0351-HF
@ ME@
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/08 Deciphered Date 2013/08/05 Thermal sensor/FAN CONN/TPM


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date: Tuesday, May 28, 2019 Sheet 26 of 44
5 4 3 2 1
A B C D E

Mini-Express Card(WLAN/WiMAX)

22UC_6.3VC_MC_X5RC_0603
+3VS_W LAN
+3VS Need short
J2 @
1 2

1500P_50V_K_X7R_0402

0.1U_0201_6.3V6-K
1 2

10U 6.3V M X5R 0402


JUMP_43X79 1 1 1 1

C6

C7
C8797
1 1

C53
@ 2 @2 @2 @ 2

+3VS +3VS_W LAN


U131 @
5 1
IN OUT
2 +3VS_W LAN
GND
PW R_W LAN_EN 4 3
31 PW R_W LAN_EN EN OCB

SY6288C20AAC_SOT23-5
JW LAN1 ME@
1 2
3 GND1 3.3VAUX1 4
9 USB20_P0 USB_D+ 3.3VAUX2
5 6 1 @ T7

l
9 USB20_N0 USB_D- LED1#
7 8
9 GND2 PCM_CLK/I2S_SCK 10

tia
11 SDIO_CLK PCM_SYNC/I2S_WS 12
13 SDIO_CMD PCM_IN/I2S_SD_IN 14
15 SDIO_DATA0 PCM_OUT/I2S_SD_OUT 16 1 @ T6
17 SDIO_DATA1 LED#2 18
19 SDIO_DATA2 GND11 20
21 SDIO_DATA3 UART_WAKE# 22
23 SDIO_WAKE# UART_RXD
SDIO_RESET#

en
2 2

KEY E
25 PIN24~PIN31 NC PIN 24
27 26
29 28
31 30

id
33 32
35 GND3 UART_TXD 34
4 PCIE_PTX_C_DRX_P0 PETP0 UART_CTS
37 36
4 PCIE_PTX_C_DRX_N0 PETN0 UART_RTS
39 38
41 GND4 VENDOR_DEFINED1 40

nf
4 PCIE_PRX_DTX_P0 PERP0 VENDOR_DEFINED2
43 42
4 PCIE_PRX_DTX_N0 PERN0 VENDOR_DEFINED3
45 44 R88 2 @ 1 0_0402_5%
GND5 COEX3 EC_RX 20,31
47 46
8 CLK_PCIE_W LAN REFCLKP0 COEX2
49 48
8 CLK_PCIE_W LAN# REFCLKN0 COEX1 SUSCLK_R
51 50 R55 1 2 0_0402_5%
W LAN_CLKREQ_Q# GND6 SUSCLK PLT_RST# SUSCLK 8,22
8 W LAN_CLKREQ# R61 2 @ 1 0_0402_5% 53 52

Co
PCIE_W AKE#_W LAN CLKREQ0# PERST0# BT_OFF# PLT_RST# 7,22,29
R262 1 @ 2 0_0402_5% 55 54 R53 1 2 1K_0402_5%
7,31 PCIE_W AKE# PEWAKE0# W_DISABLE2# W LAN_OFF# PCH_BT_OFF# 8
R57 1 @ 2 0_0402_5% 57 56 R56 2 @ 1 0_0402_5%
31 LAN_W AKE# GND7 W_DISABLE1# PCH_W LAN_OFF# 8

59 58 APU_SMB_DATA_R R58 1 @ 2 0_0402_5%


RSRVD/PETP1 I2C_DATA APU_SMB_CLK_R APU_SMB_DATA 7,14
61 60 R59 1 @ 2 0_0402_5%
RSRVD/PETN1 I2C_CLK APU_SMB_CLK 7,14
63 62
65 GND8 ALERT# 64 EC_TX_R R89 2 @ 1 0_0402_5%
RSRVD/PERP1 RSRVD EC_TX 20,31
67 66
69 RERVD/PERN1 UIM_SWP/PERST1# 68 +3VS_W LAN
GND9 UIM_POWER_SNK/CLKREQ1#

1
3
71
73
C
RSRVD/REFCLKP1 UIM_POWER_SRC/GPIO1/PEWAKE1#
70
72 R186 3
75 RSRVD/REFCLKN1 3.3VAUX3 74 100K_0402_5%
GND10 3.3VAUX4
77 76
F
GND15 GND14

2
+3VS

ARGOS_NASE0-S6701-TS40
LC

1
C8793
0.1U_0201_6.3V6-K
@
2
U130
5 1
Vcc OE
2 SUSCLK
IN_A
SUSCLK_R 4 3
22 SUSCLK_R OUT_Y GND

M74VHC1GT125DF2G_SC70-5
@

4 4

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/08 Deciphered Date 2013/08/05 NGFF WLAN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document
DocumentNumber
Number Rev
Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date:
Date: Tuesday, May 28, 2019 Sheet
Sheet 27 of 44
A B C D E
5 4 3 2 1

IO Connector RA3025 1 2 1K_0402_5% CA41 1 2


D 0.1U_0201_6.3V6-K D

DA1
31 BEEP# 2
1 PC_BEEP1 RA211 1 2 1K_0402_5% CA40 1 2 PC_BEEP
3 0.1U_0201_6.3V6-K
7 PCH_BEEP

1
LBAT54CWT1G_SOT323-3 RA14
10K_0402_5% J1
@
1
+5VS 1
2
2

2
RA3026 1 @ 2 0_0402_5% PC_BEEP 3
@ 4 3
+3VS 4
+3VL 5
NOVO_BTN# 6 5
32 NOVO_BTN# EC_MUTE# 7 6
31 EC_MUTE# 7
8
S145API EMC request for USB20_N2 9 8

l
9 USB20_N2
HDA_BITCLK_AUDIO 9 USB20_P2
USB20_P2 10 9
10

tia
11
DMIC_CLK 12 11
17 DMIC_CLK DMIC_DATA 12
17 DMIC_DATA 13
C 13 C
14
HDA_BITCLK_AUDIO HDA_BITCLK_AUDIO 15 14
7 HDA_BITCLK_AUDIO HDA_SDOUT_AUDIO 16 15
7 HDA_SDOUT_AUDIO HDA_SDIN0 17 16

33P_0402_50V8J
7 HDA_SDIN0

en
EMC_NS@ HDA_SYNC_AUDIO 18 17
1 7 HDA_SYNC_AUDIO 18
19

CA42
+1.8VALW 19
+1.8VS 20
21 20
2 22 GND1
GND2

id
HIGHS_FC5AF201-1151H
Place near J1 ME@

nf
Co
B B
F C
LC

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2016/08/16 Deciphered Date 2017/08/15 IO CONN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
S145 API 1.0

Date: Tuesday, May 28, 2019 Sheet 28 of 44


5 4 3 2 1
5 4 3 2 1

+1.8VS
+1.8V_TPM
1A
RTPM17 2 @ 1 0_0402_5%
+1.8VALW

RTPM18 2 TPM@1 0_0402_5%


+3VALW +1.8V_TPM
D D

2
RTPM14 RTPM28
TPM@ @ RTPM28 stuff for NationZ
+1.8VS +1.8V_TPM 0_0603_5% 0_0603_5%
+1.8V_TPM

1
1

1
RTPM34 RTPM33
TPM@ TPM@
10K_0402_5% 10K_0402_5%
D754

2
2 1 1 1 1 2
2 1 TPM_SPI_PIRQ# C8799 C8794 C808 C8795 C259 C260
8 PCH_SPI_PIRQ#
@ TPM@ 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K TPM@ @
TPM@ 10U_0603_6.3V6M 4.7U_0402_6.3V6M TPM@ TPM@ 1U_0402_6.3V6K 10U_0603_6.3V6M
RB751V-40_SOD323-2 1 2 2 2 2 1
SCS00008K00

UTPM1

22

1
TPM@

l
NiC2

NiC1
VPS
C C

tia
TPM_SPI_PIRQ# 18
SPI_PIRQ 3 TPM_GP2 RTPM26 2 TPM@ 1 10K_0402_5%
NiC6 +1.8V_TPM
4 TPM_PIN4 RTPM24 2 @ 1 0_0402_5%
NiC7 +1.8V_TPM
PCH_SPI_D0 RTPM20 2 TPM@1 0_0402_5% SPI_SI_R 21 5
8 PCH_SPI_D0 MOSI NiC8
PCH_SPI_D1 RTPM21 2 TPM@1 0_0402_5% SPI_SO_R 24 10
8 PCH_SPI_D1 MISO NiC9 11
NiC10 12

en
NiC11 13
SPI_CS_R# 20 NiC12 14
SPI_CS NiC13 +1.8V_TPM
15
PCH_SPI_CLK RTPM22 2 TPM@1 0_0402_5% SPI_CLK_R 19 NiC14 16
8,13 PCH_SPI_CLK SPI_CLK NiC15 25
TPM_PLT_RST# 17 NiC16 26
+1.8V_TPM SPI_RST NiC17 27 TPM_PIN27 1
RTPM25 @ 2 10K_0402_5%
NiC18

id
6 28
GPIO NiC19 31
NiC20
1

7
D264 RTPM23 PP
RB751V-40_SOD323-2 TPM@
@ 10K_0402_5% 29 TPM_PIN29 PIN29 reserve for TPM MS low power mode

nf
NiC21

1
SCS00008K00 30
NiC22
2

RTPM30

GND1

GND2
NiC3

NiC4

NiC5
1 2 TPM_PLT_RST# @
7,22,27 PLT_RST#
B +5VALW 10K_0402_5% B

23

32

33
ST33HTPH2E32AHB4_VQFN32_5X5 +1.8V_TPM

Co
1

1TPM_PIN2
RTPM35
10K_0402_5%

1
TPM@

R504
RTPM32
2

D @
2 QTPM1A 10K_0402_5%
G

0_0402_5%
2N7002KDWH_SOT363-6

2
TPM@ TPM_PIN29 RTPM29 2 @ 1 0_0402_5% PLT_RST#
S
D753
C
1

2
3

D
5 QTPM1B 2 1
G 2N7002KDWH_SOT363-6 TPM@
TPM@ @
F
S RB751V-40_SOD323-2
4

SCS00008K00
LC

+1.8VALW +1.8V_TPM
2

A A
RC3245 RTPM27
10K_0402_5% @
TPM@ 10K_0402_5%
1 2 SPI_CS_R# Title
8 SPI_CS#_TPM Security Classification LC Future Center Secret Data
1

D750
@
Issued Date 2016/08/16 Deciphered Date 2017/08/15 TPM
CUS357
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Size Document
Document Number
Number Rev
Rev
RTPM19 2 TPM@ 1 0_0402_5% Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date:
Date: Tuesday, May 28, 2019 Sheet
Sheet 29 of 44
5 4 3 2 1
A B C D E F G H

1 1

SATA HDD Conn.


JHDD1 ME@

10 11
SATA_PTX_DRX_P0 C66 1 2 0.01U_6.3V_K_X7R_0201SATA_PTX_C_DRX_P0 9 10 GND1
4 SATA_PTX_DRX_P0 9
SATA_PTX_DRX_N0 C67 1 2 0.01U_6.3V_K_X7R_0201SATA_PTX_C_DRX_N0 8 12
4 SATA_PTX_DRX_N0 8 GND2
7
SATA_PRX_DTX_N0 C68 1 2 0.01U_6.3V_K_X7R_0201SATA_PRX_C_DTX_N0 6 7
4 SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 C69 1 2 0.01U_6.3V_K_X7R_0201SATA_PRX_C_DTX_P0 5 6
4 SATA_PRX_DTX_P0 4 5
3 4
2 3
1 2
1
HIGHS_FC5AF101-2931H

l
Need short +5VS_HDD

tia
J3 @
1 2
+5VS 1 2
JUMP_43X79
2 2

en
+5VS_HDD

1 1 1 1 1
C74 C75 C76 C77 C78
1000P_0201_50V7-K 0.1u_0201_10V6K 33P_0402_50V8J 10U_0603_10V6K 33P_0402_50V8J

id
EMC_NS@ RF_NS@ RF_NS@
2 2 2 2 2

EMC

nf
Co
3 C 3
F
LC

4 4

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/08 Deciphered Date 2013/08/05 HDD CONN


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date: Tuesday, May 28, 2019 Sheet 30 of 44
A B C D E F G H
5 4 3 2 1

RE1 1 @ 2 0_0603_SP +3VL

RE3 1 @ 2 0_0603_5%
Close EC +3VALW

+3VL_EC +3VL_EC +3VL_EC_R


CE3 1 2 VCOREVCC
LE1 1 @ 2 0_0603_SP
0.1U_0201_6.3V6-K +3VL_EC All capacitors close to EC

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K
0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
CD@
1 1
1 1 1 @ 1 1 @ 1 CE4 CE5
0.1U_0201_6.3V6-K 1000P 25V K X7R 0201
+3VS +3VL_EC_R
2 2
2 2 2 2 2 2 LE2 1 @ 2 0_0603_SP EC_AGND

CE11
D

CE10
D

CE6

CE7

CE8

CE9
RE6 2 @ 1 0_0402_5%

EC_AGND

minimum trace width 12 mil

114
121
127
11
12

26
50
92

74
3
UE1
+3VS

VBAT

VSTBY(PLL)

AVCC
VCC

VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VCORE
EC_FAN_SPEED RE10 1 2 10K_0402_5%
EC_FAN_PWM RE11 1 @ 2 10K_0402_5%
ENBKL RE9 1 @ 2 100K_0402_5%
SERIRQ RE81 1 @ 2 10K_0402_5%
4 24 EC_LID_OUT# RE93 1 @ 2 10K_0402_5%
+3VL_EC 8 KBRST# KBRST#/GPB6 PW M0/GPA0 PWR_LED# 32
5 25
8,13 SERIRQ SERIRQ/GPM6 PW M1/GPA1 BATT_CHG_LED# 32
RE295 2 @ 1 0_0402_5% 6 28 Delete EC_VBUS_EN
8,13 LPC_FRAME# LFRAME#/GPM5 PW M2/GPA2 BATT_LOW_LED# 32 +5VALW
RE296 2 @ 1 0_0402_5% 7 29
8,13 LPC_AD3 LAD3/GPM3 PW M3/GPA3
DE1 @1 2 RE297 2 @ 1 0_0402_5% 8 PWM 30 RE294 2 @ 1 0_0402_5% PWR_WLAN_EN LED_KB_PWM change to PWR_WLAN_EN
8,13 LPC_AD2 LAD2/GPM2 PW M4/GPA4 EC_FAN_PWM PWR_WLAN_EN 27
RE298 2 @ 1 0_0402_5% 9 31
8,13 LPC_AD1 LAD1/GPM1 PW M5/GPA5 EC_FAN_PWM 26 USB_ON#
RE299 2 @ 1 0_0402_5% 10 32 RE15 1 2 10K_0402_5%
RB751V-40_SOD323-2 8,13 LPC_AD0 LAD0/GPM0 PW M6/SSCK/GPA6 EC_APU_ALWEN BEEP# 28
RE300 2 @ 1 0_0402_5% 13 LPC 34 @
8,13 CLK_PCI_EC LPCCLK/GPM4 PW M7/RIG1#/GPA7 EC_ON_5V EC_APU_ALWEN 41
RE8 1 2 100K_0402_5% WRST# 14 120 IT19 1 PAD Delete EC_ON_5V +3VL_EC
15 WRST# TMRI0/GPC4 124 SUSP#
7 EC_SMI# EC_RX ECSMI#/GPD4 TMRI1/GPC6 SUSP# 33,40,41
1 16 SUSP# RE18 1 @ 2 100K_0402_5%
20,27 EC_RX EC_TX PW UREQ#/BBO/SMCLK2ALT/GPC7 LAN_WAKE#
17 66 RE5 1 @ 2 10K_0402_5%
CE12 20,27 EC_TX APU_LPC_RST# LPCPD#/GPE6 ADC0/GPI0 NTC_V1 26 EC_ON
22 67 RE72 1 @ 2 10K_0402_5%
1U_0402_6.3V6K 8,13 APU_LPC_RST# EC_SCI# LPCRST#/GPD2 ADC1/GPI1 NTC_V2 26
23 68
2 8 EC_SCI# ECSCI#/GPD3 ADC2/GPI2 BATT_TEMP 38,39
@ 1 PAD GATEA20 126 ADC 69 ENBKL ENBKL 17
IT13 GA20/GPB5 ADC3/GPI3 +3VL
70 RE278 1 @ 2 0_0402_5%
EC_SCI# in APU internal pull high to 3VALW IT8586E/AX ADC4/GPI4
ADC5/DCD1#/GPI5
71
72
ADP_I 39
RE276 2 @ 1 0_0402_5%
IDCHG 39
LID_SW# RE38 1 2 100K_0402_5%
LQFP-128L
+3VL_EC ADC6/DSR1#/GPI6 PSYS
2_5VEN 39
73 RE71 2 @ 1 0_0402_5%

l
+3VS KSI[0..7] KSI0 58 ADC7/CTS1#/GPI7
32 KSI[0..7] KSI0/STB#
KSI1 59 78
KSI1/AFD# DAC2/TACH0B/GPJ2 MAINPWON1_EC VR_APU_PWRGD 44 EC_VR_ON

tia
KSO[0..17] KSI2 60 79 RE26 1 @ 2 1K_0402_5% RE282 1 2 100K_0402_5%
32 KSO[0..17] KSI2/INIT# DAC3/TACH1B/GPJ3 H_PROCHOT#_EC MAINPWON 40 2_5VEN
KSI3 61 DAC 80 RE279 1 2 100K_0402_5%
KSI4 62 KSI3/SLIN# DAC4/DCD0#/GPJ4 81 EC_APU_ALWEN RE66 1 2 100K_0402_5%
KSI4 DAC5/RIG0#/GPJ5 EC_RTCRST#_ON 11
2
1

2
1

KSI5 63 SUSP# RE19 1 2 100K_0402_5%


RPE3 RPE2 KSI6 64 KSI5 85 RE289 2 1 0_0402_5% EC_ON SYSON RE21 1 2 100K_0402_5%
KSI6 PS2CLK0/TMB0/CEC/GPF0 EC_ON 40,41
C 2.2K_0404_4P2R_5% 2.2K_0404_4P2R_5% KSI7 65 86 BKOFF# RE40 1 2 10K_0402_5% C
KSI7 PS2DAT0/TMB1/GPF1 EC_SMB_CK4 PBTN_OUT# 7 EC_ON
@ KSO0 36 87 RE283 2 @ 1 0_0402_5% RE285 1 2 100K_0402_5%
KSO0/PD0 GPF2 EC_SMB_DA4 THERMAL_SMB_CK2 26
KSO1 37 Int. K/B PS2 88 RE284 2 @ 1 0_0402_5%
KSO1/PD1 GPF3 THERMAL_SMB_DA2 26
3
4

3
4

EC_SMB_CK3 EC_SMB_CK1 KSO2 38 89 PWR_WLAN_EN RE293 1 @ 2 10K_0402_5%


EC_SMB_DA3 EC_SMB_DA1 KSO3 39 KSO2/PD2 Matrix PS2CLK2/GPF4 90 EC_LID_OUT#
KSO3/PD3 PS2DAT2/GPF5 EC_LID_OUT# 32
KSO4 40
41 KSO4/PD4 96
AMD request SIC/SID( EC_SMB3 ) pull high 1 K KSO5

en
42 KSO5/PD5 EXTERNAL SERIAL FLASH GPH3/ID3 97 EC_VR_ON CAPS_LED# 32
KSO6
KSO6/PD6 GPH4/ID4 EC_VR_ON 44
KSO7 43 98
+3VL_EC +3VALW KSO8 44 KSO7/PD7 GPH5/ID5 99
KSO8/ACK# GPH6/ID6 EC_SYS_PWRGD 7
KSO9 45
KSO10 46 KSO9/BUSY 101
SMBus1:Charger/Battery KSO10/PE NC1
1

SMBus2:PMIC/thermalsensor KSO11 51 102


RE74 RE73 KSO12 52 KSO11/ERR# NC2 103
@ 0_0402_5%
SMBus3:APU/GPU
53 KSO12/SLCT SPI Flash ROM NC3 105
0_0402_5% KSO13
@ KSO14 54 KSO13 NC4
KSO15 55 KSO14
KSO15
2

KSO16 56 108 ACIN#

id
KSO17 57 KSO16/SMOSI/GPC3 AC_IN# 109 LID_SW#
KSO17/SMISO/GPC5 UART LID_SW# LID_SW# 32
2
1

32 ON/OFF ON/OFF 110 82


EC_ON EC_ON_L PW RSW# EGAD/GPE1 APUALW_PWRGD EC_MUTE# 28
RPE5 RE104 1 @ 2 0_0402_5% 111 SM Bus 83
EC_SMB_CK1 XLP_OUT EGCS#/GPE2 APUALW_PWRGD 41
2.2K_0404_4P2R_5% 115 84 Delete CMOS_ON#
38,39 EC_SMB_CK1 EC_SMB_DA1 SMCLK1/GPC1 EGCLK/GPE3
116
38,39 EC_SMB_DA1 EC_SMB_CK2 SMDAT1/GPC2
117 GPIO 77 PM_SLP_S5# 7,13

nf
26,41 EC_SMB_CK2 SMCLK2/PECI/GPF6 GPJ1
3
4

EC_SMB_CK2 EC_SMB_DA2 118 100 GPG2


EC_SMB_DA2 26,41 EC_SMB_DA2 EC_SMB_CK3 SMDAT2/PECIRQT#/GPF7 SSCE0#/GPG2
94 106 RE286 2 @ 1 0_0402_5% 0.9VS_PWRGD 41
6 EC_SMB_CK3 EC_SMB_DA3 CRX1/SIN1/SMCLK3/GPH1/ID1 SSCE1#/GPG0
95 104
6 EC_SMB_DA3 CTX1/SOUT1/GPH2/SMDAT3/ID2 DSR0#/GPG6 107 RE85 2 1 0_0402_5% SYSON
+3VL DTR1#/SBUSY/GPG1/ID7 119 BKOFF#
CRX0/GPC0 BKOFF# 17
123 RE280 2 @ 1 0_0402_5%
CTX0/TMA0/GPB2 APU_THERMTRIP# 6
RE27 2 @ 1 0_0402_5% 112 18 PM_SLP_S3# 7
LAN_WAKE# 125 VSTBY0 RI1#/GPD0 21 VDDGFX_PD PAD 1 @
27 LAN_WAKE# GPE4 RI2#/GPD1 IT16
WAKE UP 76 NOVO# 32

Co
TACH2/GPJ0 48
TACH1A/TMA1/GPD7 EC_FAN_SPEED EC_TS_ON 17
47 EC_FAN_SPEED 26
USB_ON# 33 TACH0A/GPD6 19 PCH_PWRBT# PAD 1 @
20,21 USB_ON# GINT/CTS0#/GPD5 L80HLAT/BAO/GPE0 IT18
35 20
33 PCH_CMOSP EC_RSMRST# 93 RTS1#/GPE5 GPIO L80LLAT/GPE7 NUM_LED# 32
B
7 EC_RSMRST# CLKRUN#/GPH0/ID0 B

2
7,27 PCIE_WAKE# CK32KE/GPJ7
128 Clock
7 AC_PRESENT CK32K/GPJ6

@
DE4 1 2 RB751V-40_SOD323-2
H_PROCHOT#
AVSS
VSS1

VSS2
VSS3
VSS4
VSS5
VSS6

C RE34 2 @ 1 0_0402_5%
SYSON RE99 2 @ 1 0_0402_5% 39,44 VR_HOT#
1_2VEN 41 IT8586E-AX_LQFP128_14X14
1

27
49
91
113
122

75

H_PROCHOT#_EC RE82 2 @ 1 0_0402_5% H_PROCHOT# 6,41


F
@

1
DE5 1 2 RB751V-40_SOD323-2 QE1 D 1
EC_AGND 2 CE14
47P_0201_25V8-J
Mirror Core strap +3VL_EC RE100 1 @ 2 1K_0402_5% 2_5VEN
G
@
2_5VEN 41
LC

L2N7002KWT1G_SOT323-3 S 2

3
+3VL @
GPG2 RE98 2 @ 1 10K_0402_5%
RE97 2 1 10K_0402_5% CLK_PCI_EC RE103 1 2 10_0402_5% EMC_NS@ CE29 1 2 10P_0201_25V8G
EMC_NS@ +3VS
1

APU_LPC_RST# EMC_NS@ CE27 1 2 220P_0201_25V7-K


for VR_APU_PWRGD undershoot issue RE102
when mirror, GPG2 pull high 100K_0402_5% SYSON EMC_NS@ CE31 1 2 0.1U_0201_6.3V6-K
when no mirror, GPG2 pull low APUALW_PWRGD VR_APU_PWRGD BATT_TEMP EMC_NS@ CE28 1 2 100P_0201_25V8J 2
2

ACIN# RE101 2 @ 1 0_0402_5%


1 ACIN# EMC_NS@ CE26 1 2 100P_0201_25V8J CE32
1 0.1U_0201_6.3V6-K
1
1

EC_SMB_CK1 PAD 1 @ CE25 CE24 D QE7 ON/OFF EMC_NS@ CE30 1 2 0.1U_0201_6.3V6-K EMC_NS@
EC_SMB_DA1 IT1 0.01U_6.3V_K_X7R_0201
PAD 1 @ 0.1U_6.3V_K_X5R_0201 2
IT2 2 ACIN 39
PAD 1 @ G
IT3 2
PAD 1 @
IT4 @
PAD 1 @ S L2N7002KWT1G_SOT323-3
IT5
3

@
A
EMC A

KSI7 PAD 1 @
IT6
KSI6 PAD 1 @
IT7
WRST# PAD 1 @
IT8

Reserve Factory EC flash, need confirm with ITE


Security Classification LC Future Center Secret Data Title

Issued Date 2016/08/16 Deciphered Date 2017/08/15 EC ITE8586LQFP


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DocumentNumber
Number Rev
Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date:
Date: Tuesday, May 28, 2019 Sheet
Sheet 31 of 44
5 4 3 2 1
5 4 3 2 1

ON/OFF switch +3VL +3VALW

2
R82 R83
100K_0402_5% 100K_0402_5%
@
R261 2 @ 1 0_0402_5%

1
NOVO# D15 2
31 NOVO#
1 NOVO_BTN#
NOVO_BTN# 28
ON/OFFBTN#
ON/OFF R85 2 @ 1 0_0402_5% 3 @

AZ5123-01F.R7GR_DFN1006P2X2
BAT54CW_SOT323-3

1
D25

1
D D

+3VALW +3VL

LID switch

2
2

2
EMC@

2
R111 R114
100K_0402_5% 100K_0402_5%
@

1
ON/OFFBTN# R119 2 @ 1 0_0402_5% ON/OFF 1@
ON/OFF 31
C1104
U14 100P_0201_25V8J
J5 1 2 @ 1
GND 2
1
SHORT PADS C1105 3 LID_SW#
OUTPUT LID_SW# 31
0.01U_6.3V_K_X7R_0201 @
J6 1 2 @
+3VL R264 2 @ 1 0_0402_5% 2 +VCC_LID 2
SHORT PADS VCC
AH9247-W-7_SC59-3

K/B Connector KSI[0..7]


KSI[0..7] 31 KB Backlight Connector
KSO[0..17] JKB1 ME@
KSO[0..17] 31
1
2 1

l
R274 200_0402_1% ON/OFFBTN#
PWR_LED# 1 2 PWR_LED#_R 3 2
EMC_NS@ R279 1 15@ 2 200_0402_1% NUM_LED#_R 4 3
31 NUM_LED# 4

tia
PWR_CAPS_LED C133 1 2 100P_0201_25V8J KSO17 R281 2 15@ 1 0_0402_5% KSO17_R 5
KSO16 R280 2 15@ 1 0_0402_5% KSO16_R 6 5
KSI1 7 6
KSI7 8 7
KSI6 9 8
KSO9 10 9
KSI4 11 10
KSI5 12 11
KSO0 13 12
EMC_NS@ KSI2 14 13
CAPS_LED# C117 1 2 100P_0201_25V8J KSI3 15 14
KSO5 16 15
C NUM_LED#_R C118 1 2 100P_0201_25V8J KSO1 17 16 C

en
KSI0 18 17
EMC_15_NS@ KSO2 19 18
KSO4 20 19
KSO7 21 20
KSO8 22 21
KSO6 23 22
CAPS_LED#_R NUM_LED#_R PWR_LED#_R KSO3 24 23
KSO12 25 24
KSO13 26 25
KSO14 27 26
KSO11 28 27
28
1

KSO10 29

id
D22 D23 D46 KSO15 30 29
R275 200_0402_1%
1

AZ5123-01F.R7GR_DFN1006P2X2 AZ5123-01F.R7GR_DFN1006P2X2 AZ5123-01F.R7GR_DFN1006P2X2 1 2 CAPS_LED#_R 31 30 34


31 CAPS_LED# PWR_CAPS_LED 32 31 GND2 33
EMC_NS@ EMC_15_NS@ EMC_NS@ +3VALW R84 1 @ 2 0_0402_5%
32 GND1
HIGHS_FC8AR321-3160-1H
2

2
2

For EMC

nf
Finger Print Connector TP/B Connector

Co
+3VS TP_PWR

R141 1 @ 2

0_0402_5%
1
C114
0.1U_0201_6.3V6-K
2

JTP1 ME@
EC_LID_OUT#_R
B
C TP_I2C0_SCL
TP_I2C0_SDA
31
7
EC_LID_OUT#
PCH_TP_INT#
R4684
R4683
2
2
@
@
1 0_0402_5%
1 0_0402_5% TP_INT#
1
2
3
1
2
B

TP_I2C0_SDA_R R4681 1 @ 2 0_0402_5% TP_I2C0_SDA 4 3


TP_I2C0_SCL_R TP_I2C0_SCL 4

2
R4680 1 @ 2 0_0402_5% 5
DT1 6 5
TP_PWR 6
F

100P_0201_25V8J

100P_0201_25V8J
EMC_NS@ 1 EMC_NS@
1 EMC_NS@ 7
8 GND1
GND2
HIGHS_FC5AF061-2931H
2 2

C115

C116
LC

AZC199-02S.R7G_SOT23-3

1
for EMC TP issue 1112

BATT_LOW_LED# LED2 1 2 R143 1 2 470_0402_5% TP_PWR


31 BATT_LOW_LED# +3VALW TP_PWR
L-C192JFCT-LCFC_SUPER_AMBER
1

2
1
D18
1

AZ5725-01F.R7GR_DFN1006P2X2 RPC20
EMC_NS@ 2.2K_0404_4P2R_5%

5
G

3
4
2
2

TP_I2C0_SDA_R R4686 2 @ 1 0_0402_5% 3 4 TP_I2C0_SDA


7,13 TP_I2C0_SDA_R

S
D
BATT_CHG_LED# LED3 1 2 R144 1 2 1.5K_0402_5% Q159B
31 BATT_CHG_LED# +5VALW

2
2N7002KDWH_SOT363-6

G
L-C192WDT-LCFC_WHITE
1

D19 TP_I2C0_SCL_R R4687 2 @ 1 0_0402_5% 6 1 TP_I2C0_SCL


7,13 TP_I2C0_SCL_R
1

S
AZ5725-01F.R7GR_DFN1006P2X2

D
EMC_NS@ Q159A
2N7002KDWH_SOT363-6
2
2

A PWR_LED# A

PWR_LED# LED4 1 2 R4672 1 2 1.5K_0402_5%


31 PWR_LED# +5VALW
1

L-C192WDT-LCFC_WHITE D16
1

AZ5725-01F.R7GR_DFN1006P2X2
EMC_NS@
2

PWR_LED Change to M/B (310->320) 08/17


2

Security Classification LC Future Center Secret Data Title

Issued Date 2016/08/16 Deciphered Date 2017/08/15 KBD/PWR/IO/LED/TP Conn.


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date: Tuesday, May 28, 2019 Sheet 32 of 44
5 4 3 2 1
A B C D E

+5VLP +5VALW

1
R156 R157
100K_0402_5% 100K_0402_5%
@

2
1 1
SUSP
14,19 SUSP

6
D
2 Q6A
31,40,41 SUSP#
G 2N7002KDWH_SOT363-6
S

+1.8VALW to +1.8VS AONS32314


VDS=30V VGS=20V, ID=32A,
+1.8VALW Q39 +1.8VS +/- 5% 1.5A Rds=8.7mohm @ VGS=10V
+/- 2% AONS32314_DFN8-5
VGS(th)=2.25V Max

l
1
2

tia
1 1
0.01U_6.3V_K_X7R_0201

2 1 5 3 C142 2
C141 C2082 1U_0402_6.3V6K
10U_0603_6.3V6M 10U_0603_6.3V6M
2 2

1
@ 1 1
4

2 C1325 C1326 R213


0.1U_0201_6.3V6-K 470_0603_5%
@ @ @
2 2
V20B+

en
2
R211 R194 R214
1.8VS_GATE_R 2 @ 1 2 @ 1 1.8VS_GATE 2 1

0_0402_5% 0_0402_5% 130K_0402_5%


1

1
1 D Q6B D
C143 R212 5 SUSP 2 Q46

id
0.01U_0201_25V6-K 1M_0402_5% G G L2N7002KWT1G_SOT323-3
@
2 S 2N7002KDWH_SOT363-6 S
2

3
20VSB will change to 6V in DC mode, careful the Res divide voltage

nf
+3VALW to +3VALW_APU
+0.6VS +2.5V
For DisCharge +3VS CS34
3 3

Co
+3VALW +3VALW_APU 1 2
Need Short 1 +5VS +3VS

1
J7 @ R159 R935 R940 0.1u_0201_10V6K
1 2 47_0603_5% 47_0603_5% 47_0603_5%
1 2 @ @ @
JUMP_43X79
2

2
+5VS +5VS +5VS
Id=3.2A
1

1
D Q8 D Q156 D Q158 1 1 1
LP2301ALT1G_SOT23-3 2 SUSP 2 SUSP 2 SUSP CS24 CS25 CS26
@ G G G 0.1u_0201_10V6K 0.1U_0201_6.3V6-K
Q29 3 1
C @
0.1U_0201_6.3V6-K
@
S

L2N7002KWT1G_SOT323-3 S L2N7002KWT1G_SOT323-3 S L2N7002KWT1G_SOT323-3 S 2 2 2


0.01U_6.3V_K_X7R_0201

3
1 1 @ @ @
C129 C130
G
2

F
0.1U_0201_6.3V6-K
@ @
2 2
LC

R158 1 @ 2 0_0402_5% +3VALW +1.2V


31 PCH_CMOSP
1

1 1 1
C131 CS43 CS44
R164 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K
100K_0402_5% @
@ 2 2 2
2

4 4

reserve to cut off APU 3VALW when clear CMOS

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/15 Deciphered Date 2013/08/15 DC V TO VS INTERFACE


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date: Tuesday, May 28, 2019 Sheet 33 of 44
A B C D E
5 4 3 2 1

Hole
PCB Fedical Mark PAD
H2 SO-DIMM Shielding
HOLEA
FD4901 FD4902 FD4903 FD4904 FD4905 FD4906

SH1 SH2 SH5 SH6 SH7

1
SHIELDING_SUL-35A2M_9P2X3P3_1P SHIELDING_SUL-35A2M_9P2X3P3_1P

1
SHIELDING_SUL-35A2M_9P2X3P3_1P SHIELDING_SUL-35A2M_9P2X3P3_1P SHIELDING_SUL-35A2M_9P2X3P3_1P

PAD_C10P0D8P0

D D

1
1

1
H4 H6 H7 H8
HOLEA HOLEA HOLEA HOLEA
1

1
SH8
SHIELDING_SUL-35A2M_9P2X3P3_1P
PAD_CT7P0B6P0D3P2 PAD_CT7P0B6P0D3P2 PAD_CT7P0B6P0D3P2 PAD_CT7P0B6P0D3P2

H9 H10

1
HOLEA HOLEA

l
1

tia
PAD_C7P0D4P0 PAD_C7P0D4P0
H17 H18
HOLEA HOLEA

H11 H12 H13


HOLEA HOLEA HOLEA

1
PAD_O2P5X3P0D2P5X3P0N PAD_O2P5X3P0D2P5X3P0N Memory Down Shielding

en
C C
1

PAD_C7P0D2P8 PAD_C7P0D2P8 PAD_C7P0D2P8


SH9 SH10 SH11 SH12
SHIELDING_SUL-35A2M_9P2X3P3_1P SHIELDING_SUL-35A2M_9P2X3P3_1P SHIELDING_SUL-35A2M_9P2X3P3_1P SHIELDING_SUL-35A2M_9P2X3P3_1P
H14
HOLEA

id
1

1
PAD_C7P0D2P4

1
nf
H15 H16
HOLEA HOLEA
1

Co
PAD_CT7P0B10P0D4P0 PAD_CT7P0B10P0D4P0

H19 H20
HOLEA HOLEA
C
1

B B

pad_c6p0 pad_c6p0
F
LC

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/08 Deciphered Date 2013/08/05 Hole


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
S145 API 1.0

Date: Tuesday, May 28, 2019 Sheet 34 of 44


5 4 3 2 1
5 4 3 2 1

D D

l
tia
C C

en
id
nf
B

Co B
CF
LC

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/08 Deciphered Date 2013/08/05 Virtual symbol


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. L340 API
Date: Tuesday, May 28, 2019 Sheet 35 of 44
5 4 3 2 1
5 4 3 2 1

D D

C C

l
tia
en
id
B B

nf
Co
CF
A A
LC

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/15 Deciphered Date 2013/08/15 Power sequence Block


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date: Tuesday, May 28, 2019 Sheet 36 of 44
5 4 3 2 1
5 4 3 2 1

B+ +5VALW/8A

Richtek +5VLP/ 100mA


Adaptor
D D
EC_ON_3V EN PGOOD ALW_PWRGD
LV5083AGQUF
+3VLP/ 100mA
PMIC
FOR 3/5VALW +3VALW/6A

EC_ON_5V EN PGOOD +3VALW_PG

+3VS

+5VS

l
tia
TI
BQ24780SRUYR
C
Battery Charger C

en
Switch Mode
LCFC +1.2V/6A
LV5028
1.2VEN S5 PMIC +0.6VS/1A
SUSP# S3
FOR SYS

id
POK_VDDQ
SMBus
+5VALW
+0.9VS/6A

nf
EC_APU_ALWEN EN
PGOOD APUALW_PWRGD

+3VALW +1.8VALW/3A

Battery

Co
EC_APU_ALWEN EN PGOOD APUALW_PWRGD

Li-ion
3S1P +1.8VALW
+0.9VALW/1A
B
APUALW_PWRGD EN B
C
+3.3VALW

2.5VEN EN
+2.5V/1A
F
LC

Richtek VDDC_VDD/35A
RT3662ACGQW
controller
APU_SVID VIDs
VDDCR_SOC/10A
EN FOR CPU CORE&NB PGOOD
EC_VR_ON VR_APU_PWRGD

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/15 Deciphered Date 2013/08/15 Power Diagram


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
S145 API 0.3

Date: Tuesday, May 28, 2019 Sheet 37 of 44


5 4 3 2 1
5 4 3 2 1

PL101 EMC_NS@
BATIN BATT+
HCB2012KF-121T50_0805
1 2 VIN PL103 EMC@
HCB2012KF-121T50_0805
1 2
D PL102 EMC@ D
HCB2012KF-121T50_0805
1 2 PL104 EMC@
HCB2012KF-121T50_0805
PJ101 @ BATIN 1 2
JBATT1
JDCIN1 PF101 JUMP_43X79
1 APDIN 1 2 APDIN1 1 2 1
1 1 2 1

1
2 2 PC106 PC107
GND1 3 7A_24VDC_429007.WRML 9 2 3 EC_SMCA 1000P_0402_50V7K 0.01U_0402_25V7K
GND2 4 10 GND1 3 4 EC_SMDA
GND3 GND2 4 EMC@ EMC@

2
5 5 AZC199-02S.R7G_SOT23-3

1000P_0402_50V7K

1000P_0402_50V7K
100P_0402_50V8J

100P_0402_50V8J
GND4 6 5 6 PD103

PC101EMC@

PC102EMC@

PC103EMC@

PC104EMC@
GND5 6

2
7 7
GND6 7 8
8

1
ME@

100_0402_1%

100_0402_1%
2

2
ME@

PR106

PR105
HIGHS_PJSS0026-8B01H
SUYIN_125022HB008M202ZL

2
l
EMC_NS@

1
tia
EC_SMB_CK1 31,39

C C
EC_SMB_DA1 31,39
100K_0402_1%
PR107

en
1 2
+3VALW

BATT_TEMP_IN 1 2
BATT_TEMP 31,39
PR108 A/D

id
10K_0402_1%

nf
RTC_VCC
VCCRTC +3VL

Co
PD101
2
B
1 JRTC1 B
3 2 1 1
2 1
PR104 3 2
1U_0402_10V6K

2 LBAT54CWT1G_SOT323-3 GND1
1K_0603_1% 4
PC105

GND2
@
1
C
HIGHS_WS33020-S0351-HF
ME@
F
LC

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/15 Deciphered Date 2013/08/15 DCIN / RTC


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date: Tuesday, May 28, 2019 Sheet 38 of 44
5 4 3 2 1
5 4 3 2 1

V20B+
PQ201

@
PQ202
AONS32314_DFN8-5 AON7408L_DFN8-5 PJ201 PR201
D
P2 P3 JUMP_43X79 0.01_1206_1% D
1 1
2 2 S1 5 2 1 1 4
5 3 3 S2 D 2 1
VIN S3 2 3

220P_0402_50V7K

470P_0402_50V7K

680P_0402_50V7K

4700P_0402_50V7-K

6800P_0402_25V7-K

220P_0402_50V7K

4700P_0402_50V7-K

6800P_0402_25V7-K
10U_25V_M_X5R_0603

10U_25V_M_X5R_0603

0.01U_0402_50V6-K

0.01U_0402_50V6-K
EMC_NS@

EMC_NS@
4
1 4

5
PC329

PC330

PC331

PC332

PC333

PC334

PC335

PC338

PC339

PC340
1 1

470P_0402_50V7K

0.022U_0402_25V7K
4.7_0603_5%
1

1
PC201

PR202

2
EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@

EMC_NS@
PC202

PC203

PC204
2 2

2
780s_BATDRV 4

2
PQ203

0.01U_0402_25V7K
AON6324_DFN8-5

499K_0402_1%
1

3
2
1
1
780s_ACDRV_R

PR203

PC208
2
2
1 2
VIN VIN BATT+
PC205
0.1U_0402_25V6

0.1U_0402_25V6

0.1U_0402_25V6
LBAT54CWT1G_SOT323-3
1

1
4.02K_0603_1%

4.02K_0603_1%

1
PR206

PR207

PC206

PC207
2

2
V20B+

PD201
2

l
43K_0402_1%
1

tia
PR208

10U_25V_M_X5R_0603

10U_25V_M_X5R_0603
EMC_NS@
1 1

0.1U_0402_25V6
2

1
BQ24780S_VDD

PC209
1

ACN
ACP

PC211

PC212
PR209

0.01U_0402_25V7K
2 2

2
10_1206_5%

7.15K_0402_1%
2
2

1
PC215

PR210
C C

2
2.2U_10V_K_X5R_0603

ACN
ACP

5
PC213 PC214

en
1 1 2 780s_VCC 28 24 1 2 PQ205
VCC REGN

1
AON7380_DFN8-5
1U_0603_25V6K 780s_ACDET 6
ACDET 2.2_0603_5% 0.047U_0603_16V7K
25 780s_BS 1 2 2 1 4
BTST
PR211 PC216
780s_CMSRC 3 26 780s_HG
CMSRC HIDRV PR213

3
2
1
780s_ACDRV 4 0.01_1206_1%
ACDRV PL201

id
27 780s_LX 1 2 1 4
ACOK_10k pull high +3VL of open drain output at EC @ 780s_ACOK
PHASE 2.2UH_PCMB063T-2R2MS_8A_20% BATT+
0_0402_5% 1 2 PR215 5

BQ24780SRUYR_QFN28_4X4
PQ206 2 3

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K
ACOK

1
31 ACIN
@

1
0_0402_5% 1 2 PR217 780s_SDA 11 PR216

PC221

PC218

PC217

PC230
31,38 EC_SMB_DA1 SDA

AON7380_DFN8-5
23 780s_LG 4.7_0805_5%
SMBUS_10k pull high +3VL_EC of open drain output at EC@ LODRV
EMC_NS@

PU201

2
0_0402_5% 1 2 PR218 780s_SCL 12 22 1 2
31,38 EC_SMB_CK1 SCL GND

2
4

nf
@ PC228

0.1U_0402_25V6

0.1U_0402_25V6
1
0_0402_5% 1 2 PR219 780s_IADP 7 29 PC222 0.1U_0402_25V6
31 ADP_I IADP PAD

1
1000P_0402_50V9-J

PC223

PC224
PR220 1 2 0_0402_5% 780s_IDCHG 8 18 780s_BATDRV
EMC_NS@
@

31 IDCHG IDCHG BATDRV

3
2
1

2
@ 10_0603_5%

2
0_0402_5% 1 2 PR221 780s_PMON 9 PR222
31 PSYS PMON 780s_BATSRC 780s_BATSRC_R
17 1 2
BATSRC
20 780s_SRP 1 2 780s_SRP_R

Co
780s_VR_HOT 10 SRP
PROCHOT# PR224 charge:
100P_0402_50V8J

100P_0402_50V8J

100P_0402_50V8J

PR231
13
CMPIN
10_0603_5%
max current=3.75A

BATPRES#
1

volatge=3S

TB_STAT#
20K_0402_1% 14
PC225

PC226

PC227

CMPOUT 19 780s_SRN 1 2 780s_SRN_R


SRN
780s_ILIM 21
fsw=800K/REG0x12[9:8] = 01
@

ILIM
2

PR225
10_0603_5%

16

15
2

B @ PR226 B
31,44 VR_HOT# 0_0402_5% 1 2 PR232 0_0402_5%
780s_TB#
@
VR_HOT_10k pull high +3VS_APU of open drain output at APU
C
1

1 2 780s_ILIM_R 1 2
+3VALW BATT_TEMP 31,38
PR227 PR228
143K_0402_1% 32.4K_0402_1%
F 100K_0402_1%
0.1U_0402_25V6

Charge current limit 7A


1

PC229

PR230

discharge current 10A limit during turbo


LC 2

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2013/08/08 Deciphered Date 2013/08/05 CHARGER


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date: Tuesday, May 28, 2019 Sheet 39 of 44
5 4 3 2 1
5 4 3 2 1

+5VLP

PJ3501

@
2 1 +3VALW_VIN
V20B+ JUMP_43X79
2 1

EMC_NS@
0.1U_0402_25V6

10U_25V_M_X5R_0603

10U_25V_M_X5R_0603
1 1

1
EC set push-pull

PC3535

25
PU3501 10_0603_5% 0.1U_0603_25V7K

PC3534

PC3536
EC_ON pull low 100K at EC PR3511 PC3541

VDDSW
2 2

2
3 +3VALW_BS 1 2 1 2
BOOT1
D Enable=3.2V normal mode 11
VIN1 PL3501
PJ3502 D

@
+3VALW_LX +3VALW_P

+3VALW_LX

+5VALW_LX
0_0402_5% @ 0_0402_5% @ 1 1 2 2 1
PR3507 PR3515 LX1_1 2 2 1 +3VALW
1 2 1 2 +3VALW_EN 10 LX1_2 35 1.5UH_PCMB063T-1R5MS_10A_20%

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603
JUMP_43X79
31,41 EC_ON 0_0402_5% @ EN1 LX1_3
1 1 1 1
PR3501 6 +3VALW_P

PC3539

PC3544

PC3543

PC3542
0.1U_0402_25V6
1 2 1 2 +5VALW_EN +3VALW_PG 9 VOUT1

EMC_NS@

EMC_NS@
PGOOD1
3VALW:

1
31 MAINPWON

PC3537

2.2_0805_5%

2.2_0805_5%
2 2 2 2
TDC=6A
PD3501

PR3508

PR3509
PC3538
LRB751V-40T1G_SOD323-2 4

@
VBYP3 +3VALW

2
OCP=8A
1 2 7
26 EC_ON_R VCC1
+3VLP
OVP=120%

1+3VALW_SN 2

1+5VALW_SN 2
→ 100mA
PJ3503 PJ3505

@
2 1 +5VALW_VIN 1U_0402_6.3V6K 5 2 1
V20B+ 2 1 LDO3 2 1 +3VL
Fsw=500KHz

10U_25V_M_X5R_0603

10U_25V_M_X5R_0603
JUMP_43X79 PC3545 1 2 4.7U_0603_6.3V6K
JUMP_43X39

EMC_NS@
1 1

1000P_0402_50V7K

1000P_0402_50V7K
0.1U_0402_25V6
1
10_0603_5%

EMC_NS@

EMC_NS@
PC3546
14 22 +5VALW_BS 1 2 PC3554 1 2 0.1U_0603_25V7K

PC3547

PC3548

PC3532

PC3533
VIN2 BOOT2 PR3512
2 2 PL3502

2
23 +5VALW_LX PJ3504

@
LX2_1

2
24 1 2 +5VALW_P 2 1
LX2_2 36 2 1 +5VALW
+5VALW_EN 15 LX2_3 1.5UH_PCMB063T-1R5MS_10A_20%

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603
JUMP_43X79
EN2

LV5083AGQUF_UQFN36_5X4
19 +5VALW_P 1 1 1 1
VOUT2

PC3555

PC3552

PC3553

PC3551
0.1U_0402_25V6
5VALW:

1
100K_0402_5% ALW_PWRGD 16

PC3549
PGOOD2 2 2 2 2
TDC=8A
PR3514
2 1 ALW_PWRGD

@

2
OCP=10A
21

@
PC3550 VBYP5 +5VALW
+5VLP

l
+3VALW 1 2 18
VCC2 OVP=120%
→ 100mA
100K_0402_5%
PR3513 20 PC3559 1 2 4.7U_10V_K_X5R_0603
Fsw=500KHz

tia
2 1
@ +3VALW_PG 1U_0402_6.3V6K LDO5

33
+3VALW 22UC_6.3VC_MC_X5RC_0603
VINSW1

1U_0402_6.3V6K
PJ3506

@
1
1 29 +3VS_SW 1 2 +3VS
@PC3566

0_0402_5% @ VOUTSW1 1 2
PC3530 PR3517 JUMP_43X79
C 2 C
2

1 2 +3VS_EN 31 3VS_SS 1 2
31,33,41 SUSP# SS1

en
30 PC3562
ENSW1 2200P_0402_25V7-K
PC3569 2 1 1U_0402_6.3V6K
PJ3507

@
+5VALW
34
VINSW2 VOUTSW2
28 +5VS_SW 1
1 2
2 +5VS
JUMP_43X79
0_0402_5% @ 26 5VS_SS 1
22UC_6.3VC_MC_X5RC_0603

2
PR3518 SS2
1
1U_0402_10V6K

1U_0402_10V6K
1

1
PGND_2

PGND_1

AGND_2

AGND_3

AGND_1
SUSP# 1 2 +5VS_EN 27 PC3561
@PC3565

PC3531

PC3568
ENSW2 2200P_0402_25V7-K

id
2
2

2
PC3570 2 1 1U_0402_6.3V6K

@
13

12

17

32

8
@

nf
Co
B B
F C
LC

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2015/08/20 Deciphered Date 2016/08/20 PWR_3VALW/5VALW


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date: Tuesday, May 28, 2019 Sheet 40 of 44
5 4 3 2 1
5 4 3 2 1

PR1902 1
@ 2 0_0402_5% LV5075_VDDQ_EN
31 1_2VEN
SYSON-1_2VEN
PC1909 2 1 0.1U_0402_10V6-K

@
SUSP# PR1904 1
@ 2 0_0402_5% LV5075_VTT_EN
31,33,40 SUSP#

PC1908 2 1 0.1U_0402_10V6-K

@
D D
SUSP# PR1906 1
@ 2 0_0402_5% LV5075_0.9VS_EN

LV5075_VCC
EC_APU_ALWEN PR1913 1 2 0_0402_5%
31 EC_APU_ALWEN 10_0603_5%

@
PR1907 @
1 2 PR1901 1 2 0_0402_5%
PC1907 2 1 0.1U_0402_10V6-K
+5VLP EC_ON 31,40

@
@ 2 1 1 2
EC_APU_ALWEN PR1908 1 2 0_0402_5% LV5075_1P8VA_EN

@
PC1902 PC1903
EC Push,no pull high,not support 1.8V SPI mirror code 2.2U_10V_K_X5R_0603 0.1U_0402_10V6-K

PC1906 2 1 0.1U_0402_10V6-K PR1909

LV5075_PMIC_EN
1 2
@

+1.2V_B+
@

LV5075_VSYS
APUALW_PWRGD PR1910 1 2 0_0402_5% LV5075_0.9ALW_EN 10_0402_5%
1 2
APUALW_PWRGD need delay to EC after 0.9VALW power up
PC1901
PC1905 2 1 0.1U_0402_10V6-K 1U_0402_25V6-K
@

28

27

41
9
PR1911 1
@ 2 0_0402_5% LV5075_2.5V_EN
31 2_5VEN

VCC

GND
PMIC_EN
VSYS
@
EC-2_5VEN LV5075_0.9ALW_EN 29
EN_LDO1 SDA
25 LV5075_EC_SMB_DA2 PR1925 1 2 0_0402_5%
EC_SMB_DA2 26,31
PC1904 2 1 0.1U_0402_10V6-K LV5075_2.5V_EN 1 26 LV5075_EC_SMB_CK2 PR1926 1
@ 2 0_0402_5%
EN_LDO2 SCL EC_SMB_CK2 26,31

l
@

LV5075_0.9VS_EN 11 24 LV5075_ALERT# PR1912 1 2 0_0402_5%

@@
EN_V1P0A OT H_PROCHOT# 6,31

22UC_6.3VC_MC_X5RC_0603
PR1915 2 1 100K_0402_5%

tia
+3VALW

LV5075_LX_0.9VS
LV5075_1P8VA_EN 16 22 0.9VS_PWRGD

LV5075_LX_1P8
EN_V1P8A PG_V1P0A 0.9VS_PWRGD 31
PR1927 2 1 100K_0402_5%
LV5075_VDDQ_EN 31 21 APUALW_PWRGD +3VALW APUALW_PWRGD 31
EN_VDDQ PG_V1P8A
PJ1901 LV5075_VTT_EN 36 23

@
1 2 LV5075_0.9VS_VIN EN_VTT PG_VDDQ

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603
+5VALW 1 2 PL1901
PJ1902

EMC_NS@

@
0.1U_0402_25V6
JUMP_43X39 12 LV5075_LX_0.9VS 1 2 +0.9VS_P 2 1
1 LX_V1P0A1 2 1 +0.9VS

2
7 13

EMC_NS@

EMC_NS@
PC1910

PC1911

4.7_0603_5%

4.7_0603_5%
C
8 VIN_V1P0A1 LX_V1P0A2 14 0.47UH_PCMB063T-R47MS_18A_20% JUMP_43X79
C
VIN_V1P0A2 LX_V1P0A3 15
1 1 1 1 1 1 0.9V:
0.9VS/VDDP=4A

PC1912

PC1913

PC1914

PC1915

PC1916

PC1917

PR1918

PR1919
en
2 LX_V1P0A4

2
PJ1903
@ 10 TDC=6A
VO_V1P0A 2 2 2 2 2 2 OCP=10A

1
10U 6.3V M X5R 0402

10U 6.3V M X5R 0402


1 2 LV5075_V1P8_VIN

@
+3VALW 1 2
OVP=120%

EMC_NS@
1 1

0.1U_0402_25V6
1
LV5075_LX_1P8
JUMP_43X39 17 PL1902 PJ1904 Fsw=1M

@
PC1945

PC1918

PC1919
19 LX_V1P8A1 18 1 2 +1.8VA_P 2 1
+1.8VALW

680P_0402_50V7K

680P_0402_50V7K
VIN_V1P8A LX_V1P8A2 1UH_PH041H-1R0MS_3.8A_20% 2 1

EMC_NS@

EMC_NS@
2 2

1
20 JUMP_43X79
1.8VALW:

PC1930

PC1931
VO_V1P8A

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603
+1.2V_P APU_VDD18=2A(TDC)
+1.2V_P 1 1 1 1
TDC=3A

2
33 LV5075_UG_1.2V
→ 38

PC1920

PC1921

@PC1922

@PC1923
2 UGATE_VDDQ

id
PC1924 VIN_VTT 32 LV5075_BST_1.2V 1
PR1916
2
PC1925
1 2
OCP=6A
BS_VDDQ 2 2 2 2 OVP=120%
← 39
10U_0603_6.3V6M
1 Fsw=1M

22UC_6.3VC_MC_X5RC_0603
0_0603_5% 0.1U_0603_25V7K
VTT 34 LV5075_LX_1.2V
PJ1905 LX_VDDQ
@

2 1 +0.6VSP 40 35 LV5075_LG_1.2V
+0.6VS 2
JUMP_43X39
1
PR1917
VSNS_VTT LGATE_VDDQ
37 +1.2V_P
1

nf
1 2 LV5075_CS 30 VSNS_VDDQ
PC1926

CS_VDDQ

@
33K_0402_1% JUMP_43X39
2 PJ1907

@
5 6 +0.9VALW_P 1 2
VIN_LDO1 LDO1 1 2 +0.9VALW
PJ1906
@

1 2 LV5075_0.9VALW_VIN
2 0.9V:
+1.8VALW 1 2 PC1928 VDDP_S5=1A

Co
JUMP_43X39 10U_0603_6.3V6M
3 +2.5V_P 1
2 LDO2
4
PC1927 VIN_LDO2 2 PJ1910

@
FB_LDO2 1 2
1
10U_0603_6.3V6M 1 2 +2.5V

24.9K_0402_1%
1
JUMP_43X39
PU1901
2.5V:

PR1920
2
LV5028RPC_QFN40_5X5
PC1935 TDC=1A
1
10U_0603_6.3V6M FB=0.75V

2
PJ1909 +2.5V_FB
@

1 2 LV5075_2.5V_VIN
B
+3VALW 1 2 B

10.5K_0402_1%
10U 6.3V M X5R 0402

10U 6.3V M X5R 0402

JUMP_43X39

PR1921
1 1
C
PC1944

PC1934

2
2 2
F
+1.2V_B+
LC

PJ1908

@
+1.2V_B+ 1 2
1 2 V20B+
JUMP_43X39

0.1U_0402_25V6
EMC_NS@

10U_25V_M_X5R_0603

10U_25V_M_X5R_0603
1
5

PC1929
1 1

AON7408L_DFN8-5
D

PC1932

PC1933
2
PQ1901
2 2
LV5075_UG_1.2V 4
G
+1.2V_P

S3
S2
S1
0.47UH_PCMB063T-R47MS_18A_20% @
PL1903 PJ1911

3
2
1
LV5075_LX_1.2V 1 2 +1.2V_P 2 1
2 1 +1.2V
5

2
JUMP_43X118
PR1922

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603
1.2V:

AON7380_DFN8-5
4.7_0805_5%
EMC_NS@ TDC=10A

PQ1902
1 1 1 1 1 1 OCP=20A

1
LV5075_LG_1.2V 4
OVP=120%

PC1937

PC1938

PC1939

PC1940

@PC1941

PC1942
Fsw=1M

1
PC1943
680P_0402_50V7K 2 2 2 2 2 2

@
EMC_NS@
3
2
1

2
A A

Security Classification LC Future Center Secret Data Title

Issued Date 2014/02/20 Deciphered Date 2014/02/20 System PMIC


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. S145 API
Date: Tuesday, May 28, 2019 Sheet 41 of 44
5 4 3 2 1
A B C D

1 1

l
tia
en
2 2

id
nf
Co
3
CF
3
LC

4 4

Security Classification LC Future Center Secret Data Title


Issued Date 2013/08/15 Deciphered Date 2013/08/15 PWR_1.35VGS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OFSize
R&D Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
A2
S145 API 0.3

Date: Tuesday, May 28, 2019 Sheet 42 of 44


A B C D
5 4 3 2 1

D D

l
tia
C C

en
id
nf
Co
B B

CF
LC

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2017/06/24 Deciphered Date 2018/06/23 PWR-GPU_CORE_AMD


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
S145 API 0.3

Date: Tuesday, May 28, 2019 Sheet 43 of 44


5 4 3 2 1
5 4 3 2 1

V20B+

2200P_0402_25V7-K
PR5902 close to VR side

10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6
1

EMC_NS@

EMC_NS@
1

1
2 1 + PC5987
L=0.24uH

PC6069

PC5905

PC5903

PC5904
5
33U_D2_25VM_R40M
PR5902 DCR=1.14m ohm

AON6380_DFN8-5

2
40.2_0402_1% 2
@ Irms=35A
1 2 follow richtek suggestion Isat=32A

PQ5901
6 VDDCR_VSS_SENSE VDDCR_UGATE2 4
PR5901
PC6076 PR5991 Size:7.4*6.8*3

@
10_0402_1% 1 2 2 1

680P_0402_50V7K 100_0402_5%
PC5907

3
2
1
PL5901
D Kelvin routing 1 2 1 2
VDDCR_PHASE2 VDDCR_PHASE2
0.24UH_PCME063T-R24MS1R145_35A_20%
1 2
D

PC5906 56P_0402_50V8-J +VDDC_VDD

EMC_NS@
1
220P_0402_50V7K

@
4.7_0805_5%
PR5906 PC5908

2
PR5907
APU_VDDCR

PR5908
2 1 1 2 1 2 VDDCR_BOOT2 1 2VDDCR_BOOT2_R 1 2 PJ5903 PJ5904 1 1 1 1

330U_D2_2V_Y

330U_D2_2V_Y

330U_D2_2V_Y

330U_D2_2V_Y
6 VDDCR_VCC_SENSE

AON6324_DFN8-5

AON6324_DFN8-5
PR5905 FSW=400KHz

PC5957

PC5956
JUMPER JUMPER

1
PR5904 10K_0402_1% 31.6K_0402_1% 2.2_0603_5% + + + +

PC5911

PC5912
0.22U_0603_25V7K Slew rate:12.5mv/us

1VDDCR_SN2 2
10_0402_1%
Kelvin routing

PQ5902

PQ5903
PC5909 VDDCR_LGATE2
1 2 1 2 PR5993 1
@ 2 0_0402_5%
4 4
2 2 2 2 TDC=35A EDC=45A
+VDDC_VDD
OCP=67.5A

1000P_0402_50V7K
PR5903

1
need link CIS 5.49K OVP=VID+300mV

EMC_NS@
40.2_0402_1% 330P_0402_50V7K
APU_VREF

3
2
1

3
2
1
Load Line=0.7mohm

@
PR5903 close to VR side
PR5909

PC5919
5.49K_0402_1% Ripple:+/-20mv

2
+3VS
MAX AC: VID_VDDC +95mv
MIN AC: VID_VDDC -80mv
PC5920
VDDCR_ISEN2P

1
1 2
261K_0402_1%

261K_0402_1%
26.7K_0402_1%
2

PR5971 0.1U_0402_25V7-K
10K_0402_1% PR5913
PR5919

PR5921

PR5920

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603
100K_0402_1%_NCP15WF104F03RC VDDCR_ISEN1P VDDCR_ISEN1N 1 2

2
1 2 @
PR5916 1 2 0_0402_5% 1_0402_1%
VR_APU_PWRGD 31
1

PH5901 VDDCR_ISEN1N
PR5959 1 1 1 1 1 1 1 1 1 1 1 1 1

PC5921

PC5923

PC5925

PC5973

PC5974

PC5977

PC5978

PC5980

PC5963

PC5959

PC5998

PC5999

PC5975
1 2 VDDCR_TSEN VDDCR_ISEN1P 1 2
VDDCR_ISEN2P
2 2 2 2 2 2 2 2 2 2 2 2 2
PR5929
60.4K_0402_1% 5.49K_0402_1% @

VDDCR_COMP
VDDCR_VSEN
+3VS

APU_PGOOD
APU_SET1 PC5927

APU_RGND
V20B+

VDDCR_FB
1 2 VDDCR_BOOT2

EMC_NS@

EMC_NS@
2200P_0402_25V7-K
60.4K_0402_1% 0.1U_0402_25V6 VDDCR_UGATE2

1
PR5934

10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6
1 2 SOC_TSEN PR5995
PU5901

1
4.7K_0402_1%

PC5990

PC5932

PC5930

PC5931
10

1
6
RT3662ACGQW_WQFN40_5X5

5
@
PH5902

ISEN1P

ISEN2P

FB

COMP
ISEN1N

VSEN

RGND

PGOOD

AON6380_DFN8-5
BOOT2

UGATE2
2

2
1 2
VDDCR_PHASE2
2

40
620_0402_1%

24K_0402_1%
24.3K_0402_1%

PHASE2
100K_0402_1%_NCP15WF104F03RC @

PQ5904
PR5936

PR5956 1 2 0_0402_5% APU_VR_HOT_L 11 39 VDDCR_LGATE2 VDDCR_UGATE1 4


PR5935

PR5937

31,39 VR_HOT# VRHOT_L LGATE2


VDDCR_TSEN 12 38 VDDCR_BOOT1
TSEN BOOT1
1

APU_SET1 13 37 VDDCR_UGATE1
SET1 UGATE1

3
2
1
PL5902
VDDCR_IMON 14 36 VDDCR_PHASE1 0.24UH_PCME063T-R24MS1R145_35A_20%
fixed 0.8V output reference output voltage
.47U_0402_6.3V6K 3.9_0402_1%
PC5954 PR5943 IMON PHASE1 +5VALW VDDCR_PHASE1 VDDCR_PHASE1 1 2
2 1 1 2 APU_VREF 15 35 VDDCR_LGATE1 +VDDC_VDD
VREF_PINSET LGATE1
SOC_IMON APU_PVCC @ PC5994

1
16 34 PR5925 1 2 0_0603_5%
delete PWROK pull high EEside pull high
PR5974

4.7_0805_5%
EMC_NS@
IMON_NB PVCC VDDCR_BOOT1 2 VDDCR_BOOT1_R

EMC_R3F2@
@ 1 1 2

AON6324_DFN8-5

AON6324_DFN8-5

10U 6.3V M X5R 0402

10U 6.3V M X5R 0402

10U 6.3V M X5R 0402

10U 6.3V M X5R 0402


PR5924
C
PR5926 1 2 0_0402_5% APU_POK_R 18 17 APU_VCC 1 2 C

68P_0402_50V8J
6 APU_PWROK PWROK VCC

2
@ SOC_LGATE
PR5927 2.2_0603_5%
0.22U_0603_25V7K 1 1 1 1

1
PR5962 1 2 0_0402_5% 19 33 2.2_0603_5% PJ5905 PJ5906

PQ5905

PQ5906

PC5958

PC5961

PC5924

PC5926

PC5922
6 APU_SVC SVC LGATE_NB VDDCR_LGATE1

1 VDDCR_SN1 2
@ 4 4
APU_VREF JUMPER JUMPER

2.2U_10V_K_X5R_0402

2.2U_10V_K_X5R_0402

1
PR5963 1 2 0_0402_5% 20 32 SOC_PHASE
6 APU_SVD SVD PHASE_NB 1 1 2 2 2 2

2
@
Kelvin routing

PC5934

PC5935
PR5964 1 2 0_0402_5% 21 31 SOC_UGATE

1000P_0402_50V7K
tia
6 APU_SVT SVT UGATE_NB
10.5K_0402_1%

ISENN_NB

EMC_NS@
ISENP_NB

COMP_NB

BOOT_NB
TSEN_NB
2 2

3
2
1

3
2
1
PR5942

FB_NB
VDDIO

1
1 2
need link CIS 5.49K

PC5936
GND

VIN

EN
1.5K_0402_1% PR5932

2
5.49K_0402_1%
PR5947 PH5903 PR5948

41

22

23

24

25

26

27

28

29

30

2
1 2 1 2 1 2 VDDCR_IMON

15.8K_0402_1% 100K_0402_1%_NCP15WF104F03RC

APU_VDDIO

SOC_COMP

SOC_BOOT
19.6K_0402_1%

SOC_TSEN
PR5951

SOCI_FB

APUPWR_EN_R
PC5918

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603
1 2 2.2_0603_5%
21.5K_0402_1% PR5938 VDDCR_ISEN1P 1 2
+1.8VS 2 1

0.1U_0402_10V7K
PR5952 PH5904 PR5953
SOC_IMON 0.1U_0402_25V7-K 1 1 1 1 1 1 1 1

1
1 2 1 2 1 2 PC5937

PC5988

PC5989

PC5991

PC5993

PC5995

PC6085

PC6086

PC6087

PC6090
2 1 PR5933
PC5938

en
6.98K_0402_1% 100K_0402_1%_NCP15WF104F03RC 1 2 VDDCR_ISEN1N 1 2

2
2 2 2 2 2 2 2 2

EMC_R3F2@
1U_0402_6.3V6K
0.1U_0402_25V6 @

@
SOC_ISEN1N PR5975 1 2 0_0402_5% 1_0402_1%
EC_VR_ON 31 PR5961
PC6071 VDDCR_ISEN2P 1 2
SOC_ISEN1P 1 2

APU_VIN
0.1U_0402_25V6 5.49K_0402_1%

4.7_0603_5%
PR5939
Output CAP:330u/9m D2*4+22uF*13+10u-0402*5
PR5941 close to VR side PC5945
1

PC5940
2
V20B+ FD: 22u+3PCS 10uf+3PCS
+VDDCR_SOC 1 2 1 2 1 2 1 2

id
PR5941 PC5944 56P_0402_50V8-J 0.1U_0402_25V6
APU_SVC 60.4_0402_1% 220P_0402_50V7K

2 1 SOC_FB_R 1
PR5945
2 1 2
V20B+

2200P_0402_25V7-K
APU_SVD 6 VDDCR_SOC_VCC_SENSE

10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6
PR5944
PR5946
10_0402_1% 10K_0402_1%

1
35.7K_0402_1%
Kelvin routing

PC5941

PC5942

PC5943

PC5992
EMC_NS@

EMC_NS@
APU_SVT

AON6380_DFN8-5
PR5992

2
100_0402_5%
0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

reserved

PQ5907
SOC_UGATE
1

4
follow richtek
@ PC6079

@ PC6080

@ PC6081

@2
PC5947
B 330P_0402_50V7K
suggestion B

nf
2

@1

3
2
1
PC6077 PL5903
@2 680P_0402_50V7K 0.24UH_PCME063T-R24MS1R145_35A_20%
SOC_PHASE SOC_PHASE 1 2
+VDDCR_SOC
PC5946

10U 6.3V M X5R 0402

10U 6.3V M X5R 0402


SOC_BOOT 2SOC_BOOT_R

2
1 1 2
VDDCR_SOC

4.7_0805_5%
EMC_NS@
1 1

330U_D2_2V_Y

330U_D2_2V_Y
5
PJ5907 PJ5908

PR5950

PC5964
PR5949 1 1
0.22U_0603_25V7K + + FSW=300KHz

PC6070

PC6095

PC6096
2.2_0603_5% JUMPER JUMPER

AON6324_DFN8-5

1
Kelvin routing Slew rate :12.5mv/us

2
2 2 2 2
TDC=10A EDC=13A

PQ5908
SOC_LGATE 4

@
OCP=20A

Co

1SOC_SN1

1
need link CIS 5.49K OVP=VID+300mA

680P_0402_50V7K
EMC_NS@
PR5957 Ripple:+/-20mv

3
2
1
5.49K_0402_1%

PC5955
MAX AC: VID_VDDCR_SOC +70mv

2
MIN AC: VID_VDDCR_SOC -40mv

2
PC5939
1 2

0.1U_0402_25V7-K

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603

22UC_6.3VC_MC_X5RC_0603
PR5940
SOC_ISEN1P 2 1

5.49K_0402_1% 1 1 1 1 1 1 1 1 1 1 1 1 1

PC5951

PC5953

PC5966

PC5968

PC5971

PC5972

PC5952

PC5981

PC5982

PC5983

PC5984

PC5985

PC5986
2 2 2 2 2 2 2 2 2 2 2 2 2

@
SOC_ISEN1N
C
Output CAP:330u/9m D2*2+22uF*7
F
A A
LC

Security Classification LC Future Center Secret Data Title

Issued Date 2017/03/14 Deciphered Date 2017/03/01 PWR-VDDCR/SOC


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Size
Custom
Document Number
S145 API Rev
0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Tuesday, May 28, 2019 Sheet 44 of 44
5 4 3 2 1

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