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LECTURE 2 Mekatronika
LECTURE 2 Mekatronika
ELECTRIC CIRCUITS
R1
I
VR1
VS VR2 R2
A
Figure 2.1. Series resistance circuit
(18)
(19)
R1 R2
(20)
By applying KVL to capacitor and inductor circuits, it can be shown that two capacitors in
series combine as
C1 C2
(21)
Resistor
Inductor
Capacitor
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Figure 2.2. Rangkaian Electronic
In general, for N resistor connected in series with a total applied voltage of VS, the voltage VRi
across any resistor Ri is
(24)
(25)
I
Applying KCL at node A gives A
I1 (26)
I2
VS R1 R2
(27)
Replacing the resistance value R1 and R2 with their conductance equivalent 1/G1 and 1/G2
gives
(28)
A single resistor with a conductor of value (G1 + G2) would have given the same result;
therefore conductances in parallel add. We can write Equation (28) as
(29)
where Geq is the equivalent conductance and Req is the equivalent resistance. By comparing
the right-hand side of this equation to Equation (27), we get
(30)
or
(31)
R1
I1
I
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I2 R2
Req
(32)
or
(33)
By applying KVL to capacitor and inductor circuits, it can be shown that two
capacitors in parallel add:
(34)
C1
Ceq
C2
(35)
L1
Leq
L2
, (36)
R2 = 2 kΩ R4 = 4 kΩ
Iout A B
Vout
E R3 = 3 kΩ
R1 =1 kΩ V1 = 10 V R5 = 5 kΩ R6 = 6 kΩ
D
F
C
V2 = 20 V
The first step is to combine resistor clusters between and around the sources (V1 and
V2) and the branches of interest (those dealing with Iout and Vout) using the series and parallel
resistance formulas (Equation 19 and 22). The resultant resistances for the equivalent circuit
that follow are
+ V234
R234
Iout Vout
I234
R1 V1 R56
V2
Applying KVL to the right loop tells us that the total voltage across R 234 and R56 in the
assumed direction of I234 is (V1 – V2). Voltage division (Equation 23) can then be used to
determine the voltage drop across R234 in the assumed direction of I234:
Note that since V234 was found to be negative, the actual flow of current through R234 would be
in the opposite direction from that assumed in this solution.
Rout
output impedance
Vout
VS
Ideal voltage source
Iout
Rout
IS
output impedance
Ideal current source
ideal ammeter
Iin VR
I
Rin
input impedance
Figure 2.6. Real ammeter with input impedance
EXAMPLE
This example illustrates the effects of source and meter output and input impedance on
making measurements in a circuit. Consider the following circuit with voltage source VS and
voltage meter Vm.
VS R1 R2 Vm
VS Req Vm
However, if the source has output impedance Zout and the meter has input impedance Zin, the
“real” circuit actually looks like this:
Zout
Zin Vm
Req
real VS
voltage
source real voltmeter
The parallel combination of Req and Zin yields the following circuit (a). Zout and the parallel
combination of Req and Zin are now effectively in series since no current flows into the ideal
meter Vm. Thus, the total equivalent resistance shown in circuit (b) is
Delo’en
Zout neng kene R eq Z in
R eq Z in Vm
VS
R’eq Vm
VS
(b)
(a)
Note that R’eq defined in the previous equation approaches Req as Zin approaches 0. From
voltage division in circuit (a), the voltage measured by the actual meter would be
Therefore, if VS = 10 V,
This differs substantially from the result that would be expected (10 V) with an ideal source
and meter.
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