Professional Documents
Culture Documents
FPGA Adaptive Beamforming With HDL Coder and Zynq RFSoC
FPGA Adaptive Beamforming With HDL Coder and Zynq RFSoC
▪ Introduction
– Applications: Radar, Comms and Wireless
– Hardware Prototyping – live demo
▪ Theory and Implementation
– Linear algebra
– Matrix decomposition: QR vs Cholesky
– Latency vs. area tradeoffs
▪ HDL Coder Implementation
– HDL Coder implementation
– Resource mapping and utilization
2
Adaptive Beamforming
w2
+
w3
Interferer w4
Adaptive
Algorithm
3
Applications: Radar
4
Applications: 5G
5
Beamforming Demonstration
Test Setup
ZU28DR RFSoC
Apply
Signal of interest Signal of
Steering Angle Beam Steer
Interest Weights
4 ADC and DAC
+ channel loopback
Interference Apply
Steering Angle Interference Beam Steer
FPGA IO
TCP/IP:
Weights
MVDR
Data Capture
MVDR
Signal of interest Algorithm
Steering Angle
MATLAB
6
Agenda
▪ Introduction
– Applications: Radar, Comms and Wireless
– Hardware Prototyping – live demo
▪ Theory and Implementation
– Linear algebra
– Matrix decomposition: QR vs Cholesky
– Latency vs. area tradeoffs
▪ HDL Coder Implementation
– HDL Coder implementation
– Resource mapping and utilization
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
Agenda
▪ Introduction
– Applications: Radar, Comms and Wireless
– Hardware Prototyping – live demo
▪ Theory and Implementation
– Linear algebra
– Matrix decomposition: QR vs Cholesky
– Latency vs. area tradeoffs
▪ HDL Coder Implementation
– HDL Coder implementation
– Resource mapping and utilization
24
FPGA Implementation Challenges
▪ Fixed-Point Math
▪ Project Timeline
25
HDL Implementation Workflow
MATLAB
Reference
MATLAB
Hardware
Architecture Fixed Point
Designer
Fixed-point Simulink
Implementation
HDL Coder
HDL Code Generation
and Optimization
Integrated Verification
HDL Verification
and Targeting
26
MATLAB MVDR reference code
% normalize response
w = wp/(sv'*wp);
end
27
HDL Implementation of MVDR Beamforming
28
HDL Implementation of MVDR Beamforming
29
Form Covariance Matrix
▪ For Each subsystem % form covariance matrix
– Process elements independently Ecx = X.'*conj(X);
– Concatenate results into outputs
30
Moving Average
31
Compute Weight Vector
100+ hours of
design time saved!
32
Normalize Response
33
Implementation Results
Xilinx ZCU111 RFSoC Eval Board
MATLAB
Simulink Ethernet
▪ Device: xczu28dr (ZCU111)
34
Resources to Get Started and Speed Adoption
▪ Getting started:
– MATLAB Onramp
– Simulink Onramp
– HDL pulse detector self-guided tutorial and videos
35
Beamforming Demonstration
▪ ZCU111 RFSoC Adaptive Beamformer demo for 4x4 matrix solve for 4 channel ADC/DAC
▪ Places nulls in interference locations and maximizes beam pattern for steering direction
▪ Interactively steer angles for interference and beam pattern at run-time
Download from
File Exchange
36