Optimize Flyback Magnetics Helping to Power Your Next Great Idea

to Empower the PD
OPTIMIZE FLYBACK MAGNETICS TO EMPOWER THE PD
By John Gallagher, Field Applications Engineer,
Pulse Engineering,SanField Applications Engineer,
Diego
In PoE systems, performance of the flyback con-
verter used to step down the 48-V supply in the
Introduction
powered device depends on careful transformer
design.
In PoE systems, performance of the flyback converter used to step down the 48-V
supply in the powered device depends on careful transformer design.

A
A growing number of growingelectronic devices
number of require
electronic both datarequire
devices
connectivity and a power both source to functionand
data connectivity effectively. The to
a power source ���� ����
IEEE 802.3af standard outlines
function a method
effectively. TheforIEEE
delivering
802.3af standard
power and data over outlines
LAN cables using
a method forthe existingpower
delivering Ethernet
and data ��
infrastructure. A key element
over LAN of cables
this standard
using the is existing
that the Ethernet
power
delivery must be isolated
infrastructure. A on
keythe user or
element of powered device
this standard (PD)the
is that ���� ���� ����
side. Thispower
isolation requires
delivery mustthe use of an
be isolated on isolated
the user or power
powered de-
topology within the side.
vice (PD) PD. This isolation requires the use of an isolated ���
power topology within the PD.
The most cost-effective power topology
The most cost-effective powertotopology
provide to this
provide this
isolation with acceptable
isolation efficiency
with acceptable is the continuous-mode
efficiency is the continuous-mode ��
flyback. Toflyback.
implement the flyback
To implement effectively
the flyback in PDs,
effectively designers
in PDs, design-
must understand
ers must the basic operation
understand of this topology
the basic operation and theand
of this topology
equationstheneeded to design the flyback transformer.
equations needed to design the flyback transformer. Fig. 1. Operation of the flyback converter can be modeled with this
In Power-over-Ethernet (PoE) applications, the power- Fig. 1. Operation of the flyback converter can be modeled with
simplified schematic where switches S1 and S2 can represent either
In Power-over-Ethernet
sourcing equipment (PoE) applications,
(PSE) the power-
supplies a voltage of 36 Vdc to 57 this simplified schematic where switches S1 and S2 can
diodes or MOSFETs.
sourcing equipment (PSE) supplies a voltage of 36 Vdc to 57 represent either diodes or MOSFETs.
Vdc to a PD. However, very few, if any, devices will require
Vdc to a PD. However,
voltages in this very
range.few,
As aif result,
any, devices
a power will require
supply inside the same, and the lower peak currents of the continuous flyback
voltages inPD this range.
must convertAsthea result,
availablea power
power to supply inside the
the regulated voltage improve overall efficiency. Furthermore, the right half-plane
PD must convert
requiredthe available
by the power
electronics to the
within theregulated voltage of
PD. The designer required
zerobyinthe
the electronics
continuous-mode withinflyback
the PD. The designer
is suffciently high of
so the
as
power supply for the PD must find the most cost-effective, space- and energy-efficient means of accomplishing this task.
the power supply for the PD must find the most cost-effec- not to affect the stabilization of the feedback loop.
tive, space- and energy-efficient means of accomplishing As a result, the vast majority of published PD power refer-
Due to the requirement for 1500‑VRMS isolation, an isolated power topology must be used. For the power levels required for
this task. ence designs use a continuous-mode flyback topology. Refer-
the existing PoE specification (less than 13 W), the flyback converter is the simplest and least-expensive isolated topology.
Due to the requirement for 1500-VRMS isolation, an ence designs from of several power IC vendors demonstrate
Traditionally, for non-PoE applications at these power levels, a discontinuous-mode flyback is generally used because it
isolated power topology must be used. For the power levels that this topology is capable of efficiencies in excess of 90%,
usually requires a smaller transformer. It also provides faster transient response due to a lower primary inductance, and the
required for the existing PoE specification (less than 13 W), which is sufficient for most PoE applications.
feedback loop is easier to stabilize than a continuous-mode flyback.
the flyback converter is the simplest and least-expensive
isolated topology. Traditionally, for non-PoE applications at Overview of Flyback Topology
However, for PoE applications where efficiency is critical, the respective sizes of the transformer needed for the continuous
these power levels, a discontinuous-mode flyback is generally A basic understanding of the continuous flyback topology
and discontinuous modes are essentially the same and the lower peak currents of the continuous flyback improve overall
used because it usually requires a smaller transformer.
efficiency. Furthermore, the right half-plane zero in the continuous-mode flyback It also is necessary toisderive the equations
suffciently high soforasthe PoE
not to power
affect trans-
the
provides
stabilization of the faster
feedbacktransient
loop.response due to a lower primary former design.A simplified schematic of the flyback topology
inductance, and the feedback loop is easier to stabilize than is shown in Fig. 1. The primary switch S1 is a MOSFET, and
a continuous-mode flyback.
As a result, the vast majority of published PD power reference designs the use
secondary switch S2 can either
a continuous-mode flyback be topology.
a diode orReference
a second
designs from of several power IC vendors demonstrate that this topology is capable of efficiencies in excess of 90 %, recti-
However, for PoE applications where efficiency is criti- MOSFET operated as a high-efficiency synchronous which is
cal, most
sufficient for the respective sizes of the transformer needed for the
PoE applications. fier. Regardless of the exact implementation, the flyback
continuous and discontinuous modes are essentially the topology’s switching cycle has two distinct stages.

1
OverviewPower Electronics Technology March 2007
of Flyback Topology www.powerelectronics.com

A basic understanding of the continuous flyback topology is necessary to derive the equations for the PoE power transformer
design. A simplified schematic of the flyback topology is shown in Fig. 1. The primary switch S1 is a MOSFET, and the
secondary switch S2 can either be a diode or a second MOSFET operated as a high-efficiency synchronous rectifier.
Regardless of the exact implementation, the flyback topology’s switching cycle has two distinct stages.

power.pulseelectronics.com
1
On-Time Stage
FLYBACK TRANSFORMER
FLYBACK TRANSFORMER

��� ���� ���

���� �� ����
��
���
���
��� ���

���� ���� ���� ���� ����

���� ���� ���� ���� ����

��� ���

��� ��� ��� ���

Fig. 2.During the on-time stage of the flyback’s switching cycle, the
transformer’s
transformer’s primary-winding
primary-winding inductance
inductance appearsappears as a separate
asswitching
a separate ele- ele-
Fig. 2. During the on-time stage of thebyflyback’s Fig.3.D3. During the off-time stage of the flyback’s switching
ment and switch S1 is represented a resistor. Fig. 3.DFig.
uring uring
the the off-time
off-time stage ofstage
the of the flyback’s
flyback’s switching
switching cycle, the
cycle, the
cyment andtransformer’s
cle, the switch S1 is represented by a resistor.
primary-winding inductance cycle,
open S1 the
is open S1
modeled by is
its modeled
output by its output
capacitance capacitance
open S1and is modeled by itsS2
output capacitance
as aand the closed S2 is S2 is
and the closed
appears as On-Time
a separateStage
elementt and switch S1 is represented modeled theas closed
a resistor. is modeled resistor
On-Time Stage
by a resistor. The first stage is the on-time stage, in which S1 is closed
modeled as a resistor.
The first stage is the on-time stage, in which S1 is closed
and the and the input
input is connected
is connected to the to the primary
primary winding winding
(NPRI)(N of PRI) ofmagnetic magnetic
field offield
theof core.theThe core.energy The energystoredstoredis equal is equal
to: to:
IN1= × I × (∆ P )
the transformer for a period of time defined by t . = ×
1 IN is connected × ( ∆ ) 6)(Eq. 6)
The first
thestage
transformer ist the for on-time
a period stage,
of time in which
definedS1 byistONclosed
. ON and the input INE LI PRII × )(P2 ,to RIthe
IPPRI ) , primary winding (N(Eq.
2
) of the
E IN L PRII × ( IP
PRI
t = (Eq. 1) 2
transformer Dfor
. aTperiod of time defined by tON.
ON PRI
RI
D = ON . (Eq. 1) IN
2
T And, by And, by definition,
definition, power power
(∆ )is simply energyenergy divided
by by
(∆ )is simply divided
During During
this stage,this stage, S2 is opened
S2 is opened (representing
(representing eithereither
the the time: time: IN1 = ×
IN 1= (× I )(2 IPR PRII )
2

PIN PIN L PRI L PRI PR×I .

2 × T .T
PRI
turning turning
off ofoff theofMOSFET
the MOSFET or theorreverse the reversebiasing biasing
of theof the (Eq. 7)(Eq. 7)
2
diode), and the schematic reduces
diode), and the schematic reduces to theONcircuit in Fig. 2. In t to the circuit in Fig. 2. In It should be noted that, even
It should be noted that, even though no current is flowing though no current is flowing
this schematic,
this schematic, (Eq.
the
the transformer’s 1) D
transformer’s = primary-winding
primary-winding leakage leakage in the insecondary,
the secondary, voltage voltage
is presentis present
(V ) (V
and ) and does create
SEC does create
inductance is shown as a separate Tinductor, and the resis- stress across S2, which is an important SEC
inductance is shown as a separate inductor, and the resis- stress across S2, which is an important factor factor in determining
in determining
tance of S1 is shown as a resistive
tance of S1 is shown as a resistive element, along with their element, along with their the turns
the turns ratio (NPRI / NSEC): ratio (N PRI
/ N SEC
):
2 =+ O + IN N
respective voltage
drops.drops. WhenWhen S1 is closed, current
flows flows
respective voltage S1 is closed, current = OSMOSFET 
Duringthrough
this through
stage, S2theisprimary
opened (representing either the turning isVoff = of the or
× the PRI ,
winding, but the change in current S =+ +INVN , reverse biasing of the diode), and
S 2V VV
the primary winding, but the change in current is V OUT × IN PRI
N (Eq. 8)(Eq. 8)
the schematic limitedreduces by the to the
primary circuit in
winding’s
limited by the primary winding’s inductance according to Fig. 2 In
inductance this schematic,
according totheSS 2
transformer's
O
O UT IN
primary-winding
N SEC
SEC leakage inductance is
shownFaraday’s
as aFaraday’s
separate
law: law: (inductor, )and the resistance of S1 is shown as a resistive
where VS2element,
is the voltage along withS2their
across respective
(volts), is thevoltage
VIN input input
P RI × where VS2 is the voltage across OUT S2 (volts), VIN is the
drops. When (S1 is (closed,
V t current
) flows through the primary (Eq.winding,
2) but
voltage the change
(volts) and in
OUTV current
is the is limited
output by
voltage the primary
(volts). Eq. 8
V × tP RI ) (Eq. 2) voltage (volts) and V is the output voltage (volts). Eq. 8
=∆IPRIPPRI=
ON OUT
winding's
∆IPRIinductance RI
according
ON
, , to Faraday’s law: OUT
implies that the turns ratio must be large enough to prevent
L P RI L P RI implies that the turns ratio must be large enough to prevent
T T (Eq. 3)(Eq. 3) excessive excessive stress across
stress across S2. It also S2. Itshould
also should
be noted be noted that, during
that, during
or ∆IPRI or =∆I(PRIVIN=−(V VIN ) −×VD ) ×D × ,
S1 × , this this the
time, time, the primary
primary leakage leakage
inductanceinductanceis storingis storing
energy, energy,
L PRI L PRI (VPRI× tON)
S1

(Eq. 2) ΔIPRI = , but that this energy represents a loss in the circuit, as there there
but that this energy represents a loss in the circuit, as
where I is the
where IPRI is the change in primary-winding
PRI
change in primary-winding
LPRI current current is no is no mechanism
mechanism to transfer to transfer it to the it tosecondary.
the secondary. During During
(amps),V(amps),V is the is the voltage across the primary
PRI voltage across the primary winding (volts),
winding (volts), the the on-time
on-time stage, stage,
the the output
output current current
is is supplied
supplied by the by the
PRI
t
tON is the is the duration of
ON duration of the S1 closure and L
the S1 closure and L
is the is the
PRI primary-
primary- T
output output
capacitor, because no current is flowing through the the
capacitor, because no current is flowing through
PRI
winding inductance
winding inductance (microhenrys). PRI (Eq. 3) or
(microhenrys). ΔI = (V in
– V S1
) × D × LPRI
transformer’s,
transformer’s secondary secondary winding. winding.
The changing
The changing primary primary
current current
createscreates
a magnetic a magnetic
field infield in
the coretheofcore theof the transformer,
transformer, whichwhich in turnininduces
turn induces a voltage a voltage Off-Time Off-Time StageStage
across the secondary
across the secondary winding. winding. During
During the second the secondstage of stage
the of the flyback-topology
flyback-topology switching switching
where ΔIPRI is theONchange = ( IN −in primary-winding
S1 )  t current  (amps),
(Eq. 4) (Eq. V4)
cycle,is the
cycle,
S1 voltage
is S1
opened is across
opened
and S2 andthe
is S2 primary
closed. is closed.
The winding
The
schematic (volts),
schematic
reduces tON is the
reduces
∆B = (V − VS1and ) × L t ON (N PRI × A E
ON ) PRI
duration
∆BBof
ON the =B(ON
VS1 IN −closureS1 ) ×
VIN ( N
PRIPR
is the A primary
 ) winding inductance to that (microhenrys).
toshown
that shownin Fig. in3. The primary. The primary current current
is zero isbecause
zero because
PRII × E
(N PR APRI I
E)
EFFECTIVE
E FFECTIVE
FFECTIV E
S1 is closed. However, the magnetic field infieldthe in the transformer
PRI EFFECTIVE
EFFECTIV
FFECTIVE
S1 is closed. However, the magnetic transformer
The changing Vprimary SEC = ∆BcurrentON × N SEC creates
×AEFFECTIVE a magnetic  . field in the(Eq. core 5)
cannot ofcannot
the transformer,
change change which and,
instantaneously
instantaneously in turn and,induces
therefore, therefore,a voltage
looks looks
for a foracross
a
V =V∆Bwinding.
the secondary = ∆×BN ××N A EFFECTIVE ×  .t  (Eq. 5) path to dump the stored energy. It this
doesbythis by reversing

t ON ON t (Eq. 5) path to dump the stored energy. It does reversing
the polarity the polarity
on theon the secondary
secondary winding winding and sourcing
and sourcing current current
However, However, because because
the S2the S2 is open,
is open, no current no current
can flow canandflow and to theto the The
load. load.current
The current being being delivered delivered
to theto theramps
load load ramps
the energy
the energy created created
in theinprimary the primary winding winding
is stored is stored
in thein the downtON down linearly linearly
according according to Faraday’sto Faraday’s law starting
law starting from its from its
(Eq. 4) ΔBON = (Vin – VS1) ×
(NPRI × АEFFECTIVE)
Power Electronics
Power Electronics Technology Technology
March 2007March 2007 2 2 www.powerelectronics.com
www.powerelectronics.com
АEFFECTIVE
(Eq. 5) VSEC = ΔBON × NSEC ×
tON

power.pulseelectronics.com 2
 However, because the S2 is open, no current can flow and the energy created in the primary winding is stored in the
magnetic field of the core. The energy stored is equal to:

1
(Eq. 6) EIN = × LPRI × (∆IPRI)2,
2

And, by definition, power is simply energy divided by time:

1 (∆IPRI)2
(Eq. 7) PIN = × LPRI × .
2 T

It should be noted that, even though no current is flowing in the secondary, voltage is present (VSEC) and does create stress
across S2, which is an important factor in determining the turns ratio (NPRI / NSEC):

NPRI
(Eq. 8) VS2 = VOUT + Vin × ,
NSEC

where VS2 is the voltage across S2 (volts), VIN is the input voltage (volts) and VOUT is the output voltage (volts). Eq. 8 implies
that the turns ratio must be large enough to prevent excessive stress across S2. It also should be noted that, during this
time, the primary leakage inductance is storing energy, but that this energy represents a loss in the circuit, as there is no
mechanism to transfer it to the secondary. During the on-time stage, the output current is supplied by the output capacitor,
because no current is flowing through the transformer's secondary winding.

Off-Time Stage
FLYBACK TRANSFORMER

During the second stage of the flyback-topology

peak value: switching cycle, S1 is ���

N 
opened and S2 is closed. The schematic
ISEC = IPRI reduces
×  PRI to , that shown in Fig. (Eq.
3. 9) ������������������

is the  �������

PK
N PK

The primary current is zero because S1IisSEC closed. However, the magnetic
����
where SECpeak
P SEC PK
secondary-winding current ������� ��

��� �����
(amps).
field in the transformer cannot change instantaneously and, therefore,
The slope of the ramp is:
���
���
����
looks for a path to dump the stored energy. It does this by reversing the (Eq. 10)
��� �
����
�� ��
 t OFF  ��������� ��

polarity on the secondary winding and

∆IISE sourcing
C = (VOUT + VS 2 ) ×current
 L  , to the load. The
�������
��� �����

current being delivered to the load ramps down linearly SEC

according to ���
��� ��
����
L
Faraday’s law starting from its peak value: that L SEC = PRI2 , � ����� ��
and knowing
N ���
where N equals NSEC/NPRI. ���������������

 N2  (Eq. 11)
NPRI
������� ����
∆ISEC = (VOUT + VS2 ) × t OFF × 
��
. �������

(Eq. 9) ISEC = IPRI × Vin × ,  L PRI  ���

����� �������
�����
�

PK PK
N
��
���
���
����
The
SECchanging current (ISEC) reduces the flux density ��� � �� ��
of the core: ��������� ����
��

C × ∆I SSEC
�������
) (L SE EC ) (Eq. 12) ����� ������� �����
∆BOFF = SEC
. ��� ��

(N SE C × AE FFECTIVE )
���
where ISEC is the peak secondary-winding current (amps).
���
SEC EFFECTIVE
FFECTIVE ����
PK Substituting in Eq. 11: � �� ��

t OFF (Eq. 13) ���

∆BBOFF = (VOUT + VS2 ) × .
× AE ) The slope of the ramp is: (N SE
SECC × AE FFECTIVE )
EFFECTIVE
FFECTIVE
������������������������
����
�������
During steady-state operation, the magnitude of the de- �������
��

���
crease in the magnetic field (B) during the off time must be �����
���
equal totOFF
the magnitude of the increase during the on time.
��� �
���

�� ��
����

(Eq. 10) ∆ISEC = (VOUT + VS2) This

×((V leads to the, relationship: ���������
����
��

(V TF + VSS22 × t IN − VS1 ) × t ON ) ((VOUT + VS2 ) × t OFF )

((V
2 OU
OF
LSEC = . (Eq. 14) �������
��� �����
N PRI N SEC ���
���
����
LPRI Or, N PRI = (VIN − VS1 ) × t ON . (Eq. 15)
� �� ��

and knowing that LSEC = , where

N SEC N((V
equals
OUT + VS 2N OFF/)N
) × t OFF
SEC PRI
.
Fig. 4. These waveforms showrelationships
the timing
N2 It is important to note that although there is no current
Fig. 4. These waveforms show the timing between the
relationships
primary between
and secondary windingthe primary
currents for theand secondary
continuous (a),
flowing in the primary winding during the off-time stage, winding
discontinuous currents for the continuous
(b) and critical-conduction (a),
modes (c).
2
the primary N
winding does see the reflected voltage of the discontinuous (b) and critical-conduction modes (c).
(Eq. 11) ∆ISEC = (VOUT + VS2) secondary
× tOFF × winding (VSEC. ): Eq. 17 implies that the turns ratio should be small enough
L
PRI
N  N 
to prevent excessive stress on S1. In addition to stressing S1,
T S N  N VPRI = VSEC ×  PRI  = (VOUT + VS2 ) ×  PRI  . which often requires extra snubbing circuitry for protec-
S S  N SEC   N SEC  tion, the leakage inductance delays the transfer of power
(Eq. 16) from the primary to the secondary. Therefore, minimizing
When S2 is turned off, the energy in the leakage induc- leakage inductance is a key element to flyback-transformer
tance of the primary winding must be dumped. However, design.
power.pulseelectronics.com 3
because S1 is open, there is no immediate path for current
to flow, so the voltage across the leakage inductance rapidly Continuous, Discontinuous Flyback Modes
The changing current (∆ISEC) reduces the flux density of the core:

(LSEC × ∆ISEC)
(Eq. 12) ∆BOFF = .
(NSEC × AEFFECTIVE)

Substituting in Eq. 11:

tOFF
(Eq. 13) ∆BOFF = (VOUT + VS2) × .
(NSEC × AEFFECTIVE)

During steady-state operation, the magnitude of the decrease in the magnetic field (B) during the off time must be equal to
the magnitude of the increase during the on time. This leads to the relationship:

((VIN – VS1) × tON) ((VOUT + VS2) × tOFF)

(Eq. 14) = .
NPRI NSEC

NPRI (VIN – VS1) × tON

(Eq. 15) Or, = .
NSEC (VOUT + VS2) × tOFF

It is important to note that although there is no current flowing in the primary winding during the off-time stage, the primary
winding does see the reflected voltage of the secondary winding (VSEC):

NPRI NPRI
(Eq. 16) VPRI = VSEC × = (VOUT + VS2) × .
NSEC NSEC

When S2 is turned off, the energy in the leakage inductance of the primary winding must be dumped. However, because S1
is open, there is no immediate path for current to flow, so the voltage across the leakage inductance rapidly increases until it
can push current through the parasitic elements of the capacitance of the transformer primary and the output capacitance of
the MOSFET. This leakage spike along with the induced voltage on the primary winding creates a voltage stress S1:

(Eq. 17) VS1 = VIN + VLK + VSEC × (NPRI / NSEC),

LLK ½
(Eq. 18) And VLK = IPRI × ,
PK
(CPRI + CMOSFET )
DS

where VLK is the voltage across the leakage inductance (volts), CPRI is the capacitance across the primary winding (Farads)
and CMOSFET is the drain-source capacitance of the MOSFET (Farads).
DS

Eq. 17 implies that the turns ratio should be small enough to prevent excessive stress on S1. In addition to stressing S1,
which often requires extra snubbing circuitry for protection, the leakage inductance delays the transfer of power from the
primary to the secondary. Therefore, minimizing leakage inductance is a key element to flyback-transformer design.

Continuous, Discontinuous Flyback Modes

Fig. 4 shows three different sets of primary and secondary waveforms. In both continuous and discontinuous modes, the
initial primary current starts at zero. In Fig. 4a during the off-time the secondary current ramps down to zero because all of
the energy stored in the magnetic field during the on-time of the transformer has been delivered to the load before the start

power.pulseelectronics.com 4
 of the next cycle. This creates a period of time (tDEAD) in which no current is flowing in the transformer and the circuit is said
to be in discontinuous mode. As can be seen in Fig. 4 at the start of the next cycle, the primary current again ramps up
from zero.

In continuous mode, the initial primary waveform starts from zero, but during the off time, the secondary current does not
deliver all of the stored energy to the load before the start of the next cycle. As a result, energy is left in the transformer's
magnetic field. At all times, current is flowing in the transformer (tDEAD = 0) and the circuit is said to be continuous. As can be
seen in Fig. 4b the primary current begins its ramp at a nonzero point, defined as:

(Eq. 19) IPRI = ISEC × (NSEC / NPRI),

MIN MIN

where IPRI is the minimum primary-winding current (A) and ISEC is the minimum secondary-winding current. It should
MIN MIN
be apparent from these waveforms that the two main factors, other than the turns ratio, that influence whether a circuit is
continuous or discontinuous are the transformer primary inductance (which controls the slope of the current ramp) and the
required output current (which controls how much energy is taken from the transformer). As will be seen later in the article,
although it is possible to design a transformer that always
FLYBACK operates in discontinuous mode, any continuous-mode transformer
TRANSFORMER
will eventually go discontinuous as the load current is decreased below a minimum threshold IOUT .
MIN
start of the next cycle. As a result,
energy is left in the transformer’s
magnetic field. At all times, current
Flyback Topology Waveforms is flowing in the transformer (tDEAD
= 0) and the circuit is said to be con- Primary I PRIPK
current
tinuous. As can be seen in Fig. 4b, (A)
I
the primary current begins its ramp PRIRMS

Before starting any flyback-transformer design it is necessary to understand how the previously discussed current waveforms
�I
at a nonzero point, defined as:
relate to the output current IOUT, IRMS (which affects
IPRIMIN = Iheating in the transformer) and IPRIPK (which affects
SECMIN  (NSEC / NPRI),
I transformer saturation). PRIAVG

Once this is understood, it is easy to derive the required design (Eq.parameters.

19) Figs. 5 and 6 show a close-up of the primarytime
where IPRIMIN is the minimum t T
and secondary waveforms for a discontinuous- and continuous- mode flyback transformer. Note that the dc value of any
primary-winding current (A) and
ON

waveform is simply the average value of the Iwaveform over the fundamental period of the switching cycle (T) and that, by
SECMIN is the minimum secondary-
definition, the rootmean-square (rms) currentwindingis: current. It should be ap-
parent from these waveforms that
the two main factors, other than the
turns ratio, that influence whether a
1 T1 Primary
�I

∫
circuit is continuous or discontinu-
(Eq. 20)ous areIRMSthe =transformer primary (i(t))
current
2
dt , I SECRMS

T2 – T1the T2
(A)
inductance (which controls
slope of the current ramp) and the I SECAVG

required output current (which

controls how much energy is taken time
where T1 and T2 define the start and stop times fromof thethe period,Asrespectively.
transformer). will be Evaluating the integral and calculating t the
t average
T
OFF DEAD

seen later in the article, although it

(dc) value leads to the following equations:
is possible to design a transformer
that always operates in discontinu- Fig. 5. The average and rms waveforms of the primary (upper) and secondary (lower) winding currents
ACK TRANSFORMER ous mode, any continuous-mode of the flyback transformer in the discontinuous mode are functions of duty cycle, dead time, and I.
transformer will eventually go
discontinuous as the load current
is decreased below a minimum
threshold IOUTMIN. I PK
Primary
Primary IPRI current
current
PK
Flyback Topology (A) �I
(A)
IPRI
RMS
�I
Waveforms (IPK-�I)
Before starting any flyback- IRMS
IAVG
I PRIAVG
transformer design it is necessary to
understand how the previously dis-
time
t
ON
cussed currentT waveforms relate to t T
time
ON
the output current IOUT , I , IRMS(which
affects heating in the transformer)
and I PRIPK (which affects trans-
former saturation). Once this is IPK

understood, it is easy to derive the Primary

required
�I design parameters. Figs. current
(A)
�I
Primary 5 and 6 show a close-up of the pri-
current I IRMS
(A)
SECRMS
mary and secondary waveforms for
(IPK - �I)
I
a discontinuous- and continuous-
SECAVG IAVG
mode flyback transformer. Note
that the dc value of any waveform
time time
t OFF
ist simply the average
DEAD
value of the tON T
waveform T over the fundamental
period of the switching cycle (T)
Fig. 5. The average and rms waveforms of the primary (upper) and secondaryand that,
(lower) by definition,
winding currents the root- Fig. 6. The average and rms waveforms of the primary (upper) and secondary (lower) winding currents
Fig.
of the5. Thetransformer
flyback average and
in the rms waveforms
discontinuous mode are functionsof thecycle,
of duty primary
mean-square
dead time, (rms)
and I.current is: Fig.
of 6. The
the flyback average
transformer and rmsmode
in the discontinuous waveforms
are functions ofof
peakthe primary
currents, I, and duty cycle,
(upper) and secondary (lower) winding currents of the (upper)
but and
secondary (lower) winding currents of the
not deadtime.
flyback transformer in the discontinuous mode are flyback transformer in the discontinuous mode are
Power Electronics Technology March 2007 4 www.powerelectronics.com
functions of duty cycle, dead time, and ∆I. functions of peak currents, ∆I, and duty cycle, but not
deadtime.

OU
,I
power.pulseelectronics.com
5
Discontinuous mode:

D ½
(Eq. 21) IPRI = ∆IPRI ×
RMS
3

1–D–( )
tDEAD
T ½
(Eq. 22) ISEC = ∆ISEC × ,
RMS 3

and continuous mode:

(∆IPRI)2 ½
(Eq. 23) IPRI = D × ((IPRI )2 – IPRI × ∆IPRI +
RMS PK PK
3

(∆ISEC)2 ½
(Eq. 24) ISEC = (1 – D × ((ISEC )2 – ISEC × ∆ISEC + .
RMS PK PK
3

Discontinuous mode:

1
(Eq. 25) IPRI = × IPRI ×D
AVG PK
2

1
× 1–D–( ) ,
tDEAD
(Eq. 26) ISEC = × ISEC
AVG PK T
2

and continuous mode:

∆IPRI
(Eq. 27) IPRI = IPRI – ×D
AVG PK
2

∆ISEC
(Eq. 28) ISEC = ISEC × × (1 – D).
AVG PK
2

Critical-Conduction Mode

It should be clear that the boundary between continuous mode and discontinuous mode, also known as the critical-
conduction mode (CCM), occurs when the secondary of the transformer delivers all of the stored energy at the end of the
switching period T (as shown at the bottom of Fig. 4c). In this case, tDEAD is equal to zero:

TON + TOFF = T. Or, using Eq. 1, TOFF = (1 – D) × T.

If all of the stored energy is delivered to the output (minus system losses or efficiency), then:

EOUT POUT
EIN = and PIN = , where η equals efficiency.
η η
POUT = IOUT × (VOUT + VS2).

power.pulseelectronics.com 6
 1 (∆IPRI)2
And from Eq. 7, PIN = × LPRI ×
2 T

T
From Eq. 3, ∆IPRI = (VIN – VS1) × D × ,
LCCM

(VIN – VS1) × D × ( )
T
2
1 LPRI
so × LCCM × = IOUT × (VOUT – VS2).
2 T

Simplifying gives:

D2
(Eq. 31) LCCM = η × (VIN – VS1)2 ×
(2 × IOUT × (VOUT + VS2) × f)

D2
(Eq. 32) lOUT = η × (VIN – VS1)2 × .
(2 × ICCM × (VOUT + VS2) × f)

For any given application, there is a primary-winding inductance that will dictate if the transformer operation is discontinuous
across the full output-current range (LPRI < LCCM), or if it is in discontinuous mode below some minimum output current, and in
continuous mode (LPRI> LCCM) above this current.

Eq. 31 defines inductance at the CCM for a given duty cycle. Typically, a duty cycle is selected and the turns ratio is then
calculated to produce the desired duty cycle. The turns ratio will affect the stresses on the primary and secondary switches.
As shown in Eqs. 8 and 17, the turns ratio must be large enough to minimize stress on the S2 and small enough to minimize
stress on the S1. This bounds the absolute maximum and minimum turns ratio.

Once the turns ratio is selected, the value of the primary inductance (LPRI) is chosen to ensure that the transformer always
runs in discontinuous mode up to the maximum output (IOUT ) or that it runs in continuous mode down to some minimum
MAX
output level (IOUT ). As a result, Eq. 31 can be redefined as follows:
MIN

For discontinuous mode:

D2
LPRI ≤ η × (VIN – VS1)2 × .
(2 × IOUT × (VOUT + VS2) × f)
MAX

For continuous mode:

D2
(Eq. 34) LPRI ≥ η × (VIN – VS1)2 × .
(2 × IOUT × (VOUT + VS2) × f)
MIN

It should be noted that in continuous mode, because there is no dead time, the turns ratio alone for a given input and output
voltage sets the duty cycle. However, for discontinuous mode operation, the existence of the dead time means that duty cycle
is affected by the turns ratio and the primary inductance.

The easiest way to illustrate the use of the previous equation is to run through a quick design example that will also illustrate
the differences between the continuous mode and discontinuous mode flybacks.

power.pulseelectronics.com 7
Design Example

For simplicity, the equations will be designed for a PoE input (33 V to 57 V) with a single output (5 V / 12 W) switching at 200
kHz. It will be assumed that the primary switch voltage drop (VS1) is 0.4 V, the secondary switch voltage drop (VS2) is 0.3
V and that the overall efficiency is 90 %. Multiple output applications can use the same design procedure by selecting one of
the outputs as the master and combining all of the output power onto this one output. This will allow the selection of the duty
cycle, primary inductance, turns ratio, primary peak and root-mean-square (rms) currents. The only difference is in calculating
the rms currents on each of the secondary windings. This requires careful attention to the secondary waveforms of each
output.

Step One

Select a maximum duty cycle, calculate the resultant turns ratio and analyze the voltage stresses on the primary and
secondary switches. If the stresses are too high, the duty cycle can be adjusted and/or the switch ratings can be increased.

Select a duty cycle maximum equal to 45%.

Calculate the turns ratio using Eq. 15 and assuming that tDEAD= 0:

NPRI (33-0.4) 0.45

= × = 5.03.
NSEC (5+0.3) (1-0.45)

Select the actual turns ratio of NPRI/NSEC = 5.

Recalculate the actual duty cycles based on actual turns using Eq. 15:

DMAX = 1 = 0.448 = 44.8 %.

×( )
(33-0.4) 1
1+
(5+0.3) 5

1
DMIN = = 0.319 = 31.9 %.
×( )
(57-0.4) 1
1+
(5+0.3) 5

Analyze the voltage stresses using Eqs. 8 and 17:

57
VS2 = (5 + 0.3) + = 16.7 V.
5
Assuming VLK = 0.3 × VIN : VS1 = 1.3 × 57 + 5.3 × 5 = 100 V.

Step Two

Calculate the primary inductance at the boundary condition and select inductance for application. If discontinuous, recalculate
the actual duty cycles.

Calculate the boundary inductance for discontinuous mode (DCM) using Eq. 33:

power.pulseelectronics.com 8
 YBACK TRANSFORMER

0.9 × (33 – 0,4)2 × 04482 × 1000 Parameter Discontinuous Continuous

LPRI ≤ = 37.8 μH.
BOUNDARY N = Np/Ns 5 5
2×( ) × (5+0.3) × 200
12
5 Lpri 36 H 80 H
Ipk pri 2A 1.3 A
Calculate the boundary inductance for continuous mode E = 1/2  LPRI 70.6 J 70.6 J
(CM) using Eq. 34. Assuming that IOUT = 0.5 x IOUT :  IPK2
MIN MAX

IRMSPRI 0.76 A 0.61 A

8 2 × 1000
0.9 × (33 – 0.4)2 × 0.448 IRMSSEC 4.2 A 3.4A equals 33
LPRI ≥ = 75.6 μH. IN

2×( ) × (5+0.3) × 200

6 Table. Design example parameters for
equals PoE
5 fl
flyback,
V/12 yback,
W, andwhere
effi V
ciencyequals
equals3390%.
Table. Design example OUT parameters for PoE flyback, IN where
5 V toequals
57 V, 20033
kHz, and57VOUT equals 5 V/12 W,Vand effi
efficiency
ciency5equals 90%.
VIN
V to V, 200 kHz, and equals
OUT
V/12 W,
and efficiency equals 90%.
Selec the inductance for application with a 5% margin:
Select the inductance for application with a 5% margin: = 37.8 × 0.
= 7.56 × 1.
LPRI = 37.8 × 0.95 ≡ 36 μH
DCM

LPRI = 7.56 ×1.05

Selec a≡duty
80 μH.
cycle maximum equal to 45%. Recalculat the DCM duty cycle using Eq. 31:
CM
Calculat the turns ratio using Eq. 15 and assuming that
For DCM operation, the inductance chosen will affect the dead time (tDEAD) and, therefore,
2 × 36 × the actual
× 5.3 × duty cycles.
(33 0.4
Recalculate the DCM duty cycle using Eq.5.31:
03. M X
(0.9 × (33 − 0.4) 1000)
2

2 × 36 × ( ) × 5.3 × 200 ½
Selec the actual turns ratio of N 12

Recalculat the actual duty cycles based on actual turns

5
2 × 3=643.7 
× % × (5.3) ×
DDCM =
MAX (0.9 × (33 – 0.4)2 × 1000)
= 0 448 = . × (57 −
2 × 36 × ( ) × 5.3 × 200 ½
M X 12
5
DDCM = = 25.2 %
MIN (0.9 × (57 – 0.4)2 × 1000)
Calculat the off time (D
= 0 319 = .437 .
= × 0.437 = .
Calculate the off time (DOFF= tOFF/T) from Eq. 15:

Analyz the voltage stresses using Eqs. 8 and 17:

1 (33 – 0.4)
DDCM = × × 0.437 = 53.8 %
OFF
5 (5 + 0.3) Calculat the secondary ripple current from Eq. 11.

= (5 + 0.3) × (0.538) × 9.9 A.

Step Three

Calculate the worst-case ∆I, IPK and IRMS for each winding. = (5 + 0.3) × (1 −

Calculate the secondary ripple current from Eq. 11.

. × (33 − 2
× 0.4482 ×
. µH.
For DCM: = (5 + 0.3) × (1 −
× (5 + 0. M X

1000  52
∆ISEC = (5 + 0.3) × (0.538) × × = 9.9 A.
200 36 ISECPK =∆ISEC =
. × (33 − 2
× 0.4482 ×
. µH.
For CM: × (5 + 0.
.
1000  (1 − 0.448
52 ) +
∆ISEC = (5 + 0.3) × (1− 0.448) × × = 4.58 A.
VINMIN
March 2007 200 80 www.powerelectronics.com

power.pulseelectronics.com 9
For CM:

1000  52
∆ISEC = (5 + 0.3) × (1− 0.319) × × = 5.64 A.
VINMAX
200 80

Calculate the secondary peak currents (IPKsec) using Eq. 28.

For DCM:

(IPKsec) = ISEC = ∆ISEC = 9.9 A

PK

For CM:
(5)
12

ISEC = = 6.63 A
PKVIN

(1 – 0.448) + ( )
MIN 4.58
2

For CM:
(5)
12

ISEC = = 6.34 A
PKVIN

(1 – 0.319) + ( )
MAX 5.64
2

Calculate the secondary rms currents (IRMS ) using Eqs. 22 and 24.
SEC

For DCM:

0.538 2

∆ISEC = 9.9 × = 4.2 A.

RMS
3

For CM:

4.582 ½
ISEC = (1 – 0.448) × 6.632 – (4.58 × 6.63) + = 3.2 A
RMSVIN
MIN 3

For CM:

5.642 ½
ISEC = (1 – 0.319) × 6.342 – (5.64 × 6.34) + = 3.4 A
RMSVIN
MAX 3

Calculate the primary peak current (IPRI ) using Eq. 9.

PK

For DCM:

ISEC 9.9
PK
IPRI = = = 1.98 A.
PK
N 5

For CM:

6.63
IPRI = = 1.33 A.
PKVIN
MIN 5

power.pulseelectronics.com 10
For CM:

6.34
IPRI = = 1.28 A.
PKVIN
MAX 5

Calculate the primary rms current (IRMS ) using Eqs. 21 and 23.
PRI

For DCM:

0.437 ½
IPRI = 1.98 × = 0.76 A.
RMSVIN
MIN 3

For DCM:

0.252 ½
IPRI = 1.98 × = 0.58 A.
RMSVIN
MAX 3

∆ISEC
Note: For CM, ∆IPRI = .
N
2
For CM: 4.58
4.58 5 ½
IPRI = 0.448 × (1.332 – 1.33 × + = 0.61 A.
RMSVIN
MIN 5 3

2
For CM: 4.58
4.58 5 ½
IPRI = 0.448 × (1.332 – 1.33 × + = 0.44 A.
RMSVIN
MIN 5 3

Typically, it is not the design of the transformer that leads to a nonoptimized flyback design, but rather a failure to calculate
the design inputs correctly. Once the primary inductance, primary peak current, turns ratio and primary and secondary rms
currents are known, the transformer can be designed following any standard procedure. Typically, a core size is selected and
the number of primary turns (to achieve the inductance and peak current without saturating) is calculated.

Knowing the primary turns and the turns ratio sets the secondary turns. To minimize leakage inductance, it is necessary to
interleave the primary and secondary windings and keep the windings to one layer per section by choosing the appropriate
wire size and number of strands. Once the wire size and strands are selected, the rms currents, along with the core losses,
can be used to calculate the total losses in the transformer. If the total losses are too high (due to temperature rise of overall
efficiency), it will be necessary to select a larger core size. If the total losses are too low, a smaller core size may be evaluated.

Written By: John Gallagher

TOOLS AND RESOURCES

SEARCH PRODUCT FINDER

GET A QUOTE

CUSTOM DESIGN SERVICES

IC CROSS REFERENCE COMPETITIVE CROSS REFERENCE

power.pulseelectronics.com © Copyright 2012, Pulse Engineering Inc. Subject to change without notice. All rights reserved
11