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Iphone X Schematic - 820-00863-09+820-00869-06
Iphone X Schematic - 820-00863-09+820-00869-06
CK
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD
REV ECN DESCRIPTION OF REVISION
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. DATE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
9 0008409760 ENGINEERING RELEASED 2017-04-05
051-02221 D
MCO:056-04077 TABLE_5_HEAD
Apple Inc. REVISION
9.0.0
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION NOTICE OF PROPRIETARY PROPERTY: BRANCH
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
TABLE_CRITICAL_HEAD
D D
SOC
TABLE_5_ITEM
TABLE_5_HEAD
Agnes Output
PART#
339S00358
QTY
1
DESCRIPTION
U1000
CRITICAL
CRITICAL
BOM OPTION
COMMON
TABLE_5_ITEM
138S00159
QTY
9
DESCRIPTION
CAP,SOFT-TERM,2.2UF,6.3V,0201,KYOCERA
REFERENCE DESIGNATOR(S)
C2900,C2901,C2903,C2906,C2907,C2910,C2911,C2913,C2914
CRITICAL
CRITICAL
BOM OPTION
SOFT_CAP
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_ALT_HEAD
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: TABLE_ALT_ITEM TABLE_CRITICAL_ITEM
138S0831 9 CAP,TYPICAL,2.2UF,6.3V,0201,MURATA C2900,C2901,C2903,C2906,C2907,C2910,C2911,C2913,C2914 CRITICAL TYPICAL_CAP
PART NUMBER
118S0764 118S0717 BOM_TABLE_ALTS ALL RES, 3.92K, 0.1%, 0201 118S0717 RES, 3.92K, 0.1%, 0201
138S0652 CAP,X5R,4.7UF,6.3V,0.65MM,0402
TABLE_CRITICAL_ITEM
Sensors
TABLE_5_HEAD
TABLE_ALT_ITEM
339S00360 339S00358 BOM_TABLE_ALTS U1000 DDR-S-20,3G, B0 138S0739 138S0706 BOM_TABLE_ALTS ALL CAP,CER,X5R,0.22UF,20%,6.3V,20% 138S0706 CAP,CER,X5R,0.22UF,20%,6.3V,20% TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM TABLE_CRITICAL_ITEM
138S00159
138S0831
QTY
3
DESCRIPTION
CAP,SOFT-TERM,2.2UF,6.3V,0201,KYOCERA
CAP,TYPICAL,2.2UF,6.3V,0201,MURATA
REFERENCE DESIGNATOR(S)
C3909,C3925,C4025
C3909,C3925,C4025
CRITICAL
CRITICAL
CRITICAL
BOM OPTION
SOFT_CAP
TYPICAL_CAP
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_HEAD
152S00617 IND,MLD,0.1UH,20%,6.1A,29MOHM,H=.65,1608
TABLE_CRITICAL_ITEM
Strobe B2B
335S00287 1 HYNIX, 3DV3, ULTIMATE U2600 CRITICAL ULTIMATE TABLE_5_HEAD
C C
TABLE_5_ITEM
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM TABLE_CRITICAL_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
152S00720 152S00640 BOM_TABLE_ALTS ALL IND,MLD,0.47UH,3.8A,55MO,H=0.65MM,2012 152S00640 IND,MLD,0.47UH,3.8A,55MO,H=0.65MM,2012 138S0831 2 CAP,TYPICAL,2.2UF,6.3V,0201,MURATA C4809,C4805 CRITICAL TYPICAL_CAP
TABLE_ALT_ITEM
152S00641 IND,MLD,0.47UH,4A,48MO,H=0.8MM,2012
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
Pearl B2B
TABLE_5_HEAD 152S00715 152S00623 BOM_TABLE_ALTS ALL IND,MLD,1UH,3.6A,60MO,H=0.8MM,2016 152S00623 IND,MLD,1UH,3.6A,60MO,H=0.8MM,2016 TABLE_5_HEAD
TABLE_5_ITEM 152S00653 152S00651 BOM_TABLE_ALTS ALL IND,1.2UH,3A,2016,0.65Z 152S00651 IND,1.2UH, 3A, 2016, 0.65Z TABLE_5_ITEM
335S00247
335S00240
335S00240
BOM_TABLE_ALTS
BOM_TABLE_ALTS
U2600
U2600
TOSHIBA, BICS3, EXTREME
TABLE_ALT_ITEM
TABLE_ALT_ITEM
XTAL Alternate TABLE_ALT_HEAD
PART#
138S00160
QTY
2
DESCRIPTION
CAP,SOFT-TERM,10UF,10V,0402,MURATA
REFERENCE DESIGNATOR(S)
C5641,C5653
CRITICAL
CRITICAL
BOM OPTION
SOFT_CAP
TABLE_5_HEAD
TABLE_5_ITEM
Global Capacitors
197S0612 197S0446 BOM_TABLE_ALTS Y1000 XTAL, 24M, 1612 197S0446 XTAL, 24M, 1612
CODEC
TABLE_5_HEAD
B B
TABLE_ALT_HEAD TABLE_CRITICAL_HEAD
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: CRITICAL PART# COMMENT
138S00160 2 CAP,SOFT-TERM,10UF,10V,0402,MURATA C4811,C4808 CRITICAL SOFT_CAP
PART NUMBER TABLE_5_ITEM
Multi-Vendor Criticals
TABLE_CRITICAL_ITEM
TABLE_ALT_ITEM
Ansel
TABLE_CRITICAL_HEAD TABLE_CRITICAL_HEAD TABLE_5_HEAD
TABLE_ALT_ITEM
CRITICAL PART# COMMENT CRITICAL PART# COMMENT PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
138S00151 138S00149 BOM_TABLE_ALTS ALL 0402-3T,10.5uF@1V, TY
TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM TABLE_5_ITEM
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: CRITICAL PART# COMMENT
PART NUMBER
197S0446 XTAL,24MHZ,30PPM,9.5PF,60 OHM MAX,1612 132S0275 CAP,CER,X5R,470PF,10%,10V,01005 138S0979 1 CAP,TYPICAL,10UF,10V,0402,MUR/KYO C3710 CRITICAL TYPICAL_CAP
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_HEAD TABLE_CRITICAL_HEAD
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: CRITICAL PART# COMMENT
TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: CRITICAL PART# COMMENT
PART NUMBER
138S00014 CAP,CER,1UF,20%,16V,X5R,0201,H=0.39MM 131S0307 CAP,CER,NP0/C0G,100PF,5%,16V,01005
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_HEAD TABLE_CRITICAL_HEAD
132S0534 CAP,CER,X5R,0.1UF,10%,25V,0201 131S0220 CAP,CER,NP0/C0G,12PF,5%,16V,01005
A PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: CRITICAL PART# COMMENT
TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM
PART NUMBER
TABLE_ALT_ITEM
138S00141 0201,1.1uF@3V
TABLE_CRITICAL_ITEM
132S0436 CAP,CER,X5R,0.22UF,20%,6.3V,01005
TABLE_CRITICAL_ITEM
131S0216 CAP,CER,NP0/C0G,47PF,5%,16V,01005
TABLE_CRITICAL_ITEM
SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
138S00140 138S00141 BOM_TABLE_ALTS ALL 0201,1.1uF@3V, Kyocera 132S0396 CAP,CER,X5R,1000PF,10%,10V,01005 131S00053 CAP,CER,C0G,220PF,5%,10V,01005
132S0316 CAP,CER,X5R,0.1UF,20%,6.3V,01005
TABLE_CRITICAL_ITEM
SYSTEM:BOM Tables
DRAWING NUMBER SIZE
TABLE_ALT_ITEM TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM
138S00166 138S00141 BOM_TABLE_ALTS ALL 0201,1.1uF@3V, Taiyo 132S0304 CAP,CER,X5R,0.22UF,20%,6.3V,0201 117S0055 RES,MF,1/20W,2M OHM,5,0201,SMD 051-02221 D
TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM Apple Inc. REVISION
132S0296 CAP,CER,X5R,1000PF,10%,6.3V,01005 107S0257 THERMISTOR,NTC,10K OHM,1%,B=3435,01005
TABLE_CRITICAL_ITEM
9.0.0
132S0318 CAP,CER,X5R,820PF,10%,10V,01005 NOTICE OF PROPRIETARY PROPERTY: BRANCH
FIDUCIALS
FD0401
FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY
CL0400 FD0402
2.10R1.60-NSP FID
0P5SQ-CROSS-NSP
D
1
1
ROOM=ASSEMBLY
D
FD0403
FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY
FD0404
FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY
FD0420
FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY
FD0405
FID
0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY
FD0410
FID
0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY
FD0411
FID
C 0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY
C
FD0412
FID
0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY
CRITICAL
SB0400
STDOFF-2.9OD1.4ID-0.77H-SM CL0401
1 2.10R1.60-NSP
1
CRITICAL
SB0402
STDOFF-MLB-TUBE
1
CL0402
2.10R1.60-NSP
1
B B
CRITICAL
1
SH0401
SM
SHLD-EMI-HARD-X891
CL0403
2.10R1.60-NSP
1
CRITICAL
1
SH0400
CRITICAL SM
SB0401
STDOFF-2.9OD1.4ID-0.77H-SM SHIELD-EMI-TOP-X891
1
A A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
35 34
PP_ROMEO_CATHODE 1
SM
ROOM=TEST
PP0501
P2MM-NSM
PP0541
P2MM-NSM
PP0583
P2MM-NSM
PP
BOARD_ID0 1
SM SPI_AOP_TO_IMU_MOSI 1
SM
PDM_CODEC_TO_ARC_DATA 1
SM
11 5 IN PP 26 12 IN PP 41 37 IN PP
ROOM=TEST ROOM=TEST ROOM=TEST
PP0502
P2MM-NSM
PP0542
P2MM-NSM
32 8
AP_TO_FCAM_SHUTDOWN_L 1
SM
26 12
SPI_IMU_TO_AOP_MISO 1
SM
IN PP IN PP
ROOM=TEST ROOM=TEST
PP0503
P2MM-NSM
SM
8 IN
AP_DEBUG3 1
PP
ROOM=TEST
PP0504
P2MM-NSM
PP0544
P2MM-NSM
PP0586
P2MM-NSM
SM SM SM
11 IN
DFU_STATUS 1
PP 26 12 IN
ACCEL_GYRO_TO_AOP_DATARDY 1
PP 47 10 IN
AP_BI_CCG2_SWDIO 1
PP
ROOM=TEST ROOM=TEST
ROOM=TEST
PP0505 PP0545
P2MM-NSM
PP0587
P2MM-NSM
P2MM-NSM ACCEL_GYRO_TO_AOP_INT SM SM
SM 1 AP_TO_CCG2_SWCLK 1
20 11 6 IN
PMU_TO_AP_PRE_UVLO_L 1
PP
26 12 IN PP 47 10 IN PP
ROOM=TEST ROOM=TEST
ROOM=TEST
PP0546
PP0506
P2MM-NSM COMPASS_TO_AOP_INT
P2MM-NSM
1
SM
SM 49 25 12 IN PP
AP_TO_PMU_SOCHOT_L 1
20 6 IN PP
ROOM=TEST
ROOM=TEST
PP0547
P2MM-NSM
SOC I2C1_AOP PP0590
SOC CPU/GPU 26 12 IN
PHOSPHORUS_TO_AOP_INT 1
SM
PP
ROOM=TEST 50 49 41 25 12 IN I2C1_AOP_SCL
P2MM-NSM
1
SM
PP
C XW0510
ROOM=TEST
C
SHORT-10L-0.05MM-SM PP0591
17 13
PP_GPU 1 2 PP_GPU_LVCC 50
Hydra VBUS PP0550
50 49 41 25 12 IN
I2C1_AOP_SDA
P2MM-NSM
1
SM
PP
ROOM=TEST
XW0511
SHORT-10L-0.05MM-SM
P2MM-NSM
SM
PP_CPU_PCORE 1 2 PP_CPU_PCORE_LVCC 48 23
HYDRA_TO_TIGRIS_VBUS1_VALID_L 1
17 13 50 IN PP
ROOM=TEST
PP0512
P2MM-NSM
20 13 IN
AP_CPU_PCORE_SENSE 1
SM
PP
ROOM=TEST
NAND PP0560
CCG2 PP0592
PP0513
P2MM-NSM P2MM-NSM P2MM-NSM
SM
SM SWD_AP_BI_NAND_SWDIO 1
SM CCG2_TO_SMC_INT_L 1
20 13 IN
AP_VDD_GPU_SENSE 1
PP
16 12 IN PP
47 10 IN PP
ROOM=TEST ROOM=TEST
ROOM=TEST
PP0514 PP0561
P2MM-NSM
P2MM-NSM SM
TP_SOC_SENSE 1
SM
50 16 12 IN
SWD_AOP_TO_MANY_SWCLK 1
PP
13 IN PP
ROOM=TEST
ROOM=TEST
PP0515 PP0562
P2MM-NSM
P2MM-NSM SM
TP_VSS_CPU_SENSE 1
SM
16 10 5 IN
SPI_S4E_TO_AP_MISO_BOOT_CONFIG2 1
PP
15 IN PP
ROOM=TEST
ROOM=TEST
PP0516 PP0563
P2MM-NSM
P2MM-NSM SM
TP_VSS_SENSE 1
SM
16 IN
NAND_ANI1_VREF 1
PP
15 IN PP
ROOM=TEST
ROOM=TEST
PP0564
P2MM-NSM
SM
B NAND_ANI0_VREF 1
B
PMU PP0520
16 IN PP
ROOM=TEST
14 12 IN
AOP_TO_DDR_SLEEP1_READY
P2MM-NSM
1
SM
PP
Rigel
ROOM=TEST PP0570
PP0521
P2MM-NSM CAMPMU_TO_RIGEL_ENABLE
P2MM-NSM
1
SM
SM 34 28 IN PP
20 10 IN
SPMI_PMU_BI_PMGR_SDATA 1
PP ROOM=TEST
ROOM=TEST PP0571
P2MM-NSM
PP0522
P2MM-NSM 34 20 8 IN
RIGEL_TO_ISP_INT 1
SM
PP
SM ROOM=TEST
48 20 6 IN
PMU_TO_AP_HYDRA_ACTIVE_READY 1
PP
ROOM=TEST
PP0531
P2MM-NSM
SM
16 7 IN
90_PCIE_AP_TO_NAND_REFCLK_N 1
PP
ROOM=TEST
A SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
BOOTSTRAPPING:BOARD REV
BOARD ID
BOOT CONFIG
R0623
BOARD_REV3 1
1.00K 2 PP1V8_IO
11 OUT 6 7 8 10 14 16 17 27 28 29 30
32 34 35 43
5%
1/32W
MF
01005
ROOM=SOC
R0622 NOSTUFF
BOARD_REV2 1
1.00K 2
11 OUT
5%
1/32W
MF
01005
ROOM=SOC
R0621
BOARD_REV1 1
1.00K 2
11 OUT
C 5%
1/32W C
MF
01005
ROOM=SOC
SELECTED -->
R0620
BOARD_REV0 1
1.00K 2
11 OUT
5%
1/32W
MF
01005
ROOM=SOC
BOARD_ID4 No connect
11 OUT
CKPLUS_WAIVE=SINGLE_NODENET
On mlb_bot
50 10 OUT
BOARD_ID3
CKPLUS_WAIVE=SINGLE_NODENET
B 11 OUT
PP1V8_IO
MAKE_BASE=TRUE SELECTED -->
B
11 OUT
PP1V8_IO
SELECTED -->
No connect
16 10 4 OUT
SPI_S4E_TO_AP_MISO_BOOT_CONFIG2
1 C1090
0.1UF
20%
2 6.3V
X5R-CERM
D 01005
ROOM=SOC
D
FL1092
240-OHM-25%-0.20A-0.9DCR
PP1V8_XTAL 1 2
01005
1 C1092 ROOM=SOC
1 C1093
0.1UF 4UF
20%
2 6.3V
20%
2 6.3V
USB Reference
X5R-CERM CER-X5R
01005 0201
ROOM=SOC ROOM=SOC
6
AP_USB_REXT
3.14-3.46V @ 12mA MAX
1
PP3V3_USB 19
R1000
200
1%
1/32W
1 C1095 MF
0.1UF 2 01005
ROOM=SOC
20%
2 6.3V
X5R-CERM
01005
ROOM=SOC
(Analog)
0.765V - 0.84V @ 5mA MAX
PP0V8_SOC_FIXED_S1 7 8 9 13 14 17
VDD18_XTAL AU28
VDD33_USB AN14
VDD_FIXED_USB AN15
VDD18_USB AP14
VDD12_UH1_HSIC0 AT7
C C
OMIT_TABLE
U1000
TMIT78B0-C4
WLCSP
SYM 1 OF 16
ROOM=SOC
BA4 UH1_HSIC0_DATA
CRITICAL
ANALOGMUX_OUT AT27 AP_TO_PMU_AMUX_OUT 20
NC OUT
AY4 UH1_HSIC0_STB
NC
AV6 JTAG_TRST*
NC
AT9 JTAG_TDO
NC
AT12 JTAG_TDI USB_VBUS AV7 USB_VBUS_DETECT 23
NC IN
48 BI
SWD_DOCK_BI_AP_SWDIO AT10 JTAG_TMS
48
SWD_DOCK_TO_AP_SWCLK AT13 JTAG_TCK USB_ID AW6
IN NC
R1020
1
10K 2 PMU_TO_SYSTEM_COLD_RESET_R_L AU7 COLD_RESET*
5% USB_REXT AU8 AP_USB_REXT
1/32W 48 20 4 IN
PMU_TO_AP_HYDRA_ACTIVE_READY AT34 CFSB
6
MF
PMU_TO_SYSTEM_COLD_RESET_L 01005 AV5 CFSB_AON
20 IN AT22 PMU_TO_AP_THROTTLE_PCORE_L
B 20 4
AP_TO_PMU_TEST_CLKOUT V2 TST_CLKOUT
CPU_TRIGGER0
CPU_TRIGGER1 AW21 PMU_TO_AP_THROTTLE_ECORE_L
IN 20
20
B
OUT IN
16 OUT
AP_TO_NAND_RESET_L AF34 SSD_RESET* GPU_TRIGGER0 AD2 PMU_TO_AP_THROTTLE_GPU0_L IN 20
A SYNC_MASTER=test_mlb SYNC_DATE=10/17/2016
A
PAGE TITLE
SOC: JTAG,USB,XTAL
DRAWING NUMBER SIZE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D
(Analog)
VDD12_PCIE_REFBUF:1.08V - 1.26V @ 30mA MAX D
R1198 1.62V - 1.98V @ 81mA MAX
PP1V2_SOC 1
0.00 2 PP1V2_SOC_PCIE_REFBUF PP1V8_IO
19 14 13 9 5 6 7 8 10 14 16 17 27 28 29
30 32 34 35 43
0%
PCIe BB CLKREQ PU on BB domain 1/32W
MF
1 C1198 1 C1199
01005 0.1UF 4UF
PCIe Clock Request Pull-Ups ROOM=SOC
20%
2 6.3V
20%
2 6.3V
(Analog)
X5R-CERM CER-X5R VDD_FIXED_PCIE_REFBUF:0.765V - 0.84V @ 9mA MAX
29 28 27 17 16 14 10 8 7 6 5
PP1V8_IO 01005 0201
43 35 34 32 30 ROOM=SOC ROOM=SOC
VDD_FIXED_PCIE_ANA:0.765V - 0.84V @ 131mA MAX
R1100 1 R1130 1 PP0V8_SOC_FIXED_S1 6 8 9 13 14 17
100K 100K
5% 5%
1/32W
MF
1/32W
MF R1194
1 C1193 1 C1192 1 C1191
01005 2 01005 2 0.00 0.1UF 1.0UF 4UF
ROOM=SOC ROOM=SOC PP0V8_SOC_FIXED_PCIE_REFBUF 1 2
20% 20% 20%
2 6.3V
X5R-CERM 2 6.3V
X5R 2 6.3V
CER-X5R
PCIE_NAND_BI_AP_CLKREQ_L 0% 01005 0201-1 0201
16 7 1 C1194 1/32W
VDD18_PCIE AM29
VDD18_PCIE AM31
VDD_FIXED_PCIE_REFBUF AM27
VDD12_PCIE_REFBUF AN26
VDD_FIXED_PCIE_ANA AN30
VDD12_PCIE_REFBUF AP26
VDD_FIXED_PCIE_ANA AP29
VDD_FIXED_PCIE_ANA AP31
VDD_FIXED_PCIE_REFBUF AP27
ROOM=SOC ROOM=SOC ROOM=SOC
PCIE_WLAN_BI_AP_CLKREQ_L MF
50 7 0.1UF 01005
20% ROOM=SOC
2 6.3V
X5R-CERM
01005
ROOM=SOC
TMIT78B0-C4 C
WLCSP
SYM 2 OF 16
PCIE LINK 3
0.22UF 2 1 C1100 C1130 1 2
0.1UF
6.3V 20% GND_VOID
AV29 BA36 90_PCIE_WLAN_TO_AP_RXD_C_P GND_VOID 20% 6.3V 90_PCIE_WLAN_TO_AP_RXD_P
16 IN
90_PCIE_NAND_TO_AP_RXD_P 01005 X5R 90_PCIE_NAND_TO_AP_RXD_C_P PCIE_RX0_P PCIE_RX3_P X5R-CERM 01005 IN 50
16 IN
90_PCIE_NAND_TO_AP_RXD_N ROOM=SOC
90_PCIE_NAND_TO_AP_RXD_C_N AW29 PCIE_RX0_N PCIE_RX3_N AY36 90_PCIE_WLAN_TO_AP_RXD_C_N ROOM=SOC
90_PCIE_WLAN_TO_AP_RXD_N IN 50
2 1 C1101 C1131 1 2
PCIE LINK 0
0.22UF 0.1UF
6.3V 20% GND_VOID GND_VOID 20% 6.3V
01005 X5R X5R-CERM 01005
ROOM=SOC ROOM=SOC
16 OUT
90_PCIE_AP_TO_NAND_TXD_N ROOM=SOC
90_PCIE_AP_TO_NAND_TXD_C_N BA30 PCIE_TX0_N PCIE_TX3_N AW35 90_PCIE_AP_TO_WLAN_TXD_C_N ROOM=SOC
90_PCIE_AP_TO_WLAN_TXD_N OUT 50
0.22UF 2 1 C1103 AJ37 AH36 PCIE_AP_TO_WLAN_RESET_L C1133 1 2
0.1UF
6.3V 20% GND_VOID 16 7 OUT
PCIE_AP_TO_NAND_RESET_L PCIE_PERST0* PCIE_PERST3* OUT 7 50 GND_VOID 20% 6.3V
01005 X5R X5R-CERM 01005
ROOM=SOC ROOM=SOC
LINK0 LINK3
90_PCIE_AP_TO_BB_REFCLK_P 50
OUT
90_PCIE_AP_TO_BB_REFCLK_N 50
OUT
1 C1124 1 C1125
AL37 AK37 PCIE_BB_BI_AP_CLKREQ_L 4.7PF 4.7PF
B NC PCIE_CLKREQ1* PCIE_CLKREQ2* BI 50
+/-0.1PF
2 16V
+/-0.1PF
2 16V
B
AW26 PCIE_REF_CLK1_P PCIE_REF_CLK2_P AV25 NP0-C0G NP0-C0G
NC 01005 01005
AY26 PCIE_REF_CLK1_N PCIE_REF_CLK2_N AW25 ROOM=SOC ROOM=SOC
NC
PCIE LINK 2
C1120 1 2 0.1UF
AV31 BA34 90_PCIE_BB_TO_AP_RXD_C_P GND_VOID 20% 6.3V 90_PCIE_BB_TO_AP_RXD_P
NC PCIE_RX1_P PCIE_RX2_P X5R-CERM 01005 IN 50
AW31 PCIE_RX1_N PCIE_RX2_N AY34 90_PCIE_BB_TO_AP_RXD_C_N ROOM=SOC 90_PCIE_BB_TO_AP_RXD_N 50
NC IN
C1121 1 2 0.1UF
GND_VOID 20% 6.3V
X5R-CERM 01005
ROOM=SOC
C1122 1 2 0.1UF
AY32 AV33 90_PCIE_AP_TO_BB_TXD_C_P GND_VOID 20% 6.3V
NC PCIE_TX1_P PCIE_TX2_P X5R-CERM 01005 90_PCIE_AP_TO_BB_TXD_P OUT 50
BA32 PCIE_TX1_N PCIE_TX2_N AW33 90_PCIE_AP_TO_BB_TXD_C_N ROOM=SOC
90_PCIE_AP_TO_BB_TXD_N 50
NC OUT
AU30 PCIE_EXT_REF_CLK_P
AT30 PCIE_EXT_REF_CLK_N
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
1 1
R1201 R1202
1.00K 1.00K
5% 5%
1/32W 1/32W
MF MF
(Analog) 2 01005 2 01005
MIPI Lane & Polarity Swapping 0.765V - 0.84V @ 40mA MAX 1.62V - 1.98V @ 10mA MAX
ROOM=SOC ROOM=SOC
17 14 13 9 7 6
PP0V8_SOC_FIXED_S1 PP1V8_IO 5 6 7 8 10 14 16 17 27 28 29 30
29 8 I2C0_ISP_SCL
32 34 35 43
8 I2C0_ISP_SDA
G12
G14
PP1V8_IO
F11
F13
29 28 27 17 16 14 10 8 7 6 5
43 35 34 32 30
1 1
R1211 R1212
VDD_FIXED_MIPI
VDD18_MIPI
1.00K 1.00K
5% 5%
1/32W 1/32W
MF MF
2 01005
ROOM=SOC
2 01005
ROOM=SOC
30 8 I2C1_ISP_SCL
8 I2C1_ISP_SDA
U1000 30
TMIT78B0-C4
WLCSP
SYM 3 OF 16
90_MIPI_JULIET_TO_AP_DATA0_P 90_MIPI_JULIET_TO_AP_DATA0_P I2C0_ISP_SCL
35
35
BI
90_MIPI_JULIET_TO_AP_DATA0_N
MAKE_BASE
MAKE_BASE 90_MIPI_JULIET_TO_AP_DATA0_N
B12
A12
MIPI0C_DPDATA0
MIPI0C_DNDATA0
ROOM=SOC
ISP_I2C0_SCL
ISP_I2C0_SDA
W35
V38 I2C0_ISP_SDA
OUT 8 29
8 29
ISP I2C2
BI BI
Juliet MIPI
PP1V8_IO
29 28 27 17 16 14 10 8 7 6 5
35 IN
90_MIPI_JULIET_TO_AP_DATA1_P MAKE_BASE 90_MIPI_JULIET_TO_AP_DATA1_P B14 MIPI0C_DPDATA1 ISP_I2C1_SCL W36 I2C1_ISP_SCL OUT 8 30
43 35 34 32 30
1 1
35 IN
90_MIPI_JULIET_TO_AP_DATA1_N MAKE_BASE 90_MIPI_JULIET_TO_AP_DATA1_N A14 MIPI0C_DNDATA1 ISP_I2C1_SDA Y36 I2C1_ISP_SDA BI 8 30 R1221 R1222
1.00K 1.00K
5% 5%
35 IN
90_MIPI_JULIET_TO_AP_CLK_N MAKE_BASE 90_MIPI_JULIET_TO_AP_CLK_N A13 MIPI0C_DPCLK ISP_I2C2_SCL Y34 I2C2_ISP_SCL OUT 8 32
1/32W 1/32W
MF MF
35 IN
90_MIPI_JULIET_TO_AP_CLK_P MAKE_BASE 90_MIPI_JULIET_TO_AP_CLK_P B13 MIPI0C_DNCLK ISP_I2C2_SDA Y38 I2C2_ISP_SDA BI 8 32 2 01005 2 01005
ROOM=SOC ROOM=SOC
8 MIPI1C_REXT
D13 MIPI1C_REXT
ISP_I2C3_SCL AA37
AB38
I2C3_ISP_SCL
I2C3_ISP_SDA
OUT 8 28 31 34 35
32 8 I2C2_ISP_SCL C
ISP_I2C3_SDA BI 8 28 31 34 35
32 8 I2C2_ISP_SDA
32
90_MIPI_FCAM_TO_AP_DATA0_N MAKE_BASE 90_MIPI_FCAM_TO_AP_DATA0_N B17 MIPI1C_DPDATA0
BI
32 BI
90_MIPI_FCAM_TO_AP_DATA0_P MAKE_BASE 90_MIPI_FCAM_TO_AP_DATA0_P A17 MIPI1C_DNDATA0 R1240
33.2 AP_TO_WIDE_CLK
ISP I2C3
FCAM MIPI
1 2 OUT 29
32
90_MIPI_FCAM_TO_AP_DATA1_N MAKE_BASE 90_MIPI_FCAM_TO_AP_DATA1_N B15 MIPI1C_DPDATA1 SENSOR_INT AB36 RIGEL_TO_ISP_INT 4 20 34 1%
IN IN
1/32W
32 IN
90_MIPI_FCAM_TO_AP_DATA1_P MAKE_BASE 90_MIPI_FCAM_TO_AP_DATA1_P A15 MIPI1C_DNDATA1 MF PP1V8_IO
01005 29 28 27 17 16 14 10 8 7 6 5
43 35 34 32 30
ROOM=SOC
1 1
32 IN
90_MIPI_FCAM_TO_AP_CLK_P MAKE_BASE 90_MIPI_FCAM_TO_AP_CLK_P A16 MIPI1C_DPCLK
SENSOR0_CLK U38 AP_TO_WIDE_CLK_R R1241 R1231 R1232
90_MIPI_FCAM_TO_AP_CLK_N MAKE_BASE 90_MIPI_FCAM_TO_AP_CLK_N B16 MIPI1C_DNCLK 33.2 1.00K 1.00K
32 IN
SENSOR1_CLK R38 AP_TO_TELE_CLK_R 1 2 AP_TO_TELE_CLK OUT 30
5% 5%
1/32W 1/32W
43 BI
90_MIPI_AP_TO_DISPLAY_DATA0_P A10 MIPID_DPDATA0 SENSOR2_CLK R37 AP_TO_FCAM_JULIET_RIGEL_CLK_R 1% MF MF
90_MIPI_AP_TO_DISPLAY_DATA0_N B10
1/32W 2 01005 2 01005
43 BI MIPID_DNDATA0 MF ROOM=SOC ROOM=SOC
01005
ROOM=SOC
90_MIPI_AP_TO_DISPLAY_DATA1_P 90_MIPI_AP_TO_DISPLAY_DATA1_P B9 I2C3_ISP_SCL
43 OUT
90_MIPI_AP_TO_DISPLAY_DATA1_N
MAKE_BASE
90_MIPI_AP_TO_DISPLAY_DATA1_N A9
MIPID_DPDATA1
V34 AP_TO_JULIET_SHUTDOWN_L
R1242 35 34 31 28 8
8 I2C3_ISP_SDA
43 OUT MAKE_BASE MIPID_DNDATA1 SENSOR0_RST OUT 35
1
33.2 2 AP_TO_FCAM_JULIET_CLK
35 34 31 28
Display MIPI
1%
43 OUT
90_MIPI_AP_TO_DISPLAY_DATA3_P MAKE_BASE 90_MIPI_AP_TO_DISPLAY_DATA3_P A7 MIPID_DPDATA2 SENSOR2_RST AB34 AP_TO_WIDE_SHUTDOWN_L OUT 29 1/32W
MF
43
90_MIPI_AP_TO_DISPLAY_DATA3_N MAKE_BASE 90_MIPI_AP_TO_DISPLAY_DATA3_N B7 MIPID_DNDATA2 SENSOR3_RST AC37 01005
OUT NC AP_TO_FCAM_SHUTDOWN_L ROOM=SOC
SENSOR4_RST AA35 4 32
OUT
43 OUT
90_MIPI_AP_TO_DISPLAY_DATA2_N MAKE_BASE 90_MIPI_AP_TO_DISPLAY_DATA2_N A6 MIPID_DPDATA3 R1243
90_MIPI_AP_TO_DISPLAY_DATA2_P 90_MIPI_AP_TO_DISPLAY_DATA2_P B6 1
33.2 2 AP_TO_RIGEL_CLK
43 OUT MAKE_BASE MIPID_DNDATA3 OUT 34
1%
AP_DEBUG3 1/32W
43 OUT
90_MIPI_AP_TO_DISPLAY_CLK_N MAKE_BASE 90_MIPI_AP_TO_DISPLAY_CLK_N A8 MIPID_DPCLK SENSOR0_ISTRB V36
OUT 4 MF
01005
43
90_MIPI_AP_TO_DISPLAY_CLK_P MAKE_BASE 90_MIPI_AP_TO_DISPLAY_CLK_P B8 MIPID_DNCLK SENSOR1_ISTRB U36 ROOM=SOC
OUT NC
43
OUT
DISPLAY_TO_AP_ALIVE AB4
DISP_TOUCH_BSYNC0
DISP_TOUCH_BSYNC1
SENSOR0_XSHUTDOWN
SENSOR1_XSHUTDOWN T37
NC
ISP_TO_DISPLAY_FLASH_INT 43
B
IN OUT
AB6 DISP_TOUCH_EB
NC
8
MIPID_REXT D11 MIPID_REXT
AA4 DISP_I2C_SCL
NC
AA5 DISP_I2C_SDA
NC
Y4 DISP_POL
NC
MIPI Reference
MIPI0C_REXT 8
MIPI1C_REXT 8
MIPID_REXT 8
A A
R12501 R12511 R12521
SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
PAGE TITLE
200 200 200
1%
1/32W
1%
1/32W
1%
1/32W
SOC: MIPI & ISP
MF MF MF DRAWING NUMBER SIZE
01005 2 01005 2 01005 2
ROOM=SOC ROOM=SOC ROOM=SOC 051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
SOC - LPDP
(Analog)
VDD_FIXED_PLL_LPDP 0.765V - 0.84V @ 3mA MAX
VDD12_PLL_LPDP 1.14V - 1.26V @ 10mA MAX VDD_FIXED_LPDP_TX 0.765V - 0.84V @ 16mA MAX
VDD12_LPDP 1.14V - 1.26V @ 72mA MAX VDD_FIXED_LPDP_RX 0.765V - 0.84V @ 30mA MAX
PP1V2_SOC PP0V8_SOC_FIXED_S1
19 14 13 7 6 7 8 9 13 14 17
G16
G18
F15
F17
F16
VDD12_LPDP_TX M9
VDD_FIXED_PLL_LPDP R9
VDD_FIXED_LPDP_TX P9
VDD12_PLL_LPDP T9
VDD12_LPDP_RX
VDD_FIXED_LPDP_RX
29
90_LPDP_WIDE_TO_AP_D0_P A26 LPDPRX_RX_D0_P LPDP_TX0P M3
IN NC
90_LPDP_WIDE_TO_AP_D0_N B26 LPDPRX_RX_D0_N LPDP_TX0N M4
29 IN
U1000 NC
TMIT78B0-C4
WLCSP
SYM 4 OF 16
29
90_LPDP_WIDE_TO_AP_D1_P A25 LPDPRX_RX_D1_P LPDP_TX1P L4
IN NC
C 29 IN
90_LPDP_WIDE_TO_AP_D1_N B25 LPDPRX_RX_D1_N LPDP_TX1N L5
NC C
29
90_LPDP_WIDE_TO_AP_D2_P A24 LPDPRX_RX_D2_P LPDP_TX2P K3
IN NC
29
90_LPDP_WIDE_TO_AP_D2_N B24 LPDPRX_RX_D2_N LPDP_TX2N K4
IN NC
30
90_LPDP_TELE_TO_AP_D0_P A21 LPDPRX_RX_D3_P LPDP_TX3P J4
IN NC
30
90_LPDP_TELE_TO_AP_D0_N B21 LPDPRX_RX_D3_N LPDP_TX3N J5
IN NC
30 IN
90_LPDP_TELE_TO_AP_D1_P A20 LPDPRX_RX_D4_P
30 IN
90_LPDP_TELE_TO_AP_D1_N B20 LPDPRX_RX_D4_N
30
90_LPDP_TELE_TO_AP_D2_P A19 LPDPRX_RX_D5_P LPDP_AUX_P G4
IN NC
30
90_LPDP_TELE_TO_AP_D2_N B19 LPDPRX_RX_D5_N LPDP_AUX_N G5
IN NC
LPDP_CAL_DRV_OUT H3
NC
LPDP_CAL_VSS_EXT H6
NC
29 BI
LPDP_WIDE_BI_AP_AUX D21 LPDPRX_AUX_D0_P
D20 LPDPRX_AUX_D1_P EDP_HPD Y6
NC NC
D19 Y2
B 30
LPDP_TELE_BI_AP_AUX
NC
D17
LPDPRX_AUX_D2_P
LPDPRX_AUX_D3_P
DP_WAKEUP NC B
BI
D16 LPDPRX_AUX_D4_P
NC
D15 LPDPRX_AUX_D5_P
NC
17 14 13 9 8 7 6
PP0V8_SOC_FIXED_S1 B23 LPDPRX_RCAL_P
R1300 1
300
1%
1/32W
MF
01005-1 2
ROOM=SOC AP_LPDPRX_RCAL_NEG A23 LPDPRX_RCAL_N
C1301 1
100PF D18 LPDPRX_EXT_C
5% NC
16V
NP0-C0G 2
01005
ROOM=SOC
A SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
SOC: LPDP
DRAWING NUMBER SIZE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
R1400 1 R1401 1
2.2K 2.2K
5% 5%
1/32W 1/32W
MF MF
01005 2 01005 2
ROOM=SOC ROOM=SOC
49 46 20 10
I2C0_AP_SCL
49 46 20 10
I2C0_AP_SDA
D D
AP I2C1
PP1V8_IO
R1460 29 28 27 17 16 14 10 8 7 6 5
43 35 34 32 30
AG4 AL6
AP I2C3
NC I2S3_MCK SEP_SPI0_SCLK NC PP1V8_IO
I2S_BB_TO_AP_BCLK AG5 I2S3_BCLK SEP_SPI0_MISO AM5 29 28 27 17 16 14 10 8 7 6 5
C 50
50
OUT
OUT
I2S_BB_TO_AP_LRCLK AH2 I2S3_LRCK SEP_SPI0_MOSI AM4
NC
PMU_TO_SEP_DOUBLE_CLICK_DET IN 20
43 35 34 32 30
R1430 1 R1431 1 C
50 IN
I2S_BB_TO_AP_DIN AH6 I2S3_DIN 2.2K 2.2K
I2S_AP_TO_BB_DOUT AH4 5% 5%
50 OUT I2S3_DOUT 1/32W 1/32W
AL2 CKPLUS_WAIVE=I2C_PULLUP I2C4_AP_SCL MF MF
SEP_I2C_SCL 10 01005 01005
I2C4_AP_SDA ROOM=SOC 2 ROOM=SOC 2
SEP_I2C_SDA AM3 CKPLUS_WAIVE=I2C_PULLUP 10
50 42 10
I2C3_AP_SCL
I2C3_AP_SDA
16 5 4 IN
SPI_S4E_TO_AP_MISO_BOOT_CONFIG2 AV22 SPI0_MISO
50 42 10
0% 38 OUT
SPI_AP_TO_CODEC_CS_L AE6 SPI2_SSIN R1481 R1450 1 R1451 1
1/32W 0.00 AP_TO_RACER_REF_CLK
MF
01005
1 2 OUT 50 4.7K 4.7K
5% 5%
ROOM=SOC 0% 1/32W 1/32W
1/32W MF MF
AE38 SPI3_MISO MF 01005 2 01005 2
NC CLK24M_OUT AV19 AP_TO_RACER_REF_CLK_R 01005 ROOM=SOC ROOM=SOC
AE35
B NC
AF38
SPI3_MOSI
SPI3_SCLK AP_TO_NAND_SYS_CLK_R
ROOM=SOC
48 10
I2C1_SMC_SCL B
NC NAND_SYS_CLK BA20
AE37 SPI3_SSIN 48 10
I2C1_SMC_SDA
NC
R1480
1
0.00 2 AP_TO_NAND_SYS_CLK
SPI: Route as Daisy-Chain. No T's Allowed 0%
OUT 16
AP I2C4
1/32W
MF 29 28 27 17 16 14 10 8 7 6 5
PP1V8_IO
Place series terminations close to SoC Pins 01005 43 35 34 32 30
ROOM=SOC
R1470 1 R1471 1
4.7K 4.7K
5% 5%
1/32W 1/32W
MF MF
01005 2 01005 2
ROOM=SOC ROOM=SOC
10
I2C4_AP_SCL
10
I2C4_AP_SDA
29 28 27 17 16 14 10 8 7 6 5
PP1V8_IO
43 35 34 32 30
C1490
A1
1
0.47UF VCC
20%
2 6.3V
X5R
01005
ROOM=SOC U1490
B1 SCL WLCSP SDA A2 I2C4_AP_SDA
A OMIT_TABLE I2C4_AP_SCL
10
10 SYNC_MASTER=test_mlb SYNC_DATE=10/17/2016
A
PAGE TITLE
VSS
TABLE_5_HEAD
ROOM=SOC
CRITICAL
SOC: Serial
B2
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
50
OUT
OUT
AP_TO_SPKRAMP_TOP_RESET_L D29 GPIO_13
UART2_CTS* B28
B29
UART_GNSS_TO_AP_CTS_L
UART_AP_TO_GNSS_RTS_L
IN 50 C
B33 UART2_RTS* OUT 50
NC GPIO_14 C28 UART_GNSS_TO_AP_RXD
AP_TO_NFC_FW_DWLD_REQ A32 UART2_RXD IN 50
50 OUT GPIO_15 B30 UART_AP_TO_GNSS_TXD
P6 UART2_TXD OUT 50
NC GPIO_16
AP_TO_RACER_RESET_L P4 GPIO_17
50 OUT
UART3_CTS* D30 UART_NFC_TO_AP_CTS_L
BOARD_ID0 R4 GPIO_18
IN 50
5 4 IN
UART3_RTS* B32 UART_AP_TO_NFC_RTS_L
SPKRAMP_TOP_TO_AP_INT_L R3 GPIO_19
OUT 50
50 IN
UART3_RXD C32 UART_NFC_TO_AP_RXD
PMU_TO_AP_BUTTON_VOL_UP_L R2 GPIO_20
IN 50
20 IN
UART3_TXD D31 UART_AP_TO_NFC_TXD
50 OUT
AP_TO_BBPMU_RADIO_ON_L T5 GPIO_21
OUT 50
AP_TO_WLAN_DEVICE_WAKE T4 GPIO_22
50 OUT
UART4_CTS* K36 UART_WLAN_TO_AP_CTS_L 50
T3 GPIO_23
IN
NC UART4_RTS* M35 UART_AP_TO_WLAN_RTS_L 50
T2 GPIO_24
OUT
NC UART4_RXD N36 UART_WLAN_TO_AP_RXD
PP1V8_IO U6 GPIO_25
IN 50
5 IN
UART4_TXD N35 UART_AP_TO_WLAN_TXD
50 48 20 IN
PMU_HYDRA_TO_AP_FORCE_DFU U4 GPIO_26
OUT 50
DFU_STATUS U2 GPIO_27
4 OUT
UART6_RXD AF5 UART_ACCESSORY_TO_AP_RXD
PP1V8_IO V5 GPIO_28
IN 48
5 IN
UART6_TXD AF4 UART_AP_TO_ACCESSORY_TXD
5 IN
BOARD_ID4 V4 GPIO_29
OUT 48
20
AP_TO_PMU_AMUX_SYNC V3 GPIO_30
IN
UART7_RXD R5
50
AP_TO_BB_TIME_MARK AJ3 GPIO_31 NC
OUT
UART7_TXD P2
50 IN
BB_TO_AP_RESET_DETECT_L AJ4 GPIO_32 NC
AJ5 GPIO_33
NC
5 IN
BOARD_REV3 AJ6 GPIO_34
5 IN
BOARD_REV2 AK3 GPIO_35
5 IN
BOARD_REV1 AK4 GPIO_36
5 IN
BOARD_REV0 AK5 GPIO_37
B B
20 IN
PMU_TO_AP_BUTTON_POWER_KEY_L AB2 REQUEST_DFU1
20 IN
PMU_TO_AP_BUTTON_VOL_DOWN_L AC4 REQUEST_DFU2
A SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D
ROOM=SOC ROOM=SOC
D
AP13
AP15
AP17
AP19
VDDIO18_AOP
VDDIO18_AOP
VDDIO18_AOP
VDDIO18_AOP
AOP_TO_DDR_SLEEP1_READY AT11 AON_DDR_RESET*
14 4 OUT
U1000
AU14 TMIT78B0-C4
NC AOP_FUNC_0 WLCSP
AU13 AOP_FUNC_1 SYM 7 OF 16
NC AOP_PDM_CLK0 BA16 CODEC_TO_AOP_GPIO1
ACCEL_GYRO_TO_AOP_DATARDY AW10 AOP_FUNC_2
ROOM=SOC IN 38
26 4 BI
AOP_PDM_DATA0 AW18 CODEC_TO_AOP_GPIO2
SPI_AOP_TO_ACCEL_GYRO_CS_L AW11 IN 38
26 4
IN
OUT
ACCEL_GYRO_TO_AOP_INT AT16
AOP_FUNC_3
AOP_FUNC_4 SPI SCM
AOP_PDM_DATA1 AW17
NC
PP1V8_S2 10 12 14 17 20 22 38 46 47 48 26 IN
SPI_AOP_TO_PHOSPHORUS_CS_L AV11 AOP_FUNC_5 RT_CLK32768 BA18 PMU_TO_AOP_CLK32K IN 20
49 50
PHOSPHORUS_TO_AOP_INT AY10 AOP_FUNC_6
1
R1620 1
R1621 1
R1622 1
R1623
26 4 OUT
AOP_SWD_TCK_OUT AV20 SWD_AOP_TO_MANY_SWCLK
35 IN
ROMEO_TO_AOP_B2B_DETECT AV12 AOP_FUNC_7
OUT 4 16 50
49 41 38 OUT
I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT AU17 AOP_FUNC_16 AOP_I2CM1_SCL AV10 I2C1_AOP_SCL OUT 4 12 25 41 49 50
C 36 IN
PROX_BI_AP_AOP_INT_L AV15
AY13
AOP_FUNC_17
I2C0 SCM
AOP_I2CM1_SDA AW9 I2C1_AOP_SDA BI 4 12 25 41 49 50 C
NC AOP_FUNC_18
50 IN
HALL3_TO_AOP_IRQ_L BA11 AOP_FUNC_19
36 IN
ALS_TO_AOP_INT_L AV17 AOP_FUNC_20
R1603 NC
BA10 AOP_FUNC_21
I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK 1
49.9 2 COMPASS_TO_AOP_INT AT18
50 49 41 38 IN 49 25 4 IN AOP_FUNC_22 I2C1 SCM
1% 50 IN
HALL2_TO_AOP_IRQ_L AW14 AOP_FUNC_23
1/32W
MF I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK_R AV18 AOP_FUNC_24
01005
ROOM=SOC
I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK_R BA12 AOP_FUNC_25
I2S_CODEC_ASP1_TO_AOP_AMPS_DIN AY14
R1604 50 41 38 IN AOP_FUNC_26
I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK 1
49.9 2
50 49 41 38 IN
1%
1/32W
MF
01005
ROOM=SOC
26 4 IN
SPI_IMU_TO_AOP_MISO AW7 AOP_SPI_MISO
R1601 26 4 OUT
SPI_AOP_TO_IMU_MOSI AU10 AOP_SPI_MOSI
SPI_AOP_TO_IMU_SCLK 1
49.9 2 SPI_AOP_TO_IMU_SCLK_R AV8
26 4 OUT AOP_SPI_SCLK
1%
1/32W
MF 50 IN
UART_BB_TO_AOP_RXD AT14 AOP_UART0_RXD DOCK_ATTENTION BA17 HYDRA_TO_NUB_INT IN 48
01005
UART_AOP_TO_BB_TXD AY8 AOP_UART0_TXD
ROOM=SOC 50 OUT
DOCK_CONNECT AY19 HYDRA_TO_NUB_DOCK_CONNECT IN 48
50 OUT
AOP_TO_WLAN_CONTEXT_A BA8 AOP_UART1_RXD
50 OUT
AOP_TO_WLAN_CONTEXT_B AW8 AOP_UART1_TXD
50 IN
UART_RACER_TO_AOP_RXD AU11 AOP_UART2_RXD
50 OUT
UART_AOP_TO_RACER_TXD AT15 AOP_UART2_TXD
I2S_AOP_TO_CODEC_ASP2_BCLK BA14
B R1602
38
38
OUT
I2S_CODEC_ASP2_TO_AOP_DIN AT19
AOP_I2S0_BCLK
AOP_I2S0_DIN
B
IN
I2S_AOP_TO_CODEC_MCLK2 1
33.2 2 I2S_AOP_TO_CODEC_MCLK2_R AU19
38 OUT AOP_I2S0_MCK
1% 38 OUT
I2S_AOP_TO_CODEC_ASP2_LRCLK BA15 AOP_I2S0_LRCK
1/32W
MF
01005 38 OUT
I2S_AOP_TO_CODEC_ASP2_DOUT BA13 AOP_I2S0_DOUT
ROOM=SOC
A SYNC_MASTER=test_mlb SYNC_DATE=10/17/2016
A
PAGE TITLE
SOC: AOP
DRAWING NUMBER SIZE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
OMIT
17
D
1
1 C1730 1 C1731 XW1731
1 C1760 1 C1761 XW1760
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC 4UF 4UF SHORT-20L-0.05MM-SM
4UF 4UF SHORT-20L-0.05MM-SM
20% 20% 20% 20%
C1704 C1705 C1706 C1707 2 4V
X5R 2 4V
X5R
1
ROOM=SOC
2 BUCK1_FB OUT 17 2 4V
X5R 2 4V
X5R
1 2 BUCK2_FB OUT 17
F22
A SYNC_MASTER=test_mlb SYNC_DATE=10/17/2016
A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
VDD18_EFUSE1 H12
AF9 AT6 1.8V @ 1mA MAX
VDD18_EFUSE2
A V9 VDDIO18_GRP4 VDD18_FMON AN13 PP1V8_IO 5 6 7 8 10 14 16 17 27 28 29 30
32 34 35 43
R1880 1.8V
300
@ 1mA MAX SYNC_MASTER=test_mlb SYNC_DATE=10/17/2016
A
VDD18_LPOSC AN19 PP1V8_LPOSC_S2 1 2 PP1V8_S2 10 12 14 17 20 22 38 46 47 48
PAGE TITLE
49 50
1 C1880 1 C1881 5%
1/32W
SOC: Power (2/3)
MF DRAWING NUMBER SIZE
56PF 0.47UF 01005
5%
2 25V
20%
2 6.3V
ROOM=SOC 051-02221 D
NP0-C0G-CERM
01005
X5R
01005
Apple Inc. REVISION
ROOM=SOC ROOM=SOC
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
AC27 AK12 AR3 AY38 E35 K18 R31 VSS_SENSE P24 TP_VSS_SENSE OUT 4
AC29 AK14 AR4 AY39 E36 K20 R34
AC31 AK16 AR37 B1 E37 K22 R39
AC34 AK18 AR38 B2 E38 K24 T6
AC35 AK20 AR39 B4 E39 K28 T10
NC <- DDR Vss V Sense
AD4 AK22 AT2 B5 F12 K35 T14
B AD6 AK24 AT3 B11 F14 K37 T16 B
AD14 AK26 AT4 B18 F18 L1 T18
AD20 AK28 AT5 B27 F2 L2 T20
AD22 AK34 AT28 B35 F3 L3 T22
AD24 AK35 AT29 B36 F4 L6 T24
AD26 AK36 AT31 B38 F5 L9 T26
AD28 AL1 AT32 B39 F6 L11 T28
AD34 AL3 AT33 BA1 F20 L17 T30
AD35 AL5 AT37 BA2 F24 L23 T34
AD37 AL11 AT38 BA3 F26 L29 T36
AE1 AL13 AU1 BA5 F30 L34 T38
AE3 AL15 AU2 BA7 F34 L38 U1
AE5 AL17 AU12 BA23 F35 L39 U3
AE9 AL19 AU15 BA25 F36 M10 U5
AE15 AL21 AU18 BA26 F37 M12 U9
AE21 AL23 AU21 BA29 F38 M14 U11
AE23 AL25 AU24 BA31 G1 M16 U13
AE25 AL27 AU25 BA33 M18 U15
AE27 AL29 AU26 BA35 U17
AL31 AU27 BA37 U19
BA38
A SYNC_MASTER=test_mlb SYNC_DATE=10/17/2016
A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
391mA MAX
28 27 17 16 14 10 8 7 6 5
43 35 34 32 30 29
PP1V8_IO
S4E NAND
1 C2626 1 C2610
4UF 0.1UF
20% 20%
2 4V
X5R 2 6.3V
X5R-CERM
0201
ROOM=NAND
01005
ROOM=NAND
D D
1 C2629 1 C2630
18UF 18UF
20% 20%
2 6.3V
CER-X5R 2 6.3V
CER-X5R
0402-0.1MM
ROOM=NAND
0402-0.1MM
ROOM=NAND
932mA MAX
19
PP0V9_NAND
1 C2602 1 C2605 1 C2600 1 C2601
26UF 26UF 4UF 4UF
20% 20% 20% 20%
2 4V
X5R 2 4V
X5R 2 4V
X5R 2 4V
X5R
0402-0.1MM 0402-0.1MM 0201 0201
ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
C 1100mA MAX (1us peak power) C
PP3V0_NAND 19
1 C2603 1 C2606 1 C2609 1 C2614 1 C2620 1 C2628 1 C2649 1 C2650 1 C2651 1 C2652
220PF 220PF 100PF 68PF 47PF 22PF 4UF 4UF 4UF 4UF
5% 5% 5% 5% 5% 5% 20% 20% 20% 20%
2 10V
C0G-CERM 2 10V
C0G-CERM 2 16V
NP0-C0G
6.3V
2 NP0-C0G 2 16V
CERM 2 16V
CERM 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R
01005 01005 01005 01005 01005 01005 0201
ROOM=NAND
0201
ROOM=NAND
0201
ROOM=NAND
0201
ROOM=NAND
ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
ANI0_VREF G12
E10
E12
L12
PCI_AVDD_CLK_2 M9
G6
G8
G4
PCI_AVDD_CLK_1 N6
PCI_VDD_1 N8
R6
R8
N2
D3
R2
VDD_PLL R4
E2
K9
P9
T5
VPP F3
AVDD18_PLL L2
L6
L8
PCI_AVDD_H J6
PCI_VDD_2 J8
ANI1_VREF J4
J2
VDD
VDDIO
VCC
B B
U2600
THGBX7G8D2LLFXG
10 IN
AP_TO_NAND_SYS_CLK M3 CLK_IN WFLGA EXT_D0/BOOT0 B3 PMU_TO_NAND_LOW_BATT_BOOT_L IN 20
ROOM=NAND EXT_D1/BOOT1 C4 AP_TO_NAND_FW_STRAP
90_PCIE_AP_TO_NAND_REFCLK_P K11 PCIE_REFCLK_P BOMOPTION=OMIT_TABLE IN 6
7 4 IN
CRITICAL EXT_D2/BOOT2/SPINAND_SCLK B5 SPI_AP_TO_S4E_SCLK_BOOT_CONFIG0
90_PCIE_AP_TO_NAND_REFCLK_N J12 PCIE_REFCLK_M IN 5 10
7 4 IN
EXT_D3/SWD_UID0/SPINAND_MISO C6 SPI_S4E_TO_AP_MISO_BOOT_CONFIG2 OUT 4 5 10
7
PCIE_NAND_BI_AP_CLKREQ_L P5 PCIE_CLKREQ_N EXT_D4/UART_RX B7
BI NC
EXT_D5/SWD_UID1/SPINAND_MOSI C8 SPI_AP_TO_S4E_MOSI_BOOT_CONFIG1
PCIE_NAND_RESREF H7 PCI_RESREF
IN 5 10
EXT_D6/UART_TX B9
NC
1
R2604 7 IN
90_PCIE_AP_TO_NAND_TXD_P M11 PCIE_RX0_P EXT_D7/SPF B11 SYSTEM_ALIVE IN 14 20 23
7 OUT
90_PCIE_NAND_TO_AP_RXD_N T11 PCIE_TX0_M EXT_RNB/JTAG_TDO E4
EXT_CLE/JTAG_TDI D5 NC
EXT_ALE/JTAG_SEL D9
DROOP_N T3
AP_TO_NAND_RESET_L L4 RESET*
6 IN
WP_N G2 PP1V8_IO 5 6 7 8 10 14 16 17 27 28 29 30
32 34 35 43
A Board trace <= 0.2Ohm
G10 TRST*
SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
NAND_ZQ_C K3 ZQ_C PAGE TITLE
NAND_ZQ_N
CKPLUS_WAIVE=MISS_P_DIFFPAIR
C10 ZQ_N NAND
DRAWING NUMBER SIZE
1 1
R2600 R2601 051-02221 D
100
0.1%
300
0.1% Apple Inc. REVISION
1/32W 1/32
MF
01005
MF
01005
VSS 9.0.0
2ROOM=NAND 2ROOM=NAND NOTICE OF PROPRIETARY PROPERTY: BRANCH
evt-1
A2
A4
A6
A8
A10
A12
B1
B13
C2
C12
D1
D11
D13
F1
F5
F7
F9
F11
F13
H1
H3
H5
H9
H11
H13
J10
K1
K5
K7
K13
L10
M1
M5
M7
M13
N4
N10
P1
P3
P7
P11
P13
R10
T1
T7
T9
T13
U2
U4
U6
U8
U10
U12
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
26 OF 80
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 16 OF 51
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CRITICAL
13.8A MAX
0.47UH-20%-3.3A-0.053OHM N17 PIWA2012FE-SM
BUCK0
(Place in TTS) BUCK0_LX1 ROOM=PMU
1 2 BUCK4_LX1 V9 N18
W9
D
PIWA2012FE-SM
ROOM=PMU Y9
BUCK4_LX1 CRITICAL
L2702 1 C2706 D
0.1UH-20%-6.1A-0.031OHM 26UF
OMIT 20%
R16 BUCK0_LX2 1 2 2 4V
XW2740
SHORT-20L-0.05MM-SM
R17 PINA1608-SM
X5R
0402-0.1MM
BUCK0_LX2 ROOM=PMU ROOM=PMU
2 1 BUCK4_FB T8 BUCK4_FB R18
ROOM=PMU CRITICAL
L2703
L2750 0.1UH-20%-6.1A-0.031OHM
1UH-20%-2.5A-0.052OHM U16 BUCK0_LX3 1 2
14 13 9 8 7 6
PP0V8_SOC_FIXED_S1 2 1 BUCK5_LX0 V3 BUCK0_LX3 U17 PINA1608-SM
W3 U18 ROOM=PMU
PIWA20160H-SM BUCK5_LX0
1 C2752 1 C2751 1 C2750 ROOM=PMU Y3
1.7A MAX
BUCK5
PIWA2016FE-SM
1 C2763 1 C2762 1 C2761 1 C2760 ROOM=PMU 220PF 26UF 26UF 26UF 26UF 26UF
13.8A MAX
15UF 15UF 15UF 220PF L2711 5%
2 10V
20%
2 4V
20%
2 4V
20%
2 4V
20%
2 4V
20%
2 4V
BUCK1
20% 20% 20% 5% OMIT 0.47UH-20%-4A-0.048OHM C0G-CERM X5R X5R X5R X5R X5R
2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 10V
C0G-CERM XW2760
SHORT-20L-0.05MM-SM
A13 BUCK1_LX1 1 2
01005
ROOM=PMU
0402-0.1MM
ROOM=PMU
0402-0.1MM
ROOM=PMU
0402-0.1MM
ROOM=PMU
0402-0.1MM
ROOM=PMU
0402-0.1MM
ROOM=PMU
0402-0.1MM-1 0402-0.1MM-1 0402-0.1MM-1 01005
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU 2 1 BUCK6_FB H4 BUCK6_FB B13 PIWA20120H-SM CRITICAL
BUCK1_LX1
C (Place Close to Ansel) ROOM=PMU C13 ROOM=PMU
CRITICAL
C
0.80V - 1.06V L2770 L2712 1 C2716
1UH-20%-2.5A-0.052OHM 0.1UH-20%-7.2A-0.018OHM 26UF
20%
13
PP_CPU_SRAM 2 1 BUCK7_LX0 W16 A11 BUCK1_LX2 1 2 2 4V
X5R
PIWA20160H-SM W17 BUCK7_LX0 B11 PINA2012-SM 0402-0.1MM
C2772 C2771 C2770 BUCK1_LX2
2.1A MAX
1 1 1
BUCK7
4.9A MAX
ROOM=PMU 13
BUCK2
CRITICAL BUCK2_LX0 W5 PIWA20160H-SM
L2790 Y5 ROOM=PMU 1 C2720 1 C2721 1 C2722 1 C2723 1 C2724
1UH-20%-2.1A-0.1OHM 220PF 26UF 26UF 26UF 26UF
CRITICAL 5% 20% 20% 20% 20%
BUCK9_LX 2 10V 2 4V 2 4V 2 4V 2 4V
14
PP_DCS_S1 2 1 A6 L2721 C0G-CERM
01005
X5R
0402-0.1MM
X5R
0402-0.1MM
X5R
0402-0.1MM
X5R
0402-0.1MM
B6 BUCK9_LX0 0.47UH-20%-3.3A-0.053OHM
B 1 C2792 1 C2791 1 C2790
PIWA2012FE-SM ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
B
BUCK9
ROOM=PMU V7
1.2A MAX
BUCK2_LX1 1 2
26UF 26UF 220PF OMIT (Place in TTS)
20% 20% 5% W7 PIWA2012FE-SM
2 4V
X5R 2 4V
X5R 2 10V
C0G-CERM XW2790
SHORT-20L-0.05MM-SM
BUCK2_LX1
Y7 ROOM=PMU
0402-0.1MM 0402-0.1MM 01005
ROOM=PMU ROOM=PMU ROOM=PMU 1 2 BUCK9_FB F4 BUCK9_FB
ROOM=PMU
BUCK2_FB T7 BUCK2_FB 13
IN
L2730
1UH-20%-2.4A-0.06OHM
F1 BUCK3_LX0 1 2 PP1V8_S2 10 12 14 20 22 38 46 47
BUCK3_LX0 F2 PIWA2016FE-SM
48 49 50
1.7A MAX
BUCK3
ROOM=PMU 1 C2730 1 C2731 1 C2732
OMIT 220PF 15UF 15UF
5% 20% 20%
XW2730
SHORT-20L-0.05MM-SM
2 10V
C0G-CERM 2 6.3V
X5R 2 6.3V
X5R
01005
ROOM=PMU
0402-0.1MM-1 0402-0.1MM-1
BUCK3_FB G4 BUCK3_FB 1 2 ROOM=PMU ROOM=PMU
ROOM=PMU
C1
VBUCK3_SW C2
B2
DRAWING NUMBER SIZE
051-02221 D
Apple Inc. REVISION
BUCK3_SW2 D1 PP1V8_TOUCH_RACER_S2 42 50
9.0.0
D2 PP1V8_IMU_S2 NOTICE OF PROPRIETARY PROPERTY: BRANCH
BUCK3_SW3 25 26 49
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
evt-1
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
27 OF 80
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 17 OF 51
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
CRITICAL
U2700 L2800
D2422B0 1UH-20%-2.1A-0.1OHM
WLCSP
19
VDD_MAIN_SNS P7 VDD_MAIN_SNS SYM 3 OF 5
A4 BUCK10_LX 1 2 PP0V6_VDDQL_S1 14
IN
BUCK10_LX0
1.2A MAX
BUCK10
ROOM=PMU B4 PIWA2012FE-SM
45 43 42 41 34 31 27 23 21 19
50 46
PP_VDD_MAIN E5 VDD_MAIN_1 ROOM=PMU 1 C2800 1 C2801 1 C2802
K5 VDD_MAIN_2 220PF 26UF 26UF
5% 20% 20%
1 C2850 1 C2851 1 C2852 R7 VDD_MAIN_3 OMIT 2 10V
C0G-CERM 2 4V
X5R 2 4V
X5R
BAT/USB
18UF 18UF 18UF U14 VDD_MAIN_4 XW2800 01005 0402-0.1MM
ROOM=PMU
0402-0.1MM
ROOM=PMU
20% 20% 20% ROOM=PMU
L14 SHORT-20L-0.05MM-SM
2 6.3V 2 6.3V 2 6.3V VDD_MAIN_5 E4
CER-X5R
0402-0.1MM
CER-X5R
0402-0.1MM
CER-X5R
0402-0.1MM F14 BUCK10_FB BUCK10_FB 2 1
VDD_MAIN_6
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
CRITICAL
M15
M16 L2810
1 C2854 1 C2855 1 C2856 1 C2857 1 C2858 1UH-20%-3.2A-0.06OHM
M17 VDD_BUCK0_01
4UF 4UF 4UF 4UF 4UF G17 BUCK11_LX0 1 2 PP_CPU_ECORE 13
20% 20% 20% 20% 20% M18 BUCK11_LX0
2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V
G18 PIWA20160H-SM
CERM-X5R
0201
CERM-X5R
0201
CERM-X5R
0201
CERM-X5R
0201
CERM-X5R
0201 ROOM=PMU 1 C2810 1 C2811 1 C2812 1 C2813
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU T15 220PF 26UF 26UF 26UF
CRITICAL 5% 20% 20% 20%
3.0A MAX
BUCK11
T16 2 10V 2 4V 2 4V 2 4V
T17 VDD_BUCK0_23 L2811 C0G-CERM
01005
X5R
0402-0.1MM
X5R
0402-0.1MM
X5R
0402-0.1MM
0.47UH-20%-4A-0.048OHM ROOM=PMU
ROOM=PMU ROOM=PMU ROOM=PMU
T18
J17 BUCK11_LX1 1 2
1 C2859 1 C2860 1 C2861 1 C2862 1 C2863 BUCK11_LX1 J18 PIWA20120H-SM
4UF 4UF 4UF 4UF 4UF A14 ROOM=PMU
20% 20% 20% 20% 20%
2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V B14
CERM-X5R CERM-X5R CERM-X5R CERM-X5R CERM-X5R
C 0201
ROOM=PMU
0201
ROOM=PMU
0201
ROOM=PMU
0201
ROOM=PMU
0201
ROOM=PMU
C14
D14
VDD_BUCK1_01 C
BUCK11_FB J15 BUCK11_FB 13 20
A10 IN
BUCK INPUT
E1
E2 VDD_BUCK3
V10
W10 VDD_BUCK4
Y10
V2
W2
VDD_BUCK5
Y2
J1
J2 VDD_BUCK6
Y15
B Y16
B
VDD_BUCK7
Y17
B18
C18 VDD_BUCK8
A7
B7 VDD_BUCK9
A3
B3 VDD_BUCK10
H17
H18 VDD_BUCK11
A SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
43 42 41 34 31 27 23 21 19 18
PP_VDD_MAIN
50 46 45
OMIT
XW2991
SHORT-20L-0.05MM-SM
20 OUT
PMU_PRE_UVLO_DET 2 1
ROOM=PMU
D D
50 38 34 27 21 19
PP_VDD_BOOST
OMIT_TABLE OMIT_TABLE
XW2995
OMIT 1 C2970 1 C2971
SHORT-20L-0.05MM-SM
2.2UF 2.2UF
20% 20%
20 OUT
PMU_LDO5_UVLO_DET 2 1 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
ROOM=PMU 0201 0201
ROOM=CAM_PMU ROOM=CAM_PMU
U2700
C D2422B0 C
WLCSP
PP_VDD_MAIN K4 VDD_LDO0 SYM 1 OF 5 VLDO0 K3 PP2V5_LDO0_S2
U2700 43 42 41 34 31 27 23 21 19 18
50 46 45
PP_VDD_BOOST N4 VDD_LDO1
ROOM=PMU
VLDO1 N3 PP3V3_USB
19
LDO1
D2422B0 50 38 34 27 21 19 6
LDO5
2.2UF 2.2UF 16
A18 L6 20% 20% W1 VDD_LDO5
6.3V 6.3V
A5 M7 X5R-CERM 2 X5R-CERM 2 L1 VDD_LDO6 VLDO6 L2 PP_ACC_VAR 46 48 LDO6
0201 0201
A8 M11 ROOM=PMU ROOM=PMU K1 VDD_BYPASS VBYPASS K2
B12 N7
LDO INPUT
B16 N15 M1 VDD_LDO7 VLDO7 M2 PP3V0_S2 36 45 47 48 50 LDO7
B5 N8 R2 VDD_LDO8 VLDO8 P2 PP0V9_NAND 16 LDO8
B8 N9 M6 VDD_LDO9 VLDO9 N6 PP1V8_ALWAYS 20 23 LDO9
C12 P10 R6 VDD_LDO10
C15 P11 27 17
PP1V25_S2 R4 VDD_LDO11
C16 P15 L4 VDD_LDO12 VLDO10 P6 PP3V0_DISPLAY 43 LDO10
C17 P16 R3 VDD_LDO13 VLDO11 P4 PP1V2_SOC 7 9 13 14 LDO11
C3 P17 T1 L3 LDO12
LDO
VDD_LDO14 VLDO12 NC
C4 P18 VLDO13 P3 PP1V2_CODEC_S2 38 LDO13
M5 VDD_VBUF
C5 P8 VLDO14 T2 PP1V0_DISPLAY_DVDD 43 LDO14
C6 P9 19
PP2V5_LDO0_S2 J4 VCC_LDOG
C7 R15
C8 R8 E14 VPP_OTP
D11 T3 PMU_VSS_RTC
20
D12 T5
B D13 T6 B
D15 T9
D16 U10 VBUF_1V2 N5 PP1V2_LPADC 14 VBUF_1V2
D17 VSS VSS U11 T14 TP_DET
NC
D18 U12 OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE
D8 U15 1 C2901 1 C2906 1 C2909 1 C2911 1 C2913
D9 U3 VPUMP D3 PMU_VPUMP 2.2UF 2.2UF 1.0UF 2.2UF 2.2UF
20% 20% 20% 20% 20%
E11 U4 2 6.3V 2 6.3V 2 6.3V 6.3V
2 X5R-CERM 2 6.3V
X5R-CERM X5R-CERM X5R X5R-CERM
E12 U5 0201 0201 0201-1 0201 0201
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
E13 U6
E18 U7 OMIT_TABLE OMIT_TABLE
OMIT_TABLE OMIT_TABLE OMIT_TABLE
E3 U8 1 C2920 1 C2900 1 C2903 1 C2907 1 C2910 1 C2914 1 C2915
F16 U9 47NF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 0.22UF
20% 20% 20% 20% 20% 20% 20%
F17 V12 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V
X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R
F18 V15 01005 0201 0201 0201 0201 0201 01005-1
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
F3 V16
F5 V17
G1 V18
G15 V4 VPUMP: 10nF min. @4.6V
G16 V8
G2 N12
G3 W12
G5 W15
H16 W4
H3 W8
A H5
J13
Y1
Y12 SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
J14 Y13
J16 Y14 SYSTEM POWER: PMU LDOs (3/4)
J5 DRAWING NUMBER SIZE
Y18
K14 Y4 051-02221 D
K16 Y8
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
Ansel AMUX R3010
1
200K 2
CRITICAL
CAMPMU_TO_PMU_AMUX 20 28
U2700 1%
1/20W
1 C3071 D2422B0
WLCSP
MF
201
1000PF ROOM=PMU
10% AP_TO_PMU_WDOG_RESET P13
RESET_IN1 SYM 4 OF 5
2 10V
6 IN
IREF R10 PMU_IREF
X5R
01005 48 IN
HYDRA_TO_PMU_HOST_RESET P12
RESET_IN2
ROOM=PMU
C3010
ROOM=PMU AP_TO_PMU_SOCHOT_L N13 0.22UF
RESET_IN3
RESETS
6 4 IN
VREF R9 PMU_VREF 1 2
REFS
20 6 OUT
PMU_TO_SYSTEM_COLD_RESET_L R12
RESET*
H15 SHDN 20%
NC 6.3V
COLD_RESET & SYSTEM_ALIVE X5R
0201
ROOM=PMU
PP1V8_S2 10 12 14 17 22 38 46 47 48 49
50
1 1
R3061 R3062 48 6 4
PMU_TO_AP_HYDRA_ACTIVE_READY M12 ACTIVE_RDY
PMU_TO_AP_PRE_UVLO_L
PRE_UVLO M14
OUT
100K 100K OUT 4 6 11
5% 5% PMU_TO_AOP_CLK32K G6 SLEEP_32K
1/32W 1/32W 12 OUT
MF MF PMU_TO_TOUCH_CLK32K_RESET_L H6 OUT_32K
2 01005
ROOM=PMU
2 01005
ROOM=PMU
R3000 50 OUT
VDROOP0 P14 PMU_TO_AP_THROTTLE_PCORE_L OUT 6
100
COMPARATOR
SYSTEM_ALIVE 14 16 20 23 23 20 16 14
SYSTEM_ALIVE 1 2 SYSTEM_ALIVE_R K13 SYS_ALIVE VDROOP1 E16 PMU_TO_AP_THROTTLE_GPU0_L 6
OUT OUT
PMU_TO_SYSTEM_COLD_RESET_L 6 20 1% 50 28 21 12 8 IN
AP_TO_MANY_BSYNC M13 FORCE_SYNC VDROOP11 L15 PMU_TO_AP_THROTTLE_ECORE_L OUT 6
1/32W PMU_TO_SEP_DOUBLE_CLICK_DET
MF L12 DBL_CLICK_DET
01005
10 OUT
VDROOP0_DET R14 AP_CPU_PCORE_SENSE
PMU_TO_AOP_IRQ_L N14 IRQ* IN 4 13
ROOM=PMU 12 OUT
VDROOP1_DET E15 AP_VDD_GPU_SENSE IN 4 13
49 46 10
I2C0_AP_SCL M8 SCL VDROOP11_DET K15
BUCK11_FB 13 18
IN IN
I2C0_AP_SDA L8 SDA
49 46 10 BI
PRE_UVLO_DET L13 PMU_PRE_UVLO_DET
SPMI_PMGR_TO_PMU_SCLK K7 SCLK
IN 19
10 IN
LDO5_UVLO_DET U2 PMU_LDO5_UVLO_DET
C 10 4 OUT
SPMI_PMU_BI_PMGR_SDATA L7 SDATA
IN 19
C
NTCs IBAT T11
NC
VBAT T10
FOREHEAD NTC NC
HYDRA_TO_PMU_USB_BRICK_ID PP1V8_ALWAYS 19
ADC
BRICK_ID1 N11 20 48 20 23
IN
6
AP_TO_PMU_AMUX_OUT D4 AMUX_A0 BRICK_ID2 N10 1
R3074 NOSTUFF
IN NC
1 D5 AMUX_A1 ADC_IN R11 ACORN_TO_PMU_ADC 20 42 31.6K
OMIT NC IN
CAMPMU_TO_PMU_AMUX D6 AMUX_A2
1%
1/32W
C3041 1
R3041 FOREHEAD_NTC XW3041 28 20 IN
D7 AMUX_A3
MF
100PF SHORT-20L-0.05MM-SM NC BUTTON1 G14 BUTTON_VOL_DOWN_L 2 01005
5% 10KOHM-1% FOREHEAD_NTC_RETURN 1 2 F9 AMUX_A4 BUTTON_POWER_KEY_L IN 25
ROOM=PMU
16V 2 NC BUTTON2 H14
NP0-C0G 01005 ROOM=PMU 48 20
HYDRA_TO_PMU_USB_BRICK_ID F10 AMUX_A5 BUTTON_VOL_UP_L
IN 33
01005 IN
BUTTON3 F13
BUTTONS
ROOM=PMU 25
2 E6 IN
AMUX
ROOM=PMU
NC AMUX_A6 G13 BUTTON_RINGER_A
ACC_BUCK_TO_PMU_AMUX E7 BUTTON4 IN 25
46 IN AMUX_A7
50 OUT
PMU_AMUX_AY E8 AMUX_AY BUTTONO1 K6 PMU_TO_AP_BUTTON_VOL_DOWN_L OUT 11
BUTTONO2 J7 PMU_TO_AP_BUTTON_POWER_KEY_L
1
R3011 ACORN_TO_PMU_ADC F6 AMUX_B0
OUT 11
42 20
BUTTONO3 J6 PMU_TO_AP_BUTTON_VOL_UP_L
200K 11 IN
AP_TO_PMU_AMUX_SYNC G7 AMUX_B1
OUT 11
OMIT ROOM=PMU
50 20
PMU_TO_WLAN_CLK32K E9 AMUX_B4 GPIO2 F12 PMU_TO_AP_THROTTLE_GPU1_L OUT 6 5%
RIGEL_TO_ISP_INT 1/32W
XW3042 E10 G9 TIGRIS_TO_PMU_INT_L
C3042 1 R3042 REAR_CAMERA_NTC SHORT-20L-0.05MM-SM
34 8 4 IN
AP_TO_PMU_TEST_CLKOUT F8
AMUX_B5 GPIO3
G10 WLAN_TO_PMU_HOST_WAKE
IN 23 MF
01005
100PF 10KOHM-1% RCAM_NTC_RETURN 1 2 6 4 IN AMUX_B6 GPIO4 IN 50 ROOM=PMU
5% H7 AMUX_B7 GPIO5 G11 NFC_TO_PMU_HOST_WAKE 50
16V 2 01005 NC IN
NP0-C0G
01005 2 ROOM=PMU
ROOM=PMU
50 OUT
PMU_AMUX_BY H8 AMUX_BY GPIO6 G12
NC
R3072
ROOM=PMU H9 PMU_TO_GNSS_EN_R 1
100 2 PMU_TO_GNSS_EN
GPIO7 OUT 50
20
FOREHEAD_NTC T12 TDEV1 GPIO8 H10 PMU_TO_WLAN_CLK32K OUT 20 50 5%
1/32W
20
REAR_CAMERA_NTC T13 TDEV2 GPIO9 H11 PMU_TO_BT_REG_ON OUT 50 MF
01005
RADIO_PA_NTC U13 H12 BT_TO_PMU_HOST_WAKE
B TDEV3 GPIO10
B
GPIO
50 50
NTC
IN ROOM=PMU
20
AP_NTC V13 TDEV4 GPIO11 J8 CODEC_TO_PMU_WAKE IN 38
CHARGER_NTC W13 J9
20
PMU_TCAL V14
TDEV5 GPIO12
J10
NC R3071
TCAL GPIO13 NC 1
20.0K 2 PMU_HYDRA_TO_AP_FORCE_DFU
GPIO14 J11 PMU_TO_WLAN_REG_ON BI 11 48
50
1 C3020 1
R3020 PMU_VSS_RTC R1 XTAL1 GPIO15 J12 PMU_TO_BB_USB_VBUS_DETECT
OUT 50
5%
1/32W
100PF 3.92K 20 19 OUT 50
XTAL
MF
5% TCXO_PMU_32K P1 XTAL2 GPIO16 K8 01005
RADIO PA NTC on MLB Bottom 2 16V
NP0-C0G
0.1%
1/20W K9
NC
PMU_TO_AP_FORCE_DFU_R ROOM=PMU
01005 MF GPIO17
ROOM=PMU
2 0201
PMU_VDD_RTC L5 VDD_RTC GPIO18 K10 PMU_TO_CCG2_RESET_L OUT 47
R3070
ROOM=PMU
K11 PMU_TO_BBPMU_RESET_R_L 1
1.00K 2 PMU_TO_BBPMU_RESET_L
GPIO19 OUT 50
PMU_VDD_REF J3 VDD_REF GPIO20 K12 PMU_TO_NAND_LOW_BATT_BOOT_L OUT 16 5%
1/32W
L9 BB_TO_PMU_PCIE_HOST_WAKE_L
R3001 1 C3030 1 C3031 GPIO21
L10 PMU_TO_IKTARA_EN_EXT_1P8V
IN 50 MF
01005
PP1V8_ALWAYS 1
0.00 2 PP1V8_ALWAYS_XO 0.22UF 1UF GPIO22 OUT 50 ROOM=PMU
23 20 19
20% 20% GPIO23 L11 PMU_TO_BOOST_EN OUT 21
0% 2 6.3V 2 6.3V M9
1/32W X5R X5R GPIO24 PMU_TO_DISPLAY_PANICB OUT 43
AP NTC MF ROOM=PMU
0201 0201
M10
01005 1 C3002 ROOM=PMU ROOM=PMU GPIO25 NC
0.1UF
3
C3044 1
R3044 AP_NTC XW3044 01005
ROOM=PMU Y3000
100PF SHORT-20L-0.05MM-SM 32.768KHZ-10PPM
5%
16V 2
10KOHM-1% AP_NTC_RETURN 1 2 CSP
NP0-C0G 01005 ROOM=PMU
1 NC CLKOUT 2
01005 ROOM=PMU
NC CRITICAL
ROOM=PMU 2
ROOM=PMU
GND
4
PMU_VSS_RTC
A CHARGER NTC
20 19
SYNC_MASTER=test_mlb SYNC_DATE=11/01/2016
A
1 PAGE TITLE
ROOM=PMU
1
OMIT
SHORT-20L-0.05MM-SM SYSTEM POWER: PMU (4/4)
I609 XW3000 DRAWING NUMBER SIZE
C3045 1
R3045 CHARGER_NTC XW3045 2 OMIT 051-02221 D
100PF
CHARGER_NTC_RETURN
SHORT-20L-0.05MM-SM Apple Inc. REVISION
5% 10KOHM-1% 1 2
16V
NP0-C0G 2 01005 ROOM=PMU
9.0.0
01005 ROOM=PMU NOTICE OF PROPRIETARY PROPERTY: BRANCH
ROOM=PMU 2
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
evt-1
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
30 OF 80
NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
D D
BOOST
C C
45 43 42 41 34 31 27 23 19 18
PP_VDD_MAIN 353S01124
50 46
1 C3190 1 ROOM=BOOST
18UF When VDD_MAIN < 3.4, boosts to 3.4
20% Otherwise tracks VDD_MAIN
2 6.3V
CER-X5R L3100
0402-0.1MM 0.47UH-20%-4A-0.048OHM A3 VIN VOUT B3 PP_VDD_BOOST 19 27 34 38 50
ROOM=BOOST PIWA20120H-SM
A4 VIN U3100 VOUT B4
SN61280E
1 C3110 1 C3111 1 C3112 1 C3113 1 C3114 1 C3115
2 C3 SW 18UF 18UF 18UF 18UF 18UF 220PF
CSP 20% 20% 20% 20% 20% 5%
SYS_BOOST_LX C4 SW 2 6.3V
CER-X5R 2 6.3V
CER-X5R 2 6.3V
CER-X5R 2 6.3V
CER-X5R 2 6.3V
CER-X5R 2 10V
C0G-CERM
ROOM=BOOST 0402-0.1MM 0402-0.1MM 0402-0.1MM 0402-0.1MM 0402-0.1MM 01005
21 20 IN
PMU_TO_BOOST_EN A1 EN CRITICAL ROOM=BOOST ROOM=BOOST ROOM=BOOST ROOM=BOOST ROOM=BOOST ROOM=BOOST
I2C0_SMC_SCL B2
R3110 50 47 23 22 10 IN SCL
I2C0_SMC_SDA 1
39.2 2 I2C0_SMC_SDA_BOOST C2
50 47 23 22 10 BI SDA
1%
1/32W B1 VSEL
MF
01005
ROOM=BOOST C1 BYP*
50 28 20 12 8 IN
AP_TO_MANY_BSYNC A2 GPIO
PGND
AGND
D2
D3
D4
D1
B B
A SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
BATTERY CONNECTOR
Rcpt: 516S00232 <-- This one on MLB Gas gauge I2C level translator
Plug: 516S00233
Q3200
SYM_VER_1
RV1C002UN
SM
ROOM=B2B_BATTERY
CRITICAL
XW3200 R3202
SHORT-20L-0.05MM-SM I2C0_SMC_BI_GG_SDA_CONN I2C0_SMC_BI_GG_SDA 33 I2C0_SMC_SDA
S
D
1 2
2
23 OUT
VBATT_SENSE 2 1 CKPLUS_WAIVE=I2C_PULLUP
BI 10 21 23 47 50
5%
C ROOM=B2B_BATTERY
PLACE_NEAR=J3200:2mm J3200
1 C3202
56PF
1/32W
MF C
NO_XNET_CONNECTION=1 01005
B2B-BATT-RCPT 5%
G
ROOM=B2B_BATTERY
F-ST-SM 2 25V
NP0-C0G-CERM
1
9 01005
ROOM=B2B_BATTERY
5 6
PP_BATT_VCC 1 3 PP1V8_S2 10 12 14 17 20 38 46 47 48 49
50 23 50
2 4
1 C3292 1 C3293 1 C3294
56PF 330PF 220PF 7 8
5% 10% 10%
2 25V 2 16V 2 10V
1
NP0-C0G-CERM CER-X7R X7R-CERM 10
G
01005 01005 01005
ROOM=B2B_BATTERY ROOM=B2B_BATTERY ROOM=B2B_BATTERY ROOM=B2B_BATTERY
R3201
I2C0_SMC_TO_GG_SCL_CONN I2C0_SMC_TO_GG_SCL 2
33 1 I2C0_SMC_SCL IN 10 21 23 47 50
2
D
CKPLUS_WAIVE=I2C_PULLUP
S
5%
1 C3201 1/32W
MF
56PF 01005
5%
SYM_VER_1
Q3201 2 25V
NP0-C0G-CERM
ROOM=B2B_BATTERY
RV1C002UN 01005
ROOM=B2B_BATTERY
SM
ROOM=B2B_BATTERY
CRITICAL
B B
A SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
TIGRIS2 CHARGER
D D
PP_VDD_MAIN
18 19 21 27 31 34 41 42 43 45
46 50
TIGRIS_PMID1
1 C3390 1 C3391
18UF 18UF
20% 20%
DZ3300 K 1 C3310 1 C3311 1 C3312 1 C3313 1 C3314 1 C3315 2 6.3V
CER-X5R 2 6.3V
CER-X5R
BZT52C20LP R3316 1 4.7UF 4.7UF 220PF 220PF 220PF 220PF 0402-0.1MM 0402-0.1MM
DFN10062 50K C3316 1 C3317 1 20%
2 25V
20%
25V
2 CER-X5R
5%
2 25V
5%
2 25V
5%
2 25V
5%
2 25V
ROOM=CHARGER ROOM=CHARGER
C TIGRIS_PMID2
TIGRIS_LDO
C
1 C3320 1 C3322 1 C3323 1 C3324 1 C3325
C2
D2
A2
B2
E2
VDD_MAIN5 F2
4.7UF
20% 5%
220PF
5%
220PF
5%
220PF
5%
220PF 1 C3360 1 C3361
VDD_MAIN
VDD_MAIN
VDD_MAIN
VDD_MAIN
VDD_MAIN
2 25V 2 25V
COG 2 25V
COG 2 25V
COG 2 25V
COG
220PF 4UF
CER-X5R 10% 20%
0402 01005 01005 01005 01005 2 10V 2 6.3V
A2
A3
B1
B2
B3
ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER X7R-CERM CERM-X5R
01005 0201 CRITICAL
ROOM=CHARGER ROOM=CHARGER S
Q3350
PP_VBUS1_E75 CSD68841W
49 A1
G BGA
1 C3301 1 C3302 1 C3303 1 C3304 A6 PMID1 LDO H3 C3340 ROOM=CHARGER
C1
C2
C3
ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER D6 PMID1 ROOM=CHARGER
BUCK_SW A7 10%
CRITICAL 25V
E6 PMID1 BUCK_SW B7 X5R
0201 CRITICAL CRITICAL
BUCK_SW C7 ROOM=CHARGER
F6 PMID2
BUCK_SW D7
NO_XNET_CONNECTION L3340 L3341
50
PP_VBUS2_IKTARA G6 PMID2
0.47UH-6.8A-0.046OHM 0.47UH-6.8A-0.046OHM
BUCK_SW E7
H6 PMID2 TIGRIS_LX 1 2 TIGRIS_LX_MID 1 2
1 C3305 1 C3306 1 C3307 1 C3308 BUCK_SW F7
3225 3225
10%
1UF
5%
220PF
5%
220PF
5%
220PF A5 VBUS1 BUCK_SW G7 ROOM=CHARGER ROOM=CHARGER
C3341 1 C3342 1 C3343 1
2 25V 2 25V
COG 2 25V
COG 2 25V
COG
B5 VBUS1 BUCK_SW H7 220PF 220PF 330PF
X5R 5% 5% 10%
402 01005 01005 01005 C5 10V 10V 16V
ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER
VBUS1
BATT A1 C0G-CERM 2 C0G-CERM 2 CER-X7R 2
D5 VBUS1 01005 01005 01005
BATT B1 ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER
E5 VBUS1
BATT C1
F5 VBUS2 BATT D1
G5 VBUS2 BATT E1 PP_BATT_VCC 22 50
B 20 19
PP1V8_ALWAYS H5 VBUS2
BATT_SNS F1 VBATT_SENSE B
I2C0_SMC_SDA F3 SDA
IN 22
1 C3350 1 C3351 1 C3352 1 C3353
1
R3330
50 47 22 21 10 BI
ACT_DIODE A3 TIGRIS_ACTIVE_DIODE 330PF 4UF 4UF 220PF
50 47 22 21 10
I2C0_SMC_SCL G2 SCL 10% 20% 20% 5%
2 16V 2 6.3V 2 6.3V 2 10V
IN
100K NOSTUFF CER-X7R CERM-X5R CERM-X5R C0G-CERM
5% SYSTEM_ALIVE F4 G3
1/32W
MF
20 16 14 IN SYS_ALIVE HDQ_HOST
G4
R33501 01005
ROOM=CHARGER
0201
ROOM=CHARGER
0201
ROOM=CHARGER
01005
ROOM=CHARGER
1% 5%
1/32W TIGRIS_VBUS_DETECT C4 VBUS1_DET NC0 D3 1/32W
MF G1 MF
01005 NC1 01005
ROOM=CHARGER
D4 TEST ROOM=CHARGER
NC2 H1
R3332 23
BATTERY_NTC E4 NTC NC3 H2
USB_VBUS_DETECT 1
30.1K 2
6 OUT
1% GND AGND
1/32W
MF
A8
C8
D8
E8
F8
G8
H8
B8
01005
ROOM=CHARGER
BATTERY NTC
A SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
1
I251
OMIT SYSTEM POWER: Charger
C3370 1
R3370 BATTERY_NTC XW3370
SHORT-20L-0.05MM-SM
DRAWING NUMBER
051-02221
SIZE
D
100PF 23
Apple Inc.
5%
16V
10KOHM-1% BATTERY_NTC_RETURN 1 2 REVISION
NP0-C0G 2 01005 ROOM=CHARGER 9.0.0
01005 ROOM=CHARGER
ROOM=CHARGER 2 NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
C C
B B
A A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
J3500
Cyclone Filtering AA36D-S04VA1
F-ST-SM
D 25
BUTTON_VOL_DOWN_CONN_L 9 10 D
50
IKTARA_COIL2 IKTARA_COIL2 25 25
IKTARA_COIL2 5 PWR
6
MAKE_BASE=TRUE
1 C3500 1 C3501 BUTTON_VOL_UP_CONN_L 1 2 COMPASS_TO_AOP_INT_BTN_CONN
220PF 220PF 25
BUTTON_RINGER_A_CONN I2C1_AOP_TO_COMPASS_SCL_BTN_CONN
25
2% 2% 25
3 4 25
2 50V
C0G 2 50V
C0G
0201 0201
ROOM=B2B_BUTTON ROOM=B2B_BUTTON
25
IKTARA_COIL1 7 PWR
8 I2C1_AOP_BI_COMPASS_SDA_BTN_CONN 25
25
PP1V8_IMU_COMPASS_BTN_CONN 11 12
ROOM=B2B_BUTTON
50
IKTARA_COIL1 IKTARA_COIL1 25
MAKE_BASE=TRUE
1 C3510 1 C3511
220PF 220PF
2% 2%
2 50V
C0G 2 50V
C0G
0201 0201
ROOM=B2B_BUTTON ROOM=B2B_BUTTON
C C
BUTTONS
R3520
BUTTON_RINGER_A 1
100 2 BUTTON_RINGER_A_CONN
20 OUT 25
5%
C3520 1 1/32W 1
27PF
5%
MF
01005 DZ3520
6.3V 2 ROOM=B2B_BUTTON 0201
NP0-C0G 5.5V-6.2PF
0201 ROOM=B2B_BUTTON
ROOM=B2B_BUTTON 2
R3530
BUTTON_VOL_DOWN_L 1
100 2 BUTTON_VOL_DOWN_CONN_L
20 OUT 25
5%
C3530 1 1/32W
MF
1 DZ3530
220PF 01005 12V-33PF
01005-1
5% ROOM=B2B_BUTTON ROOM=B2B_BUTTON
10V 2 2
C0G-CERM
01005
ROOM=B2B_BUTTON
R3540
BUTTON_VOL_UP_L 1
100 2 BUTTON_VOL_UP_CONN_L
20 OUT 25
B 5%
1/32W 1 DZ3540 B
C3540 1 MF
01005 12V-33PF
220PF ROOM=B2B_BUTTON
01005-1
5% 2 ROOM=B2B_BUTTON
10V 2
C0G-CERM
01005
ROOM=B2B_BUTTON
D D
Graphite - Accel & Gyro Magnesium - Compass
(On Dock or Button Flex)
APN: 338S00304
PP1V8_IMU_S2 17 25 26 49
49 26 25 17
PP1V8_IMU_S2 OMIT_TABLE
1 C3600 1 C3601 1 C3602
0.1UF 0.1UF 2.2UF
20% 20% 20%
1 2 6.3V 2 6.3V 2 6.3V
R3601 X5R-CERM
01005
X5R-CERM
01005
X5R-CERM
0201
100K
5% ROOM=CARBON ROOM=CARBON ROOM=CARBON
1/32W
MF
16
01005 2
1
ROOM=CARBON
VDDIO
VDD
CRITICAL
U3600
BMI262BB
LGA
12 IN
SPI_AOP_TO_ACCEL_GYRO_CS_L 5 CSB ROOM=CARBON
SCLK 2 SPI_AOP_TO_IMU_SCLK IN 4 12 26
15 SM
MOSI 3 SPI_AOP_TO_IMU_MOSI IN 4 12 26
12 4 OUT
ACCEL_GYRO_TO_AOP_DATARDY 6 INT MISO 4 SPI_IMU_TO_AOP_MISO OUT 4 12 26
ACCEL_GYRO_TO_AOP_INT 7 MOTION_INT
C 12 4 OUT
C
GND
GND
GND
GND
GND
GND
GND
8
9
10
11
12
13
14
CARBON_REGOUT
1
R3600
0.00
0%
1/32W
MF
2 01005
ROOM=CARBON
B B
Phosphorus
BOSCH (APN:338S00188)
ST (APN:338S00230)
49 26 25 17
PP1V8_IMU_S2 PP1V8_IMU_S2 17 25 26 49
OMIT_TABLE
1 C3620 1 C3622
0.1UF 2.2UF
R36201 20%
2 6.3V
X5R-CERM
20%
2 6.3V
X5R-CERM
100K 01005 0201
5% ROOM=PHOSPHORUS ROOM=PHOSPHORUS
1/32W
MF
01005 2
A ROOM=CARBON
A
8
SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
Camera PMU
45 43 42 41 34 31 23 21 19 18
PP_VDD_MAIN
50 46
ROOM=CAM_PMU
OMIT
C5 VDD_MAIN
E2 VDD_MAIN
G4 VDD_MAIN
U3700
D2462
WLCSP
C 50 38 34 21 19
PP_VDD_BOOST A1 VDD_LDO4_17 SYM 2 OF 4
VLDO4 B2
PP2V85_FCAM_AVDD 32 C
H2 VDD_LDO9 VLDO9 J2
PP_CAM_WIDE_ADC 29
1 C3795 1 C3796 PP1V1_CAM_TELE_JULIET_DVDD 35
4UF
20%
4UF
20%
1 C3704 1 C3709
2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 20%
2.2UF 2.2UF
20%
Q3700
0201 0201 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
DMN1017UCP3
ROOM=CAM_PMU ROOM=CAM_PMU 0201 0201 X3-DSN1010-3
ROOM=CAM_PMU ROOM=CAM_PMU
S
2
3
19 17 30
B5 VDD_LDO15 VLDO15 A5
PP1V1_FCAM_DVDD 32
1 C3797 1 C3798
4UF 4UF OMIT_TABLE
G
20%
2 4V
20%
2 4V
1 C3710 1 C3715 ROOM=CAM_PMU
X5R X5R 10UF 2.2UF
1
0201 0201 20% 20% CRITICAL
ROOM=CAM_PMU ROOM=CAM_PMU LDO INPUT LDO OUTPUT 2 10V
X5R-CERM 2 6.3V
X5R-CERM CAMPMU_TELE_DVDD_DISABLE_L
0402-0.1MM 0201 IN 28
ROOM=CAM_PMU ROOM=CAM_PMU
A2 VDD_LDO4_17 VLDO17 B1
PP2V85_CAM_TELE_AVDD 30 35
B4 VDD_LDO18 VLDO18 A4
PP1V1_CAM_WIDE_DVDD 29
1 C3717 1 C3718
2.2UF 2.2UF
20% 20%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
0201
ROOM=CAM_PMU
0201
ROOM=CAM_PMU
1 C3721 1 C3722
2.2UF 2.2UF
20% 20%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
0201
ROOM=CAM_PMU
0201
ROOM=CAM_PMU
For GPIO pullups only
30 29 28 17 16 14 10 8 7 6 5 PP1V8_IO H3 VBUCK3 BUCK3_SW1 J3
43 35 34 32 NC
SW INPUT SW OUTPUT
J4 VPUMP
NC
ON_BUF F2 CAMPMU_ON_BUF
C3750 1
0.22UF
20%
6.3V 2
X5R
01005
ROOM=CAM_PMU
A SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
Pull Downs
AP_TO_CAMPMU_RESET_L 11 28
1
R3801
100K
5%
1/32W
MF
2 01005
ROOM=CAM_PMU
D D
PP3V3_SVDD 27 29 30 35
1
R3820
100K
5%
U3700 1/32W
MF
D2462 2 01005
ROOM=CAM_PMU
WLCSP
R3802 35 34 31 8 IN
I2C3_ISP_SCL E8 SCL
SYM 3 OF 4
GPIO1 F6 CAMPMU_TO_STROBE_DRIVER_HWEN OUT 31
I2C3_ISP_SDA 1
33.2 2 I2C3_ISP_SDA_U3700 F8 E6
35 34 31 8 BI SDA I2C GPIO2 NC
1% GPIO3 D7
NC
1/32W
MF R3803 GPIO4 E4
NC
CAMPMU_TO_AP_IRQ_L 01005
1
49.9 2 CAMPMU_TO_AP_IRQ_R_L D8 D4
11 OUT IRQ* GPIO5 NC
1% GPIO6 D3 CAMPMU_TO_RIGEL_ENABLE 4 34
1/32W D6 CRASH*
OUT
MF NC RESET
GPIO9 F7 PP1V8_IO MAKE_BASE=TRUE PP1V8_IO 5 6 7 8 10 14 16 17 27 29 30 32
34 35 43
01005
28 11 IN
AP_TO_CAMPMU_RESET_L F5 RESET_IN GPIO10 F3 AP_TO_MANY_BSYNC IN 8 12 20 21 50
R3811
G3 YOGI_TO_RIGEL_STATUS_R 1
10K 2 YOGI_TO_RIGEL_STATUS
GPIO11 IN 34 36
ATM E7
U3700
B D2462
WLCSP
B
C2 SYM 4 OF 4 G6
VSS VSS
C3 VSS VSS G7
C4 VSS VSS G8
C7 VSS VSS H4
D2 VSS VSS H6
D5 VSS VSS J1
E5 VSS VSS J6
F1 VSS VSS F4
A SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
10-OHM-750MA
D 1 2 30 28 27 17 16 14 10 8 7 6 5
PP1V8_IO 1 2 PP1V8_CAM_WIDE_VDDIO_CONN 29
D
43 35 34 32
90_LPDP_WIDE_TO_AP_D0_CONN_N GND_VOID 3 4 01005-1
29
90_LPDP_WIDE_TO_AP_D0_CONN_P GND_VOID 5 6 LPDP_WIDE_BI_AP_AUX_CONN ROOM=B2B_WIDE_RCAM
1 C3995 1 C3996
29 29
0.1UF 220PF
7 8 I2C0_ISP_BI_WIDE_RCAM_OIS_SDA_CONN 29
20% 5%
90_LPDP_WIDE_TO_AP_D1_CONN_N GND_VOID 9 10 I2C0_ISP_TO_WIDE_RCAM_OIS_SCL_CONN 2 6.3V
X5R-CERM 2 10V
C0G-CERM
29 29 01005 01005
29
90_LPDP_WIDE_TO_AP_D1_CONN_P GND_VOID 11 12 WIDE_AND_TELE_TO_LED_DRIVER_STROBE_EN_CONN 29 30
ROOM=B2B_WIDE_RCAM ROOM=B2B_WIDE_RCAM
13 14 AP_TO_WIDE_SHUTDOWN_CONN_L 29 35 30 29 28 27
PP3V3_SVDD
29
90_LPDP_WIDE_TO_AP_D2_CONN_N GND_VOID 15 16 WIDE_TO_TELE_SYNC_J3900_CONN 30
29
90_LPDP_WIDE_TO_AP_D2_CONN_P GND_VOID 17 18 PP1V8_CAM_WIDE_VDDIO_CONN 29 29 27
PP2V85_CAM_WIDE_AVDD
19 20 PP_CAM_VCM_PVDD_CONN 29 30 29 27
PP_CAM_WIDE_ADC
29
AP_TO_WIDE_CLK_CONN 21 22 PP3V3_SVDD 27 28 29 30 35 30 29 PP_CAM_VCM_PVDD_CONN
23 24 PP2V85_CAM_WIDE_AVDD
25 26 PP_CAM_WIDE_ADC
27 29
1 C3990 1 C3991 1 C3992 1 C3994
27 29
220PF 220PF 220PF 220PF
5% 5% 5% 5%
29 30 2 10V
C0G-CERM 2 10V
C0G-CERM 2 10V
C0G-CERM 2 10V
C0G-CERM
01005 01005 01005 01005
32 ROOM=B2B_WIDE_RCAM ROOM=B2B_WIDE_RCAM ROOM=B2B_WIDE_RCAM ROOM=B2B_WIDE_RCAM
ROOM=B2B_WIDE_RCAM
FL3903
33-OHM-25%-1500MA
27
PP1V1_CAM_WIDE_DVDD 1 2
PP1V1_CAM_WIDE_DVDD_CONN 29
OMIT_TABLE NOSTUFF
0201
ROOM=B2B_TELE_CAM 1 C3925 1 C3993 1 C3928
2.2UF 220PF 15PF
20% 5% 5%
2 6.3V
X5R-CERM 2 10V
C0G-CERM 2 16V
NP0-C0G-CERM
0201 01005 01005
ROOM=B2B_TELE_RCAM ROOM=B2B_WIDE_RCAM ROOM=B2B_WIDE_RCAM
C ISP I2C C
LPDP Filters
R3900 C3930
I2C0_ISP_SCL 1
0.00 2 I2C0_ISP_TO_WIDE_RCAM_OIS_SCL_CONN
8 IN 29 0.1UF
0%
CKPLUS_WAIVE=I2C_PULLUP 90_LPDP_WIDE_TO_AP_D0_P 1 2 90_LPDP_WIDE_TO_AP_D0_CONN_P
1/32W
MF
1 C3900 9 BI
ROOM=B2B_WIDE_RCAM GND_VOID=TRUE
29
C3941
0.1UF
9 IN
90_LPDP_WIDE_TO_AP_D1_N 1 2 90_LPDP_WIDE_TO_AP_D1_CONN_N 29
GND_VOID=TRUE
ROOM=B2B_WIDE_RCAM
20%
B 6.3V
X5R-CERM
01005
B
C3950
0.1UF
9 IN
90_LPDP_WIDE_TO_AP_D2_P 1 2 90_LPDP_WIDE_TO_AP_D2_CONN_P 29
ROOM=B2B_WIDE_RCAM GND_VOID=TRUE
IO Filters 20%
6.3V
X5R-CERM
01005
R3905 C3951
49.9 0.1UF
8
AP_TO_WIDE_CLK 1 2 AP_TO_WIDE_CLK_CONN 29 9
90_LPDP_WIDE_TO_AP_D2_N 1 2 90_LPDP_WIDE_TO_AP_D2_CONN_N 29
IN IN
NOSTUFF GND_VOID=TRUE
1%
1/32W
MF
1 C3906 ROOM=B2B_WIDE_RCAM
20%
6.3V
01005 56PF X5R-CERM
ROOM=B2B_WIDE_RCAM 5% 01005
2 25V
NP0-C0G-CERM
01005 C3960
ROOM=B2B_WIDE_RCAM
0.1UF
LPDP_WIDE_BI_AP_AUX 1 2 LPDP_WIDE_BI_AP_AUX_CONN
9 BI 29
20%
6.3V
1 C3961
X5R-CERM 56PF
01005 5%
ROOM=B2B_WIDE_RCAM
2 25V
NP0-C0G-CERM
R3907 01005
AP_TO_WIDE_SHUTDOWN_L 1
0.00 2 AP_TO_WIDE_SHUTDOWN_CONN_L
ROOM=B2B_WIDE_RCAM
8 IN 29
0%
1/32W
MF
1 C3907
01005 220PF
ROOM=B2B_WIDE_RCAM 5%
2 10V
C0G-CERM
A 01005
ROOM=B2B_WIDE_RCAM
SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
R3908
CAMERA: B2B Wide (WY)
DRAWING NUMBER SIZE
WIDE_AND_TELE_TO_STROBE_DRIVER_STROBE 0.00 WIDE_AND_TELE_TO_LED_DRIVER_STROBE_EN_CONN
31 OUT
1 2 29 30 051-02221 D
0% Apple Inc.
1/32W
MF
1 C3908 REVISION
9.0.0
01005 220PF
ROOM=B2B_WIDE_RCAM
5% NOTICE OF PROPRIETARY PROPERTY: BRANCH
2 10V
C0G-CERM
01005 THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
evt-1
ROOM=B2B_WIDE_RCAM
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
39 OF 80
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 29 OF 51
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
30
90_LPDP_TELE_TO_AP_D1_CONN_P GND_VOID 9 10 I2C1_ISP_TO_TELE_RCAM_OIS_SCL_CONN 30 PP2V85_CAM_TELE_AVDD
11 12 I2C1_ISP_BI_TELE_RCAM_OIS_SDA_CONN 30
35 30 27
PP_CAM_TELE_ADC
30
90_LPDP_TELE_TO_AP_D2_CONN_N GND_VOID 13 14 30 27
30
AP_TO_TELE_CLK_CONN 17 18 WIDE_TO_TELE_SYNC_J4000_CONN 30
1 C4090 1 C4091 1 C4092 1 C4094
19 20 PP3V3_SVDD 27 28 29 30 35
220PF 220PF 220PF 220PF
5% 5% 5% 5%
21 22 PP1V8_CAM_TELE_VDDIO_CONN 30 2 10V 2 10V 2 10V 2 10V
C0G-CERM C0G-CERM C0G-CERM C0G-CERM
30 27 PP_CAM_TELE_ADC 23 24 01005 01005 01005 01005
ROOM=B2B_TELE_RCAM ROOM=B2B_TELE_RCAM ROOM=B2B_TELE_RCAM ROOM=B2B_TELE_RCAM
35 30 27 PP2V85_CAM_TELE_AVDD 25 26
30 29 PP_CAM_VCM_PVDD_CONN 29 30 PP_CAM_VCM_PVDD_CONN 29 30
32 FL4003
33-OHM-25%-1500MA
27
PP1V1_CAM_TELE_DVDD 1 2
PP1V1_CAM_TELE_DVDD_CONN 30
OMIT_TABLE NOSTUFF
0201
R4003 1 ROOM=B2B_TELE_CAM 1 C4025 1 C4093 1 C4028
20K 2.2UF 220PF 15PF
1% 20% 5% 5%
2 6.3V 2 10V 2 16V
ISP I2C 1/32W
MF
01005 2
ROOM=B2B_TELE_CAM
X5R-CERM
0201
ROOM=B2B_TELE_RCAM
C0G-CERM
01005
ROOM=B2B_TELE_RCAM
NP0-C0G-CERM
01005
ROOM=B2B_TELE_RCAM
R4000
0.00
C 8 IN
I2C1_ISP_SCL 1 2 I2C1_ISP_TO_TELE_RCAM_OIS_SCL_CONN
CKPLUS_WAIVE=I2C_PULLUP
30 C
0%
1/32W
MF
01005
1
5%
C4000
56PF
LPDP
ROOM=B2B_TELE_RCAM
2 25V
NP0-C0G-CERM
01005 C4030
ROOM=B2B_TELE_RCAM
0.1UF
90_LPDP_TELE_TO_AP_D0_P 1 2 90_LPDP_TELE_TO_AP_D0_CONN_P
R4001 9 BI
GND_VOID
30
I2C1_ISP_SDA 1
0.00 2 I2C1_ISP_BI_TELE_RCAM_OIS_SDA_CONN
ROOM=B2B_TELE_RCAM
20%
8 BI 30
6.3V
0% CKPLUS_WAIVE=I2C_PULLUP X5R-CERM
1/32W
MF
1 C4001 01005
56PF
01005
ROOM=B2B_TELE_RCAM
5% C4031
2 25V
NP0-C0G-CERM 0.1UF
01005 9 BI
90_LPDP_TELE_TO_AP_D0_N 1 2 90_LPDP_TELE_TO_AP_D0_CONN_N 30
ROOM=B2B_TELE_RCAM
ROOM=B2B_TELE_RCAM
GND_VOID
20%
6.3V
X5R-CERM
01005
C4040
0.1UF
9 OUT
90_LPDP_TELE_TO_AP_D1_P 1 2 90_LPDP_TELE_TO_AP_D1_CONN_P 30
ROOM=B2B_TELE_RCAM
GND_VOID
20%
6.3V
X5R-CERM
01005
C4041
0.1UF
9 OUT
90_LPDP_TELE_TO_AP_D1_N 1 2 90_LPDP_TELE_TO_AP_D1_CONN_N 30
ROOM=B2B_TELE_RCAM
GND_VOID
20%
B 6.3V
X5R-CERM B
IO Filters 01005
C4050
0.1UF
90_LPDP_TELE_TO_AP_D2_P 1 2 90_LPDP_TELE_TO_AP_D2_CONN_P
R4005 9 OUT
ROOM=B2B_TELE_RCAM
30
AP_TO_TELE_CLK 1
49.9 2 AP_TO_TELE_CLK_CONN 20% GND_VOID
8 IN 30
6.3V
1% NOSTUFF X5R-CERM
1/32W
MF
1 C4006 01005
56PF
01005
ROOM=B2B_TELE_RCAM
5% C4051
2 25V
NP0-C0G-CERM 0.1UF
01005 9 OUT
90_LPDP_TELE_TO_AP_D2_N 1 2 90_LPDP_TELE_TO_AP_D2_CONN_N 30
ROOM=B2B_TELE_RCAM
ROOM=B2B_TELE_RCAM GND_VOID
20%
6.3V
X5R-CERM
01005
R4007
AP_TO_TELE_SHUTDOWN_L 1
0.00 2 AP_TO_TELE_SHUTDOWN_CONN_L C4060
8 IN 30
0%
0.1UF
1/32W
MF
1 C4007 9 OUT
LPDP_TELE_BI_AP_AUX 1 2 LPDP_TELE_BI_AP_AUX_CONN 30
01005 220PF
ROOM=B2B_TELE_RCAM
5%
2 10V
ROOM=B2B_TELE_RCAM
20%
6.3V
1 C4061
C0G-CERM
01005
X5R-CERM 56PF
01005 5%
ROOM=B2B_TELE_RCAM
2 25V
NP0-C0G-CERM
01005
ROOM=B2B_TELE_RCAM
30 29 BI
WIDE_AND_TELE_TO_LED_DRIVER_STROBE_EN_CONN
1 C4008
220PF
5%
2 10V
C0G-CERM
A 01005
ROOM=B2B_TELE_RCAM SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
R4010
CAMERA: B2B Tele (MT)
DRAWING NUMBER SIZE
WIDE_TO_TELE_SYNC_J3900_CONN 0.00 WIDE_TO_TELE_SYNC_J4000_CONN
29 IN
1 2 30 051-02221 D
0% Apple Inc.
1/32W
MF
1 C4010 REVISION
9.0.0
01005 220PF
ROOM=B2B_TELE_RCAM
5% NOTICE OF PROPRIETARY PROPERTY: BRANCH
2 10V
C0G-CERM
01005 THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
evt-1
ROOM=B2B_TELE_RCAM
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
40 OF 80
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 30 OF 51
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
LED STROBE DRIVERS (NEON)
APN:353S00558
I2C Address (7-bit): 0x63
45 43 42 41 34 27 23 21 19 18
PP_VDD_MAIN PP_LED1_BOOST_OUT
50 46
C4191 1 C4192 1
1 1 C4105 1 C4106
18UF 220PF
20%
6.3V 2
5%
10V 2
CRITICAL 220PF 18UF
5% 20%
CER-X5R
0402-0.1MM
C0G-CERM
01005 L4100 2 10V
C0G-CERM 2 6.3V
CER-X5R
ROOM=STROBE ROOM=STROBE
1UH-20%-3.6A-0.062OHM U4100 01005 0402-0.1MM
0806 ROOM=STROBE ROOM=STROBE
ROOM=STROBE
LM3566
DSBGA
A2 IN
ROOM=STROBE2
OUT C1
2
CRITICAL
LED_DRIVER1_LX B1 SW LED1 D3
PP_STROBE_COOL_WIDE_LED 33
31 28
CAMPMU_TO_STROBE_DRIVER_HWEN C2 HWEN
IN
INT 300K PD
31 29
WIDE_AND_TELE_TO_STROBE_DRIVER_STROBE B2 STROBE LED2 D1
PP_STROBE_WARM_ZOOM_LED 33
IN
INT 300K PD
BB_TO_STROBE_DRIVER_GSM_BURST_IND D2 TX INT
1 C4102 1 C4101
50 36 31 IN 300K PD
220PF 220PF
35 34 31 28 8 BI
I2C3_ISP_SDA A3 SDA 5% 5%
I2C3_ISP_SCL B3 SCL STROBE_MODULE_NTC 2 10V 2 10V
35 34 31 28 8 IN TORCH/TEMP C3 31 33
C0G-CERM
01005
C0G-CERM
01005
ROOM=STROBE ROOM=STROBE
GND
A1
C C
APN:353S00868
I2C Address (7-bit): 0x67
PP_LED2_BOOST_OUT
C4196 1
1
1 C4125 1 C4126
18UF 220PF 18UF
20% CRITICAL 5% 20%
6.3V 2 2 10V 2 6.3V
CER-X5R C0G-CERM CER-X5R
0402-0.1MM L4120 01005 0402-0.1MM
ROOM=STROBE2
1UH-20%-3.6A-0.062OHM U4120 ROOM=STROBE ROOM=STROBE2
0806 LM35662
ROOM=STROBE2
DSBGA
A2 IN
ROOM=STROBE2
OUT C1
2
CRITICAL
LED_DRIVER2_LX B1 SW LED1 D3
PP_STROBE_COOL_ZOOM_LED 33
31 28
CAMPMU_TO_STROBE_DRIVER_HWEN C2 HWEN
IN
INT 300K PD
BB_TO_STROBE_DRIVER_GSM_BURST_IND D2 TX INT
1 C4122 1 C4121
50 36 31 IN 300K PD
220PF 220PF
35 34 31 28 8 BI
I2C3_ISP_SDA A3 SDA 5% 5%
I2C3_ISP_SCL B3 SCL STROBE_MODULE_NTC 2 10V 2 10V
35 34 31 28 8 IN TORCH/TEMP C3 31 33
C0G-CERM
01005
C0G-CERM
01005
ROOM=STROBE2 ROOM=STROBE2
GND
B B
A1
A SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D FL4202 D
1 2
10-OHM-750MA
PP1V1_FCAM_DVDD 90_MIPI_FCAM_TO_AP_DATA0_P 3 4 I2C2_ISP_TO_FCAM_SAVAGE_SCL_CONN
1 2 PP1V1_FCAM_DVDD_CONN 8 BI 32 35
27 32
8 BI
90_MIPI_FCAM_TO_AP_DATA0_N 5 6 I2C2_ISP_BI_FCAM_SAVAGE_SDA_CONN 32 35
01005-1
7 8 PP1V8_FCAM_VDDIO_CONN
ROOM=B2B_FCAM
1 C4202 1 C4203 90_MIPI_FCAM_TO_AP_CLK_P 9 10
32
10-OHM-750MA
21 22
27
PP2V85_FCAM_AVDD 1 2 PP2V85_FCAM_AVDD_CONN 32
24
01005-1
ROOM=B2B_FCAM
1 C4204 1 C4205 ROOM=B2B_FCAM
0.1UF 220PF
20% 5%
2 6.3V
X5R-CERM 2 10V
C0G-CERM
01005 01005
ROOM=B2B_FCAM ROOM=B2B_FCAM
FCAM I/O
R4210
AP_TO_FCAM_JULIET_CLK 1
0.00 2 AP_TO_FCAM_CLK_CONN
35 8 IN 32
0%
1 C4210 1/32W
MF
C 5%
56PF
ROOM=B2B_FCAM
01005 C
2 25V
NP0-C0G-CERM
01005
ROOM=B2B_FCAM
R4211
AP_TO_FCAM_SHUTDOWN_L 1
0.00 2 AP_TO_FCAM_SHUTDOWN_CONN_L
8 4 IN 32
0%
1/32W
MF
1 C4211
01005 220PF
ROOM=B2B_FCAM
5%
2 10V
C0G-CERM
01005
ROOM=B2B_FCAM
R4212
FCAM_TO_JULIET_SYNC_J4530 1
0.00 2 FCAM_TO_JULIET_SYNC_J4200
35 OUT 32
0%
1/32W
MF
1 C4212
01005 100PF
ROOM=B2B_FCAM
5%
2 16V
NP0-C0G
01005
ROOM=B2B_FCAM
ISP I2C2
R4220
I2C2_ISP_SCL 1
0.00 2 I2C2_ISP_TO_FCAM_SAVAGE_SCL_CONN
8 IN 32 35
B 0%
1/32W 1 C4220
CKPLUS_WAIVE=I2C_PULLUP
B
MF
01005 56PF
ROOM=B2B_FCAM
5%
2 25V
NP0-C0G-CERM
01005
ROOM=B2B_FCAM
R4221
I2C2_ISP_SDA 1
0.00 2 I2C2_ISP_BI_FCAM_SAVAGE_SDA_CONN
8 BI 32 35
0% CKPLUS_WAIVE=I2C_PULLUP
1/32W
MF
1 C4221
01005 56PF
ROOM=B2B_FCAM
5%
2 25V
NP0-C0G-CERM
01005
ROOM=B2B_FCAM
A SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
HAWKING
C4300 Strobe Connector
0.22UF Rcpt: 516S00267 <-- This one on MLB
37 OUT
HAWKING_TO_CODEC_AIN5_N 1 2 GND 33 Plug: 516S00268
10%
6.3V
CER-X5R J4300
01005 AA36D-S010VA1
ROOM=B2B_STROBE F-ST-SM
15 16
C4301 FL4301 D
D 0.22UF 150OHM-25%-200MA-0.7DCR
11 PWR 12 PP_STROBE_COOL_WIDE_LED
37 OUT
HAWKING_TO_CODEC_AIN5_P 1 2 HAWKING_TO_CODEC_AIN5_C_P 1 2 HAWKING_TO_CODEC_AIN5_P_CONN 33
31 33
01005 SIGNAL
10%
6.3V
CKPLUS_WAIVE=MISS_N_DIFFPAIR
ROOM=B2B_STROBE
1 C4302 33
REARMIC2_TO_CODEC_AIN2_CONN_P 1 2 I2C1_AP_BI_MIC2_SDA 33
CER-X5R 56PF 33
REARMIC2_TO_CODEC_AIN2_CONN_N 3 4 I2C1_AP_TO_MIC2_SCL 33
01005 5%
ROOM=B2B_STROBE 2 25V
NP0-C0G-CERM 33
PP_CODEC_TO_REARMIC2_BIAS_CONN 5 6 PP1V8_HAWKING_CONN 33
01005 38
REARMIC2_TO_CODEC_BIAS_FILT_RET 7 8 HAWKING_TO_CODEC_AIN5_P_CONN 33
ROOM=B2B_STROBE
BUTTON_POWER_KEY_CONN_L 9 10 STROBE_MODULE_NTC_CONN
FL4303 33 33
150OHM-25%-200MA-0.7DCR PWR
PP_STROBE_WARM_ZOOM_LED 13 14 PP_STROBE_WARM_WIDE_LED
27
PP1V8_HAWKING 1 2 PP1V8_HAWKING_CONN 33
33 31 31 33
OMIT_TABLE
01005
ROOM=B2B_STROBE
1 C4303 1 C4304
2.2UF 220PF 33 31
PP_STROBE_COOL_ZOOM_LED 17 18 PP_STROBE_COOL_ZOOM_LED 31 33
20% 5%
2 6.3V
X5R-CERM 2 10V
C0G-CERM
0201 01005 ROOM=B2B_STROBE
ROOM=B2B_STROBE ROOM=B2B_STROBE
33
GND
FL4307
150OHM-25%-200MA-0.7DCR
37 OUT
REARMIC2_TO_CODEC_AIN2_N 2 1 REARMIC2_TO_CODEC_AIN2_CONN_N 33
01005
ROOM=B2B_STROBE
1 C4307
56PF
5%
2 25V
NP0-C0G-CERM
01005
Power Key Button ROOM=B2B_STROBE
R4310
BUTTON_POWER_KEY_L 100
1 2 BUTTON_POWER_KEY_CONN_L
20 OUT
C4310
27PF
1 5%
1/32W
MF
1
33
Strobe Filtering
5%
6.3V
01005
ROOM=B2B_STROBE
DZ4310
NP0-C0G 2 5.5V-6.2PF PP_STROBE_WARM_ZOOM_LED
0201 0201 31 33
ROOM=B2B_STROBE ROOM=B2B_STROBE
2
C4320 1
220PF
B 5%
10V 2 B
C0G-CERM
01005
ROOM=B2B_STROBE
R4308
PP_STROBE_COOL_WIDE_LED I2C1_AP_SCL 1
0.00 2 I2C1_AP_TO_MIC2_SCL
31 33 49 10 IN 33
0%
C4322 1 1/32W
MF
1 C4308
220PF 01005 56PF
5% ROOM=B2B_STROBE
5%
10V
C0G-CERM 2 2 25V
NP0-C0G-CERM
01005 01005
ROOM=B2B_STROBE
ROOM=B2B_STROBE
PP_STROBE_WARM_WIDE_LED 31 33
R4309
I2C1_AP_SDA 2
0.00 1 I2C1_AP_BI_MIC2_SDA
C4324 1 49 10 IN
0%
33
220PF
5%
1/32W
MF
1 C4309
10V
C0G-CERM 2 01005 56PF
ROOM=B2B_STROBE
5%
01005
ROOM=B2B_STROBE
2 25V
NP0-C0G-CERM
01005
ROOM=B2B_STROBE
PP_STROBE_COOL_ZOOM_LED 31 33
C4326 1
220PF
5%
10V
C0G-CERM 2
A 01005
ROOM=B2B_STROBE
SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
FL4330 PAGE TITLE
STROBE_MODULE_NTC
150OHM-25%-200MA-0.7DCR
1 2 STROBE_MODULE_NTC_CONN
CAMERA: B2B Strobe + Hold Button
31 OUT 33 DRAWING NUMBER SIZE
01005 051-02221 D
R4330 1 ROOM=B2B_STROBE
1 C4330 Apple Inc. REVISION
27K 220PF
0.5%
1/32W 5% 9.0.0
MF 2 10V
C0G-CERM NOTICE OF PROPRIETARY PROPERTY: BRANCH
01005 2
ROOM=B2B_STROBE
01005
ROOM=B2B_STROBE
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
evt-1
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
43 OF 80
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 33 OF 51
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Rigel Driver 45 43 42 41 31 27 23 21 19 18
50 46
PP_VDD_MAIN
1 C4497 C4494 1
18UF 4UF
20% 20%
6.3V 6.3V
2 CER-X5R CERM-X5R 2
0402-0.1MM 0201
ROOM=RIGEL ROOM=RIGEL
C4493 1
4UF
20%
6.3V
CERM-X5R 2
D 0201
ROOM=RIGEL
D
C4492 1
4UF
20%
6.3V
CERM-X5R 2
0201
ROOM=RIGEL
C4491 1
4UF
Terminate @ Cap via on VDD_MAIN plane. 20%
6.3V
OMIT CERM-X5R 2
0201
XW4400
SHORT-20L-0.05MM-SM
ROOM=RIGEL
2 1 PP_RIGEL_VINCORE
ROOM=RIGEL
C4490 1
1.0UF
20%
10V
X5R-CERM 2
0201-1
ROOM=RIGEL
PP1V8_IO
C 29 28 27 17 16 14 10 8 7 6 5
43 35 32 30
PP_VANA
C
50 38 27 21 19
PP_VDD_BOOST
1 C4495 1 C4496 1 C4498
1.0UF 1.0UF 4UF
20% 20% 20%
10V 10V
2 6.3V
VINSUA A10
VINSDA F10
2 X5R-CERM 2 X5R-CERM
VCC4 G9
VCC3 G2
VIN_LVT H8
VDDIO C5
VANA H4
VINVCORE2 H5
VINSDB E2
VINSUB A3
VINSUB A2
VINSUB A1
VINSUA A9
VINSUA A8
VINSDA E9
VINCORE F5
VINSDB F2
VINSDB F1
VINSDA F9
CERM-X5R
0201-1 0201-1 0201
ROOM=RIGEL ROOM=RIGEL ROOM=RIGEL
PP_RIGEL_BUCK_BOOST_A
35 4
PP_ROMEO_CATHODE K4 VK VBBOUTA H10 1 C4400 1 C4401
K5 VK VBBOUTA J10 4.7UF 220PF
K6 VK VBBOUTA K10 L4400 20%
16V
2 X5R
5%
2 10V
CRITICAL 0.47UH-20%-4A-0.048OHM C0G-CERM
K7 0402 01005
K8
VK U4400 VLXA D10 RIGEL_VLXA 1 2 ROOM=RIGEL ROOM=RIGEL
VK STB600B0 D9 PIWA20120H-SM
VLXA
ROMEO_TO_RIGEL_VCSEL_NTC G4 NTC
WLCSP
ROOM=RIGEL VLXA E10
1 C4405 ROOM=RIGEL
35 IN 4.7UF
20%
C4 B10
OTPHV VCXA
B9
2 16V
X5R 1 C4420
D4 VCXA RIGEL_VCXA 0402
ROOM=RIGEL 0.01UF
TAMP 10%
BOOSTSDA E8 RIGEL_BOOSTSDA 2 6.3V
28 4
CAMPMU_TO_RIGEL_ENABLE B3 ENA
X5R
01005
IN
BULKSDA D8 RIGEL_BULKSDA ROOM=RIGEL
36 28 BI
YOGI_TO_RIGEL_STATUS C8 XEF1
35 28
MAMA_BEAR_BI_RIGEL_STATUS C7 XEF0 BULKSDB D3 RIGEL_BULKSDB
BI
B8 THROT BOOSTSDB E3 RIGEL_BOOSTSDB
JULIET_PMU_TO_RIGEL_STROBE A4 STROBE
1 C4421
35 11 IN
VCXB B1 RIGEL_VCXB 0.01UF
B B7 TESTMODE VCXB B2 1 C4410
10%
2 6.3V
X5R B
4.7UF 01005
B5 TESTMODE2 VLXB D1 20% ROOM=RIGEL L4401
VLXB D2 2 16V
X5R 0.47UH-20%-4A-0.048OHM
B6 TEST
VLXB E1 RIGEL_VLXB 0402
ROOM=RIGEL 1 2
AP_TO_RIGEL_CLK A7 MCLK PIWA20120H-SM
8 IN
VBBOUTB J1 ROOM=RIGEL 1 C4411 1 C4412
20 8 4
RIGEL_TO_ISP_INT B4 INT VBBOUTB J2 4.7UF 220PF
OUT 20% 5%
J3 PP_RIGEL_BUCK_BOOST_B
R4400 35 31 28 8 IN
I2C3_ISP_SCL A5 SCL
VBBOUTB 16V
2 X5R
0402
2 10V
C0G-CERM
01005
I2C3_ISP_SDA 1
33.2 2 I2C3_ISP_SDA_U4400 A6 H9 ROOM=RIGEL ROOM=RIGEL
35 31 28 8 IN SDA IOUT0
1% IOUT0 K9
1/32W G5 PD0
MF IOUT0 J9 PP_ROMEO_DENSE_ANODE 4 35
01005 G6 PD1
IOUT1 H1
RIGEL_LSCP H7 LSCP
IOUT1 H2
C4422 1 IOUT1 H3 PP_ROMEO_SPARSE_ANODE 35
0.01UF
10% IOUT2 K1
6.3V
X5R 2 IOUT2 K2
01005
ROOM=RIGEL IOUT2 K3 PP_ROSALINE_ANODE 36
IOUT3 G1 PP_ROMEO_A_ANODE 35
35
GNDCORE
PGNDK
PGNDK
PGNDK
PGNDK
PGNDK
PGNDB
PGNDB
PGNDA
PGNDA
GNDD
GNDS
GNDS
GNDS
GNDS
GNDS
GNDS
GNDS
GNDS
GNDS
J8
J7
J6
J5
J4
G8
G3
H6
F6
C6
G7
E6
F8
E5
F3
D7
D6
D5
C3
C2
C1
C9
C10
A SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
PEARL: Power
DRAWING NUMBER SIZE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
Romeo Connector
Romeo Power Filtering Rcpt: 516S00267
Plug: 516S00268
<-- This one on MLB
PP_ROMEO_B_ANODE
35 34
35 34
PP_ROMEO_A_ANODE J4500
35 34 4
PP_ROMEO_DENSE_ANODE AA36D-S010VA1
PP_ROMEO_SPARSE_ANODE F-ST-SM
35 34 PP_ROMEO_DENSE_ANODE 15 16 PP_ROMEO_DENSE_ANODE 4
35 34 4
PP_ROMEO_CATHODE 35 34 4 34 35
D 35 30 29 28 27
PP3V3_SVDD D
35 34 4
PP_ROMEO_CATHODE 11 PWR 12 PP_ROMEO_CATHODE 4 34 35
FL4554 ROOM=B2B_PEARL
150OHM-25%-200MA-0.7DCR 35 34
PP_ROMEO_SPARSE_ANODE 17 18 PP_ROMEO_SPARSE_ANODE 34 35
12 OUT
ROMEO_TO_AOP_B2B_DETECT 1 2 ROMEO_TO_AOP_B2B_DETECT_CONN 35
01005
1 C4554
ROOM=B2B_PEARL 220PF
5%
2 10V
C0G-CERM
01005
FL4555
ROOM=B2B_PEARL
ISP I2C3
150OHM-25%-200MA-0.7DCR R4552
ROMEO_TO_RIGEL_VCSEL_NTC 1 2 ROMEO_TO_RIGEL_VCSEL_NTC_CONN I2C3_ISP_SCL 1
0.00 2 I2C3_ISP_TO_MAMA_BEAR_SCL_CONN
34 OUT 35 34 31 28 8 IN 35
CKPLUS_WAIVE=I2C_PULLUP
01005 0%
1 C4555 1/32W
MF
1 C4552
ROOM=B2B_PEARL 220PF 01005 56PF
5% ROOM=B2B_PEARL 5%
2 10V
C0G-CERM 2 25V
NP0-C0G-CERM
C 01005
ROOM=B2B_PEARL
01005
ROOM=B2B_PEARL C
FL4556
150OHM-25%-200MA-0.7DCR R4553
MAMA_BEAR_BI_RIGEL_STATUS 1 2 MAMA_BEAR_BI_RIGEL_STATUS_CONN I2C3_ISP_SDA 1
0.00 2 I2C3_ISP_BI_MAMA_BEAR_SDA_CONN
34 28 IN 35 34 31 28 8 BI 35
01005 0% CKPLUS_WAIVE=I2C_PULLUP
ROOM=B2B_PEARL
1 C4556 1/32W
MF
1 C4553
220PF 01005 56PF
5% ROOM=B2B_PEARL 5%
2 10V
C0G-CERM 2 25V
NP0-C0G-CERM
01005 01005
ROOM=B2B_PEARL ROOM=B2B_PEARL
Juliet Connector
Juliet Power and I/O Rcpt: 516S00244
Plug: 516S00245
<-- This one on MLB
B R4560 B
AP_TO_JULIET_SHUTDOWN_L 0.00 AP_TO_JULIET_SHUTDOWN_L_CONN
J4530
8 IN
1 2 35 BB35K-RA18-3A
F-ST-SM
0%
1/32W
MF
1 C4560 23
01005 220PF
ROOM=B2B_PEARL 5% 35
PP1V1_JULIET_DVDD_CONN 19 20
2 10V
C0G-CERM
01005
ROOM=B2B_PEARL 1 2 JULIET_PMU_TO_RIGEL_STROBE_CONN 35
90_MIPI_JULIET_TO_AP_DATA0_P 3 4 FCAM_TO_JULIET_SYNC_J4530
FL4561 8
90_MIPI_JULIET_TO_AP_DATA0_N 5 6 PP2V85_JULIET_AVDD_CONN
32 35
150OHM-25%-200MA-0.7DCR 8 35
7 8
AP_TO_FCAM_JULIET_CLK 1 2 AP_TO_JULIET_CLK_CONN
32 8 IN 35
8
90_MIPI_JULIET_TO_AP_CLK_P 9 10 PP1V8_JULIET_VDDIO_CONN 35
01005
XW4570 C4562 1
ROOM=B2B_PEARL 8
90_MIPI_JULIET_TO_AP_CLK_N 11 12 AP_TO_JULIET_SHUTDOWN_L_CONN 35
0.1UF 220PF
20% 5% 21 22
2 6.3V
X5R-CERM 2 10V
C0G-CERM R4563 24
01005 01005 0.00
ROOM=B2B_PEARL JULIET_PMU_TO_RIGEL_STROBE 1 2 JULIET_PMU_TO_RIGEL_STROBE_CONN ROOM=B2B_PEARL
FL4572 ROOM=B2B_PEARL 34 11 OUT
0%
35
2 6.3V
X5R-CERM 2 10V
C0G-CERM 2 10V
C0G-CERM 9.0.0
01005 01005 01005 NOTICE OF PROPRIETARY PROPERTY: BRANCH
ROOM=B2B_PEARL
ROOM=B2B_PEARL ROOM=B2B_PEARL
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
evt-1
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
45 OF 80
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 35 OF 51
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D 36 FRONTMIC3_TO_CODEC_AIN3_CONN_N 1 2 FRONTMIC3_TO_CODEC_AIN3_CONN_P 36
D
R4601 36 PP3V0_YOGI_PROX_ALS_CONN 3 4 PP_CODEC_TO_FRONTMIC3_BIAS_CONN 36
I2C0_AOP_SDA 1
0.00 2 I2C0_AOP_BI_PROX_ALS_YOGI_SDA_CONN 5 6 YOGI_TO_RIGEL_STATUS_CONN
12 BI 36 36
0%
CKPLUS_WAIVE=I2C_PULLUP
7 8 PROX_BI_AP_AOP_INT_CONN_L
1/32W
MF
1 C4601 9 10 I2C0_AOP_BI_PROX_ALS_YOGI_SDA_CONN
36
01005 56PF 36
ROOM=B2B_PEARL 5% 11 12 I2C0_AOP_TO_PROX_ALS_YOGI_SCL_CONN 36
2 25V
NP0-C0G-CERM 13 14 ALS_TO_AOP_INT_CONN_L
01005 36
ROOM=B2B_PEARL 15 16
36 34 PP_ROSALINE_ANODE 17 18 PP_ROSALINE_ANODE 34 36
BB_TO_STROBE_DRIVER_GSM_BURST_IND_CONN 36
SPEAKER2 36 COIL_TO_SPKRAMP_TOP_VSENSE_POS_CONN
19
21
20
22 COIL_TO_SPKRAMP_TOP_VSENSE_NEG_CONN 36
23 24
SPKRAMP_TOP_TO_COIL_OUT_NEG 25 26 SPKRAMP_TOP_TO_COIL_OUT_NEG
SPKRAMP_TOP_TO_COIL_OUT_POS 50 36 36 50
50 36 IN
36 CODEC_AOUT_TO_HAC_CONN_P 27 28 CODEC_AOUT_TO_HAC_CONN_N 36
1 C4635 1 C4630
C4631 1
10%
820PF
5%
220PF 50 36 SPKRAMP_TOP_TO_COIL_OUT_POS 31 32 SPKRAMP_TOP_TO_COIL_OUT_POS 36 50
220PF 2 10V
X5R 2 10V
C0G-CERM
34
5% ROOM=B2B_PEARL
10V 01005 01005
C0G-CERM 2 ROOM=B2B_PEARL ROOM=B2B_PEARL
01005
ROOM=B2B_PEARL
50 36 IN
SPKRAMP_TOP_TO_COIL_OUT_NEG
1 C4636 1 C4632
820PF 220PF
10% 5%
2 10V
X5R 2 10V
C0G-CERM
01005 01005
C ROOM=B2B_PEARL ROOM=B2B_PEARL
C
R4633
COIL_TO_SPKRAMP_TOP_VSENSE_POS 1
0.00 2 COIL_TO_SPKRAMP_TOP_VSENSE_POS_CONN PP_ROSALINE_ANODE
50 OUT 36 34 36
NOSTUFF
0%
C4633 1 1/32W
MF
1 C4660
220PF 01005 220PF
5% ROOM=B2B_PEARL
5%
10V 2 2 10V
C0G-CERM C0G-CERM
01005 01005
ROOM=B2B_PEARL ROOM=B2B_PEARL
R4634
PROX & ALS POWER 50 OUT
COIL_TO_SPKRAMP_TOP_VSENSE_NEG
NOSTUFF
1
0.00
0%
2 COIL_TO_SPKRAMP_TOP_VSENSE_NEG_CONN 36
C4634 1 1/32W
MF
220PF 01005
5% ROOM=B2B_PEARL
10V
C0G-CERM 2
MIC3 01005
ROOM=B2B_PEARL
FL4640
150OHM-25%-200MA-0.7DCR
38
PP_CODEC_TO_FRONTMIC3_BIAS 1 2 PP_CODEC_TO_FRONTMIC3_BIAS_CONN 36
01005
ROOM=B2B_PEARL 1 DZ4640
6.8V-100PF
R4611 01005
ROOM=B2B_PEARL
PP3V0_S2 1
0.00 2
PP3V0_YOGI_PROX_ALS_CONN 2
48 47 45 19 36
50 OMIT_TABLE
0%
B 1/32W
MF
1 C4613 1 C4614 B
01005 2.2UF
20% 5%
220PF FL4641
ROOM=B2B_PEARL
2 6.3V 2 10V
150OHM-25%-200MA-0.7DCR
X5R-CERM C0G-CERM
0201 01005 37 OUT
FRONTMIC3_TO_CODEC_AIN3_N 1 2 FRONTMIC3_TO_CODEC_AIN3_CONN_N 36
ROOM=B2B_PEARL ROOM=B2B_PEARL
01005
ROOM=B2B_PEARL 1 DZ4641
6.8V-100PF
01005
ROOM=B2B_PEARL
2
1% 01005
1/32W
MF
1 C4617 ROOM=B2B_PEARL
1 DZ4642
01005 220PF 6.8V-100PF
01005
ROOM=B2B_PEARL 5% ROOM=B2B_PEARL
10V
2 C0G-CERM 2
01005
ROOM=B2B_PEARL
FL4618 FL4643
150OHM-25%-200MA-0.7DCR 150OHM-25%-200MA-0.7DCR
ALS_TO_AOP_INT_L 2 1 ALS_TO_AOP_INT_CONN_L CODEC_AOUT_TO_HAC_P 1 2 CODEC_AOUT_TO_HAC_CONN_P
12 OUT 36 37 OUT 36
01005 01005
ROOM=B2B_PEARL
1 C4618 ROOM=B2B_PEARL 1 DZ4643
220PF 6.8V-100PF
01005
5% ROOM=B2B_PEARL
2 10V
C0G-CERM 2
01005
ROOM=B2B_PEARL
051-02221
SIZE
D
ROOM=B2B_PEARL R4619 6.8V-100PF
01005 Apple Inc.
0.00 ROOM=B2B_PEARL REVISION
0% 2
1/32W
MF
9.0.0
2 01005 NOTICE OF PROPRIETARY PROPERTY: BRANCH
ROOM=B2B_PEARL THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
evt-1
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
46 OF 80
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 36 OF 51
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
U4700
CS42L75
WLCSP
SYM 1 OF 3
49 IN
LOWERMIC1_TO_CODEC_AIN1_P K3 AIN1+ CRITICAL AOUT+ K8 CODEC_AOUT_TO_HAC_P OUT 36
LOWERMIC1_TO_CODEC_AIN1_N L3 ROOM=CODEC L8 CODEC_AOUT_TO_HAC_N
49 IN AIN1- AOUT- OUT 36
33 IN
REARMIC2_TO_CODEC_AIN2_P K4 AIN2+
33 IN
REARMIC2_TO_CODEC_AIN2_N L4 AIN2-
36 IN
FRONTMIC3_TO_CODEC_AIN3_P K6 AIN3+
36 IN
FRONTMIC3_TO_CODEC_AIN3_N L6 AIN3-
49 IN
LOWERMIC4_TO_CODEC_AIN4_P K5 AIN4+
49 IN
LOWERMIC4_TO_CODEC_AIN4_N L5 AIN4-
C C
33 IN
HAWKING_TO_CODEC_AIN5_P G3 AIN5+
33 IN
HAWKING_TO_CODEC_AIN5_N G2 AIN5-
F3 AIN6+
NC
G4 AIN6-
NC
F4 AIN7+
NC
NC
E3 AIN7- C4700
100PF
1 2
5%
16V
NP0-C0G
C2
R4700 01005
NC AIN8+
1
20.0 2
ROOM=CODEC
90_MIKEYBUS_DATA_P 48
D3 AIN8-
BI
NC 5%
1/32W
MF
B8 DMIC1_CLK DP E1 90_MIKEYBUS_CODEC_DATA_P 01005
NC ROOM=CODEC
D8 DMIC1_DATA DN F1 90_MIKEYBUS_CODEC_DATA_N
NC
NC
E11 DMIC2_CLK MIKEYBUS_REFERENCE
R4701
E10 MBUS_REF G1 IN 49 20.0 90_MIKEYBUS_DATA_N
B NC DMIC2_DATA 1
5%
2 BI 48
B
D10 DMIC3_CLK 1/32W
NC
NC
D9 DMIC3_DATA 1
R4710
MF
01005 C4701
100 ROOM=CODEC 100PF
E9 DMIC4_CLK 5% 1 2
NC 1/32W
F8 DMIC4_DATA MF
NC 5%
2 01005
ROOM=CODEC 16V
NP0-C0G
50 OUT
PDM_CODEC_TO_SPKRAMP_TOP_CLK B11 PDMOUT1_CLK 01005
ROOM=CODEC
50 OUT
PDM_CODEC_TO_SPKRAMP_TOP_DATA B10 PDMOUT1_DATA
41 4 OUT
PDM_CODEC_TO_ARC_CLK A10 PDMOUT2_CLK
41 4 OUT
PDM_CODEC_TO_ARC_DATA B9 PDMOUT2_DATA
F10 PDMOUT3_CLK
NC
F9 PDMOUT3_DATA
NC
A SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
50 41 19
PP1V8_AUDIO_VA_S2
OMIT_TABLE
1 C4809
2.2UF
20%
2 6.3V
X5R-CERM
0201
ROOM=CODEC
CODEC_AGND 38
48 47 46 38 22 20 17 14 12 10
PP1V8_S2
50 49
PP_VDD_BOOST
R4800 1
50 34 27 21 19 100K
5%
OMIT_TABLE 1/32W
MF
1 C4812 1 C4814 1 C4805 01005 2
0.1UF 0.1UF 2.2UF ROOM=CODEC
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
U4700
X5R-CERM X5R-CERM X5R-CERM CS42L75
01005 01005 0201 12
AOP_TO_CODEC_RESET_L J4 RESET* WLCSP JTAG_TMS E7
ROOM=CODEC ROOM=CODEC ROOM=CODEC IN NC
SYM 3 OF 3 JTAG_TCK D7
NC
JTAG_TDI E8
48 47 46 38 22 20 17 14 12 10
PP1V8_S2 NC
50 49 JTAG_TDO F7
OMIT_TABLE CODEC_TO_PMU_WAKE H3 WAKE* NC
1 C4811 1 C4813 1 C4815 20 OUT
VD_FILT G11
20% 20% MISO
VD C1
VL_SW A2
VD_FILT B1
VL A9
VA K2
10
VP_MBUS F2
VP L9
2 6.3V 2 6.3V
VA J1
VA J2
OUT
X5R
0201-1
X5R
0201-1
R4830
ROOM=CODEC ROOM=CODEC
CODEC_TO_SPKRAMP_BOT_ARC_MCLK 33.2 I2S_AP_TO_CODEC_MCLK1 A4
50 41 OUT
1 2 10 IN MCLK1_IN TSTI G10
1% 12 IN
I2S_AOP_TO_CODEC_MCLK2 B4 MCLK2_IN TSTI J3
1/32W
MF CODEC_TO_SPKRAMP_BOT_ARC_MCLK_R A5 MCLK_OUT TSTI J5
01005
C4803 PP_CODEC_TO_LOWERMIC1_BIAS K11
ROOM=CODEC
I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK A6
4.7UF 49 MIC1_BIAS 50 49 41 12 OUT ASP1_SCLK
49 IN
LOWERMIC1_TO_CODEC_BIAS_FILT_RET 1 2 LOWERMIC1_BIAS_FILT_IN K10 MIC1_BIAS_FILT
CRITICAL
ROOM=CODEC
R4831 50 49 41 12 OUT
I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK C6 ASP1_LRCK/FSYNC
I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT 49.9 I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT_R
20% U4700 49 41 12 IN
1 2 B5 ASP1_SDIN
6.3V CS42L75 1% 50 41 12 OUT
I2S_CODEC_ASP1_TO_AOP_AMPS_DIN B6 ASP1_SDOUT
X5R-CERM1 WLCSP 1/32W
402
ROOM=CODEC MF
SYM 2 OF 3 01005
I2S_AOP_TO_CODEC_ASP2_BCLK C4
C4804 PP_CODEC_TO_REARMIC2_BIAS J11 CODEC_LP_FILTP 1 C4820
ROOM=CODEC 12 IN
I2S_AOP_TO_CODEC_ASP2_LRCLK D5
ASP2_SCLK
4.7UF 33 MIC2_BIAS LP_FILT+ D1 12 IN ASP2_LRCK/FSYNC
REARMIC2_TO_CODEC_BIAS_FILT_RET J10 CODEC_LP_FILTN 0.1UF I2S_AOP_TO_CODEC_ASP2_DOUT D6
33 IN
1 2 REARMIC2_BIAS_FILT_IN MIC2_BIAS_FILT LP_FILT- D2 20% 12 IN ASP2_SDIN
2 6.3V
X5R-CERM 12
I2S_CODEC_ASP2_TO_AOP_DIN C5 ASP2_SDOUT
20% OUT
6.3V 01005
ROOM=CODEC
X5R-CERM1
402
ROOM=CODEC 10 IN
I2S_AP_TO_CODEC_ASP3_BCLK C11 ASP3_SCLK
I2S_AP_TO_CODEC_ASP3_LRCLK C9
C4801 PP_CODEC_TO_FRONTMIC3_BIAS K9
10 IN
I2S_AP_TO_CODEC_ASP3_DOUT C10
ASP3_LRCK/FSYNC
4.7UF 36 MIC3_BIAS 10 IN ASP3_SDIN
36
FRONTMIC3_TO_CODEC_BIAS_FILT_RET 1 2 FRONTMIC3_BIAS_FILT_IN J9 MIC3_BIAS_FILT 10
I2S_CODEC_ASP3_TO_AP_DIN D11 ASP3_SDOUT
IN OUT
1 C4822 1 C4825
1.0UF 1.0UF
20% 20% G8 MIC6_BIAS
2 6.3V 2 6.3V NC
X5R X5R G9 MIC6_BIAS_FILT
0201-1 0201-1 NC
ROOM=CODEC ROOM=CODEC
GNDD GNDP
A1
A8
A11
E2
F11
K7
L1
L7
L10
L11
A XW4802
SHORT-10L-0.1MM-SM SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
2 1 38 CODEC_AGND PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
C C
B B
A SYNC_DATE=08/25/2015 A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
C C
B B
A SYNC_DATE=08/25/2015 A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
Pull Downs
AOP_TO_SPKRAMP_BOT_ARC_RESET_L 12 41 50
1
R5108
100K
5%
1/32W
MF
2 01005
ROOM=ARC_CTRL
ARC DRIVER
D D
APN: 338S00296
I2C ADDRESS: 1000 001x
0x82
45 43 42 34 31 27 23 21 19 18
PP_VDD_MAIN PP1V8_AUDIO_VA_S2 19 38 41 50
50 46
C C
A5
F5
CRITICAL
L5100 VP VA
1.2UH-20%-3A-0.11OHM
ARC1_LX A2 A1 PP_ARC1_VBOOST
1 2
B2
SW U5100 VBST_B
B1
MEFE2016T-SM SW CS35L26C-A1 VBST_B
ROOM=ARC_CTRL
D6 WLCSP C1
1 C5126 1 C5135 1 C5137 1 C5124 1 C5138 1 C5139
50 49 25 12 4 BI
I2C1_AOP_SDA SDA VBST_A 220PF 0.1UF 10UF 10UF 10UF 10UF
ROOM=ARC_CTRL D1 5% 10% 20% 20% 20% 20%
I2C1_AOP_SCL E6 VBST_A 2 10V
C0G-CERM 2 16V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM
50 49 25 12 4 IN SCL CRITICAL 01005 0201 0402-0.1MM 0402-0.1MM 0402-0.1MM 0402-0.1MM
ROOM=ARC_CTRL ROOM=ARC_CTRL ROOM=ARC_CTRL ROOM=ARC_CTRL ROOM=ARC_CTRL ROOM=ARC_CTRL
SPKRAMP_BOT_ARC_TO_AOP_INT_L A7
50 12 BI INT*
AOP_TO_SPKRAMP_BOT_ARC_RESET_L A6
50 41 12 IN RESET*
F6
ALIVE/SYNC ISNS+
F1 ARC1_ISENSE_POS
1 C5128
NC E1 0.01UF
E5 ISNS- ARC1_ISENSE_NEG 10%
50 41 38 19
PP1V8_AUDIO_VA_S2 PP1V8_AUDIO_VA_S2 AD0/PDM_CLK1 2 6.3V
X5R
MAKE_BASE=TRUE 01005
CODEC_TO_SPKRAMP_BOT_ARC_MCLK B7 ROOM=ARC_CTRL
50 38 IN MCLK
E2 SOLENOID1_TO_ARC1_VSENSE_POS
I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK C7 VSNS+ IN 49
50 49 38 12 IN SCLK E3 SOLENOID1_TO_ARC1_VSENSE_NEG
VSNS- IN 49
I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK C6
50 49 38 12 IN LRCK/FSYNC
I2S_CODEC_ASP1_TO_AOP_AMPS_DIN D7
50 38 12 IN SDIN D2 ARC1_TO_SOLENOID1_OUT_POS
OUT+ 49
I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT B6 C2 ARC1_TO_SOLENOID1_OUT_NEG
49 38 12 OUT SDOUT OUT- 49
PDM_CODEC_TO_ARC_CLK F7
PDM_CLK0
37 4 IN
E7 F4
C5129 1 1 C5142
PDM_CODEC_TO_ARC_DATA ARC1_FILT 470PF 470PF
B 37 4 IN
D5
PDM_DATA0 FILT+
F3
10%
10V 2
10%
2 10V
B
PDM_DATA1 AD1 X5R X5R
GNDP GNDA 1 C5136 01005
ROOM=ARC_CTRL
01005
ROOM=ARC_CTRL
2.2UF
20%
A3
A4
B3
B4
C3
C4
C5
D3
D4
B5
E4
F2
2 6.3V
X5R-CERM
0201
ROOM=ARC_CTRL
A SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
ARC: Driver
DRAWING NUMBER SIZE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
Acorn PMU
D D
220PF 10UF 50
5%
2 16V
C0G
20%
2 10V
X5R-CERM CP2 C3+ C2 ACORN_CP2_CAP_POS 42
Charge Pump 2 Caps
01005 0402-0.1MM C3- C4 ACORN_CP2_CAP_NEG
ROOM=ACORN ROOM=ACORN 42
1 C5621
1UF
PP_BOOST1_ACORN F4 VB VP E4 PP10V0_RACER 20%
OMIT_TABLE
50
42 ACORN_CP2_CAP_POS 2 16V
CER-X5R
1 C5654 1 C5655 C4+ D2 ACORN_CP3_CAP1_POS 42
1 C5640 1 C5641 1 C5645 42
ACORN_CP2_CAP_NEG 0201
ROOM=ACORN
220PF 10UF CP3 C4- D3 ACORN_CP3_CAP1_NEG 42
4.7UF 10UF 4UF
5% 20% 20% 20% 20%
2 16V
C0G
01005
2 10V
X5R-CERM
0402-0.1MM C5+ E2 ACORN_CP3_CAP2_POS 42
2 16V
X5R
0402
2 10V
X5R-CERM
0402-0.1MM
2 6.3V
CERM-X5R
0201
Charge Pump 3 Caps
ROOM=ACORN ROOM=ACORN ROOM=ACORN
C5- E3 ACORN_CP3_CAP2_NEG ROOM=ACORN ROOM=ACORN
42
1 C5631
0.22UF
PP_VDD_MAIN B4 IN HWEN H1 PP1V8_TOUCH_RACER_S2 20%
45 43 41 34 31 27 23 21 19 18
50 46
17 50
42
ACORN_CP3_CAP1_POS 2 6.3V
X5R
1 C5690 L5600 EN1 F2 RACER_TO_ACORN_ORB_SCAN IN 50 42
ACORN_CP3_CAP1_NEG 01005
ROOM=ACORN
4.7UF 1.5UH-20%-1.6A-0.18OHM EN2 F3 TOUCH_TO_ACORN_PP5V25_EN IN 50
20%
2 6.3V ACORN_LX G4 SW I2C3_AP_SCL 42 ACORN_CP3_CAP2_POS
CER 2 1 SCL G2
B 0402 IN 10 50
ACORN_CP3_CAP2_NEG B
E1 CP23_GND
H3 SIDO_GND
SDA G3 I2C3_AP_SDA 42
1 C5632
D1 CP1_GND
ROOM=ACORN PIWA2012FE-SM 10 50
ROOM=ACORN BI
0.22UF
F1 AGND
A SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
FL5700 J5700
150OHM-25%-200MA-0.7DCR BM28P0.6-34DS/2-0.35V
F-ST-SM
11 IN
AP_TO_DISPLAY_RESET_L 2 1 AP_TO_DISPLAY_RESET_CONN_L 43
ROOM=B2B_DISPLAY
01005
R5700 1 ROOM=B2B_DISPLAY
1 C5700 PP_VDD_MAIN_HILO_CONN 35
PWR
36 PP_VDD_MAIN_HILO_CONN
61.9K 220PF 43 43
1% 5%
1/32W 2 10V
C0G-CERM
MF 01005 SIG
D
01005 2
ROOM=B2B_DISPLAY
ROOM=B2B_DISPLAY
43
PP1V8_DISPLAY_CONN 1 2 D
43
DISPLAY_TO_PMU_AMUX_CONN 3 4
AP_TO_DISPLAY_RESET_CONN_L 5 6 MTEST
R5701 43
MTEST 7 8 PP3V0_DISPLAY_CONN
43
PMU_TO_DISPLAY_PANICB 1
10 2 PMU_TO_DISPLAY_PANICB_CONN 43 43
20 IN 43
43
PMU_TO_DISPLAY_PANICB_CONN 9 10 NO_TEST=1 NC_SPI_AP_TO_DISPLAY_FLASH_SCLK
5%
1/32W
MF
1 C5701 NC_SPI_DISPLAY_FLASH_CS_L NO_TEST=1 11 12 PP1V0_DISPLAY_DVDD_CONN 43
FL5702 43
90_MIPI_AP_TO_DISPLAY_DATA2_CONN_N 21 22
150OHM-25%-200MA-0.7DCR 23 24
8
DISPLAY_TO_AP_ALIVE 2 1 DISPLAY_TO_AP_ALIVE_CONN 43 43
90_MIPI_AP_TO_DISPLAY_CLK_CONN_P 25 26 90_MIPI_AP_TO_DISPLAY_DATA1_CONN_P 43
OUT
01005 90_MIPI_AP_TO_DISPLAY_CLK_CONN_N 27 28 90_MIPI_AP_TO_DISPLAY_DATA1_CONN_N
ROOM=B2B_DISPLAY
1 C5702 43
29 30
43
PWR
FL5703 37 38
150OHM-25%-200MA-0.7DCR
20 IN
DISPLAY_TO_PMU_AMUX 2 1 DISPLAY_TO_PMU_AMUX_CONN 43
01005
ROOM=B2B_DISPLAY
1 C5703
56PF
5%
2 25V
NP0-C0G-CERM
01005
ROOM=B2B_DISPLAY
TAM0605
90_MIPI_AP_TO_DISPLAY_DATA3_P 4 SYM_VER-2 1 90_MIPI_AP_TO_DISPLAY_DATA3_CONN_P
8 IN 43
FL5783
FERR-70OHM-25%-0.300A
8 IN
90_MIPI_AP_TO_DISPLAY_DATA3_N 3 2 90_MIPI_AP_TO_DISPLAY_DATA3_CONN_N 43 19
PP3V0_DISPLAY 1 2 PP3V0_DISPLAY_CONN 43
GND_VOID ROOM=B2B_DISPLAY
01005
B L5740 CRITICAL ROOM=B2B_DISPLAY
1 C5783 B
65OHM-0.7-2GHZ-3.4OHM
220PF
5%
90_MIPI_AP_TO_DISPLAY_CLK_P 4
TAM0605
SYM_VER-2 1 90_MIPI_AP_TO_DISPLAY_CLK_CONN_P 2 10V
C0G-CERM
8 IN 43 01005
ROOM=B2B_DISPLAY
8 IN
90_MIPI_AP_TO_DISPLAY_CLK_N 3 2 90_MIPI_AP_TO_DISPLAY_CLK_CONN_N 43
GND_VOID ROOM=B2B_DISPLAY
XW5784
SHORT-0201
45 42 41 34 31 27 23 21 19 18
PP_VDD_MAIN 1 2 PP_VDD_MAIN_HILO_CONN 43
50 46
ROOM=B2B_DISPLAY
1 C5784 1 C5785 1 C5786
220PF 220PF 220PF
XW5785
SHORT-0201
5%
2 10V
5%
2 10V
5%
2 10V
C0G-CERM C0G-CERM C0G-CERM
1 2 01005 01005 01005
ROOM=B2B_DISPLAY ROOM=B2B_DISPLAY ROOM=B2B_DISPLAY
ROOM=B2B_DISPLAY
A SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
C C
B B
A SYNC_DATE=08/25/2015 A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D
VDD_MAIN OV CUT-OFF CIRCUIT D
43 42 41 34 31 27 23 21 19 18
PP_VDD_MAIN 48 47 23
PP_VBUS1_E75_RVP
DZ5900
50 46
0201
K A PP3V0_S2
C5900 1 19 36 47 48 50
0.47UF
1 20% RB521ES-30
R5901 25V 2
X5R
1.3M 0201
1% ROOM=OV_CUTOFF
1/20W
2
MF CRITICAL
2 0201
ROOM=OV_CUTOFF VDD
OMIT
SHORT-20L-0.05MM-SM U5900
XW5900 TPS3700RUG
X2QFN
2 1 OV_VMON_INA 5 INA
OUTA 7
ROOM=SOC NC To Hydra and E75
R5903
OUTB 1 PP_HYDRA_ACC1_R 1
0.00 2 PP_HYDRA_ACC1 48 49
C PP_VDD_MAIN_VMON 3 INB
NC0 4 0%
1/32W
C
NC MF
NOSTUFF ROOM=OV_CUTOFF NC1 8 01005
1 NC
R5902 1 C5902 GND ROOM=OV_CUTOFF
100K 15PF
6
1% 5%
1/32W
MF 2 16V
NP0-C0G-CERM
2 01005 01005
ROOM=OV_CUTOFF ROOM=OV_CUTOFF
B B
A SYNC_MASTER=sync SYNC_DATE=01/10/2017
A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
ACCESSORY BUCK
I2C ADDRESS: 0x52
U6100
FPF1204UCX
43 42 41 34 31 27 23 21 19 18
PP_VDD_MAIN A2 VIN WLCSP-COMBO
VOUT A1
PP_VDD_MAIN_ACC_BUCK_VIN
50 45
ROOM=ACC_BUCK
CRITICAL C6100 1
49 48 47 38 22 20 17 14 12 10 PP1V8_S2 B2 ON 4UF
50 20%
6.3V
CER-X5R 2
GND 0201
ROOM=ACC_BUCK
B1
A2
VIN
U6110 CRITICAL
FAN53741 L6110
CSP
0.47UH-20%-2.52A-0.08OHM To Hydra
49 20 10
I2C0_AP_SDA A1 SDA ROOM=ACC_BUCK SW B2 ACC_BUCK_SW 1 2 PP_ACC_VAR 19 48
BI
PIGA1608-SM
C 49 20 10 IN
I2C0_AP_SCL B1 SCL CRITICAL FB
C1 ACC_BUCK_FB ROOM=ACC_BUCK
2OMIT
1 C6110
100PF
1 C6111
0.1UF
1 C6112
18UF
1 C6117
18UF
1
R6116 C
5% 20% 20% 20% 10K
GND XW6110
SHORT-20L-0.05MM-SM 2 16V
NP0-C0G 2 6.3V
X5R-CERM 2 6.3V
CER-X5R 2 6.3V
CER-X5R
5%
1/32W
ROOM=ACC_BUCK 01005 01005 0402-0.1MM 0402-0.1MM MF
C2
1 ROOM=ACC_BUCK ROOM=ACC_BUCK ROOM=ACC_BUCK ROOM=ACC_BUCK
2 01005
ROOM=ACC_BUCK
ACC_BUCK_TO_PMU_AMUX 20
OUT
B B
A SYNC_MASTER=test_mlb SYNC_DATE=10/17/2016
A
PAGE TITLE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
USB-PD
49 48 46 38 22 20 17 14 12 10
PP1V8_S2
50
50 48 45 36 19
PP3V0_S2
C 1 C6290 1 C6291
PP1V8_VCCD_CCG2 C
1.0UF 1.0UF
20% 20%
2 6.3V
X5R 2 6.3V
X5R
1 C6292
0201-1 0201-1 1.0UF
ROOM=USB_PD ROOM=USB_PD 20%
2 6.3V
X5R NCNC
0201-1
ROOM=USB_PD
VCONN2 C4
VDDD E3
VCCD A1
VDDIO E1
VCONN1 E4
48 45 23
PP_VBUS1_E75_RVP
1
R6210
499K
1%
1/20W CCG2_TO_SMC_INT_L C3 B4 CCG2_TO_HYDRA_CC
MF 10 4 OUT GPIO_C3 CRITICAL CC1 OUT 48
2 201 D3 A4
ROOM=USB_PD
PP5V0_USB_RVP_R
NC
C2
GPIO_D3 U6200 CC2 NC 1 C6200
GPIO_C2 CSP B3 220PF
D2 RD1 NC 5%
1 NC GPIO_D2ROOM=USB_PD 2 10V
R6211 1 C6210 NC
B2 GPIO_B2
C0G-CERM
01005
50K 22NF CG8740AAT ROOM=USB_PD
1%
1/32W 20% R6200 50 23 22 21 10 IN
I2C0_SMC_SCL A3 I2C_0_SCL XRES B1 PMU_TO_CCG2_RESET_L IN 20
MF 2 6.3V
X5R-CERM I2C0_SMC_SDA 43.2 I2C0_SMC_SDA_CCG2_R A2
1 2 I2C_0_SDA
2 01005 01005 50 23 22 21 10 BI
ROOM=USB_PD ROOM=USB_PD 1%
1/32W 10 4 BI
AP_BI_CCG2_SWDIO E2 SWD_IO
MF
01005 10 4 IN
AP_TO_CCG2_SWCLK D1 SWD_CLK
VSS VSS
D4
C1
B B
A SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
I/O: USB PD
DRAWING NUMBER SIZE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
Hydra
I2C Address: 0011010X
50 47 45 36 19
PP3V0_S2 PP_ACC_VAR 19 46
1 C6390 1 C6391
1.0UF 0.1UF 49 47 46 38 22 20 17 14 12 10
PP1V8_S2
20% 20% 50
2 6.3V 2 6.3V
X5R X5R-CERM 1 C6395 C
C 0201-1
ROOM=HYDRA
01005
ROOM=HYDRA
0.01UF
R6300 2
10%
6.3V
H4
H5
C6
D6
A6
B6
E6
HYDRA_TO_PMU_USB_BRICK_ID 1
6.34K 2 X5R
20 OUT 01005
1%
ROOM=HYDRA VDD1V8 VDD3V0
1/32W ACC_PWR
1 C6300 MF
01005 U6300 From Tigris2
0.01UF ROOM=HYDRA
10% CBTL1612A1
2 6.3V 37 BI
90_MIKEYBUS_DATA_P C2 DIG_DP P_IN G6 PP_VBUS1_E75_RVP 23 45 47
X5R WLCSP
01005 37 BI
90_MIKEYBUS_DATA_N D2 DIG_DN ROOM=HYDRA ACC1 A5 PP_HYDRA_ACC1 45 49
ROOM=HYDRA
90_USB_BB_DATA_P D3 USB1_DP
CRITICAL ACC1 B5 1 C6311 1 C6312
50 BI
ACC1 C5 0.47UF 0.47UF
50
90_USB_BB_DATA_N D4 USB1_DN 20% 20%
BI
ACC1 D5 2 25V 2 25V
L6300 HYDRA_TO_PMU_USB_BRICK_ID_R F3 BRICK_ID ACC1 E5
CER-X5R
0201
CER-X5R
0201
15NH-250MA
90_USB_AP_DATA_L_P ACC2 A7 PP_HYDRA_ACC2 ROOM=HYDRA ROOM=HYDRA
6
90_USB_AP_DATA_P 1 2 B3 USB0_DP
49
BI
ACC2 B7
GND_VOID
0201 90_USB_AP_DATA_L_N B4 USB0_DN
ROOM=HYDRA ACC2 C7
L6301 11 IN
UART_AP_TO_ACCESSORY_TXD D1 UART0_TX ACC2 D7
15NH-250MA 11
UART_ACCESSORY_TO_AP_RXD C1 UART0_RX ACC2 E7
OUT
90_USB_AP_DATA_N 1 2
6 BI
GND_VOID 11 IN
UART_AP_DEBUG_TXD F2 UART1_TX DP1 C3 90_HYDRA_DP1_CONN_P BI 49
0201
ROOM=HYDRA 11 OUT
UART_AP_DEBUG_RXD E2 UART1_RX DN1 C4 90_HYDRA_DP1_CONN_N BI 49
6 OUT
SWD_DOCK_TO_AP_SWCLK E1 JTAG_CLK CON_DET_L G3 HYDRA_CON_DETECT_L IN 49
6
SWD_DOCK_BI_AP_SWDIO F1 JTAG_DIO HYDRA_TO_TIGRIS_VBUS1_VALID_L
POW_GATE_EN* H3
BI
OUT 4 23
PMU_HYDRA_TO_AP_FORCE_DFU H2 FORCE_DFU
50 20 11 OUT
SWITCH_EN E4 PMU_TO_AP_HYDRA_ACTIVE_READY
B G2 EXT_SW_EN HOST_RESET F6 HYDRA_TO_PMU_HOST_RESET
IN 4 6 20
20
B
NC OUT
HYDRA_TO_NUB_DOCK_CONNECT G1 DOCK_CONNECT
12 OUT
SDA G5 I2C1_SMC_SDA BI 10
47 IN
CCG2_TO_HYDRA_CC B2 CC0 SCL G4 I2C1_SMC_SCL IN 10
A2 CC1 INT F7 HYDRA_TO_NUB_INT OUT 12
BYPASS F5 HYDRA_BYPASS
DVSS
DVSS1
1 C6330
1.0UF
20%
E3
G7
H1
H6
H7
F4
2 6.3V
X5R
0201-1
ROOM=HYDRA
A SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
PAGE TITLE
I/O: Hydra
DRAWING NUMBER SIZE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D 0%
1/32W 1 C6416
CKPLUS_WAIVE=I2C_PULLUP
50 49
SPKRAMP_BOT_TO_COIL_OUT_NEG 45 46 D
MF
01005 56PF SPKRAMP_BOT_TO_COIL_OUT_POS
ROOM=B2B_DOCK 5% 50 49
1 2
2 25V
NP0-C0G-CERM COIL_TO_SPKRAMP_BOT_VSENSE_POS_CONN 3 4 90_HYDRA_DP1_CONN_P
01005 49 48
ROOM=B2B_DOCK 49
COIL_TO_SPKRAMP_BOT_VSENSE_NEG_CONN 5 6 90_HYDRA_DP1_CONN_N 48
R6418 7 8
I2C0_AP_SDA 2
0.00 1 I2C0_AP_BI_SAKONNET_SDA_CONN PP_CODEC_TO_LOWERMIC4_BIAS_CONN 9 10 90_HYDRA_DP2_CONN_N
46 20 10 BI 49 49 48
0%
CKPLUS_WAIVE=I2C_PULLUP LOWERMIC4_TO_CODEC_BIAS_FILT_RET 11 12 90_HYDRA_DP2_CONN_P
1/32W
MF
1 C6418 38
LOWERMIC4_TO_CODEC_AIN4_CONN_N 13 14
48
01005 56PF 49
LOWERMIC4_TO_CODEC_AIN4_CONN_P
ROOM=B2B_DOCK 5%
25V 49
15 16 PP_HYDRA_ACC1_CONN 49
2 NP0-C0G-CERM PP1V8_IMU_COMPASS_DOCK_CONN 17 18 MIKEYBUS_REFERENCE 37
01005 49
ROOM=B2B_DOCK 49
I2C1_AOP_BI_COMPASS_SDA_DOCK_CONN 19 20 HYDRA_CON_DETECT_CONN_L 49
I2C1_AOP_TO_COMPASS_SCL_DOCK_CONN 21 22 PP1V8_SAKONNET_CONN 49
R6419 49
COMPASS_TO_AOP_INT_DOCK_CONN 23 24 I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK_CONN 49
I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK 2
49.9 1 I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK_CONN 49
50 41 38 12 IN 49
25 26 I2C0_AP_BI_SAKONNET_SDA_CONN 49
1%
1/32W
MF
1 C6419 49
LOWERMIC1_TO_CODEC_AIN1_CONN_P 27 28 I2C0_AP_TO_SAKONNET_SCL_CONN 49
01005 68PF 49
LOWERMIC1_TO_CODEC_AIN1_CONN_N 29 30 I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK_CONN 49
ROOM=B2B_DOCK 5%
2 25V
NP0-C0G-CERM 38
LOWERMIC1_TO_CODEC_BIAS_FILT_RET 31 32 I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT_CONN 49
01005 49
PP_CODEC_TO_LOWERMIC1_BIAS_CONN 33 34
R6420 ROOM=B2B_DOCK
49
I2C1_AP_BI_MIC1_SDA_CONN 35 36 PP_HYDRA_ACC2_CONN 49
I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK 2
49.9 1 I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK_CONN I2C1_AP_TO_MIC1_SCL_CONN 37 38
50 41 38 12 IN 49 49
1% 39 40 ARC1_TO_SOLENOID1_OUT_NEG
1/32W
MF
1 C6420 SOLENOID1_TO_ARC1_VSENSE_NEG 41 42
41 49
01005 68PF 41
ARC1_TO_SOLENOID1_OUT_POS
ROOM=B2B_DOCK 5% 41
SOLENOID1_TO_ARC1_VSENSE_POS 43 44 41 49
2 25V
NP0-C0G-CERM
01005
Compass (Dock Flex Location) R6421
ROOM=B2B_DOCK 23
PP_VBUS1_E75 47 48
C NOSTUFF
FL6430 41 38 12 BI
I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT 2
49.9 1 I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT_CONN 49
C6490
0.1UF
1 C6491
0.1UF
1 C6492
0.1UF
1 C6493
220PF
1 C6494
220PF
1 ROOM=B2B_DOCK C6495
0.1UF
1 C6496
0.1UF
1 C6497
0.1UF
1
C
150OHM-25%-200MA-0.7DCR 1% 10% 10% 10% 5% 5% 10% 10% 10%
PP1V8_IMU_S2 2 1 PP1V8_IMU_COMPASS_DOCK_CONN 1/32W
MF
1 C6421 25V 2
X5R
25V 2
X5R
25V 2
X5R
25V 2
COG
25V 2
COG
25V 2
X5R
25V 2
X5R
25V 2
X5R
26 25 17
NOSTUFF
49
01005 68PF 0201 0201 0201 01005 01005 0201 0201 0201
01005 5% ROOM=B2B_DOCK ROOM=B2B_DOCK ROOM=B2B_DOCK ROOM=B2B_DOCK ROOM=B2B_DOCK ROOM=B2B_DOCK ROOM=B2B_DOCK ROOM=B2B_DOCK
ROOM=B2B_DOCK 1 C6430 ROOM=B2B_DOCK
2 25V
NP0-C0G-CERM
220PF 01005
5% ROOM=B2B_DOCK
2 10V
C0G-CERM 49 41
ARC1_TO_SOLENOID1_OUT_POS
NOSTUFF
01005
ROOM=B2B_DOCK
ARC1_TO_SOLENOID1_OUT_NEG 41 49 SOUTH SPEAKER FL6480
R6431 150OHM-25%-200MA-0.7DCR
0.00
IN
I2C1_AOP_SCL 2 1
NOSTUFF
I2C1_AOP_TO_COMPASS_SCL_DOCK_CONN 49 C6472 1 C6471 1 C6470 1 C6473 1 50 OUT
COIL_TO_SPKRAMP_BOT_VSENSE_POS 2 1 COIL_TO_SPKRAMP_BOT_VSENSE_POS_CONN 49
0%
CKPLUS_WAIVE=I2C_PULLUP 820PF 220PF 220PF 820PF 01005 NOSTUFF
1/32W
MF
1 C6431 10%
10V 2
5%
10V 2
5%
10V 2
10%
10V 2 ROOM=B2B_DOCK 1 C6480
01005 56PF X5R
01005
C0G-CERM
01005
C0G-CERM
01005
X5R
01005
220PF
ROOM=B2B_DOCK 5% 5%
2 25V
NP0-C0G-CERM
ROOM=B2B_DOCK ROOM=B2B_DOCK ROOM=B2B_DOCK ROOM=B2B_DOCK 2 10V
C0G-CERM
NOSTUFF 01005
ROOM=B2B_DOCK Hydra FL6482
01005
ROOM=B2B_DOCK
R6432 R6410 150OHM-25%-200MA-0.7DCR
I2C1_AOP_SDA 2
0.00 1 I2C1_AOP_BI_COMPASS_SDA_DOCK_CONN HYDRA_CON_DETECT_L 2
100 1 HYDRA_CON_DETECT_CONN_L COIL_TO_SPKRAMP_BOT_VSENSE_NEG 2 1 COIL_TO_SPKRAMP_BOT_VSENSE_NEG_CONN
BI 49 48 OUT 49 50 OUT 49
CKPLUS_WAIVE=I2C_PULLUP NOSTUFF
0% NOSTUFF 5% 01005
1/32W
MF
1 C6432 1/32W
MF
1 C6410 ROOM=B2B_DOCK 1 C6482
01005 56PF 01005 27PF 220PF
ROOM=B2B_DOCK 5% ROOM=B2B_DOCK 5% 5%
NOSTUFF 2 25V
NP0-C0G-CERM 2 16V
NP0-C0G 2 10V
C0G-CERM
01005 01005 01005
FL6433 ROOM=B2B_DOCK FL6411 ROOM=B2B_DOCK ROOM=B2B_DOCK
150OHM-25%-200MA-0.7DCR 10-OHM-1.1A
COMPASS_TO_AOP_INT 2 1 COMPASS_TO_AOP_INT_DOCK_CONN PP_HYDRA_ACC1 1 2 PP_HYDRA_ACC1_CONN
OUT 49 48 45 49
50 49
SPKRAMP_BOT_TO_COIL_OUT_POS
01005 NOSTUFF 01005 IN
ROOM=B2B_DOCK 1 C6433 ROOM=B2B_DOCK 1 C6411 C6484 1 1 C6483
220PF 220PF
B 5%
2 10V
5%
10V
2 C0G-CERM
820PF
10% 5%
220PF B
C0G-CERM 10V 2 2 10V
01005
ROOM=B2B_DOCK
FL6413 01005
ROOM=B2B_DOCK
X5R
01005
C0G-CERM
01005
22-OHM-25%-1800MA ROOM=B2B_DOCK ROOM=B2B_DOCK
48
PP_HYDRA_ACC2 1 2 PP_HYDRA_ACC2_CONN 49
0201
ROOM=B2B_DOCK
1 C6413 SPKRAMP_BOT_TO_COIL_OUT_NEG
220PF 50 49 IN
5%
2 10V
C0G-CERM
01005 C6486 1 1 C6485
LOWER MIC1 + LOWER MIC4 ROOM=B2B_DOCK 820PF
10%
10V 2
5%
220PF
2 10V
FL6450 FL6462 X5R
01005
C0G-CERM
01005
150OHM-25%-200MA-0.7DCR 150OHM-25%-200MA-0.7DCR ROOM=B2B_DOCK ROOM=B2B_DOCK
37 OUT
LOWERMIC1_TO_CODEC_AIN1_P 2 1 LOWERMIC1_TO_CODEC_AIN1_CONN_P 49 37 OUT
LOWERMIC4_TO_CODEC_AIN4_N 2 1 LOWERMIC4_TO_CODEC_AIN4_CONN_N 49
01005
ROOM=B2B_DOCK 1 C6450
01005
ROOM=B2B_DOCK
1 C6462
56PF 56PF
5% 5%
25V
2 NP0-C0G-CERM
2 25V
NP0-C0G-CERM 01005
FL6452
01005
ROOM=B2B_DOCK
FL6464 ROOM=B2B_DOCK
150OHM-25%-200MA-0.7DCR
150OHM-25%-200MA-0.7DCR
PP_CODEC_TO_LOWERMIC4_BIAS 2 1 PP_CODEC_TO_LOWERMIC4_BIAS_CONN 49
37 OUT
LOWERMIC1_TO_CODEC_AIN1_N 2 1 LOWERMIC1_TO_CODEC_AIN1_CONN_N 49
38
01005
01005
ROOM=B2B_DOCK
1 C6452 ROOM=B2B_DOCK 1 C6464
56PF 220PF
5% 5%
2 25V 2 10V
C0G-CERM
NP0-C0G-CERM 01005
01005
FL6454 ROOM=B2B_DOCK ROOM=B2B_DOCK
150OHM-25%-200MA-0.7DCR R6465
0.00
A 38
PP_CODEC_TO_LOWERMIC1_BIAS 2 1 PP_CODEC_TO_LOWERMIC1_BIAS_CONN 49 33 10 IN
I2C1_AP_SCL 2 1 I2C1_AP_TO_MIC1_SCL_CONN
CKPLUS_WAIVE=I2C_PULLUP
49
A
C6454
SYNC_MASTER=test_mlb
01005 1 0%
SYNC_DATE=10/13/2016
ROOM=B2B_DOCK
220PF
1/32W
MF
1 C6465 PAGE TITLE
5%
2 10V
01005
ROOM=B2B_DOCK 5%
56PF I/O: B2B Dock
C0G-CERM 2 25V
NP0-C0G-CERM DRAWING NUMBER SIZE
01005
FL6460 ROOM=B2B_DOCK
01005 051-02221 D
150OHM-25%-200MA-0.7DCR R6466
ROOM=B2B_DOCK
Apple Inc. REVISION
37
LOWERMIC4_TO_CODEC_AIN4_P 2 1 LOWERMIC4_TO_CODEC_AIN4_CONN_P 49 33 10
I2C1_AP_SDA 2
0.00 1 I2C1_AP_BI_MIC1_SDA_CONN 49
9.0.0
OUT BI
CKPLUS_WAIVE=I2C_PULLUP NOTICE OF PROPRIETARY PROPERTY: BRANCH
01005
ROOM=B2B_DOCK
1 C6460 0%
1/32W 1 C6466 THE INFORMATION CONTAINED HEREIN IS THE evt-1
56PF MF
01005 56PF PROPRIETARY PROPERTY OF APPLE INC.
5% 5% THE POSESSOR AGREES TO THE FOLLOWING: PAGE
2 25V
NP0-C0G-CERM
ROOM=B2B_DOCK
2 25V I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
64 OF 80
01005 NP0-C0G-CERM II NOT TO REPRODUCE OR COPY IT
ROOM=B2B_DOCK
01005 SHEET
ROOM=B2B_DOCK III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 49 OF 51
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
11 AP_TO_GNSS_WAKE
S5 IOS5 IOS91 S91 PMU_TO_BBPMU_RESET_L 20
D 20 PMU_TO_GNSS_EN
S6 IOS6 IOS92 S92 PMU_AMUX_AY 20 D
11 AP_TO_BB_TIME_MARK
S7 IOS7 SIGNAL IOS93 S93 AOP_TO_WLAN_CONTEXT_B 12
7 90_PCIE_AP_TO_BB_REFCLK_N
S8 IOS8 IOS94 S94 UART_BB_TO_AOP_RXD 12
S9 IOS9 IOS95 S95 UART_AOP_TO_BB_TXD
7 90_PCIE_AP_TO_BB_REFCLK_P
S10 IOS10 IOS96 S96 AOP_TO_WLAN_CONTEXT_A
12 G1 IOG1 J_INT_BOT IOG63 G63 G125 IOG125
J_INT_BOT IOG187 G187
12 G2 IOG2 INTERPOSER-BOT-D22 IOG64 G64 G126 IOG126 IOG188 G188
7 90_PCIE_BB_TO_AP_RXD_P
S11 IOS11 IOS97 S97 BT_TO_PMU_HOST_WAKE INTERPOSER-BOT-D22
20 G3 IOG3 SMT-PAD IOG65 G65 G127 IOG127 IOG189 G189
7 90_PCIE_BB_TO_AP_RXD_N
S12 IOS12 IOS98 S98 PMU_TO_BT_REG_ON SYM 1 OF 3 SMT-PAD
20 G4 IOG4 IOG66 G66 G128 IOG128 IOG190 G190
7 90_PCIE_AP_TO_BB_TXD_P
S13 IOS13 IOS99 S99 PMU_TO_WLAN_CLK32K SYM 2 OF 3
20 G5 IOG5 IOG67 G67 G129 IOG129 IOG191 G191
S14 IOS14 IOS100 S100 WLAN_TO_PMU_HOST_WAKE 20 G6 IOG6 GND IOG68 G68 G130 IOG130 IOG192 G192
90_PCIE_AP_TO_BB_TXD_N S15 IOS15 IOS101 S101 PMU_TO_WLAN_REG_ON
7 20 G7 IOG7 IOG69 G69 G131 IOG131 GND IOG193 G193
7 90_PCIE_WLAN_TO_AP_RXD_P
S16 IOS16 IOS102 S102 PMU_AMUX_BY 20 G8 IOG8 IOG70 G70 G132 IOG132 IOG194 G194
S17 IOS17 IOS103 S103 CODEC_TO_SPKRAMP_BOT_ARC_MCLK 38 41 G9 IOG9 IOG71 G71 G133 IOG133 IOG195 G195
7 90_PCIE_WLAN_TO_AP_RXD_N
S18 IOS18 IOS104 S104 PMU_TO_BB_USB_VBUS_DETECT 20 G10 IOG10 IOG72 G72 G134 IOG134 IOG196 G196
7 90_PCIE_AP_TO_WLAN_REFCLK_N
S19 IOS19 IOS105 S105 PMU_HYDRA_TO_AP_FORCE_DFU 11 20 48 G11 IOG11 IOG73 G73 G135 IOG135 IOG197 G197
S20 IOS20 IOS106 S106 AP_TO_BT_WAKE 11 G12 IOG12 IOG74 G74 G136 IOG136 IOG198 G198
90_PCIE_AP_TO_WLAN_REFCLK_P S21 IOS21 IOS107 S107 WLAN_TO_AP_TIME_SYNC
7 11 G13 IOG13 IOG75 G75 G137 IOG137 IOG199 G199
7 90_PCIE_AP_TO_WLAN_TXD_N
S22 IOS22 IOS108 S108 RADIO_PA_NTC 20 G14 IOG14 IOG76 G76 G138 IOG138 IOG200 G200
S23 IOS23 IOS109 S109 AP_TO_MANY_BSYNC 8 12 20 21 28 G15 IOG15 IOG77 G77 G139 IOG139 IOG201 G201
7 90_PCIE_AP_TO_WLAN_TXD_P S24 IOS24 IOS110 S110 TOUCH_TO_AMUX_PP1V8 20 G16 IOG16 IOG78 G78 G140 IOG140 IOG202 G202
S25 IOS25 IOS111 S111 PP3V5_RACER 42
G17 IOG17 IOG79 G79 G141 IOG141 IOG203 G203
S26 IOS26 IOS112 S112 PP1V1_RACER 42
G18 IOG18 IOG80 G80 G142 IOG142 IOG204 G204
20 PMU_TO_IKTARA_EN_EXT_1P8V S27 IOS27 IOS113 S113
G19 IOG19 IOG81 G81 G143 IOG143 IOG205 G205
10 IKTARA_TO_SMC_INT
S28 IOS28 IOS114 S114 PP5V25_TOUCH_VDDH 42 G20 IOG20 IOG82 G82 G144 IOG144 IOG206 G206
47 23 22 21 10 I2C0_SMC_SCL
S29 IOS29 IOS115 S115 RACER_TO_ACORN_ORB_SCAN 42 G21 IOG21 IOG83 G83 G145 IOG145 IOG207 G207
47 23 22 21 10 I2C0_SMC_SDA
S30 IOS30 IOS116 S116 PP1V8_TOUCH_RACER_S2 17 42
G22 IOG22 IOG84 G84 G146 IOG146 IOG208 G208
36 31 BB_TO_STROBE_DRIVER_GSM_BURST_IND
S31 IOS31 IOS117 S117 I2C3_AP_SCL 10 42 G23 IOG23 IOG85 G85 G147 IOG147 IOG209 G209
S32 IOS32 IOS118 S118 I2C3_AP_SDA
C 37 PDM_CODEC_TO_SPKRAMP_TOP_CLK
NC
S33 IOS33 IOS119 S119 TOUCH_TO_ACORN_PP5V25_EN
10 42
42
G24
G25
IOG24 IOG86 G86
G87
G148
G149
IOG148 IOG210 G210
G211
C
S34 S120 IOG25 IOG87 IOG149 IOG211
37 PDM_CODEC_TO_SPKRAMP_TOP_DATA IOS34 IOS120 PN6V7_RACER 42 G26 G88 G150 G212
S35 S121 IOG26 IOG88 IOG150 IOG212
7 PCIE_AP_TO_BB_RESET_L IOS35 IOS121 PMU_TO_TOUCH_CLK32K_RESET_L 20 G27 IOG27 IOG89 G89 G151 IOG151 IOG213 G213
10 I2S_AP_TO_SPKRAMP_TOP_MCLK
S36 IOS36 IOS122 S122 PP10V0_RACER 42
G28 IOG28 IOG90 G90 G152 IOG152 IOG214 G214
11 AP_TO_SPKRAMP_TOP_RESET_L
S37 IOS37 IOS123 S123 AP_TO_RACER_RESET_L 11
G29 IOG29 IOG91 G91 G153 IOG153 IOG215 G215
11 SPKRAMP_TOP_TO_AP_INT_L
S38 IOS38 IOS124 S124 RACER_TO_AOP_INT_L 12
G30 IOG30 IOG92 G92 G154 IOG154 IOG216 G216
10 I2C2_AP_SDA
S39 IOS39 IOS125 S125 SWD_AOP_TO_MANY_SWCLK 4 12 16
G31 IOG31 IOG93 G93 G155 IOG155 IOG217 G217
10 I2C2_AP_SCL
S40 IOS40 IOS126 S126 SWD_AOP_BI_RACER_SWDIO 12
G32 IOG32 IOG94 G94 G156 IOG156 IOG218 G218
41 38 19 PP1V8_AUDIO_VA_S2
S41 IOS41 IOS127 S127 UART_AOP_TO_RACER_TXD 12
G33 IOG33 IOG95 G95 G157 IOG157 IOG219 G219
4
PP_GPU_LVCC S42 IOS42 IOS128 S128 UART_RACER_TO_AOP_RXD 12
G34 IOG34 IOG96 G96 G158 IOG158 IOG220 G220
4
PP_CPU_PCORE_LVCC S43 IOS43 IOS129 S129 HALL2_TO_AOP_IRQ_L 12
G35 IOG35 IOG97 G97 G159 IOG159 IOG221 G221
11 AP_TO_BB_IPC_GPIO1
S44 IOS44 IOS130 S130 AP_TO_RACER_REF_CLK 10
G36 IOG36 IOG98 G98 G160 IOG160 IOG222 G222
11 AP_TO_BB_RESET_L
S45 IOS45 IOS131 S131 SPI_AP_TO_RACER_CS_L 10
G37 IOG37 IOG99 G99 G161 IOG161 IOG223 G223
12
HALL3_TO_AOP_IRQ_L S46 IOS46 IOS132 S132 SPI_RACER_TO_AP_MISO 10
G38 IOG38 IOG100 G100 G162 IOG162 IOG224 G224
S47 IOS47 IOS133 S133 SPI_AP_TO_RACER_MOSI 10
NC G39 IOG39 IOG101 G101 G163 IOG163 IOG225 G225
10 5 BOARD_ID3
S48 IOS48 IOS134 S134 SPI_AP_TO_RACER_SCLK 10
G40 IOG40 IOG102 G102 G164 IOG164 IOG226 G226
7 PCIE_WLAN_BI_AP_CLKREQ_L
S49 IOS49 IOS135 S135 PP_BATT_VCC 22 23
G41 IOG41 IOG103 G103 G165 IOG165 IOG227 G227
7 PCIE_AP_TO_WLAN_RESET_L
S50 IOS50 IOS136 S136
G42 IOG42 IOG104 G104 G166 IOG166 IOG228 G228
49 41 38 12 I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK
S51 IOS51 IOS137 S137 PP3V0_S2 19 36 45 47 48
G43 IOG43 IOG105 G105 G167 IOG167 IOG229 G229
41 38 12 I2S_CODEC_ASP1_TO_AOP_AMPS_DIN
S52 IOS52 IOS138 S138
G44 IOG44 IOG106 G106 G168 IOG168 IOG230 G230
49 41 38 12 I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK
S53 IOS53 IOS139 S139 90_USB_BB_DATA_P 48
G45 IOG45 IOG107 G107 G169 IOG169 IOG231 G231
20 PMU_TO_IKTARA_RESET_L
S54 IOS54 IOS140 S140 90_USB_BB_DATA_N 48
G46 IOG46 IOG108 G108 G170 IOG170 IOG232 G232
10 I2S_BB_TO_AP_DIN
S55 IOS55 IOS141 S141
G47 IOG47 IOG109 G109 G171 IOG171 IOG233 G233
10 I2S_BB_TO_AP_LRCLK
S56 IOS56 IOS142 S142 PP_VBUS2_IKTARA 23
G48 IOG48 IOG110 G110 G172 IOG172 IOG234 G234
10 I2S_BB_TO_AP_BCLK
S57 IOS57 IOS143 S143
G49 IOG49 IOG111 G111 G173 IOG173 IOG235 G235
10 I2S_AP_TO_BB_DOUT
S58 IOS58 IOS144 S144
G50 G112 G174 G236
B 11 BB_TO_AP_RESET_DETECT_L
S59 IOS59 IOS145 S145
G51
IOG50
IOG51
IOG112
IOG113 G113 G175
IOG174
IOG175
IOG236
IOG237 G237 B
11 AP_TO_BBPMU_RADIO_ON_L
S60 IOS60 IOS146 S146 IKTARA_COIL2 25
G52 IOG52 IOG114 G114 G176 IOG176 IOG238 G238
11 AP_TO_WLAN_DEVICE_WAKE
S61 IOS61 IOS147 S147
G53 IOG53 IOG115 G115 G177 IOG177 IOG239 G239
41 12 SPKRAMP_BOT_ARC_TO_AOP_INT_L
S62 IOS62 IOS148 S148
G54 IOG54 IOG116 G116 G178 IOG178 IOG240 G240
41 12 AOP_TO_SPKRAMP_BOT_ARC_RESET_L
S63 IOS63 IOS149 S149
G55 IOG55 IOG117 G117 G179 IOG179 IOG241 G241
S64 IOS64 IOS150 S150 IKTARA_COIL1 25
NC G56 IOG56 IOG118 G118 G180 IOG180 IOG242 G242
12 SWD_AOP_BI_BB_SWDIO
S65 IOS65 IOS151 S151
G57 IOG57 IOG119 G119 G181 IOG181 IOG243 G243
49 41 25 12 4 I2C1_AOP_SDA
S66 IOS66 IOS152 S152
G58 IOG58 IOG120 G120 G182 IOG182 IOG244 G244
49 41 25 12 4 I2C1_AOP_SCL
S67 IOS67 IOS153 S153
G59 IOG59 IOG121 G121 G183 IOG183 IOG245 G245
43 42 41 34 31 27 23 21 19 18 PP_VDD_MAIN
S68 IOS68 IOS154 S154 AP_TO_BB_COREDUMP 11
50 46 45 G60 IOG60 IOG122 G122 G184 IOG184 IOG246 G246
S69 IOS69 IOS155 S155 PCIE_BB_BI_AP_CLKREQ_L 7
G61 IOG61 IOG123 G123 G185 IOG185 IOG247 G247
S70 IOS70 IOS156 S156 SPKRAMP_TOP_TO_COIL_OUT_POS 36
G62 IOG62 IOG124 G124 G186 IOG186 IOG248 G248
S71 IOS71 IOS157 S157 SPKRAMP_TOP_TO_COIL_OUT_NEG 36
S72 IOS72 IOS158 S158 COIL_TO_SPKRAMP_TOP_VSENSE_POS 36
S73 IOS73 IOS159 S159 COIL_TO_SPKRAMP_TOP_VSENSE_NEG 36
S74 IOS74 IOS160 S160 COIL_TO_SPKRAMP_BOT_VSENSE_POS 49
S75 IOS75 IOS161 S161 COIL_TO_SPKRAMP_BOT_VSENSE_NEG 49
S76 IOS76 IOS162 S162 SPKRAMP_BOT_TO_COIL_OUT_POS 49
11 UART_BT_TO_AP_CTS_L
S78 IOS78 IOS164 S164 AP_TO_NFC_DEV_WAKE 11
11 UART_AP_TO_BT_TXD
S79 IOS79 IOS165 S165 UART_NFC_TO_AP_CTS_L 11
11 UART_BT_TO_AP_RXD
S80 IOS80 IOS166 S166 UART_AP_TO_NFC_TXD 11
38 34 27 21 19 PP_VDD_BOOST
S81 IOS81 IOS167 S167 UART_NFC_TO_AP_RXD 11
11 UART_AP_TO_WLAN_TXD
S82 IOS82 IOS168 S168 UART_AP_TO_NFC_RTS_L 11
11 UART_AP_TO_WLAN_RTS_L
S83 IOS83 IOS169 S169 AP_TO_NFC_FW_DWLD_REQ 11
11 UART_WLAN_TO_AP_RXD
S84 IOS84 IOS170 S170 NFC_TO_PMU_HOST_WAKE
A 11 UART_WLAN_TO_AP_CTS_L
S85 IOS85 IOS171 S171 PMU_TO_NFC_EN
20
20 SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016
A
48 47 46 38 22 20 17 14 12 10 PP1V8_S2
S86 IOS86 IOS172 S172 PAGE TITLE
NC
50 49
I/O: Interposer (Bottom)
DRAWING NUMBER SIZE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
C C
B B
A SYNC_DATE=06/04/2015 A
PAGE TITLE
RADIOS
DRAWING NUMBER SIZE
051-02221 D
Apple Inc. REVISION
9.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
8 7 6 5 4 3 2 1
CK
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD
REV ECN DESCRIPTION OF REVISION
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. DATE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
7 0008448938 ENGINEERING RELEASED 2017-04-11
A
Sub Designs TABLE_HIERARCHY_CONFIG_HEAD
TABLE OF CONTENTS SYNC_DATE=07/29/2016 A
HARD/ DRAWING TITLE
SOURCE PROJECT SUB-DESIGN NAME VERSION SOFT
SYNC_DATE/TIME
SCH,MLB,BOT,X893
BOM:639-03229
TABLE_HIERARCHY_CONFIG_ITEM
7.0.0
TABLE_5_HEAD
825-7691 1 EEEE FOR (MLB_BOT, 639-03229) EEEE_HM07 NO COMMON PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
TABLE_5_ITEM TABLE_5_ITEM
CAP,CER,0.022UF,50V,X7R,10%,0402
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: CRITICAL PART# COMMENT PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: 138S0831 1 CAP,TYPICAL,2.2UF,6.3V,0201,MURATA C5890 CRITICAL TYPICAL_CAP
PART NUMBER PART NUMBER
TABLE_CRITICAL_ITEM
TABLE_ALT_ITEM
138S00148 138S00149 BOM_TABLE_ALTS ALL 0402-3T,10.5uF@1V, Kyocera 685-00185 685-00184 BOM_TABLE_ALTS SUBBOM_DS SUBBOM,MLB,BOT,DIODES,ONSEMI,X893
TABLE_ALT_ITEM TABLE_ALT_HEAD
138S00150 138S00149 BOM_TABLE_ALTS ALL 0402-3T,10.5uF@1V, SEMCO PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:
PART NUMBER
TABLE_5_HEAD
TABLE_5_ITEM
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: CRITICAL PART# COMMENT 371S00133 4 DIODES,SHOTTKY DIODE,30V,2A,0603 D3400,D3401,D3402,D3403 CRITICAL DIODES_DS
PART NUMBER
TABLE_CRITICAL_ITEM TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_ALT_HEAD TABLE_CRITICAL_HEAD
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: CRITICAL PART# COMMENT
PART NUMBER
TABLE_CRITICAL_ITEM
TABLE_ALT_ITEM
138S00139 0201,3uF@1V
138S00138 138S00139 BOM_TABLE_ALTS ALL 0201,3uF@1V, Kyocera
TABLE_ALT_ITEM
TABLE_ALT_HEAD TABLE_CRITICAL_HEAD
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: CRITICAL PART# COMMENT
PART NUMBER
TABLE_CRITICAL_ITEM
TABLE_ALT_ITEM
138S00146 0402,5.1uF@3V
138S00145 138S00146 BOM_TABLE_ALTS ALL 0402,5.1uF@3V, Kyocera
TABLE_ALT_ITEM
TABLE_ALT_ITEM
138S00141 0201,1.1uF@3V
138S00140 138S00141 BOM_TABLE_ALTS ALL 0201,1.1uF@3V, Kyocera
TABLE_ALT_ITEM
155S00194 155S0610 BOM_TABLE_ALTS ALL FERR BD,150 OHM,25%,200MA,0.7 DCR,01005 155S0610 FERR BD,150 OHM,25%,200MA,0.7 DCR,01005
TABLE_ALT_ITEM
TABLE_CRITICAL_HEAD
TABLE_ALT_ITEM
138S0652 CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO
TABLE_CRITICAL_ITEM
B
138S00024 138S0986 BOM_TABLE_ALTS ALL CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK 138S0986 CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK
TABLE_ALT_ITEM TABLE_CRITICAL_ITEM
TABLE_ALT_ITEM TABLE_CRITICAL_ITEM
A
TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM
138S0979 CAP,CER,X5R,10UF,20%,10V,0402,H=0.65MM
TABLE_CRITICAL_ITEM
132S00008 CAP,CER,0.1UF,10%,50V,X7R,0402
TABLE_CRITICAL_ITEM
SYNC_MASTER= SYNC_DATE=03/08/2017 A
PAGE TITLE
138S0683 CAP,CER,X5R,1UF,10%,25V,0402 131S0804 CAP,CER,27PF,5%,C0G,25V,0201
132S0663 CAP,CER,X5R,1UF,10%,25V,0402
TABLE_CRITICAL_ITEM
131S0307 CAP,CER,NP0/C0G,100PF,5%,16V,01005
TABLE_CRITICAL_ITEM
SYSTEM:BOM Tables
DRAWING NUMBER SIZE
TABLE_CRITICAL_ITEM TABLE_CRITICAL_ITEM
FIDUCIALS
D D
FD0401
FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY
FD0402
FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY
FD0403
FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY
FD0404
FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY
FD0405
FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY
FD0406
FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY
C FD0410 C
FID
0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY
FD0411
FID
0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY
FD0412
FID
0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY
FD0413
FID
0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY
FD0414
FID
0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY
FD0415
FID
0P5SQ-SMP3SQ-NSP
1
ROOM=ASSEMBLY
B B
CRITICAL
SB0400
STDOFF-SUBMERGED-X891
1
ROOM=ASSEMBLY
A SYNC_DATE=12/01/2016 A
PAGE TITLE
051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
BOOTSTRAPPING:BOARD ID[3]
PP1V8_S2 6 9 11 12
C C
R0630
BOARD_ID3 1
1.00K 2
11 OUT
CKPLUS_WAIVE=SINGLE_NODENET
5%
1/32W
MF
01005
ROOM=SOC
B B
A SYNC_DATE=11/03/2016 A
SYNC_MASTER
PAGE TITLE
BOOTSTRAPPING
DRAWING NUMBER SIZE
051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
TP0522
1 TP0755 PP0704
A 11 10
PP1V1_RACER A P2MM-NSM
TP-P55 SM
ROOM=TEST TP-P55 11 6 IN
IKTARA_TO_SMC_INT 1
PP ROOM=TEST
ROOM=TEST
AMUX 12 11 10
AP_TO_MANY_BSYNC TP0759
A
PMU_AMUX_AY TP0713
1
TP-P55
11 A ANALOG MUX A OUTPUT ROOM=TEST
TP-P55
ROOM=TEST
HALL2_TO_AOP_IRQ_L TP0760
11 10 A
TP-P55
ROOM=TEST
PMU_AMUX_BY TP0715
1 TP0761
11 A ANALOG MUX B OUTPUT 11 10
AP_TO_RACER_RESET_L A
TP-P55
ROOM=TEST TP-P55
ROOM=TEST
UART_RACER_TO_AOP_RXD TP0762
11 10 A
DFU TP-P55
ROOM=TEST
PMU_HYDRA_TO_AP_FORCE_DFU TP0714
1 TP0763
11 A 11 10
RACER_TO_AOP_INT_L A
TP-P55
ROOM=TEST FORCE DFU TP-P55
ROOM=TEST
UART_AOP_TO_RACER_TXD TP0764
B 11 10 A B
LVCC TP-P55
ROOM=TEST
PP_GPU_LVCC TP0720
1
11 A
TP-P55
ROOM=TEST
PP_CPU_PCORE_LVCC TP0721
1 RACER_TO_ACORN_ORB_SCAN TP0766
11 A 11 10 A
TP-P55 TP-P55
ROOM=TEST ROOM=TEST
SPI_AP_TO_RACER_CS_L TP0767
COIL 11 10
TP-P55
ROOM=TEST
A
IKTARA_COIL2 TP0731
11 6 A
TP-P55
ROOM=TEST
A SYNC_MASTER=test_mlb SYNC_DATE=01/17/2017 A
I2C3_AP_SDA TP0771 PAGE TITLE
11 10
TP-P55
A SYSTEM: Testpoints (Bottom)
ROOM=TEST DRAWING NUMBER SIZE
051-02247 D
I2C3_AP_SCL TP0772 Apple Inc. REVISION
11 10 A 7.0.0
TP-P55
ROOM=TEST NOTICE OF PROPRIETARY PROPERTY: BRANCH
Iktara
D D
PP_IKTARA_VRECT
C3445 1 C3411 1 C3412 1
220PF 2.2UF 2.2UF
5% 20% 20%
25V 2 25V 25V
COG X5R 2 X5R 2
01005 0402-4 0402-4
ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA
R3401
1
0.020 2 PP_IKTARA_VMID
C3440 1 C3441 1
1%
2.2UF
20%
2.2UF
20%
1/6W
MF
1 C3413 1 C3442 1 C3443
25V
X5R 2
25V
X5R 2 0402 2.2UF 2.2UF 220PF
2 ROOM=IKTARA 2 20% 20% 5%
0402-4 0402-4 2 25V 2 25V 2 25V
ROOM=IKTARA ROOM=IKTARA X5R X5R COG
XW3401 XW3400 0402-4 0402-4 01005
ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA
SHORT-10L-0.05MM-SM
SHORT-10L-0.05MM-SM
1 ROOM=IKTARA
ROOM=IKTARA
1
PP_IKTARA_VMID_SENSE
PP_IKTARA_VRECT_SENSE
D1
D2
D3
D4
D5
D6
D7
H1
E1
E4
K1
F1
L1
J1
VRECT_VDD
VRECT_VDD
VRECT_VDD
VRECT_VDD
VRECT_VDD
VRECT_VDD
VRECT_VDD
VRECT_S
VMID_S
VMID_R_VDD
VMID_VDD
VMID_VDD
VMID_VDD
VMID_VDD
C K OMIT_TABLE K OMIT_TABLE K OMIT_TABLE K OMIT_TABLE
C
D3400
DSN2
D3401
DSN2
D3402
DSN2
D3403
DSN2
NSR20F30NX NSR20F30NX NSR20F30NX NSR20F30NX
ROOM=IKTARA ROOM=IKTARA
A A ROOM=IKTARA A A ROOM=IKTARA
CRITICAL
B5 CLAMP1 HV_GPO1 H4 PP_VBUS2_IKTARA
U3400 HV_GPO2 H5
NC 11
R3406 1
To Coil 0402
ROOM=IKTARA
0.1UF
IKTARA_BOOT1
SW L2 XW3402
SHORT-20L-0.05MM-SM 2M
1 2 C7 BOOT1_VDD 5%
11 5
IKTARA_COIL1 VOUT G1 IKTARA_VOUT_SNS 1 2 1/20W
OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE 10% ROOM=IKTARA
MF
201 2
1
R3450 1 C3451 1 C3452 1 C3453 1 C3454 1 C3455 1 C3456 16V
X5R-CERM
B6 AC1 VMID_AUX_SW_VDD E6 ROOM=IKTARA
100K 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0201 B7 AC1 VMID_AUX_VDD E5 PP5V0_VMID_AUX_IKTARA
10% 10% 10% 10% 10% 10% ROOM=IKTARA
1%
2 50V 2 50V 2 50V 2 50V 2 50V 2 50V
IKTARA_AC1 C6 AC1
1/20W
MF CER-X7R CER-X7R CER-X7R CER-X7R CER-X7R CER-X7R VDD5V E3 PP5V0_VDD_IKTARA
0402 0402 0402 0402 0402 0402
2 201 ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA
VDIG_CORE_VDD F7 PP1V5_VDIG_CORE_IKTARA 6
PP1V8_IKTARA
H7 PP1V8_IKTARA
NOSTUFF VDDO 6 R34071
C3402 1 1 C3403 VAUX_1P8_VDD G7 1 C3419 1 C3418 1 C3417 1 C3416 10K
5%
2200PF 2200PF 1/32W
10% 10% 1UF 1UF 4UF 2.2UF MF
To Coil 50V
X5R 2 2 50V
X5R
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
01005 2
ROOM=IKTARA
0201 0201 X5R X5R CERM-X5R X5R-CERM
11 5
IKTARA_COIL2 ROOM=IKTARA ROOM=IKTARA 0201 0201 0201 0201-2
ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA
OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE
1
R3460 1 C3461 1 C3462 1 C3463 1 C3464 1 C3465 1 C3466 IKTARA_AC2 B1 AC2
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF L4 I2C0_SMC_SDA
B 1%
100K 10% 10% 10% 10% 10% 10% B2 AC2
SDA
L5 I2C0_SMC_SCL
IN 11
B
1/20W
MF
2 50V
CER-X7R
0402
2 50V
CER-X7R
0402
2 50V
CER-X7R
0402
2 50V
CER-X7R
0402
2 50V
CER-X7R
0402
2 50V
CER-X7R
0402
C3405 C2 AC2
SCL
K4 IKTARA_TO_SMC_INT
BI 11
R3420
2 201 ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA ROOM=IKTARA
0.1UF INT OUT 5 11
100
1 2 IKTARA_BOOT2 C1 BOOT2_VDD RESET* J4 PMU_TO_IKTARA_RESET_R_L 1 2 PMU_TO_IKTARA_RESET_L 11
IN
5%
1 C3407 10%
16V GPIO1 H6
1/32W
MF
0.033UF X5R-CERM NC 01005
10% 0201 GPIO2 L6 ROOM=IKTARA
2 50V NC
X7R
0402
ROOM=IKTARA
GPIO3/SWDIO J6 IKTARA_GPIO3 OUT 5
ROOM=IKTARA
IKTARA_COMM2 GPIO4/SWCLK K5 IKTARA_GPIO4 5
C3 COMM2
OUT
GPIO5 J5
NC
B3 CLAMP2 GPIO6 K7
NC
GPIO7 K6 IKTARA_GPIO7
IKTARA_ANA1 E2
R3422
5 OUT
F2
ANA1 R3421
NC ANA2 E7 PMU_TO_IKTARA_EN_EXT_1P8V_R 100 PMU_TO_IKTARA_EN_EXT_1P8V
PP_VDD_MAIN 1
0.00 2 PP_VDD_MAIN_IKTARA G3 EN_EXT_1P8 1 2 IN 5 11
12 11 8 7 6 5 ANA3
5%
0% G2 ANA4 VSYS_ANA_VDD F3 PP_VDD_MAIN 5 6 7 8 11 12 1/32W
1/32W NC MF
MF 01005
01005 VSYS_1P8_VDD F6 PP1V8_S2 4 9 11 12
ROOM=IKTARA
ROOM=IKTARA G6 REFBP
NC
OTP_WREN J7
G5 1
DIGTEST R3408
RGND PGND AVSS 1.00K
5%
1/32W
MF
A1
A2
A3
A4
A5
A6
A7
B4
J3
K3
L3
C4
G4
H3
L7
F5
F4
2 01005ROOM=IKTARA
A SYNC_MASTER=mlb_bot SYNC_DATE=04/04/2017
A
PAGE TITLE
051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
12 11 8 6 5
PP_VDD_MAIN PP1V8_AUDIO_VA_S2 8 11
A5
F5
CRITICAL
C L4900 VP VA C
1.2UH-20%-3A-0.077OHM
SPKRAMP_BOT_LX A2 A1 PP_SPKRAMP_BOT_VBOOST
1 2
B2
SW U4900 VBST_B
B1
MEHK2016T-SM SW CS35L26B-A1 VBST_B
ROOM=SPKAMP1
D6 WLCSP C1
1 C4927 1 C4928 1 C4903 1 C4904 1 C4931 1 C4932
11 BI
I2C1_AOP_SDA SDA VBST_A 220PF 0.1UF 10UF 10UF 10UF 10UF
ROOM=SPKAMP1 D1 5% 10% 20% 20% 20% 20%
I2C1_AOP_SCL E6 VBST_A 2 10V
C0G-CERM 2 16V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM
11 IN SCL CRITICAL 01005 0201 0402-0.1MM 0402-0.1MM 0402-0.1MM 0402-0.1MM
ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1
SPKRAMP_BOT_ARC_TO_AOP_INT_L A7
11 BI INT*
AOP_TO_SPKRAMP_BOT_ARC_RESET_L A6
11 IN RESET*
SPKRAMP_BOT_TO_SPKRAMP_TOP_SYNC F6
ALIVE/SYNC ISNS+
F1 SPKRAMP_BOT_ISENSE_POS
1 C4930
8 BI
E1 0.01UF
E5 ISNS- SPKRAMP_BOT_ISENSE_NEG 10%
AD0/PDM_CLK1 2 6.3V
X5R
B7 01005
11 IN
CODEC_TO_SPKRAMP_BOT_ARC_MCLK MCLK ROOM=SPKAMP1
E2 COIL_TO_SPKRAMP_BOT_VSENSE_POS
I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK C7 VSNS+ IN 11
11 8 IN SCLK E3 COIL_TO_SPKRAMP_BOT_VSENSE_NEG
VSNS- IN 11
I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK C6
11 8 IN LRCK/FSYNC
D7
SDIN D2 SPKRAMP_BOT_TO_COIL_OUT_POS
OUT+ 11
I2S_CODEC_ASP1_TO_AOP_AMPS_DIN B6 C2 SPKRAMP_BOT_TO_COIL_OUT_NEG
11 8 BI SDOUT OUT- 11
F7
PDM_CLK0
NC
E7 F4
C4922 1 1 C4934
PDM_DATA0 FILT+ SPKRAMP_BOT_FILT 470PF 470PF
NC 10% 10%
D5 F3 10V 2 2 10V
PDM_DATA1 AD1 X5R X5R
GNDP GNDA 1 C4929 01005
ROOM=SPKAMP1
01005
ROOM=SPKAMP1
2.2UF
B 20% B
A3
A4
B3
B4
C3
C4
C5
D3
D4
B5
E4
F2
2 6.3V
X5R-CERM
0201
ROOM=SPKAMP1
A SYNC_MASTER=mlb_bot SYNC_DATE=04/04/2017
A
PAGE TITLE
051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
Pull Downs
AP_TO_SPKRAMP_TOP_RESET_L 8 11
1
R5001
100K
5%
1/32W
MF
2 01005
ROOM=SPKAMP2
12 11 7 6 5
PP_VDD_MAIN PP1V8_AUDIO_VA_S2 7 11
A5
F5
CRITICAL
L5000 VP VA
C 1.2UH-20%-3A-0.11OHM C
1 2 SPKRAMP_TOP_LX A2 SW U5000 VBST_B A1 PP_SPKRAMP_TOP_VBOOST
MEFE2016T-SM B2 SW CS35L26B-A1 VBST_B B1
ROOM=SPKAMP2
WLCSP
1 C5012 1 C5011 1 C5024 1 C5025 1 C5006 1 C5008
11 BI
I2C2_AP_SDA D6 SDA VBST_A C1 220PF 0.1UF 10UF 10UF 10UF 10UF
ROOM=SPKAMP2 5% 10% 20% 20% 20% 20%
I2C2_AP_SCL VBST_A D1 2 10V
C0G-CERM 2 16V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM
11 IN E6 SCL CRITICAL 01005 0201 0402-0.1MM 0402-0.1MM 0402-0.1MM 0402-0.1MM
SPKRAMP_TOP_TO_AP_INT_L ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2
11 BI A7 INT*
11 8 IN
AP_TO_SPKRAMP_TOP_RESET_L A6 RESET*
SPKRAMP_BOT_TO_SPKRAMP_TOP_SYNC F6 ALIVE/SYNC ISNS+ F1 SPKRAMP_TOP_ISENSE_POS
1 C5019
7 BI 0.01UF
ISNS- E1 SPKRAMP_TOP_ISENSE_NEG 10%
E5 AD0/PDM_CLK1 2 6.3V
X5R
01005
11 IN
I2S_AP_TO_SPKRAMP_TOP_MCLK B7 MCLK ROOM=SPKAMP2
VSNS+ E2 COIL_TO_SPKRAMP_TOP_VSENSE_POS
I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK C7 SCLK
IN 11
11 7 IN
VSNS- E3 COIL_TO_SPKRAMP_TOP_VSENSE_NEG IN 11
11 7 IN
I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK C6 LRCK/FSYNC
D7 SDIN SPKRAMP_TOP_TO_COIL_OUT_POS
OUT+ D2 11
11 7 BI
I2S_CODEC_ASP1_TO_AOP_AMPS_DIN B6 SDOUT OUT- C2 SPKRAMP_TOP_TO_COIL_OUT_NEG 11
11 IN
PDM_CODEC_TO_SPKRAMP_TOP_CLK F7 PDM_CLK0 C5000 1 1 C5001
470PF 470PF
11 IN
PDM_CODEC_TO_SPKRAMP_TOP_DATA E7 PDM_DATA0 FILT+ F4 SPKRAMP_TOP_FILT 10%
10V
10%
X5R 2 2 10V
X5R
D5 PDM_DATA1 AD1 F3 01005
ROOM=SPKAMP2
01005
ROOM=SPKAMP2
GNDP GNDA
1 C5018
2.2UF
A3
A4
B3
B4
C3
C4
C5
D3
D4
B5
E4
F2
B 20%
2 6.3V
X5R-CERM B
0201
ROOM=SPKAMP2
A SYNC_MASTER=mlb_bot SYNC_DATE=04/04/2017
A
PAGE TITLE
051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
C Hall Effect C
APN:353S3697
12 11 6 4
PP1V8_S2
1 C5530
1
0.1UF
20%
2 6.3V VDD
X5R-CERM
01005
ROOM=HALL
U5530
AK8789
DFN HALL3_TO_AOP_IRQ_L
ROOM=HALL OUT1 4 OUT 11
CRITICAL
OUT2 3 NC
THRM
VSS PAD
5
B B
A SYNC_MASTER=mlb_bot SYNC_DATE=04/04/2017
A
PAGE TITLE
HALL EFFECT
DRAWING NUMBER SIZE
051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D C5860 10
AP_TO_RACER_RESET_CONN_L 5 6 RACER_TO_AOP_INT_CONN_L 10 D
R5801 27PF 10
RACER_TO_ACORN_ORB_SCAN_CONN 7 8 PP10V0_RACER_CONN 10
AP_TO_RACER_REF_CLK 1
0.00 2 AP_TO_RACER_REF_CLK_C 1 2 AP_TO_RACER_REF_CLK_CONN SWD_AOP_TO_RACER_CONN 9 10 UART_RACER_TO_AOP_RXD_CONN
11 IN 10 10 10
0% 10
SWD_AOP_BI_RACER_SWDIO_CONN 11 12 UART_AOP_TO_RACER_TXD_CONN 10
1/32W 5%
MF 25V 10
HALL2_TO_AOP_IRQ_CONN_L 13 14 PP1V8_TOUCH_RACER_CONN 10
01005 C0G
ROOM=B2B_TOUCH_ORB
0201 15 16
ROOM=B2B_TOUCH_ORB
10
AP_TO_RACER_REF_CLK_CONN 17 18 PP1V1_RACER_CONN 10
19 20 PN6V7_RACER_CONN 10
PMU_TO_TOUCH_CLK32K_RESET_CONN_L 21 22 PP3V5_RACER_CONN
FL5802 10
I2C3_AP_BI_TOUCH_EEPROM_SDA_CONN 23 24 AP_TO_TOUCH_BSYNC_CONN
10
150OHM-25%-200MA-0.7DCR 10 10
I2C3_AP_TO_TOUCH_EEPROM_SCL_CONN 25 26 TOUCH_TO_ACORN_PP5V25_EN_CONN
RACER_TO_AOP_INT_L 2 1 RACER_TO_AOP_INT_CONN_L 10 10
11 5 OUT 10
10
TOUCH_TO_AMUX_PP1V8_CONN 27 28 PP5V25_TOUCH_VDDH_CONN 10
01005
ROOM=B2B_TOUCH_ORB
1 C5802
220PF 31 32
5%
2 10V 34
C0G-CERM
01005
ROOM=B2B_TOUCH_ORB
Touch and Misc I/O ROOM=B2B_TOUCH_ORB
FL5803 FL5840
150OHM-25%-200MA-0.7DCR 150OHM-25%-200MA-0.7DCR
UART_AOP_TO_RACER_TXD 2 1 UART_AOP_TO_RACER_TXD_CONN TOUCH_TO_ACORN_PP5V25_EN 2 1 TOUCH_TO_ACORN_PP5V25_EN_CONN 10
11 5 IN
01005
10 11 5 OUT
01005 1 C5840
Touch And Racer Power
ROOM=B2B_TOUCH_ORB
1 C5803 ROOM=B2B_TOUCH_ORB
220PF
56PF 5%
5%
2 25V 2 10V
C0G-CERM
NP0-C0G-CERM 01005
01005 ROOM=B2B_TOUCH_ORB
ROOM=B2B_TOUCH_ORB FL5890
33-OHM-25%-1500MA
FL5804 FL5841 PP1V8_TOUCH_RACER_S2 1 2 PP1V8_TOUCH_RACER_CONN
C 150OHM-25%-200MA-0.7DCR 150OHM-25%-200MA-0.7DCR 11 5
OMIT_TABLE 0201
10
C
11 5 OUT
UART_RACER_TO_AOP_RXD 2 1 UART_RACER_TO_AOP_RXD_CONN 10 11 5 OUT
TOUCH_TO_AMUX_PP1V8 2 1 TOUCH_TO_AMUX_PP1V8_CONN 10 C5890 1 ROOM=B2B_TOUCH_ORB
1 C5891
01005 01005 2.2UF 220PF
ROOM=B2B_TOUCH_ORB
1 C5804 ROOM=B2B_TOUCH_ORB
1 C5841 20%
6.3V
5%
56PF 220PF X5R-CERM 2 2 10V
C0G-CERM
5% 5% 0201 01005
2 25V 2 10V
C0G-CERM ROOM=B2B_TOUCH_ORB
ROOM=B2B_TOUCH_ORB
NP0-C0G-CERM 01005
01005 ROOM=B2B_TOUCH_ORB FL5891
ROOM=B2B_TOUCH_ORB 150OHM-25%-0.28A-0.69OHM
FL5805 11 5
PP5V25_TOUCH_VDDH 2 1 PP5V25_TOUCH_VDDH_CONN 10
150OHM-25%-200MA-0.7DCR R5842 01005
RACER_TO_ACORN_ORB_SCAN 2 1 RACER_TO_ACORN_ORB_SCAN_CONN PMU_TO_TOUCH_CLK32K_RESET_L 2
33.2 1 PMU_TO_TOUCH_CLK32K_RESET_CONN_L 10 ROOM=B2B_TOUCH_ORB
1 C5892
11 5 OUT 10 11 5 IN 220PF
01005 1% 5%
ROOM=B2B_TOUCH_ORB
1 C5805 1/32W
MF
1 C5842 2 10V
C0G-CERM
56PF 01005 100PF 01005
5% 5% ROOM=B2B_TOUCH_ORB
2 25V
NP0-C0G-CERM
ROOM=B2B_TOUCH_ORB
2 16V
NP0-C0G FL5893
01005 01005 33-OHM-25%-1500MA
ROOM=B2B_TOUCH_ORB ROOM=B2B_TOUCH_ORB
11 5
PP3V5_RACER 2 1 PP3V5_RACER_CONN 10
FL5806 0201
1 C5893
150OHM-25%-200MA-0.7DCR ROOM=B2B_TOUCH_ORB
220PF
11 5
SPI_AP_TO_RACER_CS_L 2 1 SPI_AP_TO_RACER_CS_CONN_L 10
5%
2 10V
IN
01005 C0G-CERM
ROOM=B2B_TOUCH_ORB
1 C5806 01005
ROOM=B2B_TOUCH_ORB
5%
56PF FL5894
2 25V
33-OHM-25%-1500MA
NP0-C0G-CERM
01005 11 5
PN6V7_RACER 2 1 PN6V7_RACER_CONN 10
ROOM=B2B_TOUCH_ORB
0201
ROOM=B2B_TOUCH_ORB
1 C5894
220PF
R5807 R5844 5%
2 10V
B 11 IN
SPI_AP_TO_RACER_SCLK 1
0.00 2
NOSTUFF
SPI_AP_TO_RACER_SCLK_CONN 10 12 11 IN
SWD_AOP_TO_MANY_SWCLK 2
49.9 1 SWD_AOP_TO_RACER_CONN 10 C0G-CERM
01005 B
0% 1% ROOM=B2B_TOUCH_ORB
1/32W
MF
1 C5807 1/32W
MF
1 C5844 FL5895
01005 56PF 01005 100PF 150OHM-25%-200MA-0.7DCR
5% 5%
ROOM=B2B_TOUCH_ORB
2 25V
NP0-C0G-CERM
ROOM=B2B_TOUCH_ORB
2 16V
NP0-C0G 11 5
PP10V0_RACER 2 1 PP10V0_RACER_CONN 10
01005 01005 01005
ROOM=B2B_TOUCH_ORB
ROOM=B2B_TOUCH_ORB
ROOM=B2B_TOUCH_ORB
1 C5895
220PF
FL5845 5%
2 10V
FL5809 150OHM-25%-200MA-0.7DCR C0G-CERM
01005
SPI_AP_TO_RACER_MOSI 1
0.00 2 SPI_AP_TO_RACER_MOSI_CONN SWD_AOP_BI_RACER_SWDIO 2 1 SWD_AOP_BI_RACER_SWDIO_CONN 10 ROOM=B2B_TOUCH_ORB
11 5 IN
0%
NOSTUFF
10 11 BI
NOSTUFF 01005
FL5896
1 C5809 C5845 33-OHM-25%-1500MA
1/32W
MF
56PF
R5845 1 ROOM=B2B_TOUCH_ORB
1
56PF PP1V1_RACER 2 1 PP1V1_RACER_CONN
01005
5% 10K 5% 11 5 10
ROOM=B2B_TOUCH_ORB 1%
2 25V 1/32W 2 25V 0201
NP0-C0G-CERM
01005 MF
01005 2
NP0-C0G-CERM
01005 ROOM=B2B_TOUCH_ORB
1 C5896
ROOM=B2B_TOUCH_ORB
ROOM=B2B_TOUCH_ORB
ROOM=B2B_TOUCH_ORB
220PF
5%
2 10V
FL5810 FL5847
C0G-CERM
01005
150OHM-25%-200MA-0.7DCR ROOM=B2B_TOUCH_ORB
150OHM-25%-200MA-0.7DCR
SPI_RACER_TO_AP_MISO 2 1 SPI_RACER_TO_AP_MISO_CONN
11 OUT 10
12 11 5 IN
AP_TO_MANY_BSYNC 2 1 AP_TO_TOUCH_BSYNC_CONN 10
01005
ROOM=B2B_TOUCH_ORB
1 C5810 01005
1 C5847
56PF ROOM=B2B_TOUCH_ORB
5% 100PF
2 25V
NP0-C0G-CERM
5%
01005 2 16V
NP0-C0G
AP I2C Filters ROOM=B2B_TOUCH_ORB
01005
ROOM=B2B_TOUCH_ORB
R5820
0.00
A 11 5 OUT
I2C3_AP_SDA 2 1 I2C3_AP_BI_TOUCH_EEPROM_SDA_CONN 10
SYNC_MASTER=mlb_bot SYNC_DATE=04/04/2017
A
0%
1/32W
1 C5820 PAGE TITLE
MF 56PF
01005 5%
2 25V
Hall Effect CG: B2B Luna & Touch
ROOM=B2B_TOUCH_ORB
NP0-C0G-CERM FL5850 DRAWING NUMBER SIZE
01005 150OHM-25%-200MA-0.7DCR 051-02247 D
ROOM=B2B_TOUCH_ORB
11 5 IN
HALL2_TO_AOP_IRQ_L 2 1 HALL2_TO_AOP_IRQ_CONN_L 10
Apple Inc. REVISION
01005
1 C5850 7.0.0
R5821 ROOM=B2B_TOUCH_ORB
220PF NOTICE OF PROPRIETARY PROPERTY: BRANCH
I2C3_AP_SCL 0.00 I2C3_AP_TO_TOUCH_EEPROM_SCL_CONN
11 5 IN
2 1 10
5%
2 10V
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
evt-1
0% C0G-CERM
1/32W
MF
1 C5821 01005
ROOM=B2B_TOUCH_ORB
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
PAGE
58 OF 80
01005 56PF II NOT TO REPRODUCE OR COPY IT
ROOM=B2B_TOUCH_ORB
5% SHEET
2 25V III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
NP0-C0G-CERM
01005 IV ALL RIGHTS RESERVED 10 OF 34
ROOM=B2B_TOUCH_ORB
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
12 UART_AP_TO_GNSS_RTS_L
S2 IOS2 INTERPOSER-TOP-D22 IOS88 S88
12 UART_GNSS_TO_AP_CTS_L
S3 IOS3 SMT-PAD IOS89 S89 PP_VDD_MAIN 5 6 7 8 11 12
S4 SYM 3 OF 3 S90
12 UART_GNSS_TO_AP_RXD IOS4 IOS90 BB_TO_PMU_PCIE_HOST_WAKE_L 12
D 12 AP_TO_GNSS_WAKE
S5
S6
IOS5 IOS91 S91
S92
PMU_TO_BBPMU_RESET_L
PMU_AMUX_AY
12 D
12 PMU_TO_GNSS_EN IOS6 IOS92 5
12 AP_TO_BB_TIME_MARK
S7 IOS7 SIGNAL IOS93 S93 AOP_TO_WLAN_CONTEXT_B 12
12 90_PCIE_AP_TO_BB_REFCLK_N
S8 IOS8 IOS94 S94 UART_BB_TO_AOP_RXD 12
S9 IOS9 IOS95 S95 UART_AOP_TO_BB_TXD
90_PCIE_AP_TO_BB_REFCLK_P S10 IOS10 IOS96 S96 AOP_TO_WLAN_CONTEXT_A
12 G1 IOG1 J_INT_TOP IOG63 G63 G125 IOG125
J_INT_TOP IOG187 G187
12 12 G2 IOG2 INTERPOSER-TOP-D22 IOG64 G64 G126 IOG126 IOG188 G188
12 90_PCIE_BB_TO_AP_RXD_P
S11 IOS11 IOS97 S97 BT_TO_PMU_HOST_WAKE INTERPOSER-TOP-D22
12 G3 IOG3 SMT-PAD IOG65 G65 G127 IOG127 IOG189 G189
12 90_PCIE_BB_TO_AP_RXD_N
S12 IOS12 IOS98 S98 PMU_TO_BT_REG_ON SYM 1 OF 3 SMT-PAD
12 G4 IOG4 IOG66 G66 G128 IOG128 IOG190 G190
12 90_PCIE_AP_TO_BB_TXD_P
S13 IOS13 IOS99 S99 PMU_TO_WLAN_CLK32K SYM 2 OF 3
12 G5 IOG5 IOG67 G67 G129 IOG129 IOG191 G191
S14 IOS14 IOS100 S100 WLAN_TO_PMU_HOST_WAKE 12 G6 IOG6 GND IOG68 G68 G130 IOG130 IOG192 G192
90_PCIE_AP_TO_BB_TXD_N S15 IOS15 IOS101 S101 PMU_TO_WLAN_REG_ON
12 12 G7 IOG7 IOG69 G69 G131 IOG131 GND IOG193 G193
12 90_PCIE_WLAN_TO_AP_RXD_P
S16 IOS16 IOS102 S102 PMU_AMUX_BY 5 G8 IOG8 IOG70 G70 G132 IOG132 IOG194 G194
S17 IOS17 IOS103 S103 CODEC_TO_SPKRAMP_BOT_ARC_MCLK 7 G9 IOG9 IOG71 G71 G133 IOG133 IOG195 G195
90_PCIE_WLAN_TO_AP_RXD_N S18 IOS18 IOS104 S104 PMU_TO_BB_USB_VBUS_DETECT
12 12 G10 IOG10 IOG72 G72 G134 IOG134 IOG196 G196
12 90_PCIE_AP_TO_WLAN_REFCLK_N
S19 IOS19 IOS105 S105 PMU_HYDRA_TO_AP_FORCE_DFU 5 G11 IOG11 IOG73 G73 G135 IOG135 IOG197 G197
S20 IOS20 IOS106 S106 AP_TO_BT_WAKE 12 G12 IOG12 IOG74 G74 G136 IOG136 IOG198 G198
90_PCIE_AP_TO_WLAN_REFCLK_P S21 IOS21 IOS107 S107 WLAN_TO_AP_TIME_SYNC 12
12 G13 IOG13 IOG75 G75 G137 IOG137 IOG199 G199
12 90_PCIE_AP_TO_WLAN_TXD_N
S22 IOS22 IOS108 S108 RADIO_PA_NTC 12 G14 IOG14 IOG76 G76 G138 IOG138 IOG200 G200
S23 IOS23 IOS109 S109 AP_TO_MANY_BSYNC 5 10 12 G15 IOG15 IOG77 G77 G139 IOG139 IOG201 G201
12 90_PCIE_AP_TO_WLAN_TXD_P
S24 IOS24 IOS110 S110 TOUCH_TO_AMUX_PP1V8 5 10 G16 IOG16 IOG78 G78 G140 IOG140 IOG202 G202
S25 IOS25 IOS111 S111 PP3V5_RACER 5 10
G17 IOG17 IOG79 G79 G141 IOG141 IOG203 G203
S26 IOS26 IOS112 S112 PP1V1_RACER 5 10
G18 IOG18 IOG80 G80 G142 IOG142 IOG204 G204
6 5 PMU_TO_IKTARA_EN_EXT_1P8V
S27 IOS27 IOS113 S113
G19 IOG19 IOG81 G81 G143 IOG143 IOG205 G205
6 5 IKTARA_TO_SMC_INT
S28 IOS28 IOS114 S114 PP5V25_TOUCH_VDDH 5 10 G20 IOG20 IOG82 G82 G144 IOG144 IOG206 G206
6 I2C0_SMC_SCL
S29 IOS29 IOS115 S115 RACER_TO_ACORN_ORB_SCAN 5 10
G21 IOG21 IOG83 G83 G145 IOG145 IOG207 G207
6 I2C0_SMC_SDA
S30 IOS30 IOS116 S116 PP1V8_TOUCH_RACER_S2 5 10
G22 IOG22 IOG84 G84 G146 IOG146 IOG208 G208
12 BB_TO_STROBE_DRIVER_GSM_BURST_IND
S31 IOS31 IOS117 S117 I2C3_AP_SCL 5 10
G23 G85 G147 G209
C NC
S32 IOS32 IOS118 S118 I2C3_AP_SDA 5 10
G24
IOG23
IOG24
IOG85
IOG86 G86 G148
IOG147
IOG148
IOG209
IOG210 G210
C
8PDM_CODEC_TO_SPKRAMP_TOP_CLK S33 IOS33 IOS119 S119 TOUCH_TO_ACORN_PP5V25_EN 5 10
G25 IOG25 IOG87 G87 G149 IOG149 IOG211 G211
8 PDM_CODEC_TO_SPKRAMP_TOP_DATA
S34 IOS34 IOS120 S120 PN6V7_RACER 5 10
G26 IOG26 IOG88 G88 G150 IOG150 IOG212 G212
12 PCIE_AP_TO_BB_RESET_L
S35 IOS35 IOS121 S121 PMU_TO_TOUCH_CLK32K_RESET_L 5 10
G27 IOG27 IOG89 G89 G151 IOG151 IOG213 G213
8 I2S_AP_TO_SPKRAMP_TOP_MCLK
S36 IOS36 IOS122 S122 PP10V0_RACER 5 10
G28 IOG28 IOG90 G90 G152 IOG152 IOG214 G214
8 AP_TO_SPKRAMP_TOP_RESET_L
S37 IOS37 IOS123 S123 AP_TO_RACER_RESET_L 5 10
G29 IOG29 IOG91 G91 G153 IOG153 IOG215 G215
8 SPKRAMP_TOP_TO_AP_INT_L
S38 IOS38 IOS124 S124 RACER_TO_AOP_INT_L 5 10
G30 IOG30 IOG92 G92 G154 IOG154 IOG216 G216
8 I2C2_AP_SDA
S39 IOS39 IOS125 S125 SWD_AOP_TO_MANY_SWCLK 10 12
G31 IOG31 IOG93 G93 G155 IOG155 IOG217 G217
8 I2C2_AP_SCL
S40 IOS40 IOS126 S126 SWD_AOP_BI_RACER_SWDIO 10
G32 IOG32 IOG94 G94 G156 IOG156 IOG218 G218
8 7 PP1V8_AUDIO_VA_S2
S41 IOS41 IOS127 S127 UART_AOP_TO_RACER_TXD 5 10
G33 IOG33 IOG95 G95 G157 IOG157 IOG219 G219
5
PP_GPU_LVCC S42 IOS42 IOS128 S128 UART_RACER_TO_AOP_RXD 5 10
G34 IOG34 IOG96 G96 G158 IOG158 IOG220 G220
5
PP_CPU_PCORE_LVCC S43 IOS43 IOS129 S129 HALL2_TO_AOP_IRQ_L 5 10
G35 IOG35 IOG97 G97 G159 IOG159 IOG221 G221
12 AP_TO_BB_IPC_GPIO1
S44 IOS44 IOS130 S130 AP_TO_RACER_REF_CLK 10
G36 IOG36 IOG98 G98 G160 IOG160 IOG222 G222
12 AP_TO_BB_RESET_L
S45 IOS45 IOS131 S131 SPI_AP_TO_RACER_CS_L 5 10
G37 IOG37 IOG99 G99 G161 IOG161 IOG223 G223
9 HALL3_TO_AOP_IRQ_L S46 IOS46 IOS132 S132 SPI_RACER_TO_AP_MISO 10
G38 IOG38 IOG100 G100 G162 IOG162 IOG224 G224
S47 IOS47 IOS133 S133 SPI_AP_TO_RACER_MOSI 5 10
NC G39 IOG39 IOG101 G101 G163 IOG163 IOG225 G225
4BOARD_ID3 S48 IOS48 IOS134 S134 SPI_AP_TO_RACER_SCLK 10
G40 IOG40 IOG102 G102 G164 IOG164 IOG226 G226
12 PCIE_WLAN_BI_AP_CLKREQ_L
S49 IOS49 IOS135 S135 PP_BATT_VCC 5
G41 IOG41 IOG103 G103 G165 IOG165 IOG227 G227
12 PCIE_AP_TO_WLAN_RESET_L
S50 IOS50 IOS136 S136
G42 IOG42 IOG104 G104 G166 IOG166 IOG228 G228
8 7 I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK
S51 IOS51 IOS137 S137 PP3V0_S2 12
G43 IOG43 IOG105 G105 G167 IOG167 IOG229 G229
8 7 I2S_CODEC_ASP1_TO_AOP_AMPS_DIN
S52 IOS52 IOS138 S138
G44 IOG44 IOG106 G106 G168 IOG168 IOG230 G230
8 7 I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK
S53 IOS53 IOS139 S139 90_USB_BB_DATA_P 12
G45 IOG45 IOG107 G107 G169 IOG169 IOG231 G231
6 PMU_TO_IKTARA_RESET_L
S54 IOS54 IOS140 S140 90_USB_BB_DATA_N 12
G46 IOG46 IOG108 G108 G170 IOG170 IOG232 G232
12 I2S_BB_TO_AP_DIN
S55 IOS55 IOS141 S141
G47 IOG47 IOG109 G109 G171 IOG171 IOG233 G233
12 I2S_BB_TO_AP_LRCLK
S56 IOS56 IOS142 S142 PP_VBUS2_IKTARA 6
G48 IOG48 IOG110 G110 G172 IOG172 IOG234 G234
12 I2S_BB_TO_AP_BCLK
S57 IOS57 IOS143 S143
G49 IOG49 IOG111 G111 G173 IOG173 IOG235 G235
B 12 I2S_AP_TO_BB_DOUT
S58
S59
IOS58 IOS144 S144
S145
G50 IOG50 IOG112 G112 G174 IOG174 IOG236 G236 B
12 BB_TO_AP_RESET_DETECT_L IOS59 IOS145 G51 IOG51 IOG113 G113 G175 IOG175 IOG237 G237
12 AP_TO_BBPMU_RADIO_ON_L
S60 IOS60 IOS146 S146 IKTARA_COIL2 5 6
G52 IOG52 IOG114 G114 G176 IOG176 IOG238 G238
12 AP_TO_WLAN_DEVICE_WAKE
S61 IOS61 IOS147 S147
G53 IOG53 IOG115 G115 G177 IOG177 IOG239 G239
7 SPKRAMP_BOT_ARC_TO_AOP_INT_L
S62 IOS62 IOS148 S148
G54 IOG54 IOG116 G116 G178 IOG178 IOG240 G240
7 AOP_TO_SPKRAMP_BOT_ARC_RESET_L
S63 IOS63 IOS149 S149
G55 IOG55 IOG117 G117 G179 IOG179 IOG241 G241
S64 IOS64 IOS150 S150 IKTARA_COIL1 5 6
NC G56 IOG56 IOG118 G118 G180 IOG180 IOG242 G242
12 SWD_AOP_BI_BB_SWDIO S65 IOS65 IOS151 S151
G57 IOG57 IOG119 G119 G181 IOG181 IOG243 G243
7 I2C1_AOP_SDA
S66 IOS66 IOS152 S152
G58 IOG58 IOG120 G120 G182 IOG182 IOG244 G244
7 I2C1_AOP_SCL
S67 IOS67 IOS153 S153
G59 IOG59 IOG121 G121 G183 IOG183 IOG245 G245
12 11 8 7 6 5 PP_VDD_MAIN
S68 IOS68 IOS154 S154 AP_TO_BB_COREDUMP 12
G60 IOG60 IOG122 G122 G184 IOG184 IOG246 G246
S69 IOS69 IOS155 S155 PCIE_BB_BI_AP_CLKREQ_L 12
G61 IOG61 IOG123 G123 G185 IOG185 IOG247 G247
S70 IOS70 IOS156 S156 SPKRAMP_TOP_TO_COIL_OUT_POS 8
G62 IOG62 IOG124 G124 G186 IOG186 IOG248 G248
S71 IOS71 IOS157 S157 SPKRAMP_TOP_TO_COIL_OUT_NEG 8
S72 IOS72 IOS158 S158 COIL_TO_SPKRAMP_TOP_VSENSE_POS 8
S73 IOS73 IOS159 S159 COIL_TO_SPKRAMP_TOP_VSENSE_NEG 8
S74 IOS74 IOS160 S160 COIL_TO_SPKRAMP_BOT_VSENSE_POS 7
S75 IOS75 IOS161 S161 COIL_TO_SPKRAMP_BOT_VSENSE_NEG 7
S76 IOS76 IOS162 S162 SPKRAMP_BOT_TO_COIL_OUT_POS 7
12 UART_AP_TO_BT_RTS_L
S77 IOS77 IOS163 S163 SPKRAMP_BOT_TO_COIL_OUT_NEG 7
12 UART_BT_TO_AP_CTS_L
S78 IOS78 IOS164 S164 AP_TO_NFC_DEV_WAKE 12
12 UART_AP_TO_BT_TXD
S79 IOS79 IOS165 S165 UART_NFC_TO_AP_CTS_L 12
12 UART_BT_TO_AP_RXD
S80 IOS80 IOS166 S166 UART_AP_TO_NFC_TXD 12
12 NC_PP_VDD_BOOST
S81 IOS81 IOS167 S167 UART_NFC_TO_AP_RXD 12
12 UART_AP_TO_WLAN_TXD
S82 IOS82 IOS168 S168 UART_AP_TO_NFC_RTS_L 12
12 UART_AP_TO_WLAN_RTS_L
S83 IOS83 IOS169 S169 AP_TO_NFC_FW_DWLD_REQ 12
A 12 UART_WLAN_TO_AP_RXD
S84 IOS84 IOS170 S170 NFC_TO_PMU_HOST_WAKE 12
SYNC_MASTER=mlb_bot SYNC_DATE=04/04/2017 A
12 UART_WLAN_TO_AP_CTS_L
S85 IOS85 IOS171 S171 PMU_TO_NFC_EN 12 PAGE TITLE
12 11 9 6 4 PP1V8_S2
S86 IOS86 IOS172 S172
NC I/O: Interposer (Top)
DRAWING NUMBER SIZE
051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
SUBDESIGN_SUFFIX=S
31 11 90_PCIE_AP_TO_WLAN_REFCLK_P 90_PCIE_AP_TO_WLAN_REFCLK_P PP_VDD_MAIN PP_VDD_MAIN 5 6 7 8 11 12 17 31 34
D AOP_TO_WLAN_CONTEXT_A AOP_TO_WLAN_CONTEXT_A
34 11
AP_TO_NFC_DEV_WAKE AP_TO_NFC_DEV_WAKE
nfc_mlb
D
31 11
34 11
NFC_TO_PMU_HOST_WAKE NFC_TO_PMU_HOST_WAKE
31 11 AOP_TO_WLAN_CONTEXT_B AOP_TO_WLAN_CONTEXT_B
NC NFC_DWP_TX_TP
31 11 AP_TO_BT_WAKE AP_TO_BT_WAKE WIFI_MLB
UART_AP_TO_NFC_TXD
34 11 UART_AP_TO_NFC_TXD
31 11 AP_TO_WLAN_DEVICE_WAKE AP_TO_WLAN_DEV_WAKE UART_NFC_TO_AP_RXD
BT_TO_PMU_HOST_WAKE BT_TO_PMU_HOST_WAKE 11 31 34 11 UART_NFC_TO_AP_RXD
UART_BT_TO_AP_CTS_L UART_BT_TO_AP_CTS_L 11 31 34 11
UART_AP_TO_NFC_RTS_L UART_AP_TO_NFC_RTS_L
31 11 PMU_TO_BT_REG_ON PMU_TO_BT_REG_ON UART_NFC_TO_AP_CTS_L
UART_BT_TO_AP_RXD UART_BT_TO_AP_RXD 11 31 34 11 UART_NFC_TO_AP_CTS_L
31 11 PMU_TO_WLAN_CLK32K PMU_TO_WLAN_32K
UART_AP_TO_BT_RTS_L UART_AP_TO_BT_RTS_L 11 31
31 11 PMU_TO_WLAN_REG_ON PMU_TO_WLAN_REG_ON NFC_SWP1
UART_AP_TO_BT_TXD UART_AP_TO_BT_TXD 11 31 34 28 12 NFC_SWP1
50_UAT_WLAN_5G_SOUTH
50_UAT_WLAN_2G_SOUTH
31 11 UART_WLAN_TO_AP_CTS_L UART_WLAN_TO_AP_CTS_L
UART_WLAN_TO_AP_RXD UART_WLAN_TO_AP_RXD
50_LAT_WLAN_MLC
31 11
31 11 UART_AP_TO_WLAN_RTS_L UART_AP_TO_WLAN_RTS_L
31 11 UART_AP_TO_WLAN_TXD UART_AP_TO_WLAN_TXD
31 11 WLAN_TO_AP_TIME_SYNC WLAN_TIME_SYNC
MAKE_BASE=TRUE
50_UAT_WLAN_2G_SOUTH 12 29 32 11 NC_PP_VDD_BOOST NC_PP_VDD_BOOST
50_UAT_WLAN_5G_SOUTH 12 29 32
34 31 14 12 11 9 6 4
PP1V8_S2 PP1V8_SDRAM PMU_TO_BBPMU_ON PMU_TO_BBPMU_RESET_L 11 17
29 11
PP3V0_S2 PP3V0_TRISTAR AP_TO_BB_RESET_L AP_TO_BB_RESET_L 11 15
AP_TO_BB_MESA_ON NC
AP_TO_BB_COREDUMP_TRIG AP_TO_BB_COREDUMP 11 14
C AP_TO_BB_IPC_GPIO AP_TO_BB_IPC_GPIO1
AP_TO_MANY_BSYNC
11 14 C
UART_BB_TO_WLAN_COEX TOUCH_TO_BBPMU_FORCE_PWM 5 10 11 17
31 14 12 UART_BB_TO_WLAN_COEX
31 14 12 UART_WLAN_TO_BB_COEX
UART_WLAN_TO_BB_COEX
BB_TO_AP_RESET_DETECT_L BB_TO_AP_RESET_DETECT_L 11 14
1
90_PCIE_AP_TO_BB_REFCLK_P 90_PCIE_AP_TO_BB_REFCLK_P 11 14
I71 OMIT 90_PCIE_AP_TO_BB_REFCLK_N
C3043 1 R3043 RADIO_PA_NTC XW3043 90_PCIE_AP_TO_BB_REFCLK_N
90_PCIE_AP_TO_BB_TXD_P
11 14
PCIE_BB_TO_PMU_WAKE_L BB_TO_PMU_PCIE_HOST_WAKE_L 11 14
AP_TO_BB_DEVICE_WAKE
UART_AOP_TO_BB_TXD UART_AOP_TO_BB_TXD 11 14
UART_BB_TO_AOP_RXD UART_BB_TO_AOP_RXD 11 14
SWD_AP_TO_BB_CLK SWD_AOP_TO_MANY_SWCLK 10 11 15
SWD_AOP_BI_BB_SWDIO
B SWD_AP_BI_BB_IO
USB_BB_VBUS PMU_TO_BB_USB_VBUS_DETECT
11 15
11 14
B
90_USB_BB_P 90_USB_BB_DATA_P 11 14
90_USB_BB_N 90_USB_BB_DATA_N 11 14
UART_AP_TO_BB_TXD NC
UART_BB_TO_AP_RXD NC
I2S_BB_TO_AP_BCLK I2S_BB_TO_AP_BCLK 11 14
I2S_BB_TO_AP_LRCLK I2S_BB_TO_AP_LRCLK 11 14
I2S_AP_TO_BB_DOUT I2S_AP_TO_BB_DOUT 11 14
I2S_BB_TO_AP_DIN I2S_BB_TO_AP_DIN 11 14
NFC_SWP1 PMU_TO_GNSS_EN
34 28 12 SIM1_SWP PMU_TO_GNSS_EN 11 27
UART_AP_TO_GNSS_TXD UART_AP_TO_GNSS_TXD 11 27
34 18 12
NFC_TO_BB_CLK_REQ NFC_TO_BB_CLKREQ UART_GNSS_TO_AP_RXD UART_GNSS_TO_AP_RXD 11 27
34 18 12
BB_TO_NFC_CLK BB_TO_NFC_CLK UART_AP_TO_GNSS_RTS_L UART_AP_TO_GNSS_RTS_L 11 27
UART_GNSS_TO_AP_CTS_L UART_GNSS_TO_AP_CTS_L 11 27
AP_TO_GNSS_TIME_MARK AP_TO_BB_TIME_MARK 11 27
AP_TO_GNSS_DEVICE_WAKE AP_TO_GNSS_WAKE 11 27
A SYNC_DATE=07/29/2016 A
PAGE TITLE
RADIOS
DRAWING NUMBER SIZE
051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
RADIO_MLB PORTS
D
ICE17.2 RADIO_MLB 28
28
27 26 23
27
18
20 19 18 17 12
17 16 15 14 12
29
29
12
IN
IN
POWER
PP_VDD_MAIN
PP1V8_S2
PP3V0_S2
D
3
TABLE_TABLEOFCONTENTS_ITEM
3 BASEBAND MEMORY/DEBUG 28 17 14 12
BB CONTROL
AP_TO_BBPMU_RADIO_ON_L
17 IO
TABLE_TABLEOFCONTENTS_ITEM
IN
PMU_TO_BBPMU_RESET_L
4TABLE_TABLEOFCONTENTS_ITEM
4 BASEBAND POWER 28
28
17
15
12
12
IN
IN
AP_TO_BB_RESET_L
5TABLE_TABLEOFCONTENTS_ITEM
5 BASEBAND PMIC 14 12 OUT
BB_TO_AP_RESET_DETECT_L
BB_TO_STROBE_DRIVER_GSM_BURST_IND
6TABLE_TABLEOFCONTENTS_ITEM
6 TRANSCEIVERS 28 14
28
12
14
OUT
IN
AP_TO_BB_MESA_ON_K
7TABLE_TABLEOFCONTENTS_ITEM
7 ET MODULATOR 14 12 IN
AP_TO_BB_COREDUMP
AP_TO_MANY_BSYNC
8TABLE_TABLEOFCONTENTS_ITEM
8 TDD TRANSMIT 28
14
17 12
12
IN
IN
AP_TO_BB_IPC_GPIO1
9 9 FDD TRANSMIT
TABLE_TABLEOFCONTENTS_ITEM
28
14
14
12
12
IN
IN
90_PCIE_AP_TO_BB_TXD_P
90_PCIE_AP_TO_BB_TXD_N
12
TABLE_TABLEOFCONTENTS_ITEM
12 DIVERSITY RECEIVE ASM'S 28
28
14
14
12
12
IN
OUT
90_PCIE_BB_TO_AP_RXD_P
90_PCIE_BB_TO_AP_RXD_N
13
TABLE_TABLEOFCONTENTS_ITEM
13 DIVERSITY RECEIVE LNA'S 28
28
14
14
12
12
OUT
IN
PCIE_AP_TO_BB_RESET_L
PCIE_BB_BI_AP_CLKREQ_L
14
TABLE_TABLEOFCONTENTS_ITEM
14 UPPER ANTENNA FEEDS 28
16
14
2
12
IO
OUT
BB_TO_PMU_PCIE_HOST_WAKE_L
15 15 GNSS AP_TO_BB_DEVICE_WAKE
TABLE_TABLEOFCONTENTS_ITEM
28 14 OUT
UART_BB_TO_AP_RXD_K
ALTERNATES 14 12
AOP
UART_AOP_TO_BB_TXD
IN
14 12 OUT
UART_BB_TO_AOP_RXD
PART NUMBER ALTERNATE FOR REFERENCE DESIGNATOR(S) DESCRIPTION BOM OPTION
PART NUMBER
197S00040 197S00044 VTCXO_K AVX VC-TCXO ?
197S00042
335S00013
197S00044
335S0894
VTCXO_K
EPROM_K
NDK VC-TCXO
ON SEMI EEPROM
?
? 14 12
AUDIO
I2S_BB_TO_AP_BCLK
OUT
14 12 OUT
I2S_BB_TO_AP_LRCLK
138S0719 138S1103 C522_K MURATA ? I2S_AP_TO_BB_DOUT
14 12 IN
138S00133 138S00128 C509_K, C523_K, C605_K, C624_K, C626_K, C1114_K, C1116_K MURATA ? 14 12 OUT
I2S_BB_TO_AP_DIN
B 138S00049
138S0831
138S00032
138S00032
C402_K, C433_K, C437_K, C510_K, C720_K
28 14 12 OUT
UART_WLAN_TO_BB_COEX
138S00086 138S0884 C500_K, C501_K, C502_K, C514_K, C515_K MURATA ?
339S00363 339S00353 GNSS_K PILSNER STATS ?
16
NFC
NFC_SWP1
IO
18 12 IN
NFC_TO_BB_CLK_REQ
28 18 12 OUT
BB_TO_NFC_CLK
GNSS
BOM OPTIONS 28
28
28
28
27
27
27
27
12
12
12
12
IN
IN
OUT
IN
PMU_TO_GNSS_EN
UART_AP_TO_GNSS_TXD
UART_GNSS_TO_AP_RXD
UART_AP_TO_GNSS_RTS_L
TABLE_5_HEAD
DEBUG
TABLE_5_ITEM
16 3 IO
SWD_AOP_BI_BB_SWDIO
138S00159 7 CAP,SOFT-TERM,2.2uF,6.3V,0201,KYOCERA C402_K,C437_K,C438_K,C433_K,C510_K,C720_K,C1601_K SOFT_CAP
28 14 12 IN
PMU_TO_BB_USB_VBUS_DETECT
TABLE_5_ITEM
SCH,MLB,BOT,X893
DRAWING NUMBER SIZE
051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
BASEBAND
17 16 15 14 11 6 5 4 3 2 1 PP1V8_S2
1 1
R200_K R208_K
100K 100K
1% 1%
1/32W 1/32W
MF MF
2 01005
BASEBAND 2 01005
BASEBAND
16 2 1 PCIE_BB_BI_AP_CLKREQ_L
16 5 2 1 AP_TO_BBPMU_RADIO_ON_L
17 16 15 14 11 6 5 4 3 2 1 PP1V8_S2
1
R201_K
D 1%
100K
1/32W
D
MF
2 01005
BASEBAND
16 2 SIM1_DETECT_K
U_BB_K
U_BB_K VDD_SIM1_K
PMB9948
16 5 4
PMB9948 BGA
BGA 1 SYM 7 OF 9
SYM 1 OF 9
R202_K OMIT_TABLE
OMIT_TABLE 4.7K
5% U5 SYS_CLK D1
1/32W 28 18 IN
SYSCLK_26MHZ_K RXDAT_MAIN_0_1- 90_DIGRF_M0_RX1_N_K IN 18
SIM CARD 1
G18 CC1_CLK FS MF D2
SIM1_CLK_K RXDAT_MAIN_0_1+ 90_DIGRF_M0_RX1_P_K
28 OUT 2 01005 SYSCLK_26MHZ_EN_K V6 SYS_CLK_EN IN 18
SIM CARD 2
H18 17 16 15 14 11 6 5 4 3 2 1
M2
H19 CC2_CLK FS 1 1
NC R207_K R209_K RXDAT_MAIN_1_2- L1 90_DIGRF_M1_RX2_N_K
G19 CC2_IO FS 1.00K 1.00K IN 18
NC 1% 1% RXDAT_MAIN_1_2+ L2 90_DIGRF_M1_RX2_P_K
H20 CC2_RST FS 1/32W 1/32W
IN 18
NC I2S2_CLK0 W2 I2S_BB_TO_AP_BCLK 13 MF MF
OUT 12
01005 01005 TXDAT_MAIN_0_1- E1 90_DIGRF_M0_TX_N_K
UART_BB_TO_AP_RXD_K J20 USIF1_TXD_MTSR FS I2S2_CLK1 AA4 AP_TO_BB_MESA_ON_K 2 BASEBAND 2 BASEBAND OUT 18 28
I2S2
28 13 OUT IN 13 28
EINT3 TXDAT_MAIN_0_1+ E2 90_DIGRF_M0_TX_P_K
28 13 UART_AP_TO_BB_TXD_K J18 USIF1_RXD_MRST FS I2S2_RX Y3 I2S_AP_TO_BB_DOUT 12 13 5 2 I2C_BBPMU_SCL_K OUT 18 28
IN IN
W3 N1
USIF1
13
12 OUT
UART_AOP_TO_BB_TXD E18 USIF3_RXD_MRST FS
THERM_SNS_A T18 NC
H2
OUT 18
C
THERM_SNS_C T19
12 IN
RXDAT_AUX_0_1- 90_DIGRF_A0_RX1_N_K
NC IN 18
USIF3
RXDAT_AUX_0_1+ H1 90_DIGRF_A0_RX1_P_K
28 DEV_HW_CONFIG_K D18 USIF3_RTS* IN 18
IN
EINT6 D19 USIF3_CTS* FS RXDAT_AUX_0_2- J1 90_DIGRF_A0_RX2_N_K
NC IN 18
RXDAT_AUX_0_2+ J2 90_DIGRF_A0_RX2_P_K
EINT5 13 12 AP_TO_BB_IPC_GPIO1 Y7 USIF2_TXD_MTSR IN 18
BI
2 IN 18 28
Y5 USIF2_RTS*
NC
AA7 USIF2_CTS* I2C2_SCL B16 I2C_BBPMU_SCL_K OUT 14 17 RXDAT_AUX_1_2- U1 90_DIGRF_A1_RX2_N_K IN 18
I2C2
B B
PCI_PET_P1 AE16 90_PCIE_BB_TO_AP_RXD_P
EXT INTERRUPT
28
EINT0 BBPMU_ALERT_L_K C15 EINT0 OUT 12 13
U_BB_K
17 IN
PCI_PET_N1 AE15 90_PCIE_BB_TO_AP_RXD_N 28
CC1_IN SIM1_DETECT_K K18 EINT1 FS OUT 12 13
PMB9948
AE13
PCIE
28 14 IN
PCI_PER_P1 90_PCIE_AP_TO_BB_TXD_P 28
28 BB_TO_PMU_PCIE_HOST_WAKE_L M20 EINT2 BOOTROM DRIVEN IN 12 13
BGA
13 12 OUT
PCI_PER_N1 AE14 90_PCIE_AP_TO_BB_TXD_N 28 SYM 9 OF 9
L18 EINT3 FS IN 12 13
BBPMU_VDIO_K C14
28 17 BI VDIO
BB EEPROM BASEBAND
17 16 15 14 11 6 5 4 3 2 1 PP1V8_S2
1 C200_K 1 1
1UF R203_K R204_K
20% 10K 10K
2 16V
CER-X5R 1% 1%
0201 1/32W 1/32W
BASEBAND MF MF
2 01005 2 01005
A1
BASEBAND BASEBAND
VCC
A EPROM_K
A
PAGE TITLE
CAT24C08C4A
2 I2C_BB_EEPROM_SCL_K B1 SCL
WLCSP
SDA B2 I2C_BB_EEPROM_SDA_K 2
BASEBAND
DRAWING NUMBER SIZE
051-02247 D
Apple Inc. REVISION
VSS
BASEBAND
7.0.0
NOTICE OF PROPRIETARY PROPERTY:
A2
BRANCH
BASEBAND MEMORY/DEBUG
17 16 15 14 11 6 5 4 3 2 1 PP1V8_S2
D 1
D
R300_K
100K
1%
1/32W
MF
2 01005
BASEBAND
U_BB_K 28 15 13 12 IN
AP_TO_BB_RESET_L
PMB9948
BGA
SYM 2 OF 9
OMIT_TABLE
V11 NAND_ADQ_0 DDR_DQ_0 AE6
NC NC
AB12 NAND_ADQ_1 DDR_DQ_1 AD7
NC NC
AA12 NAND_ADQ_2 U_BB_K
NC
Y13 NAND_ADQ_3 PMB9948
NC
W11 NAND_ADQ_4 BGA
NC SYM 6 OF 9
V12 NAND_ADQ_5 OMIT_TABLE
NC
U13 NAND_ADQ_6
NC
V13 NAND_ADQ_7
NC
DBB EMIC
NAND IF
U_BB_K
BBPMU_PWRGOOD_K B14 PWRGOOD PMB9948
28 18 17 IN BGA
DDR_DQ_15 AD15 NC B15 XG_RESET* 28 13 12 IN
SWD_AOP_TO_MANY_SWCLK F15 SWDCLK FS SYM 5 OF 9
BBPMU_XG_RESET_L_K OMIT_TABLE
PMU CONTROL
DDR_DQ_16 AE2 E15 SWDIO
28 17 IN
28 SWD_AOP_BI_BB_SWDIO FS
Y10 NAND_ALE NC 13 12 BI
C NC
NC
Y9 NAND_CE*
28 17 IN
BBPMU_XG_RESET_SD_L_K B17 XG_SDWN*
28 OUT
BB_JTAG_TDO_K C19 TDO TRIG_IN C20 NC
C
Y11 NAND_CLE BB_TO_AP_RESET_ACT_L_K M19 RESET2* BB_JTAG_TDI_K B20 TDI
NC HW_MON1 D20
28 OUT 28 IN
HW_MON1_K
U11 N20 CP_RESET_BB* FS C18 OUT 28
JTAG
NAND_RB* 28 AP_TO_BB_RESET_L BB_JTAG_TMS_K TMS
NC HW_MON2 E20
15 13 12 IN 28 IN
HW_MON2_K
AC9 NAND_RE* BB_JTAG_TCK_K D17 TCK
OUT 28
NC XCVR0_RESET_L_K L4 RESET_TRX1* 28 IN
W10 NAND_WE*
18 OUT
BB_JTAG_TRST_L_K A19 TRST*
NC XCVR1_RESET_L_K U4 RESET_TRX2* 28 IN
W12 NAND_WP*
18 OUT B19 RTCK
MONITORING
NC NC
F4 TPIU_TRACEPKT0
NC
E4 TPIU_TRACEPKT1
NC
B8 DDR_CA_0 E5 TPIU_TRACEPKT2
NC NC
A8 DDR_CA_1 F5 TPIU_TRACEPKT3
NC L10 RCT_MON2 NC
A9 NC E7
ADN SENSE
DDR_CA_2
CONTACT
NC L11 RCT_MON1 NC TPIU_TRACEPKT4
B9 DDR_CA_3 NC F6 TPIU_TRACEPKT5
NC NC
C10 DDR_CA_4 H16 VSS_SENSE D6 TPIU_TRACEPKT6
NC VSS P19 NC
A13 DDR_CA_5 DDR_DQ_31 AE19 G7 TPIU_TRACEPKT7
NC NC V1 NC
TPIU
C12 VSS G6
NC DDR_CA_6 AD9 N19 NC TPIU_TRACEPKT8
C13 DDR_DQS_T_0 NC VSS D5
NC DDR_CA_7 AE9 T20 NC TPIU_TRACEPKT9
D13 DDR_DQS_C_0 NC VSS F8
NC DDR_CA_8 AD13 AA6 NC TPIU_TRACEPKT10
E14 DDR_DQS_T_1 NC VSS C6
NC DDR_CA_9 AE12 B18 NC TPIU_TRACEPKT11
DDR_DQS_C_1 NC VSS C5
AD6 V2 NC TPIU_TRACEPKT12
DDR_DQS_T_2 NC VSS C7
AE5 AA5 NC TPIU_TRACEPKT13
DDR_DQS_C_2 NC VSS D7
AE17 W13 NC TPIU_TRACEPKT14
DDR_DQS_T_3 NC VSS E8
AC16 W15 NC TPIU_TRACEPKT15
DDR_DQS_C_3 NC VSS
VSS W17 C4 TPIU_TRACECLK
DDR_CK_T B11 NC
NC VSS W19 D4 TPIU_TRACECTL
DDR_CK_C A11 NC
NC VSS W20
AD10
B DDR_DQM_0
DDR_DQM_1 AD12
NC VSS W5 BASEBAND
B
NC VSS Y17
VSS Y19
DDR_DQM_3 AD16 NC
BASEBAND
CLOCKS & CONTROL
DDR_CS_1 B10 NC
NC
P20 OSC32K DDR_VREF_CA A12 BB_DDR_VREF_CA_K
R302_K
1
0.00 2
17 16 15 14 11 6 5 4 3 2 1 PP1V8_S2 PP1V8_TCXO_K
0%
1/32W
MF 1 C303_K
3
01005
0.1UF VDD
20%
6.3V
2 X5R-CERM
01005
TCXO_K
32.768KHZ-5PPM
A BASEBAND
CSP A
1 CAL/NC CLKOUT 2 TCXO_BB_GNSS_32K_K PAGE TITLE
NC OUT 15 27 28
BASEBAND MEMORY/DEBUG
GND DRAWING NUMBER SIZE
051-02247 D
4
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
VDD_EMIC_IO_0 AC8
U15 VDD_CORE_MAIN 1 C424_K 1 C427_K 1 C429_K 1 C431_K 1 C434_K 1 C436_K
VDD_EMIC_IO_1 AB15
U16 VDD_CORE_MAIN 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 1UF
VDD_EMIC_IO_1 AB14 20% 20% 20% 20% 20% 20%
U18 VDD_CORE_MAIN 6.3V
2 X5R-CERM 6.3V
2 X5R-CERM 6.3V
2 X5R-CERM 6.3V
2 X5R-CERM 6.3V
2 X5R-CERM 16V
2 CER-X5R
VDD_EMIC_IO_2 AC5
V14 VDD_CORE_MAIN 01005 01005 01005 01005 01005 0201
VDD_EMIC_IO_2 AC6 BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND
V16 VDD_CORE_MAIN AC17
D V18 VDD_CORE_MAIN
VDD_EMIC_IO_3
VDD_EMIC_IO_3 AC18
AE11
D
W16 VDD_CORE_MAIN
VDD_EMIC_IO_CA AC11
W18 VDD_CORE_MAIN
VDD_EMIC_IO_CA AC12
Y16 VDD_CORE_MAIN
VDD_EMIC_1V8_IO AB16 VDD_DDR_1V8_K
Y14 VDD_CORE_MAIN
4 5
VDD_LDO_DLL_EMIC AE11
Y18 VDD_CORE_MAIN 1 C440_K
Y20 VDD_CORE_MAIN 0.1UF
20%
6.3V
2 X5R-CERM
01005
BASEBAND
6 5 4 VDD_CORE_1V0_K L6 VDD_CORE_3G VDD_LDO_USB_SS AC3 VDD_IO_1V2_K 4 5
BASEBAND PMIC
D D
L500_K
BBPMU_K 0.47UH-20%-3.8A-0.037OHM
16 15 8 7 6 5 1 PP_VDD_MAIN B4 VSYS PMB6848 VMOD1LX D1 VMOD1LX_K 1 2 VDD_CORE_1V0_K 4 5 6
28 15 OUT
BBPMU_XG_RESET_SD_L_K F6 XG_RESET_SD* VMOD3SENSE B7 VMOD3_FB_K 5
0805 L503_K
H4 VUSB_IO 0.7MM MAX Z 1.0UH-20%-1.9A-0.120OHM
4 VDD_USB_3V15_K
1 VMOD4LX H2 VMOD4LX_K 1 2 VDD_IO_1V2_K 4 5
C510_K A4
2.2UF 15 IN
BBPMU_32K_K CLK_32K VMOD4SENSE G1 VMOD4_FB_K 5
0603
20%
6.3V
2 X5R-CERM 14 BI
I2C_BBPMU_SDA_K F3 I2CSDA VSWITCH G8 VDD_DDR_1V8_K 4
R501_K
F4 2.2K 2
0201
BBPMU 14 IN
I2C_BBPMU_SCL_K I2CSCL GPIO1 G7 TOUCH_TO_BBPMU_FORCE_PWM_R_K 1 AP_TO_MANY_BSYNC IN 12 13 28
OMIT_TABLE 5%
1/32W
28 14 BBPMU_VDIO_K B3 VDIO VDD_VMOD1 E1 PP_VDD_MAIN 1 5 6 7 8 15 16 MF
BI
01005
VDD_VMOD1 E2
C 28 14 IN
BBPMU_VCLK_K D4 VCLK
VDD_VMOD2 A1 C
14 BBPMU_STBY_K G3 STBY VDD_VMOD4 H1
IN
VDD_VMOD3 A8
14 BBPMU_ALERT_L_K E3 ALERT* 1 C517_K
OUT
1UF
20%
C6 TESTENTRY VCHP_C+ C8 VCHP_CP_K 10V
2 X5R
NC
E7 ANAMON VCHP_C- D8 VCHP_CN_K 0201
BBPMU
BBPMU.C8/D8
5 BBPMU_AGND_K G2 VSSA VCHP C7 VDD_BBPMU_3V3_K 5
C2 VSS_VMOD1
A3 V3V3 C5 VDD_BBPMU_3V3_K 5
VSS_VMOD2
A6 VSS_VMOD3 VPMIC E5 VPMIC_K
H3 VSS_VMOD4
VOTP E6 VOTP_K
D6 VSS_CHP VPMICREF G5 VPMICREF_K
XW501_K
SHORT-20L-0.05MM-SM
6 5 4 VDD_CORE_1V0_K 1 2 VMOD1_FB_K 5
OMIT
XW502_K
SHORT-20L-0.05MM-SM
6 5 VRF_CORE_1V0_K 1 2 VMOD2_FB_K 5
OMIT
XW503_K
SHORT-20L-0.05MM-SM
6 5 VRF_ANA_1V3_K 1 2 VMOD3_FB_K 5
OMIT
XW504_K
SHORT-20L-0.05MM-SM
5 4 VDD_IO_1V2_K 1 2 VMOD4_FB_K 5
A OMIT
A
1 C500_K 1 C501_K 1 C502_K 1 C514_K 1 C515_K PAGE TITLE
20UF
20%
6.3V
20UF
20%
6.3V
20UF
20%
6.3V
20UF
20%
6.3V
20UF
20%
6.3V
BASEBAND PMIC
2 CERM-X5R 2 CERM-X5R 2 CERM-X5R 2 CERM-X5R 2 CERM-X5R DRAWING NUMBER SIZE
0402
BBPMU
0402
BBPMU
0402
BBPMU
0402
BBPMU
0402
BBPMU 051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
TRANSCEIVERS XCVR0_K
PMB5757
UFWLB
SYM 5 OF 5
LAYOUT: TRACE SHOULD B1 ~1NH/1MM B3 VSS VSS U16
XW600_K LAYOUT: TRACE SHOULD B1 ~1NH/1MM B9 VSS VSS U6
SHORT-10L-0.25MM-SM
R615_K
0.00 2 C12 VSS VSS U8
VRF_ANA_1V3_K 1 2 6 VDD_XCVR0_1V3_K VRF_ANA_1V3_K 1 6 VDD_XCVR1_1V3_K
6 5 6 5
C16 VSS VSS V3
OMIT 0% C2
1 C645_K 1 C604_K 1 C609_K 1 C613_K 1 C614_K 1 C615_K 1 C616_K 1 C617_K 1 C619_K 1 C620_K 1 C5945_K 1/32W 1 C623_K 1 C628_K 1 C632_K 1 C633_K 1 C634_K 1 C635_K 1 C636_K 1 C637_K 1 C638_K VSS
MF
0.1UF 15UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.22UF 27PF 15UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.22UF C4
D 10%
6.3V
2 CER-X5R
20%
6.3V
2 CERM 6.3V
20%
2 X5R-CERM 6.3V
20%
2 X5R-CERM
20%
6.3V
2 X5R-CERM
20%
6.3V
2 X5R-CERM
20%
6.3V
2 X5R-CERM
20%
6.3V
2 X5R-CERM 6.3V
20%
2 X5R-CERM 6.3V
2 X5R
20% 5%
16V
2 NP0-C0G
01005
XCVR 20%
6.3V
2 CERM 6.3V
20%
2 X5R-CERM
20%
6.3V
2 X5R-CERM
20%
6.3V
2 X5R-CERM 6.3V
20%
2 X5R-CERM
20%
6.3V
2 X5R-CERM
20%
6.3V
2 X5R-CERM
20%
6.3V
2 X5R-CERM 6.3V
2 X5R
20%
C8
VSS
VSS
D
01005 0402-0.1MM 01005 01005 01005 01005 01005 01005 01005 01005 01005 0402-0.1MM 01005 01005 01005 01005 01005 01005 01005 01005 D3 VSS
XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR
NOSTUFF F15 VSS
F3 VSS
F5 VSS
XCVR0_K XCVR1_K F9 VSS
VDD_CORE_1V0_K L10 PMB5757 VDD_CORE_1V0_K L10 PMB5757 H11
6 VDD0V68_RET UFWLB 6 VDD0V68_RET UFWLB VSS
R614_K LAYOUT: MAX DCR 85MOHM R616_K H15
LAYOUT: MAX DCR 85MOHM L14 SYM 1 OF 5 L14 SYM 1 OF 5 VSS
1
0.00 2 6 VDD_XCVR0_1V3_K VDD1V3_MPHY
1
0.00 2 6 VDD_XCVR1_1V3_K VDD1V3_MPHY H3
6 5 VRF_CORE_1V0_K
0%
1
VRF_XCVR0_1V0_K
1
6
E14
H9
VDD1V3_CI SMARTI6T 6 5 VRF_CORE_1V0_K
0%
1
VRF_XCVR1_1V0_K
1
6
E14
H9
VDD1V3_CI SMARTI6T H5
VSS
VSS
1/32W
MF
C605_K C610_K VDD1V3_TXPLL 1/32W
MF
C624_K C629_K VDD1V3_TXPLL H7
0.47UF 0.1UF N6 0.47UF 0.1UF N6 VSS
01005 VDD1V3_RX1PLL 01005 VDD1V3_RX1PLL
XCVR 20% 20% XCVR 20% 20% J4 VSS
6.3V
2 X5R 6.3V
2 X5R-CERM N14 VDD1V3_RX2PLL 6.3V
2 X5R 6.3V
2 X5R-CERM N14 VDD1V3_RX2PLL K3 VSS
01005 01005 K7 VDD1V3_RXMS 01005 01005 K7 VDD1V3_RXMS
XCVR XCVR XCVR XCVR L12 VSS
NOSTUFF NOSTUFF
C6 VDD1V3_TXDIG FL600_K C6 VDD1V3_TXDIG L4 VSS
FL601_K B1 600-OHM-25%-0.1A B1 L8
600-OHM-25%-0.1A VDD1V3_TXRF VDD1V3_TXRF VSS
PP1V8_S2 1 2 VDD_XCVR1_1V8_K M13 VSS
PP1V8_S2 1 2 VDD_XCVR0_1V8_K R14 VDD1V3_RX2DCO
17 16 15 14 11 6 5 4 3 2 1 6
R14 VDD1V3_RX2DCO
14 11 6 5 4 3 2
17 16
1
15
6
0201-1 M15 VSS
0201-1 XCVR
XCVR 1 C606_K 1 C612_K N4 VDD1V3_RX1DCO 1 C625_K 1 C630_K N4 VDD1V3_RX1DCO M3 VSS
15UF 0.1UF 15UF 0.1UF P13 VSS
20% 20% D7 VDD1V3_TXDCO 20% 20% D7 VDD1V3_TXDCO
6.3V
2 CERM 6.3V
2 X5R-CERM 6.3V
2 CERM 6.3V
2 X5R-CERM P3 VSS
0402-0.1MM 01005 U4 VDD1V3_RXRF 0402-0.1MM 01005 U4 VDD1V3_RXRF R10 VSS
XCVR XCVR
R12 VSS
C14 VDD1V3_TXMS C14 VDD1V3_TXMS
R604_K R607_K R6 VSS
1
0.00 2 K15 1
0.00 2 K15 R8
6 5 1 PP_VDD_MAIN VDD_XCVR0_BAT_K 6 6 VRF_XCVR0_1V0_K VDD1V0_DIG 16 15 8 7 6 5 1 PP_VDD_MAIN VDD_XCVR1_BAT_K 6 6 VRF_XCVR1_1V0_K VDD1V0_DIG VSS
16 15 8 7
0% 0% T13 VSS
1 C602_K 1 C603_K 1/32W 1 C607_K 1 C611_K VDD_XCVR0_1V8_K G14 VDD1V8_CI 1 C621_K 1 C622_K 1/32W 1 C626_K 1 C631_K VDD_XCVR1_1V8_K G14 VDD1V8_CI
C 5%
100PF
5%
27PF MF
01005 0.47UF
20%
0.1UF
20%
6
T9 VDD1V8_RX 5%
100PF
5%
MF
27PF 01005 0.47UF
20%
0.1UF
20%
6
T9 VDD1V8_RX
T3
T5
VSS C
16V 16V XCVR 6.3V 6.3V D5 16V 16V XCVR 6.3V 6.3V D5 VSS
2 NP0-C0G 2 NP0-C0G 2 X5R 2 X5R-CERM VDD1V8_TX 2 NP0-C0G 2 NP0-C0G 2 X5R 2 X5R-CERM VDD1V8_TX U10
01005 01005 01005 01005 01005 01005 01005 01005 VSS
XCVR XCVR XCVR XCVR 6 VDD_XCVR0_BAT_K D13 VDD_BAT XCVR XCVR XCVR XCVR 6 VDD_XCVR1_BAT_K D13 VDD_BAT U12 VSS
NOSTUFF NOSTUFF
U14 VSS
CEXT0_RX2PLL_K N12 CEXT_RX2PLL CELL_CLK_EN J12 SYSCLK_26MHZ_EN_K 14 CEXT1_RX2PLL_K N12 CEXT_RX2PLL CELL_CLK_EN J12
IN
J8 XCVR
CEXT0_TXPLL_K CEXT_TXPLL CELL_CLK J14 SYSCLK_26MHZ_K OUT 14 28 CEXT1_TXPLL_K J8 CEXT_TXPLL CELL_CLK J14 NC
CEXT0_RX1PLL_K P7 CEXT_RX1PLL CEXT1_RX1PLL_K P7 CEXT_RX1PLL
CEXT0_TXMAG_K B5 CEXT_TXMAG CEXT1_TXMAG_K B5 CEXT_TXMAG XCVR1_K
PMB5757
28 BB_TO_NFC_CLK F13 FSYS_RF GPO0 J6 F13 FSYS_RF GPO0 J6 XCVR1_RFE_GPO0_K UFWLB
1 C639_K 1 C640_K 1 C641_K 1 C608_K
13 12 OUT NC C642_K C643_K C644_K 1 C627_K NC OUT 20
SYM 5 OF 5
NFC_TO_BB_CLK_REQ M11 FSYS_RF_EN_CLK_ON GPO1 K5 XCVR1_26MHZ_EN_K M11 FSYS_RF_EN_CLK_ON GPO1 K5
0.022UF 0.022UF 0.022UF 1UF 18 13 12 IN NC 0.022UF 0.022UF 0.022UF 1UF 6
NC B3 VSS VSS U16
10% 10% 10% 20% XCVR1_26MHZ_K G12 FSYS_C GPO2 L6 10% 10% 10% 20% GNSS_26MHZ_CLKOUT_K G12 FSYS_C GPO2 L6
10V
2 X5R 10V
2 X5R 10V
2 X5R 10V
2 X5R
6
NC 10V 10V 10V 10V
2 X5R
28 27 OUT NC B9 VSS VSS U6
XCVR1_26MHZ_EN_K E12 FSYS_C_EN GPO3 P11 XCVR0_TSYNC_OUT_K X5R X5R X5R E12 FSYS_C_EN GPO3 P11 XCVR0_TSYNC_IN_K
0201 0201 0201 0201 6 6
0201 0201 0201 0201 6
C12 VSS VSS U8
XCVR GPO4 N10 XCVR0_TSYNC_IN_K XCVR GPO4 N10 XCVR0_TSYNC_OUT_K
6 6
C16 VSS VSS V3
DIGRF_M0_EN_K F11 MPHY_EN GPO5 T7 XCVR0_MSYNC_OUT_K DIGRF_M1_EN_K F11 MPHY_EN GPO5 T7 XCVR0_MSYNC_IN_K
14 IN 6 14 IN 6
C2 VSS
DIGRF_A0_EN_K K11 MPHY2_EN GPO6 T11 XCVR0_MSYNC_IN_K DIGRF_A1_EN_K K11 MPHY2_EN GPO6 T11 XCVR0_MSYNC_OUT_K
14 IN 6 14 IN 6
C4 VSS
BBPMU_PWRGOOD_K K13 RESET_MAIN* BBPMU_PWRGOOD_K K13 RESET_MAIN*
28 18 17 15 IN 28 18 17 15 IN C8 VSS
XCVR0_RESET_L_K H13 RESET_TRX* XCVR1_RESET_L_K H13 RESET_TRX*
15 IN 15 IN D3 VSS
F15 VSS
6 XCVR0_JTAG_TMS_K K9 TMSC MI3 C10 NC 6 XCVR1_JTAG_TMS_K K9 TMSC MI3 C10 NC
F3 VSS
6 XCVR0_JTAG_TCK_K J10 TCKC MI4 D11 NC 6 XCVR1_JTAG_TCK_K J10 TCKC MI4 D11 NC
F5 VSS
F9 VSS
14 90_DIGRF_M0_RX1_P_K G16 MPHY_RX1_DAT 14 90_DIGRF_M1_RX1_P_K G16 MPHY_RX1_DAT H11 VSS
OUT OUT
14 90_DIGRF_M0_RX1_N_K H17 MPHY_RX1_DATX 14 90_DIGRF_M1_RX1_N_K H17 MPHY_RX1_DATX H15 VSS
OUT OUT
14 90_DIGRF_M0_RX2_P_K E16 MPHY_RX2_DAT 14 90_DIGRF_M1_RX2_P_K E16 MPHY_RX2_DAT H3 VSS
OUT OUT
B 14 OUT
90_DIGRF_M0_RX2_N_K F17 MPHY_RX2_DATX 14 OUT
90_DIGRF_M1_RX2_N_K F17 MPHY_RX2_DATX H5 VSS B
28 14 90_DIGRF_M0_TX_P_K J16 MPHY_TX_DAT RFFE_SDATA P9 RFFE1_DATA_K 18 19 20 21 23 24 28 28 14 90_DIGRF_M1_TX_P_K J16 MPHY_TX_DAT RFFE_SDATA P9 RFFE1_DATA_K 18 19 20 21 23
H7 VSS
IN BI IN BI 24 28
28 14 90_DIGRF_M0_TX_N_K K17 MPHY_TX_DATX RFFE_SCLK N8 RFFE1_CLK_K 18 19 20 21 23 24 28 28 14 90_DIGRF_M1_TX_N_K K17 MPHY_TX_DATX RFFE_SCLK N8 RFFE1_CLK_K 18 19 20 21 23
J4 VSS
IN OUT IN OUT 24 28
VDD_XCVR1_1V8_K 6
VCTCXO
R605_K
0.00 2
16 6 RFFE2_CLK_R_K 1
R609_K
0.00 2
RFFE2_CLK_K OUT 25
R6
R8
T13
T3
VSS
VSS
VSS
VSS
VSS
VDD_XCVR0_1V8_K XO_SUP_K 1 XO_SUP_R_K 0%
6 6
1/32W T5 VSS
0% MF
1 1 1/32W 1 C601_K 01005 VDD_CORE_1V0_K VDD_CORE_1V0_K U10 VSS
R600_K R602_K MF
6 5 4 6
2 X5R-CERM
VCC 0% 01005
XCVR0_JTAG_TMS_K 6 1/32W
MF
XCVR1_JTAG_TMS_K VTCXO_K 01005
A XCVR0_JTAG_TCK_K
6
6
26MHZ-6PPM-1.8V
1P6X1P2-SM A
XCVR1_JTAG_TCK_K PAGE TITLE
6
1 3
1 1
R601_K R603_K
6 AFC_DAC_K VCONT OUT
VCXO_26MHZ_K 6
0.022UF 1
1/32W
MF
1/32W
MF 10%
6.3V 100K
C650_K
0.1UF
Apple Inc. REVISION
2 01005 2 01005 2 X6S 1%
XCVR XCVR 0201-1 1/32W
MF
20%
6.3V
2 X5R-CERM
7.0.0
2 01005 01005 NOTICE OF PROPRIETARY PROPERTY: BRANCH
XCVR
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
evt-1
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
ET MODULATOR
D D
ALPES II MODULE
XW701_K
SHORT-10L-0.25MM-SM
16 15 8 6 5 1 PP_VDD_MAIN 1 2 PP_VDD_MAIN_ET_K VPA_ET_K 8 9
OMIT
ET 1 1 1 1
C720_K C721_K C722_K C723_K
2.2UF 1000PF 100PF 27PF
20% 10% 5% 5%
6.3V
2 X5R-CERM 10V
2 X5R 16V
2 NP0-C0G 16V
2 NP0-C0G
0201 01005 01005 01005
C ET
OMIT_TABLE
ET ET ET C
VCC2 26
PVDD 3
ET_K
QM81004M
16 8 50_ET_DAC_N_K 8 VRAMP- LGA
16 8 50_ET_DAC_P_K 7 VRAMP+
16 13 12 11 9 8 6 VDD_RFFE_VIO_1V8_K 15 VIO
16 12 11 9 8 6 RFFE1_DATA_K 17 DATA
16 12 11 9 8 6 RFFE1_CLK_K 16 CLK
THERM
PAD
GND
1
2
4
5
6
9
10
11
12
13
14
18
19
22
23
27
28
29
30
31
32
20
21
24
25
USID=0XC
B B
A A
PAGE TITLE
ET MODULATOR
DRAWING NUMBER SIZE
051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
L800_K
3.0NH+/-0.1NH-0.6A
11
1 2
4
50_2GMB_PA_OUT_K OUT 21 1710-1910
VBATT VCC 0201
RFFE
GSMPA_K 1 C811_K
SKY77367 0.5PF
LGA +/-0.05PF
PMB5757 R801_K
UFWLB 1
0.00 2 14 VIO
28 25 24 23 21 20 19 18 IN
VDD_RFFE_VIO_1V8_K VDD_RFFE_VIO_1V8_2G_K
SYM 3 OF 5 12 SDATA
0% RFFE1_DATA_K
PADACFN A12
28 24 23 21 20 19 18 BI
50_ET_DAC_N_K 1/32W
OUT 19 20 28
MF RFFE1_CLK_K 13 SCLK
PADACFP B13
28 24 23 21 20 19 18 IN
50_ET_DAC_P_K OUT 19 20 28 01005
GND
EPAD L803_K
1C801_K 1 C815_K 0.00 2
1
2
3
5
6
7
17
50_2GLB_PA_OUT_K 824- 915
B11 0.033UF 18PF OUT
TX2GHB
TX2GLB B7
50_XCVR0_2GMB_TX_K
50_XCVR0_2GLB_TX_K
8
8
1710-1910
824- 915
20%
6.3V
2 CER-X5R
2%
16V
2 CERM
USID=0X5 NOSTUFF
0%
1/32W
MF
TX25 A4 01005 01005 1 C812_K 01005
NC
TX35 A2 3900PF
NC 10%
TXH A10 50_XCVR0_B3_B4_B1_B25_TX_K 21 1710-1980 6.3V
2 CERM-X5R
OUT
TXL A8 50_XCVR0_LB_TX_K 21 699- 915 01005
OUT
C XCVR
C
MB HB TDD S-PAD
9 7 VPA_ET_K VDD_RFFE_VIO_1V8_K IN 18 19 20 21 23 24 25 28
XCVR1 TX 11 9 8 5 VFE_AUX_3V1_K
1 C804_K
0.1UF
20%
1 C806_K
18PF
2%
1 C809_K
5.6PF
+/-0.1PF
16V
2 NP0-C0G
01005
1C810_K
18PF
2%
16V
2 CERM
01005
RFFE
RFFE1_DATA_K
RFFE1_CLK_K IN
BI 18 19 20 21 23
18 19 20 21 23
24
24
28
28
XCVR1_K 6.3V
2 X5R-CERM 16V
2 CERM
VBATT 11
VIO 14
SDATA 12
SCLK 13
PMB5757
VCC1 8
VCC2 9
01005 01005
UFWLB RFFE RFFE
SYM 3 OF 5 11 9 8 5 VFE_AUX_3V1_K
PADACFN A12 50_ET_DAC_N_K OUT 19 20 28
B TDDPA_K B
3
22 50_XCVR1_B38_B40_B41_RX_K 27 RX_B38_B40_B41
OUT
22 50_XCVR1_B34_B39_RX_K 25 RX_B34_B39
OUT
GND THRM_PAD
1
2
4
6
7
10
15
17
19
21
22
24
26
28
23
20
18
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
USID=0XF
A A
PAGE TITLE
TDD TRANSMIT
DRAWING NUMBER SIZE
051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
FDD TRANSMIT
9 8 7 VPA_ET_K
VDD_RFFE_VIO_1V8_K IN 18 19 20 21 23 24 25 28
11 9 8 5 VFE_AUX_3V1_K 1 C900_K 1 C906_K RFFE1_DATA_K
18PF 22PF BI 18 19 20 21 23 24 28
0.1UF 18PF
20% 2% 01005 01005-1
6.3V
2 X5R-CERM 16V
2 CERM
01005 01005
D D
VCC1 41
VCC2 40
VIO 10
RFFE RFFE
VBATT 7
SDATA 8
SCLK 9
LBPA_K
2 L901_K
20 IN
50_XCVR0_LB_TX_K RFIN0 QM76041 0.6NH-+/-0.1NH-0.73A-0.1OHM
3 LGA 1 2
20 IN
50_XCVR1_LB_TX_K RFIN1 50_LAT_LB_M_K 50_LAT_LB_K BI 23 824-915
01005
20 50_2GLB_PA_OUT_K 18 2G_TX
IN 1
24
22
OUT
OUT
50_LB_DRX_K
50_XCVR0_LB_RX_K
12
26
LB_DIV
LB_RX0
LB S-PAD ANT1 16
ANT2 14
C902_K
0.8PF
+/-0.05PF
16V
2 C0G-CERM
01005
22 50_XCVR1_LB_RX_K 25 LB_RX1
OUT
1
4
5
6
11
13
15
17
19
20
21
22
27
28
29
30
31
32
33
34
35
36
37
38
39
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
+/-0.1PF
16V
2 NP0-C0G
01005
USID=0XD RFFE
NOSTUFF
C C
9 8 7 VPA_ET_K
B B
29
37
38
26
28
27
VBATT
VCC1
VCC2
VIO
SDATA
SCLK
20 50_2GMB_PA_OUT_K 34 RFIN_GSM
IN
20 IN
50_XCVR0_B3_B4_B1_B25_TX_K 31 RFIN_MB C901_K
50_XCVR1_B7_B30_TX_K 32 MHBPA_K 5.0PF
20 IN RFIN_HB 1 2
50_LAT_MB_HB_M_K 50_LAT_MB_HB_K
AFEM-8056-AP1 BI 23
22
22
22
OUT
OUT
OUT
OUT
50_XCVR0_B3_RX_K
50_XCVR1_B7_RX_K
50_XCVR0_B4_B66_RX_K
50_XCVR0_B25_RX_K
3 RX_B3
5 RX_B7
17 RX_B66
19 RX_B25
MB/HB S-PAD 50_UAT_MB_HB_M_K
L902_K
1.0NH-+/-0.1NH-0.9A-0.05OHM
1
01005
2 50_UAT_MB_HB_K BI 23 1710-2690
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
RFFE
NOSTUFF
A
USID=0XE
A
PAGE TITLE
FDD TRANSMIT
DRAWING NUMBER SIZE
051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
PRIMARY RECIEVE
L1001_K
22NH-3%-0.14A-2.26OHM
10 50_XCVR0_VLB_RX_M_K 1 2 50_XCVR0_VLB_RX_K 21
IN
01005
XCVR L1016_K
15NH-3%-0.17A-1.53OHM
D 10 50_XCVR1_VLB_RX_M_K 1 2 50_XCVR1_VLB_RX_K IN 21 D
01005
L1030_K XCVR
10NH-+/-3%-0.25A
10 50_XCVR0_LB_RX_M_K 1 2 50_XCVR0_LB_RX_K 21
IN
01005
XCVR 1
L1008_K
9.1NH-3%-0.17A-1.7OHM L1000_K
01005 8.2NH-3%-0.3A-0.5OHM
XCVR
NOSTUFF 1 2
10 50_XCVR1_LB_RX_M_K 50_XCVR1_LB_RX_K IN 21
2 01005
XCVR 1
R1000_K
50_XCVR0_B1_B4_RX_M_K 1
0.00 2
50_XCVR0_B1_B4_RX_K
L1023_K
10 IN 21
18NH-3%-0.16A-1.63OHM
XCVR0 PRX
0%
1/32W
MF
01005
XCVR
1
L1027_K
XCVR1 PRX 2
01005
XCVR
01005
IN 21
RX1 W2
V1
50_XCVR1_B7_RX_M_K 10 2620-2690
2
C
RX1 50_XCVR0_B3_RX_M_K 10 1805-1880 XCVR RX2 50_XCVR1_B30_RX_M_K 10 2350-2360
V1 U2 L1018_K
RX2 50_XCVR0_GSM1900_RX_M_K 10 1930-1990 RX3 1.0NH+/-0.1NH-0.22A-0.9OHM
RX3 U2 1 L1009_K RX4 T1 50_XCVR1_B38_B40_B41_RX_M_K 10 2300-2690
50_XCVR1_B7_RX_M_K 1 2 50_XCVR1_B7_RX_K
RX4 T1 50_XCVR0_B4_B66_RX_M_K 10 2110-2155 1.6PF RX5 R2 50_XCVR1_LB_RX_M_K 10 852- 960
10 IN 21
+/-0.1PF 01005
RX5 R2 50_XCVR0_GSM1800_RX_M_K 1805-1880 2 16V RX6 P1 50_XCVR1_B40B_NO_FILT_RX_M_K 2300-2400 1
10
NP0-C0G 10
E2 L1010_K D1 +/-0.1PF 1
RX15 2.4NH-+/-0.1NH-0.45A RX16 16V
RX16 D1 01005 NP0-C0G
XCVR XCVR 01005
XCVR L1025_K
XCVR 1.3NH-+/-0.1NH-0.7A-0.08OHM
2
01005-1
L1005_K XCVR
3.6NH+/-0.1NH-180MA
1 2 2
10 50_XCVR0_B3_RX_M_K 50_XCVR0_B3_RX_K IN 21
01005
XCVR 1 L1020_K
1
0.00 2
10 50_XCVR1_B34_B39_RX_M_K 50_XCVR1_B34_B39_RX_K IN 20
L1011_K 0%
1/32W 1
2.6NH-+/-0.1NH-0.45A-0.2OHM MF
B 01005
XCVR
NOSTUFF
01005
XCVR
L1026_K
B
2 3.6NH-+/-0.1NH-0.35A-0.3OHM
01005
L1021_K
2.4NH-+/-0.1NH-0.45A
10 50_XCVR1_B40B_NO_FILT_RX_M_K 1 2 50_XCVR1_B40B_NO_FILT_RX_K 21
IN
01005
1 C1001_K
2.0PF
+/-0.1PF
16V
2 NP0-C0G
GSMDI_K 01005
GSM1800-1900 XCVR
B8867
L1006_K LGA
0.6NH+/-0.1NH-320MA
10 50_XCVR0_GSM1800_RX_M_K 1 2 50_XCVR0_GSM1800_RX_K 4 GSM1800
01005
1 COMMON 1 50_XCVR0_2G_RX_K IN 21
XCVR 3 GSM1900
50_XCVR0_GSM1900_RX_K
1
L1012_K
3.0NH+/-0.1NH-200MA L1014_K
01005 GND
XCVR 3.6NH-+/-0.1NH-0.35A-0.3OHM
01005
2
5
6
2
L1007_K 2
1.3NH+/-0.1NH-220MA
A 10 50_XCVR0_GSM1900_RX_M_K 1
01005
2
A
1 PAGE TITLE
PRIMARY RECEIVE
L1013_K DRAWING NUMBER SIZE
3.0NH+/-0.1NH-200MA 051-02247 D
01005
XCVR Apple Inc. REVISION
2
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
LATDI_K
DPX202690DT-4090A2SJ 11 9 8 5 VFE_AUX_3V1_K
0805 R1100_K
1.8NH-+/-0.1NH-0.70A 1 C1105_K 1 C1107_K
21 BI
50_LAT_MB_HB_K 4 HI COM 2 50_LAT_LB_MB_HB_M_K 1 2 18PF 0.1UF
2% 20%
01005 16V
2 CERM 6.3V
2 X5R-CERM
50_LAT_LB_K 6 LO
21 BI 1 C1100_K 01005 01005
RFFE RFFE
9
GND 0.7PF
+/-0.05PF
16V VDD
1
3
5
2 NP0-C0G
01005 LATCP_K C1103_K
SKY16708-11 56PF
50_LAT_LB_MB_HB_K 1 RFIN1 LGA RFOUT1 2 50_LAT1_CPL_K 1 2 50_LAT1_ANT_K 29
OUT
13 RFIN2 RFOUT2 14
NC NC 5% 1
FL1100_K 25V
6 USID NP0-C0G-CERM
10-OHM-1.1A 01005
VDD_RFFE_VIO_1V8_K 1 2 VDD_RFFE_VIO_LATCP_1V8_K 5 4 50_XCVR0_LAT_CPLR_K
L1100_K
28 25 24 23 21 20 19 18 IN VIO RF_CPL1 OUT 22
56NH-100MA-3.9OHM
01005 28 24 23 21 20 19 18 RFFE1_DATA_K 12 SDATA RF_CPL2 16 50_XCVR1_LAT_CPLR_K 22 0201
BI OUT
8 UP_RFFE
28 24 23 21 20 19 18 IN
RFFE1_CLK_K SCLK
1 1 FOR ESD AND LOW FREQUENCY IMD
C1111_K C1109_K 2
0.033UF 5PF GND
20% +/-0.1PF
6.3V
2 CER-X5R 16V
2 NP0-C0G
3
7
10
11
15
01005 01005
C USID=0X6 C
9
16V
2 CERM 6.3V
2 X5R-CERM 01005 01005 01005
VDD 01005 01005
RFFE RFFE GPOLAT_K
UATCP_K R1101_K
SKY16708-11 0.00 2 QM18099
RFFE1_CLK_FILT_K 1 17 RFFE_GPOLAT_CLK_K WLCSP
50_UAT_MB_HB_K 1 RFIN1 LGA RFOUT1 2 50_UAT_MB_HB_TX_SOUTH_K
24 IN
21 BI IN 29
0% A3 VIO GPO1 A4 LAT_TUNER_GPO1_K
50_UAT_LB_K 13 RFIN2 RFOUT2 14 50_UAT_LB_SOUTH_K 1/32W OUT 29
21 BI BI 29
MF 1 C1102_K GPO2 B1 LAT_TUNER_GPO2_K
FL1101_K 01005 A1 SCLK
OUT 29
16V
2 NP0-C0G-CERM A2 SDATA GPO4 C1 LAT_TUNER_GPO4_K
VDD_RFFE_VIO_1V8_K 1 2 VDD_RFFE_VIO_UATCP_1V8_K 5 VIO RF_CPL1 4 50_XCVR0_UAT_CPLR_K OUT 29
28 25 24 23 21 20 19 18 IN OUT 22
01005 GPO5 C2
01005 RFFE1_DATA_K 12 SDATA RF_CPL2 16 50_XCVR1_UAT_CPLR_K B2 USID1 NC
24 23 21 20 19 18 BI OUT 22
GPO6 C4
28
RFFE1_CLK_K 8 SCLK R1102_K NC
24 23 21 20 19 18
28
IN
0.00 2 GPO7 C3
24 RFFE1_DATA_FILT_K 1 17 RFFE_GPOLAT_DATA_K NC
BI
GND 0% GND
1 C1112_K 1 C1108_K 1/32W
MF
USID=0X8
B3
0.033UF 5PF 01005 1 C1101_K
3
7
10
11
15
A A
PAGE TITLE
051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
XCVR0 DRX
XCVR0_K
PMB5757
UFWLB
SYM 4 OF 5
RD1 W4 50_XCVR0_B1_B66_DRX_K 12
RD2 V5
RD3 W6 50_XCVR0_B3_B25_DRX_K 12
RD4 V7
W8
RD5
RD6
RD7
RD8
RD9
V9
W10
V11
W12 13 5 VFE_LNA_2V7_K
DRX DSM
RD10 V13
RD11 W14 1 C1204_K 1 C1203_K
RD12 V15 50_XCVR0_LB_DRX_K 12
18PF 0.1UF
2% 20%
RD13 W16 16V
2 CERM 6.3V
2 X5R-CERM
RD14 V17 50_XCVR0_VLB_DRX_K 12
01005 01005
RFFE RFFE
XCVR
VDD 49
C C
21 50_LB_DRX_K 28 LB_ANT MB_HB_ANT1 14 50_LAT_MB_HB_DRX_K 21
IN IN
B39 18 50_XCVR1_B39_DRX_K
46 12
XCVR1 DRX 24
24
23
23
IN
BI
RFFE1_CLK_FILT_K
RFFE1_DATA_FILT_K 47
SCLK
SDATA
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
LB: USID=0X9
1
4
5
8
9
10
11
13
15
16
21
22
25
26
27
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
48
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
XCVR1_K
PMB5757
UFWLB
SYM 4 OF 5
MB-HB: USID=0XA
RD1 W4 50_XCVR1_VLB_DRX_K 12
RD2 V5
RD3 W6 50_XCVR1_LB_DRX_K 12
RD4 V7
RD5 W8 50_XCVR1_B7_B41_B38_DRX_K 12
RD6 V9 50_XCVR1_B40_B30_DRX_K 12
RD7 W10
RD8 V11
RD9 W12
B RD10 V13 50_XCVR1_B39_DRX_K 12 B
RD11 W14
RD12 V15 50_XCVR1_B34_DRX_K 12
RD13 W16
RD14 V17
XCVR
RFFE FILTERING
R1200_K
1
0.00 2
28 25 23 21 20 19 18 IN
VDD_RFFE_VIO_1V8_K VDD_RFFE_VIO_FILT_1V8_K 12
0%
1 C1200_K 1/32W
MF
0.1UF 01005
20% RFFE
6.3V
2 X5R-CERM
01005
RFFE
R1201_K
1
0.00 2
28 23 21 20 19 18 BI
RFFE1_DATA_K RFFE1_DATA_FILT_K BI 23 24
0%
1 C1201_K 1/32W
MF
0.1UF 01005
20% RFFE
6.3V
2 X5R-CERM
A 01005
RFFE
NOSTUFF
A
PAGE TITLE
R1202_K
28 23 21 20 19 18 IN
RFFE1_CLK_K 1
0.00 2
RFFE1_CLK_FILT_K OUT 23 24
DIVERSITY RECEIVE ASM'S
DRAWING NUMBER SIZE
0%
1 C1202_K 1/32W 051-02247 D
22PF
5%
MF
01005 Apple Inc. REVISION
RFFE
16V
2 CERM 7.0.0
01005-1 NOTICE OF PROPRIETARY PROPERTY: BRANCH
RFFE
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
evt-1
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
12 OF 17
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
IV ALL RIGHTS RESERVED 24 OF 34
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
0201
UP_RFFE
D D
LB DRX LNA
13 VFE_LNA_FILT_2V7_K
BYPASS SHARED WITH MB/HB DRX LNA
10
VDD
16 13 12 11 9 8 7 6 VDD_RFFE_VIO_1V8_K 9 VIO
14 13 UAT_TUNER_RFFE_DATA_K 7 SDATA
14 13 UAT_TUNER_RFFE_CLK_K 8 SCLK
GND EPAD
1 C1302_K 1 C1303_K 1 C1306_K
18PF 18PF 0.033UF
1
2
4
5
6
11
12
13
15
16
17
18
19
20
21
22
23
24
25
2% 2% 20%
2 16V
CERM 2 16V
CERM 2 6.3V
CER-X5R
01005 01005 01005
UP_RFFE
NOSTUFF
UP_RFFE
NOSTUFF
USID=0X2
UP_RFFE
C C
20
CERM X5R-CERM
01005 01005
VDD UP_RFFE UP_RFFE
4 MHBLN_K
29 BI
50_UAT_MB_HB_TX_NORTH_K IN_TX SKY13764-14 ANT 16 50_UUAT_MB_HB_K BI 26
28 25 24 23 21 20 19 18 VDD_RFFE_VIO_1V8_K 21 VIO
IN
26 25 UAT_TUNER_RFFE_DATA_K 23 SDATA
BI
26 25 UAT_TUNER_RFFE_CLK_K 22 SCLK
IN
GND EPAD
1
3
5
6
7
8
9
10
11
12
13
14
15
17
18
19
24
25
26
27
28
B USID=0X3 B
18 RFFE2_DATA_K 1
0.00 2
UAT_TUNER_RFFE_DATA_K 13 14
7.0.0
BI
NOTICE OF PROPRIETARY PROPERTY: BRANCH
0%
1/32W
MF
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
evt-1
01005 THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
13 OF 17
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
IV ALL RIGHTS RESERVED 25 OF 34
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
25 BI
50_UUAT_LB_PLEXER_K
UAT1
QUADP_K
ACFM-W912-AP1
R1402_K 9 LCB LGA L1405_K
1.0NH-+/-0.05NH-1.1A-0.04OHM C1403_K 2.4NH+/-0.1NH-0.6A
6.2PF
C 25 IN
1
50_UUAT_MB_HB_K
0201
2 50_UUAT_MB_HB_PLEXER_K 13
1
MID/HIGH_CELL_BAND ANT 5 50_UAT1_K 1 2 50_UAT1_M_K 1
0201
2 50_UAT1_TEST_K BI 29 TO ANTENNA FEED C
WIFI +/-0.1PF 1
1 15 GNSS 25V
C0G
0201
L1404_K 1 C1404_K
L1401_K 15NH-3%-0.3A-0.7OHM 0.3PF
12NH-3%-0.3A-0.5OHM 0201 +/-0.05PF
0201 GND EPAD 2 25V
C0G-CERM
UP_RFFE 0201
NOSTUFF
2
3
4
6
7
8
10
11
12
14
16
17
2
2
R1403_K
1
0.00 2
29 BI
50_UAT_WLAN_2G_NORTH_K 50_UAT_WLAN_2G_PLEXER_K
1%
1/20W 1
MF
0201
UP_RFFE
L1402_K
9.1NH+/-0.3%-0.3A
0201
UP_RFFE
NOSTUFF
2
R1404_K
1
0.00 2
27 OUT
50_GNSS_K 50_GNSS_PLEXER_K
1%
1/20W
MF 1 C1401_K
0201
UP_RFFE 18PF
2%
25V
2 C0H-CERM
0201
B UP_RFFE
NOSTUFF
B
B3
33PF
5%
2 16V
NP0-C0G-CERM
01005
NOSTUFF
R1406_K
1
0.00 2
25 BI
UAT_TUNER_RFFE_DATA_K 17 16 RFFE_GPOUAT_DATA_K
A 0%
1/32W
MF
A
01005 1 C1405_K PAGE TITLE
RFFE
5%
33PF UPPER ANTENNA FEEDS
2 16V
NP0-C0G-CERM DRAWING NUMBER SIZE
01005
NOSTUFF 051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D
L1501_K
120NH-5%-40MA D
15 VDD_GNSS_AUX_1V8_K 1 2 VGNSS_LNA_L_K
0201
GNSS
1 C1503_K
0.1UF
20%
7
2 6.3V
X5R-CERM
VCC 01005
GLNA_K GNSS
SKY65767-11
26 50_GNSS_K 1 RF_IN LGA RF_OUT 9 50_UAT_GNSS_LNA_RFOUT_K 15
IN
16 15 GNSS_EXT_LNA_EN_K 3 LNA_EN
GND
2
4
5
6
8
R1500_K
1
0.00 2
PP1V8_S2 PP_VDD_MAIN_GNSS_K PP_VDD_MAIN
C 17 16 14 11 6 5 4 3 2 1
0%
1 5 6 7 8 16
C
1/32W
MF
01005
GNSS
10
11
BATT_VCC_GNSS 8
PP1V8_GNSS
13 12 AP_TO_GNSS_WAKE 18 AP_TO_GNSS_DEVICE_WAKE GNSS_26MHZ_CLKOUT 42 GNSS_26MHZ_CLKOUT_K 18 28
IN IN
28 13 12 AP_TO_BB_TIME_MARK 20 AP_TO_GNSS_TIME_MARK GNSS_IF_TEST_OUT 36 GNSS_IF_TEST_OUT_K 28
IN OUT
GNSS_K
14 GNSS_BLANK_K 43 GNSS_BLANK 2103-601602-40
IN
LGA
VDD_GNSS_AUX_1V8_K 25 VDD_GNSS_AUX_1V8
TCXO_BB_GNSS_32K 5
15
TCXO_BB_GNSS_32K_K
16 15 GNSS_EXT_LNA_EN_K 49 GNSS_EXT_LNA_EN
IN 15 28
15 50_UAT_GNSS_LNA_RFOUT_K 2 GNSS_RFIN
19 GNSS_TO_PMU_HOST_WAKE
NC
28 13 12 PMU_TO_GNSS_EN 7 PMU_TO_GNSS_EN
IN
15
B 28
28
13
13
12
12
OUT
UART_GNSS_TO_AP_CTS_L
UART_AP_TO_GNSS_RTS_L 13
UART_GNSS_TO_AP_CTS*
UART_AP_TO_GNSS_RTS*
B
IN
28 13 12 UART_GNSS_TO_AP_RXD 17 UART_GNSS_TO_AP_RXD
OUT
28 13 12 UART_AP_TO_GNSS_TXD 16 UART_AP_TO_GNSS_TXD
IN
GND
1
3
4
6
9
12
14
22
23
24
21
26
27
28
29
30
31
32
33
34
35
37
38
39
40
41
44
45
46
47
48
50
51
52
53
54
A A
PAGE TITLE
GNSS
DRAWING NUMBER SIZE
051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
1% 1% 1% 1% 1
1/32W 1/32W 1/32W 1/32W R1608_K
5
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
PP 3 5 PP RFFE1_DATA_K 6 7 8 9 11 12 16
2.2UF 0201
20% 12V-33PF SIM 1 HARDWARE HW_ID<3:0> HARDWARE HW_ID<3:0>
OMIT OMIT C1600_K
2 6.3V
X5R-CERM
01005-1 1 100PF ICE17.2 RF DEV1 0 0 0 Z ICE17.2 PROTO1 0 0 0 0
0201 2 SIM 5%
PP1603_K PP1653_K ICE17.2 RF DEV2 0 0 Z 0 ICE17.2 PROTO2 0 0 0 1
P2MM-NSM P2MM-NSM SIM 2 16V
NP0-C0G
SM
1 BBPMU_XG_RESET_SD_L_K
SM
1 OMIT_TABLE 01005 RESERVED 0 0 Z Z ICE17.2 PROTO3 0 0 1 0
PP 3 5 PP RFFE1_CLK_K 6 7 8 9 11 12 16
BASEBAND RESERVED 0 Z 0 0 ICE17.2 EVT 0 0 1 1
OMIT OMIT
RESERVED 0 Z 0 Z RESERVED 0 1 0 0
PLACE NEAR XCVR0
PP1604_K PP1654_K
P2MM-NSM P2MM-NSM 16 SIM1_IO_R_K
SM SM
1 TCXO_BB_GNSS_32K_K 3 15
1 RFFE1_DATA_K 6 7 8 9 11 12 16 16 SIM1_CLK_R_K
PP PP
OMIT OMIT 16 SIM1_RST_R_K
PP1605_K
P2MM-NSM
SM
PP1651_K
P2MM-NSM
SM
16 SIM1_SWP_R_K
1 17 16 15 14 11 6 5
BOOTCFG
4 3 2 1 PP1V8_S2
17 16 15 14 11 6 5 4 3 2 1 PP1V8_S2
1 BB_DEBUG_ERROR_K 2
1 RFFE2_CLK_R_K 6 1
PP PP 1
OMIT OMIT DZ1606_K DZ1608_K 1 1 R1610_K
SG-WLL-2-2 SG-WLL-2-2 R1604_K R1607_K 1.00K
PLACE NEAR XCVR1 ESD202-B1-CSP01005 ESD202-B1-CSP01005 1.00K 1.00K 1%
PP1606_K PP1652_K 1% 1% 1/32W
P2MM-NSM P2MM-NSM 1 2 1 1/32W 1/32W MF
SM SM 2 MF MF 01005
1 AP_TO_BB_MESA_ON_K 1 RFFE2_DATA_R_K 2 BASEBAND
PP 1 2 PP 6
DZ1607_K DZ1609_K 2 01005
BASEBAND 2 01005
BASEBAND 28 14 13 12 PCIE_AP_TO_BB_RESET_L NOSTUFF
OUT
OMIT OMIT SG-WLL-2-2 SG-WLL-2-2 15 OUT
HW_MON1_K
ESD202-B1-CSP01005 ESD202-B1-CSP01005 STUFF FOR VENDOR CONFIG ONLY
15 OUT
HW_MON2_K
PP1607_K PP1655_K
C P2MM-NSM
SM
1
P2MM-NSM
SM
1
2 2
HW_MON1 HW_MON2 TRIG_IN C
PP
BB_TO_STROBE_DRIVER_GSM_BURST_IND
1 2 PP RFFE_GPOUAT_CLK_K 14 17
NAND 0 0 1
OMIT OMIT
FLASHLESS 1 0 1
PP1640_K PP1656_K
P2MM-NSM P2MM-NSM FLASHLESS WDOG DIS 1 1 0
SM SM
1 BB_TO_AP_RESET_ACT_L_K 3
1 RFFE_GPOUAT_DATA_K 14 17 NAND 1 1 1
PP PP
OMIT OMIT R1613_K BOOTSTRAPS ARE INTERNALLY PULLED DOWN
10
14 BI
SIM1_IO_K SIM1_IO_R_K 16
5%
XCVR 1/32W
MF
01005
PP1615_K
P2MM-NSM
SM
PP
1 SYSCLK_26MHZ_K 2 6
BBPMU 14 IN
SIM1_CLK_K
R1614_K
10
5%
SIM1_CLK_R_K 16 DEBUG CONNECTOR
OMIT
PP1657_K
P2MM-NSM
PP1616_K
P2MM-NSM
ETIC PP1627_K
P2MM-NSM
1/32W
MF
01005
R1615_K
MLB 516S1185
FLEX 516S1184
SM
1
SM
1
SM
1
10
BB_TO_NFC_CLK 50_ET_DAC_P_K BBPMU_VCLK_K SIM1_RST_K SIM1_RST_R_K
PP 1 6 PP 7 8 PP 2 5 14 IN 16
J_DEBUG_K
OMIT OMIT OMIT 5% 20-5857-036-001-829
1/32W
MF
PP1658_K PP1617_K PP1628_K 01005 F-ST-SM
P2MM-NSM P2MM-NSM P2MM-NSM 41
SM SM SM R1616_K
GNSS_26MHZ_CLKOUT_K 6 15
1 50_ET_DAC_N_K 7 8
1 BBPMU_VDIO_K 2 5 10 16 15 8 7 6 5 1 PP_VDD_MAIN 37 38
PP PP PP
13 12 BI
NFC_SWP1 SIM1_SWP_R_K 16
OMIT OMIT OMIT
5%
1/32W
PP1608_K MF 2 1 PMU_TO_BB_USB_VBUS_DETECT 1 2 90_USB_BB_DATA_P 1 2
P2MM-NSM 01005
3 4
SM 90_USB_BB_DATA_N
1 AP_TO_MANY_BSYNC 1 5
R1617_K NC 1 2
B
PCIE GNSS PP
OMIT 14 OUT
SIM1_DETECT_K
10
5%
1/32W
SIM1_DETECT_R_K 16
17 16 15 14 11 6 5 4 3
5
2
1
1
PMU_TO_BBPMU_RESET_L
PP1V8_S2
NC
5
7
9
6
8
10
VDD_SIM1_K
SIM1_RST_R_K
SIM1_CLK_R_K
2
16
16
4 5 16
B
MF
PP1641_K PP1618_K 01005 3 BB_JTAG_TDO_K 11 12 SIM1_IO_R_K 16
P2MM-NSM P2MM-NSM 13 14
SM SM 3 BB_JTAG_TDI_K SIM1_SWP_R_K 16
1 90_PCIE_AP_TO_BB_REFCLK_P 1 2
1 GNSS_EXT_LNA_EN_K 15
PP
OMIT
PP1642_K
PP
OMIT
PP1619_K PP1629_K
DIGRF 3
3
3
BB_JTAG_TRST_L_K
AP_TO_BB_RESET_L
BB_JTAG_TCK_K
15
17
19
16
18
20
NC
NC
SIM1_DETECT_R_K 16
33 34 UART_WLAN_TO_BB_COEX 1 2
BB UART OMIT
PP1634_K
P2MM-NSM
Apple Inc. REVISION
7.0.0
PP1614_K PP1643_K SM
1 NOTICE OF PROPRIETARY PROPERTY: BRANCH
P2MM-NSM P2MM-NSM
SM
1 BB_TO_PMU_PCIE_HOST_WAKE_L 1 2
SM
1 UART_BB_TO_AP_RXD_K 1 2 16
PP
OMIT
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
evt-1
PP PP
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
OMIT OMIT I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
16 OF 17
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
IV ALL RIGHTS RESERVED 28 OF 34
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
LAT MLC
L1702_K JLAT1_K
150OHM-25%-200MA-0.7DCR MM3729-2702A16
01005 M-ST-SM
14 11 6 5 4 3 2 1 PP1V8_S2 1 2 PP1V8_GPOLAT_CONN_K 1 9
17 16 15
2 10 L1703_K
11 RFFE_GPOLAT_DATA_K 150OHM-25%-200MA-0.7DCR
3 11 RFFE_GPOLAT_CLK_K 11
01005
4 12 PP3V0_TRISTAR_LAT_CONN_K 1 2 PP3V0_S2 1 17
1 50_LAT_WLAN 5 13 LAT_TUNER_GPO4_K 11
6 14 LAT_TUNER_GPO3_K 11
11 LAT_TUNER_GPO2_K 7 15
11 LAT_TUNER_GPO1_K 8 16 50_LAT1_ANT_K 11
5%
C1711_K
220PF
2 16V
C0G
1
2%
2 16V
C1710_K
33PF
NP0-C0G
1 C1708_K
5.6PF
+/-0.1PF
2 16V
NP0-C0G
1 C1707_K
5.6PF
+/-0.1PF
16V
2 NP0-C0G
17
18
19
SHLD
24
25
26
1
2%
C1704_K
33PF
2 16V
NP0-C0G
1
5%
C1703_K
220PF
2 16V
C0G
1 C1705_K
5.6PF
+/-0.1PF
2 16V
NP0-C0G
1 C1706_K
5.6PF
+/-0.1PF
2 16V
NP0-C0G
UAT1 MLC
01005 01005 01005 01005 01005 01005 01005 01005
NOSTUFF 20 27 NOSTUFF JUAT1_K
21 28 L1700_K MM3729-2702A12
M-RT-SM
22 29 150OHM-25%-200MA-0.7DCR
01005 1 7 50_UAT1_TEST_K
23 30 14
17 1 PP3V0_S2 1 2 17 PP3V0_TRISTAR_UAT_CONN_K 2 8
14 UAT_TUNER_GPO2_K 3 9 RFFE_GPOUAT_DATA_K 14 16
4 10 L1701_K
14 UAT_TUNER_GPO1_K RFFE_GPOUAT_CLK_K 14 150OHM-25%-200MA-0.7DCR
16
5 11 PP3V0_TRISTAR_UAT_CONN_K 17
01005
1 22
3 24
5 25
6 26
7 27
8 28
9 29 R1700_K
10 31 1
0.00 2
17 50_UAT_WLAN_5G_NORTH_K 50_UAT_WLAN_5G_MLC_K 17
11 GND GND 33 0%
1/32W
17 34 1 C1701_K MF 1 C1700_K
12 41 27PF 01005 27PF
5% 5%
14 42 2 16V 2 16V
NP0-C0G NP0-C0G
16 43 01005 01005
18 44 UAT UAT
NOSTUFF NOSTUFF
19 45
20 46
A A
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CK
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD
REV ECN DESCRIPTION OF REVISION
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. DATE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
7 0008448938 ENGINEERING RELEASED 2017-04-11
D
D22/D221 WIFI_MLB (GUINNESS) D
POWER
31 12 IN PP_VDD_MAIN
31 12 IN PP1V8_S2
CLOCKS
31 12 IN PMU_TO_WLAN_CLK32K
31 12 IN WLAN_TO_AP_TIME_SYNC
CONTROL C
C 31 12 IN PMU_TO_WLAN_REG_ON
31 12 IN PMU_TO_BT_REG_ON
31 12 OUT BT_TO_PMU_HOST_WAKE
31 12 IN AP_TO_BT_WAKE
WLAN PCIE
31 12 IN 90_PCIE_AP_TO_WLAN_REFCLK_P
31 12 IN 90_PCIE_AP_TO_WLAN_REFCLK_N
31 12 IN 90_PCIE_AP_TO_WLAN_TXD_P
31 12 IN 90_PCIE_AP_TO_WLAN_TXD_N
31 12 OUT 90_PCIE_WLAN_TO_AP_RXD_P
31 12 OUT 90_PCIE_WLAN_TO_AP_RXD_N
31 12 IN PCIE_AP_TO_WLAN_RESET_L
2 IO
PCIE_WLAN_BI_AP_CLKREQ_L
31 12 OUT WLAN_TO_PMU_HOST_WAKE
31 12 IN AP_TO_WLAN_DEVICE_WAKE
WLAN UART
31 12 OUT UART_WLAN_TO_AP_RXD
31 12 IN UART_AP_TO_WLAN_TXD
31 12 OUT UART_WLAN_TO_AP_CTS_L
31 12 IN UART_AP_TO_WLAN_RTS_L
BLUETOOTH UART
B 31
31
12 IN
12 OUT
UART_AP_TO_BT_TXD
UART_BT_TO_AP_RXD
B
31 12 IN UART_AP_TO_BT_RTS_L
31 12 OUT UART_BT_TO_AP_CTS_L
AOP
31 12 IN AOP_TO_WLAN_CONTEXT_A
31 12 IN AOP_TO_WLAN_CONTEXT_B
COEX
31 12 IN UART_BB_TO_WLAN_COEX
31 12 OUT UART_WLAN_TO_BB_COEX
ANTENNA
3 IO
50_UAT_WLAN_2G_SOUTH
3 IO
50_UAT_WLAN_5G_SOUTH
3 IO
50_LAT_WLAN
A SymbolPorts A
DRAWING TITLE
SCH,MLB,BOT,X893
DRAWING NUMBER SIZE
051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
WIFI/BT
1 97
2 UWLAN_W 98
D 4 LBEE5W11KN-040
LGA
99 D
2 1 PP1V8_S2 PP_VDD_MAIN 1
5 SYM 2 OF 2 100
6 101
1 C7600_W 1 C7601_W 1 C7602_W 1 C7608_W 1 C7607_W 1 C7609_W 1 C7611_W 1 C7612_W
1 C7606_W 7 102
27PF 0.01UF 10UF 10UF 27PF 4UF 4UF 4UF
5% 10% 20% 20% 0.01UF 5% 20% 20% 20% 8 103
16V
2 NP0-C0G 2 6.3V
X5R 2 6.3V 2 6.3V 10% 16V
2 NP0-C0G 2 6.3V 2 6.3V 6.3V
CER-X5R 2 CER-X5R 9 104
01005 01005
CERM-X5R
0402-0.1MM
CERM-X5R
0402-0.1MM 2 6.3V
X5R 01005
CER-X5R
0201 0201 0201
WLAN WLAN 01005 WLAN 10 105
VDDIO_1P8V 32
VBAT_VCC 15
VBAT_VCC 16
VBAT_RF_VCC 29
VBAT_RF_VCC 30
WLAN
11 106
12 107
13 108
31 30 12 PMU_TO_WLAN_CLK32K 122 LPO_IN 14 109
IN
17 110
UART_BB_TO_WLAN_COEX 127 SECI_IN
30 12 IN 18 112
UART_WLAN_TO_BB_COEX 92 SECI_OUT
30 12 OUT 21 113
24 114
PP1V8_S2
2 1
UWLAN_W BT_DEV_WAKE 129 AP_TO_BT_WAKE IN 12 30 31
27 115
1 PMU_TO_WLAN_REG_ON 86 WL_REG_ON LBEE5W11KN-040 28 116
R7600_W 31 30 12 IN
10K LGA 31 117
5% 85 BT_REG_ON SYM 1 OF 2 33 118
1/32W 31 30 12 IN
PMU_TO_BT_REG_ON
MF 37 34 120
BT_UART_RXD UART_AP_TO_BT_TXD
2 01005
WLAN
IN 12 30 31
2 1 UART_AP_TO_WLAN_TXD 1 2 1 90_PCIE_AP_TO_WLAN_TXD_P 1 2 LBIST_MBIST_W 1 998-10376 998-10147 BOM_TABLE_ALTS UWLAN_W USI ES6.1 WIFI MODULE
PP PP PP
PP7622_W
PP
SYNC_MASTER=WIFI SYNC_DATE=01/30/2014 A
PP7607_W PP7617_W PAGE TITLE
P2MM-NSM OMIT P2MM-NSM OMIT P2MM-NSM OMIT
2 JTAG_WLAN_TRST_L_W 1
SM
PP 2 JTAG_WLAN_SEL_W 1
SM
PP 2 1 UART_AP_TO_BT_RTS_L 1
SM
PP Guinness
DRAWING NUMBER SIZE
PP7608_W PP7618_W PP7623_W
P2MM-NSM OMIT P2MM-NSM OMIT P2MM-NSM OMIT 051-02247 D
2 1 AP_TO_WLAN_DEVICE_WAKE 1
SM
PP 2 1 PMU_TO_WLAN_REG_ON 1
SM
PP 2 1 UART_BT_TO_AP_CTS_L
SM
1
PP
Apple Inc. REVISION
6
5
3
2
ANT 50_LAT_WLAN_STRIPLINE_W 1 2 50_LAT_WLAN 12 30
L7701_W 6 HB
BI
0%
9.1NH-3%-0.17A-1.7OHM R7700_W 1/32W
01005 3.6PF 1 C7703_W MF 1 C7712_W
GND 01005
NOSTUFF 1 2 0.2PF 0.2PF
31 BI
50_WLAN_A_1_W 50_WLAN_A_1_DPLX_W_W
+/-0.05PF +/-0.05PF
2 16V 2 16V
1
3
5
2 +/-0.1PF CERM CERM
16V 1 01005 01005
NP0-C0G NOSTUFF
01005
C7705_W
2.2NH-+/-0.1NH-0.50A
01005
C C
2 BT_XSW_3P3V_W
1 C7716_W
100PF
5% 5GHZ WIFI UPPER ANTENNA FEED
1
2 35V
NP0-C0G
01005 VDD
W2XSW_W
L7704_W CXA4440GC R7711_W W5BPF_W R7702_W
5GHZ UAT
2GHZ UAT 1.2NH-+/-0.1NH-0.80A
31 50_WLAN_G_0_W 7 RF1 SBBD RF3 5 50_WLAN_G_1_SWOUT_W 3
0.5NH-+/-0.1NH-1.0A-0.04OHM LFB185G53CT6 0.4NH-+/-0.1NH-1.0A-0.03OHM
IN
0603
30 12 50_UAT_WLAN_2G_SOUTH 1 2 50_WLAN_G_0_SWOUT_W 8 RF4 RF2 4 50_WLAN_G_1_W 31 31 50_WLAN_A_0_W 1 2 50_WLAN_A_0_BPF_1_W 1 IN OUT 3 50_WLAN_A_0_BPF_2_W 1 2 50_UAT_WLAN_5G_SOUTH 12 30
BI BI BI BI
01005 01005 01005
1 C7708_W
31 IN
BT_XSW_VCTRL_W 3 VC 1 C7711_W GND 1 C7709_W OMIT_TABLE
GND 0.3PF 0.2PF
2
1.0PF 2 +/-0.05PF +/-0.1PF
+/-0.1PF R7703_W 2 16V 2 16V
2
6
9
TABLE_5_HEAD
A A
PAGE TITLE
WiFiANTFeeds
DRAWING NUMBER SIZE
051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
D22 NFC_MLB
MARCH 22, 2017
34 12 IN
PP_VDD_MAIN
34 12 IN
PP1V8_S2
34 12 IN
PMU_TO_NFC_EN
NFC_TO_PMU_HOST_WAKE
C 34 12 OUT
34 12 IN
AP_TO_NFC_DEV_WAKE C
34 12 IN
AP_TO_NFC_FW_DWLD_REQ
34 12 OUT NFC_TO_BB_CLK_REQ
34 12 IN
BB_TO_NFC_CLK
34 IN
NFC_DWP_TX_TP_S
34 12 IN
UART_AP_TO_NFC_TXD
34 12 OUT UART_NFC_TO_AP_RXD
34 12 IN
UART_AP_TO_NFC_RTS_L
34 12 OUT UART_NFC_TO_AP_CTS_L
34 12 IO
NFC_SWP1
B TABLE_5_HEAD
B
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
TABLE_5_ITEM
A page1 A
DRAWING TITLE
SCH,MLB,BOT,X893
DRAWING NUMBER SIZE
051-02247 D
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
STOCKHOLM 5V BOOSTER
L7502_S
NFC_DCDC_S
FAN48680UC07X
L7503_S
10OHM-50%-1A-0.05OHM
VOUT A1
0.47UH-20%-2.52A-0.08OHM B1 NFC_DCDC_OUT_S 1 2 VDD_NFC_5V_S
SW WLCSP
D 1 2 NFC_BOOST_SW_S B2 SW VOUT A2 1 C7517_S 1 C7522_S 1 C7520_S
0201
1 C7523_S
D
PIGA1608-SM
15UF 100PF 2.2UF 2.2UF
34 33 12 PP_VDD_MAIN A3 PVIN MODE0 B3 20%
6.3V
5%
16V
20% 20%
2 X5R 2 NP0-C0G 2 6.3V 2 6.3V
1 C7521_S 1 C7511_S MODE1 C3 0402-0.1MM-1 01005
X5R-CERM
0201
X5R-CERM
0201
C2
C1
NFC NFC
34 VDD_NFC_5V_S
34 NFC_BOOST_EN_S
33 12 PP1V8_S2 VDD_NFC_TVDD_S
1 C7506_S 1 C7526_S
34 33 12 PP_VDD_MAIN 34 VDD_NFC_AVDD_S
VOLTAGE=1.80V 2.2UF 2.2UF
R7502_S 20% 20%
0.00 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
34 VDD_NFC_AVDD_S 1 2 VDD_NFC_DVDD_S VDD_NFC_ESE_S
VOLTAGE=1.80V 0201 0201
0% 1 C7505_S
1/32W 1 C7500_S 1 C7502_S 1 C7504_S
MF 2.2UF
01005 2.2UF 2.2UF 0.22UF 20%
NFC 20% 20% 20% 2 6.3V
2 6.3V 2 6.3V 2 6.3V X5R-CERM
X5R-CERM
0201
NFC
OMIT_TABLE
X5R-CERM
0201
NFC
OMIT_TABLE NCNC
X5R
01005
NFC
0201
NFC
OMIT_TABLE
NFC FRONT END
TVDD G7
GPIOVDD G1
C7
PVDD D2
VUP H3
AVDD D7
ESE_VDD C5
E8
A4
A7
SVDD B8
SIM_VCC1 A5
SIM_VCC2 A8
C7507_S
C 1000PF R7508_S
C
VDD
VBAT
SIM_PMU_VCC_1
SIM_PMU_VCC_2
1 2 1K
PP7513_S 34 NFC_RXP_S NFC_RXP_CAP_S 1 2
P2MM-NSM
SM 1%
1 2% 1/20W
PP 25V MF
OMIT C0G-NP0 201
0201 NFC
NFC
L7500_S
77NH-5%-1.1A-0.09OHM
34 33 12 NFC_TO_PMU_HOST_WAKE E3 IRQ 34 NFC_TXP_S 1 2 NFC_BAL1_S
OUT
0402
AP_TO_NFC_FW_DWLD_REQ D3 DWL NFC 1 C7510_S
1
2
34 33 12 IN
NFC_S SIM_SWIO_1 A3 1000PF
ATB121006F-20011-T11
GND
PORT3
NFC_SWP1 12 33
NFC_TO_BB_CLK_REQ B1 CLK_REQ BI 2%
33 12 OUT PN80VEU3-C003B007 SIM_SWIO_2 A6 2 25V
UFLGA NC C0G-NP0
33 12 BB_TO_NFC_CLK C8 NFC_CLK_XTAL1 0201
IN
ESE_GPIO E5 NFC C7514_S
T7500_S
NC 560PF
34 33 12 UART_AP_TO_NFC_TXD E1 UART_RX
IN
TX_PWR_REQ_P A2 NFC_BOOST_EN_S NFC_ANT_MATCH_S 1 2 NFC_ANT_S
SM
34
34 33 12 UART_NFC_TO_AP_RXD D1 UART_TX
OUT
34 33 12 UART_AP_TO_NFC_RTS_L E2 UART_CTS ESE_DWPM_DBG B7 2%
IN NC 25V 1 C7515_S 1 C7516_S 1 C7518_S
34 33 12 UART_NFC_TO_AP_CTS_L C3 UART_RTS ESE_DWPS_DBG D4 NPO-C0G
OUT NC 0201 1000PF 1000PF 330PF
PORT1
PORT2
2% 2% 2%
PP7512_S34 33 12 PMU_TO_NFC_EN H1 VEN RX+ H5 NFC_RXP_S 34 L7501_S 2 25V 2 25V 2 25V
P2MM-NSM IN C0G-NP0 C0G-NP0 NPO-COG
77NH-5%-1.1A-0.09OHM
SM RX- H6 NFC_RXN_S C7512_S 0201 0201 0201
4
3
1 NFC_DWP_RX_TP_S B5 IC0 100PF NFC NFC
PP
34 NFC_TXN_S 1 2 NFC_BAL2_S
OMIT C4 IC1 TX1 G8 NFC_TXP_S 34
1 2
NC 0402
D5 IC2 TX2 H7 NFC_TXN_S 34
NFC 1 C7513_S
NC 2%
E4 IC3 1000PF 50V
NC WKUP_REQ A1 AP_TO_NFC_DEV_WAKE 12 33 34
2% C0G
E6 IN
2 25V 0201
33
NC IC4 C0G-NP0
F4 IC5 VMID H4 IN 0201
NC NFC
F5 IC6
NC C2
B NC
F6 IC7
NFC_GPIO0
NFC_GPIO1 B2
NFC_TEST_OUT_S
NFC_ADC_I_TEST_S
34
34
PP7511_S
P2MM-NSM
NOSTUFF
1 C7530_S
NOSTUFF
1 C7531_S
NOSTUFF
1 C7532_S
NOSTUFF
1 C7533_S
B
F8 IC8 SM
NC NFC_GPIO2 F3 NFC_DWP_TX_TP_S 1 18PF 39PF 82PF 150PF
G4 IC9 PP 2% 5% 5% 5%
NC NFC_GPIO3 F2 NFC_TUNE_B0_S 34 OMIT 2 16V 2 16V 2 25V 2 25V
B3 IC10 1 C7503_S CERM NP0-C0G C0G C0G
NC NFC_GPIO4 H2 NFC_TUNE_B1_S 34
01005 01005 01005 01005
B6 IC11 0.1UF
NC NFC_GPIO5 G2 NFC_TUNE_B2_S 34
20% NFC_FETB0_S NFC_FETB1_S NFC_FETB2_S NFC_FETB3_S
D6 IC12 2 6.3V 6 3 6 3
NC NFC_GPIO6 F1 NFC_TUNE_B3_S 34
X5R-CERM
E7 IC13 01005
NC NFC
B4 ESE_VSS
NC
F7 IC14 XTAL2 D8 NC
D D D D
C6 DVSS
G3 AVSS
G5 AVSS
G6 AVSS
C1 PVSS
H8 TVSS
34 NFC_TUNE_B0_S 2 G 5 G 2 G 5 G
PP7503_S PP7507_S
P2MM-NSM P2MM-NSM
SM SM TP7505_S
UART_AP_TO_NFC_TXD 1 NFC_TO_PMU_HOST_WAKE 1 NFC_TEST_OUT_S 1
34 33 12 PP 34 33 12 PP 34 A
OMIT OMIT TP-P55
A PP7504_S PP7508_S
NFC
OMIT A
P2MM-NSM P2MM-NSM PAGE TITLE
SM SM TP7506_S
34 33 12 UART_NFC_TO_AP_RXD 1
PP
OMIT
34 33 12 PMU_TO_NFC_EN 1
OMIT
PP 34 NFC_ADC_I_TEST_S 1
TP-P55
NFC
A NFC DRAWING NUMBER SIZE
PP7505_S PP7509_S OMIT
P2MM-NSM
SM
P2MM-NSM
SM Apple Inc.
051-02247 D
34 33 12 UART_AP_TO_NFC_RTS_L 1 34 33 12 AP_TO_NFC_DEV_WAKE 1 REVISION
PP PP
OMIT OMIT
PP7514_S
7.0.0
PP7506_S PP7510_S P2MM-NSM NOTICE OF PROPRIETARY PROPERTY: BRANCH
P2MM-NSM P2MM-NSM SM
34 33 12 UART_NFC_TO_AP_CTS_L 1
SM
PP 34 33 12 AP_TO_NFC_FW_DWLD_REQ 1
SM
PP
34 VDD_NFC_5V_S 1
PP THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
evt-1
OMIT THE POSESSOR AGREES TO THE FOLLOWING: PAGE
OMIT OMIT I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
75 OF 75
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 34 OF 34
8 7 6 5 4 3 2 1