RNS INSTITUTE OF TECHNOLOGY, BENGALURU - 98

DEPARTMENT OF ISE
ANALOG AND DIGITAL ELECTRONICS
(21CS33) QUESTION BANK
SL NO QUESTION LEVELS CO’s
MODULE-1
1 Explain Collector to base bias circuit with the neat circuit L2 CO1
diagram and necessary derivations
2 Explain the working of construction and working of Astable L2 CO2
multivibrator using 555 timer IC
3 Explain the working of Photodiode with necessary circuit L2 CO1
diagram.
4 Explain the various performance parameters of Power supply. L2 CO1
5 Calculate the values of IB,IC& VCE for the circuit shown in L3 CO1
fig(i) if RC=2.2KΩ,RB=470Ω,VCC=18V,hfe=100.Draw the
DC load line and Q point.
6 Explain voltage divider bias circuit with the neat circuit L1 CO1
diagram and necessary derivations
7 Explain the construction and working of Relaxation oscillator. L2 CO1
8 Explain the working of R2R DAC with necessary circuit L2 CO1
diagram & derivations
9 Explain the working of Band pass & Band reject filters with L2 CO1
necessary circuit diagram & derivations
10 Compute Collector current and draw the load line for the circuit L3 CO1
shown in fig(ii).Also Mark the Q-Point. Assume β=100.
11 Explain the construction, working principles and characteristics L2 CO1
of photodiodes.
12 Explain the construction, working principles and applications L2 CO1
of light emitting diode (LED).
13 Explain voltage divider bias circuit of BJT. L1 CO1
14 Explain base bias of BJT L2 CO1
15 Explain peak detector circuit with a neat waveform. L2 CO1
16 Explain the operation of wind bandpass filter. L2 CO1
17 List and explain the performance parameters of power supply L3 CO1
18 Explain shunt and series type voltage regulator. L2 CO1
19 With a neat diagram explain R-2R ladder network DAC L2 CO1
20 Explain the operation of successive approximation ADC using L2 CO1
simplified block diagram.
21 Explain peak detector circuit with a neat waveform. L2 CO1
22 Explain Astable multivibrator with neat circuit diagram and L2 CO1
 waveform.
MODULE -2
1 Explain the basic and universal gates in detail along with the L2 CO2
necessary diagrams and trueth table.
2 Find the minimal sum and minimal product using karnaugh L3 CO2
map.
F(a,b,c,d)= Ʃm (6,7,9,10,13)+d(1,4,5,11).
3 Simplify using Karnaugh map method. f(A,B,C,D) = L3 CO2
∏M(0,1,3,8,9,10,14,15)
4 What is Logic gates? State and prove De Morgan’s Theorems. L1 CO2
5 Find the minimal sum and minimal product using karnaugh L3 CO2
map.
Y=F(A,B,C,D)=∑m(8,9,10,11,12,13,14,15)

6 Explain Petrick method using an example, in step by step L3 CO2

7 Define implicant. Explain prime and essential prime implicants L1 CO2
with example.
8 Find the minimal sum and minimal product using karnaugh L3 CO2
map.
Y=F(A,B,C,D)=∑m(0,1,4,5,6,8,9,12,13,14
9 Reduce S = S(0, 1, 2, 3, 6, 7, 8, 12, 13, 15) using L3 CO2
QuineMcCluskey method
10 Reduce F(A, B, C, D) = Σ(0, 1, 2, 3, 5, 7, 8, 10, 12, 13, 15) L3 CO2
using QuineMcCluskey method
11 What is Karnaugh map? State the drawbacks of Karnaugh map. L1 CO2
12 Simplify the following Boolean function by using k-map L3 CO2
method in POS form.
F(A,B,C,D)= Ʃm(0,1,2,3,4,5,7).
13 Reduce S = S(0, 1, 2, 5, 6, 7, 8, 9,10, 14) using L3 CO2
QuineMcCluskey method.
MODULE -3
1 Design 8:1 multiplexer for L3 CO3
a. F(A,B,C,D) = ∑m(2,4,5,6,7,8,10,13).
2 Explain the operation of three-state buffers. Determine the L2 CO3
resulting out-put when three-state buffer outputs are connected
together.
3 Design 8:1 multiplexer for L3 CO3
b. F(A,B,C,D) = ∑m(1,3,5,7,8,12,13,14)

4 Define demultiplexer. Implement the following L3 CO3

 a. 1:16 demux using 1:4 demux
b. 1:32 demux using 1:16 demux
5 Realise Y=A’B+B’C’+ABC using 8x1 mux and verify can it L3 CO3
also be designed using 4x1 mux.

6 Design the following using demultiplexer L3 CO3

f1(A,B,C) = ∑m(0,1,3,5)
7 Design the following using demultiplexer L3 CO3
f2(A,B,C) = ∑m(3,5,7)
8 What is hazard? List the type of Hazards L1 CO3
9 Define Decoder, Construct the following using 3to 8 decoder and L3 CO3
multiple input OR gates.
a) f1(A,B,C) = ∑m(0,4,7)
f2(A,B,C) = ∑m(1,3,5)
f3(A,B,C) = ∑m(1,2,6,7)
10 Explain static 0 hazard and its covers with example and also with its L2 CO3
Hazard-free circuit.
11 Design full adder and full sub tractor using PLA. L3 CO3

12 Design a logic diagram for the functions f1(A,B,C) = A’B+BC’+C L3 CO3

and f2(A,B,C) = AB+B+CA’ using PAL
13 Design a BCD to seven segment decoder using PAL. L3 CO3

14 Design a logic diagram for the functions f1(A,B,C,D) = Σm L3 CO3

(0,2,4,5,8,12) and f2(A,B,C,D) = Σm (0,2,3,4,8,10,12,13,14) using
PLA.

15 Explain detection and cover of static -1 hazard in the circuit L2 CO3

representing Boolean function F=BC + C’A’D.

16 Explain four kinds of three state buffers along with the truth table L2 CO3
and circuit diagram.

MODULE -4
1 Explain the working of SR latch with a neat logic diagram and truth L2 CO4
table.

2 Develop a VHDL module for 8:1 mux. L3 CO4

3 Explain the working of JK-Master Slave flip - flop with a neat L2 CO4
diagram and truth table
4 Develop a circuit that implements the following VHDL code: L3 CO4
V <= T and U or not W;
 U <= not R or S and P or not Q or S;
T <= not P or Q or R;
W <= not Q or not ( R and S);

5 Explain the structure of VHDL program. Write VHDL code for 4 bit L2 CO4
parallel adder using full adder as component.

6 Explain the working of positive edge triggered D, SR flip - flop with L2 CO4
neat diagrams and draw the output waveform for the inputs 1011 and
1010.

7 Construct the characteristic equation, transition diagram and L3 CO4

excitation table of SR , JK flip - flop.

8 Differentiate between the combinational and sequential circuits. L3 CO4

9 Explain the entity and architecture declarations in VHDL module L2 CO4

with an example.

10 Develop a VHDL module for 4:1 mux using conditional statements. L3 CO4

11 Explain the working of positive edge triggered T flip - flop with neat L2 CO4
diagrams and draw the output waveform for inputs 1011 and 0111.

12 Explain the working of negative edge triggered JK , D, T flip - flop L3 CO4

with neat diagrams and draw the output waveform for the J and K
inputs 1101 and 1101 respectively.

13 Convert by adding external gates : L3 CO4

i) D flip-flop to a J-K flip-flop
ii) T flip-flop to a D flip-flop
iii) J-K flip-flop to a D flip-flop.

14 Derive the characteristic equations of SR, D, J-K and T flip-flops in L3 CO4

POS form.

15 Design a BCD to common anode seven segment decoder using PLA L3 CO5
MODULE-5
1 Explain the working of Johnson counter using JK flip – flops L2 CO5
with a neat timing diagram.
2 Describe the working of parallel adder with accumulator. L2 CO5
3 Design a synchronous counter using JK flip – flop for the L3 CO5
following counting sequence: 111, 100, 000, 101, 110, and 001.
4 With neat diagram, explain how data can be transferred from L2 CO5
the output of one of two registers into a third register using tri-
state buffers.
5 Explain the working of SISO shift register using SR flip – L2 CO5
flops. Write a timing diagram to shift the data 1011.

6 Design a mod- 5 synchronous up counter using SR flip – flop L3 CO5

7 Design a mod-6 down counter using JK flip flop. L3 CO5
8 Design a three bit counter using JK flip flop that counts for the L3 CO6
sequence: 010, 101, 000, 111, 110, 001, 011, 100

9 Distinguish between a ring counter and a Johnson counter. L3 CO5

10 Explain the working of a 3-bit asynchronous down counter. L2 CO5
11 Design a synchronous mod-5 up counter using JK flip flop. Give L4 CO5
excitation table of JK flip flop, state diagram and state table.
12 Construct a mod-8 asynchronous counter and write the truth table L3 CO5
and draw waveforms.
13 Design mod-4 synchronous counter using a –ve edged triggered JK L3 CO5
flip flop. Draw the state transition diagram.
14 Design mod-6 synchronous counter by using JK flip flop. Give L2 CO5
excitation table of JK flip flop, state diagram and state table.
15 Explain ripple counter (Asynchronous) with truth table and L2 CO5
waveform.
16 Design a self-correcting modulo-6 as described in state sequence of L3 CO6
below figure in which all the unused state leads to state CBA=000.