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Hardware Program Project Manager in San Francisco Bay CA Resume Evan Chang
Hardware Program Project Manager in San Francisco Bay CA Resume Evan Chang
H (408) 358-1564
echang216@comcast.net
C (408) 590-5381
CORE COMPETENCIES
Performance Optimization Process Improvement Change Management IT Strategy Global Delivery Installation Training Hardware Peripherals Client Collaboration Client Relationship Management Project Management Team Leadership Team Development Product Management IC Foundry Process Management IC Process Engineering Photo Mask Engineering
SanDisk Corporation
1990 2011
Senior Product / NPI Program Manager 2002 2011 Provided strategic direction and leadership to product area including engineering, quality, supply chain, and manufacturing support for sales / marketing. Assessed, developed, designed, specified, and implemented projects to achieve optimal performance and productivity. Analyze business and technology challenges, assess costs, and suggest solutions. Worked with technical as well as end users to understand business requirements and identify solutions. Key projects included: Managed Memory Stick Pro Duo and Memory Stick Micro M2 products for retail and OEM markets, and TriFlash / iNAND product for OEM market. Directed Trans-Flash / MicroSD and USB products at early stages of development, as well as managed controller development.
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Senior Manager Foundry Development 1990 2002 Directed the Foundry Project for the Technology Department. Managed operations for the design, development, analysis of manufacturability, and costing of technology products for the semiconductor industry, including release and quality implementation management. Oversaw program execution process to meet timing, budget, technical performance, and product quality requirements. Managed technical development to meet cost and timing targets. Led supplier meetings and supervised the release of completed designs that were in compliance with established timing, quality, and cost targets. Supported Deign Failure Mode Effects Analysis (DFMEA) process and led design review meetings to ensure product met requirements. Applied troubleshooting and problem solving skills in the resolution of component and system performance, cost, and quality issues as well as client concerns. Managed off-shore silicon foundries in Japan (Panasonic, NEC), Korea (LG), and Taiwan (UMC, TSMC). Orchestrated the development of NOR-based Flash Memory wafer processes at the foundries. Developed 1Mb Flash with 1.0um technology up to 512 Mb with 0.1um technology.
EDUCATION Master of Science, Electrical Engineering University of Santa Clara Santa Clara, CA
Bachelor of Science, Mechanical Engineering University of Chinese Culture Taiwan