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BTS7960 InfineonTechnologies2
BTS7960 InfineonTechnologies2
HS base-chip
VS
Top-chip
IIN VS
IN
V IN
I IN H
INH I OU T , I L
VIN H OUT
ISR VSD (L S) V OU T
SR
V SR
I IS
IS
GND
VIS
I GN D , I D(L S)
8
1 3 5 7
2 4 6
2 4 6
1 3 5 7
T
VS
T
T
T V I
I
High Side Switch Low Side Switch
25 25
m m
20 20
RON(HS) RON(LS)
15 15 Tj = 150°C
Tj = 150°C
10 10 Tj = 25°C
Tj = 25°C
T j = -40°C
Tj = -40°C
5 5
4 8 12 16 20 24 V 28 4 8 12 16 20 24 V 28
VS VS
R
T
T
I V
V
T
T
T
I
V
V
IN
t
tdr(HS) tr(HS) tdf (HS) tf (HS)
VOUT
90% 90%
V OUT VOUT
10% 10%
IN
t
t df (LS) tf (LS) t dr(LS) tr(LS)
VOUT
90% 90%
VOUT V OUT
10% 10%
t
T V
- V
T V
-
I
IL
tCLS
ICLx
ICLx0
80 80
Tj = -40°C
75 75
T j = 25°C
70 70
65 Tj = 150°C 65
60 60
I CLH0
55 55
Tj = -40°C
50 50 ICLL0
Tj = 25°C
45 45
Tj = 150°C
40 40
35 35
0 500 1000 1500 2000 0 500 1000 1500 2000
55 55
I CLH I CLL
50 50
Tj = -40°C
45 45 Tj = 25°C
Tj = 150°C
40 40
35 35
4 6 8 10 12 14 16 18 V 20 4 6 8 10 12 14 16 18 V 20
VS VS
T V
T
T
T
T
T
T
k
I
Normal operation: Fault condition:
current sense mode error flag mode
VS VS
ESD-ZD ESD-ZD
IS IS
IIS~ ILoad
Sense Sense
output R IS VIS output RIS VIS
IIS(lim) IIS(lim)
logic logic
T V
k IS
I
k I I I
I
R
R
Microcontroller Voltage Regulator Reverse Polarity
Protection
I/O WO TLE
µC I
Reset RO VS
4278G
Vdd Q
D GND
I/O I/O I/O I/O Vss SPD
50P03L
IN
OUT
M OUT
IN
IS IS
SR SR
GND GND
1)
0.1
17
0...0.15 2.4
7 x 0.6 +0.1
-0.03
6 x 1.27 0.1 B
0.25 M AB
0.05
1)
C 17
0...0.15 0.5±0.1
2.4
7 x 0.6±0.1
6 x 1.27 4.5±0.3
8.4 ±0.3
0.25 M AB C