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Munad ECD Assignment 2 Main
Munad ECD Assignment 2 Main
Contents
Class A Output Stage ............................................................................................................................... 2
Derivation............................................................................................................................................ 2
Simulation ........................................................................................................................................... 3
Circuit Schematic ............................................................................................................................ 3
Load Power ..................................................................................................................................... 3
Supplied Power ............................................................................................................................... 3
Efficiency ......................................................................................................................................... 4
Discussion............................................................................................................................................ 4
Class B Output Stage ............................................................................................................................... 5
Derivation............................................................................................................................................ 5
Simulation ........................................................................................................................................... 6
Circuit Schematic ............................................................................................................................ 6
Load Power ..................................................................................................................................... 6
Supplied Power ............................................................................................................................... 6
Efficiency ......................................................................................................................................... 6
Discussion............................................................................................................................................ 7
Class AB Output Stage............................................................................................................................. 7
Derivation............................................................................................................................................ 7
Simulation ........................................................................................................................................... 8
Circuit Schematic ............................................................................................................................ 8
Load Power ..................................................................................................................................... 8
Supplied Power ............................................................................................................................... 9
Efficiency ......................................................................................................................................... 9
Discussion............................................................................................................................................ 9
2
Simulation
Circuit Schematic
Load Power
Supplied Power
Efficiency
Efficiency= Pload/Psupplied
Discussion
The simulated power efficiency is less than the theoretical power efficiency because of the ideal
assumptions made in theoretical calculations for example in simulated results the Vo is less than Vcc
and is also distorted. Also in the output waveform a slight offset is seen due to the VBE drop of
transistor Q1, this distorts the output waveform at the negative amplitudes.
5
Simulation
Circuit Schematic
Load Power
Supplied Power
Efficiency
Efficiency= Pload/Psupplied
Discussion
The simulated power efficiency is less than the theoretical power efficiency because of the ideal
assumptions made in theoretical calculations for example in simulated results the Vo is less than Vcc
and is also distorted. Another important reason is the cross over distortion which is produced due to
the switching between the transistors and is ignored in theoretical calculations.
Simulation
Circuit Schematic
Load Power
Supplied Power
Total Supplied Power= (2 x Power supplied by one source) + (2 x Power by Vbb/2 source)
Efficiency
Efficiency= Pload/Psupplied
Discussion
In Class AB Output stage it can be seen that the simulated power efficiency is much closer to the
theoretical power efficiency and the reason is that the crossover distortion is almost eliminated. The
power efficiency is still slightly less due to the other ideal assumptions taken in the theoretical
calculations.