International Journal of Reconfigurable and Embedded Systems (IJRES)

Vol. 12, No. 3, November 2023, pp. 462~477

ISSN: 2089-4864, DOI: 10.11591/ijres.v12.i3pp462-477  462

Balancing of four wire loads using linearized H-bridge static

synchronous compensators

Abdulkareem Mokif Obais1, Ali Abdulkareem Mukheef2

1
Department of Biomedical Engineering, College of Engineering, University of Babylon, Al-Hillah, Iraq
2
Department of English Language Literature, Almustaqbal University College, Al-Hillah, Iraq

Article Info ABSTRACT

Article history: In this paper, a load balancing system is designed to balance the secondary
phase currents of 11 kV/380 V, 50 Hz, 100 kVA power transformer in a
Received Jan 28, 2023 three phase 4-wire, distribution network. The load balancing system is built
Revised Mar 19, 2023 of six identical modified static synchronous compensators (M-STATCOMs).
Accepted Apr 3, 2023 Each M-STATCOM is constructed of a voltage source converter-based
H-bridge controlled in capacitive and inductive modes as a linear
compensating susceptance. The M-STATCOM current is controlled by
Keywords: varying its angle such that it exchanges pure reactive current with the utility
grid. Three identical M-STATCOMs are connected in delta-form to balance
Energy saving the active phase currents of the power transformer, whereas the other three
Harmonic reduction identical M-STATCOMs are connected in star-form to compensate for
Load balancing reactive currents. The M-STATCOMs in the delta-connected compensator
Power quality are driven by 380 V line-to-line voltages, whilst, those connected in star-
Static synchronous form are driven by 220 V phase voltages. The results of the 220 V and 380
compensators V M-STATCOMs have exhibited linear and continuous control in capacitive
and inductive regions of operation without steady-state harmonics. The
proposed load balancing system has offered high flexibility during treating
moderate and severe load unbalance conditions. It can involve any load
unbalance within the power transformer current rating and even unbalance
cases beyond the power transformer current rating.
This is an open access article under the CC BY-SA license.

Corresponding Author:
Abdulkareem Mokif Obais
Department of Biomedical Engineering, College of Engineering, University of Babylon
Al-Hillah City, Babylon Governorate, Iraq
Email: karimobais@yahoo.com

[1]–[10][11]–[20][21]–[26]
1. INTRODUCTION
Static Var compensators (SVCs) and static synchronous compensators (STATCOMs) are usually
exploited in the treatment of many issues concerning power quality like harmonic’s association, voltage
unbalance and unbalanced loads [1]-[26]. Unbalanced loads and poor power factor usually lead to significant
losses in both generation station and transmission system. This may restrict or decrease the capability of
transmission systems. Power transmission efficiency can be increased by reducing losses through power
factor treatment and load compensation techniques [7], [9]. In addition, compensation techniques play
significant roles in the management of other challenging issues facing power quality achievement like
voltage unbalance and harmonic association. Balancing of loads characterized by large fluctuations is of
great importance because it is not economical to supply the required Var from the alternating current (AC)
source and the power system is not capable to maintain its terminal voltage within its desirable range [19].
Load balancing systems are usually built of compensating susceptances to accomplish two main
functions, which are reactive current compensation and balancing of active currents [9], [15], [26]. The

Journal homepage: http://ijres.iaescore.com

Int J Reconfigurable & Embedded Syst ISSN: 2089-4864  463

compensating susceptances are required to be linearly controlled in both capacitive and inductive modes in
order to accomplish reliable load current compensation [6], [24]. Distribution STATCOMs are widely used to
apply load compensation for 4-wire systems [2], [7], [25]. Other technologies approached power converter-
based shunt SVCs for achieving minimization of harmonics, current balancing, and voltage compensation
[2], [3], [5], [8], [11], [12], [22]. Separate delta and star-connected susceptances are more efficient in
accomplishing compensation for current and voltage imbalances than lumped systems [1], [3], [4], [7], [9],
[10], [13]-[17], [20]-[23]. Conditions of current imbalance and harmonic issues can be treated using series
compensation systems [14].
In this paper, a load current balancing system built of two static compensators is proposed. Both
compensators are built of linearized H-bridge STATCOMs as compensating susceptances. The first
compensator is built of three identical susceptances connected in delta-form, whereas the second one is built of
another three susceptances connected in star-form. Each susceptance is designed such that it has wide range of
linearity, control continuity, very low operating losses, fast response, and negligible harmonic’s association.

2. LOAD BALANCING OF 4-WIRE SYSTEMS

Two static compensators are required to accomplish current balancing of 4-wire loads [9], [15],
[26]. The first compensator is built using three similar susceptances connected in delta-form, whereas the
second one is built of three identical susceptances connected in star-form. All susceptances are assumed to be
linearly controlled in capacitive and inductive modes [6], [24]. The first compensator is designed to balance
active components of the phase currents, while the second one is dealt with cancelling the reactive current
components. Figure 1 reveals the proposed balancing mechanism of a 4-wire load energized by the balanced
phase voltages VA, VB, and VC. BS1AB, BS1BC, and BS1CA are the susceptances of the delta-connected
compensator, whereas BS2A, BS2B, and BS2C are the susceptances of the star-connected compensator. IS1A, IS1B,
and IS1C are the line currents of delta-connected compensator, whereas IS2A, IS2B, and IS2C are the phase
currents of the star-connected one. ILA, ILB, and ILC represent phase currents of the 4-wire load. IA, IB, and IC
are the AC source phase currents, which are intended to be balanced and in phase with their corresponding
phase voltages.

VA IA I LA
Balanced three-phase AC supply

load
ZA unbalanced three-phase

N
ZB ZC
VB IB I LB

VC IC I LC

N
I S 1B I S1A I S1C I S 2C I S 2B IS2A

jBS 2 A
N
jBS1 AB jBS1CA jBS 2 B jBS 2C

jBS1BC
Delta-connected compensator Star-connected compensator

Figure 1. The power circuit of the proposed load current balancing system

The phase voltages VA, VB, and VC are assumed to be balanced in magnitude and phase; thus, they
can be expressed as:

𝑉𝐴 = 𝑉 (1)

Balancing of four wire loads using linearized H-bridge static synchronous … (Abdulkareem Mokif Obais)
464  ISSN: 2089-4864
−2𝜋
𝑉𝐵 = 𝑉𝑒 𝑗 3 (2)
−4𝜋
𝑉𝐶 = 𝑉𝑒 𝑗 3 (3)

where, V is the rms magnitude of the balanced phase voltage. The phase currents of the unbalanced load can
be given by:

𝐼𝐿𝐴 = |𝐼𝐿𝐴 |𝑒 𝑗𝜙𝐿𝐴 = |𝐼𝐿𝐴 | 𝑐𝑜𝑠 𝜙𝐿𝐴 + 𝑗|𝐼𝐿𝐴 | 𝑠𝑖𝑛 𝜙𝐿𝐴 (4)
2𝜋 −2𝜋
𝐼𝐿𝐵 = |𝐼𝐿𝐵 |𝑒 𝑗(− 3 +𝜙𝐿𝐵) = (|𝐼𝐿𝐵 | 𝑐𝑜𝑠 𝜙𝐿𝐵 + 𝑗|𝐼𝐿𝐵 | 𝑠𝑖𝑛 𝜙𝐿𝐵 )𝑒 𝑗 3 (5)
4𝜋 −4𝜋
𝐼𝐿𝐶 = |𝐼𝐿𝐶 |𝑒 𝑗(− 3 +𝜙𝐿𝐵) = (|𝐼𝐿𝐶 | 𝑐𝑜𝑠 𝜙𝐿𝐶 + 𝑗|𝐼𝐿𝐵 | 𝑠𝑖𝑛 𝜙𝐿𝐶 )𝑒 𝑗 3 (6)

where, φLA, φLB, and φLC are the load current angles of phases A, B, and C respectively. |ILA|, |ILB|, and |ILC|, are
the rms magnitudes of ILA, ILB, and ILC respectively. According to this work objectives, the AC source
currents IA, IB, and IC should be active and balanced. Thus, they can be defined by:

𝐼𝐴 = 𝐼 (7)
−2𝜋
𝐼𝐵 = 𝐼𝑒 𝑗 3 (8)
−4𝜋
𝐼𝐶 = 𝐼𝑒 𝑗 3 (9)

where, I is the rms value of each phase current. The real power PL delivered to the load is the same real
power P fed by the AC source. Thus, it can be written (10).

𝑃𝐿 = 𝑉 (|𝐼𝐿𝐴 | 𝑐𝑜𝑠 𝜙𝐿𝐴 + |𝐼𝐿𝐵 | 𝑐𝑜𝑠 𝜙𝐿𝐵 + |𝐼𝐿𝐶 | 𝑐𝑜𝑠 𝜙𝐿𝐶 ) = 𝑃 = 3𝐼 (10)

Therefore, the active I can be equated to (11).

|𝐼𝐿𝐴 | 𝑐𝑜𝑠 𝜙𝐿𝐴 +|𝐼𝐿𝐵 | 𝑐𝑜𝑠 𝜙𝐿𝐵 +|𝐼𝐿𝐶 | 𝑐𝑜𝑠 𝜙𝐿𝐶

𝐼= (11)
3

The compensating susceptances are equated by [9], [15], [26] as follows:

2(|𝐼𝐿𝐴| 𝑐𝑜𝑠 𝜙𝐿𝐴−|𝐼𝐿𝐵 | 𝑐𝑜𝑠 𝜙𝐿𝐵 )

𝐵𝑆1𝐴𝐵 = (12)
3√3𝑉

2(|𝐼𝐿𝐵 | 𝑐𝑜𝑠 𝜙𝐿𝐵 −|𝐼𝐿𝐶| 𝑐𝑜𝑠 𝜙𝐿𝐶 )

𝐵𝑆1𝐵𝐶 = (13)
3√3𝑉

2(|𝐼𝐿𝐶 | 𝑐𝑜𝑠 𝜙𝐿𝐶−|𝐼𝐿𝐴| 𝑐𝑜𝑠 𝜙𝐿𝐴 )

𝐵𝑆1𝐶𝐴 = 3√3𝑉
(14)

|𝐼𝐿𝐵 | 𝑐𝑜𝑠 𝜙𝐿𝐵 −|𝐼𝐿𝐶 | 𝑐𝑜𝑠 𝜙𝐿𝐶 −√3|𝐼𝐿𝐴 | 𝑠𝑖𝑛 𝜙𝐿𝐴

𝐵𝑆2𝐴 = (15)
√3𝑉

|𝐼𝐿𝐶 | 𝑐𝑜𝑠 𝜙𝐿𝐶 −|𝐼𝐿𝐴 | 𝑐𝑜𝑠 𝜙𝐿𝐴 −√3|𝐼𝐿𝐵 | 𝑠𝑖𝑛 𝜙𝐿𝐵

𝐵𝑆2𝐵 = (16)
√3𝑉

|𝐼𝐿𝐴 | 𝑐𝑜𝑠 𝜙𝐿𝐴−|𝐼𝐿𝐵 | 𝑐𝑜𝑠 𝜙𝐿𝐵 −√3|𝐼𝐿𝐶 | 𝑠𝑖𝑛 𝜙𝐿𝐶

𝐵𝑆2𝐶 = (17)
√3𝑉

The values of the above susceptances are polar Quantities. Positive values mean capacitive
susceptances. The negative values refer to inductive susceptances.

2.1. The modified STATCOM (M-STATCOM)

Figure 2 shows the power circuit of the proposed H-bridge STATCOM. It is a voltage source
converter (VSC) based type. In this circuit, the STATCOM reactor LST is partitioned into two identical series

Int J Reconfigurable & Embedded Syst, Vol. 12, No. 3, November 2023: 462-477
Int J Reconfigurable & Embedded Syst ISSN: 2089-4864  465

reactors LST1 and LST2. The small capacitor CSH is used to reduce the effects of voltage spikes. The
STATCOM DC voltage VDC, which appears across CDC is smoothed by the series filter formed by CF, LF, and
RF. RST1, RST2, and RF are the self or ohmic resistances of the reactors LST1, LST2, and LF, respectively.
The AC source voltage vac is stepped down and shifted by an angle β to produce the modulating
signal vMOD, which is expressed by (18).

𝑣𝑀𝑂𝐷 = 𝐴𝑀𝑂𝐷 𝑠𝑖𝑛(𝜔𝑡 + 𝛽 ) (18)

Where, AMOD (5V) is its amplitude and ω (2πf) is the angular frequency of the AC source. The angle β is the
STATCOM angle.

Figure 2. The proposed modified STATCOM

The sinusoidal pulse width modulation shown in Figure 3 is used to trigger the proposed
STATCOM. The signal vMOD is compared with a triangular voltage vTRI to produce the triggering signal VZ1 of
the IGBT Z1, whereas –vMOD is compared with vTRI to produce the triggering signal VZ3 of Z3. The voltage vi
shown in Figures 2 and 3 can be given by (19) [24].
𝑉𝐷𝐶
𝑣𝑖 = (𝑉𝑍1 − 𝑉𝑍3 ) (19)
5

The fundamental component of vi is v1 and it can be given by (20) [24].

𝑣1 = 𝑚𝑉𝐷𝐶 𝑠𝑖𝑛(𝜔𝑡 + 𝛽 ) (20)

Where, m represents the modulation index which can be given by (21).

𝐴𝑀𝑂𝐷
𝑚= (21)
𝐴𝑇𝑅𝐼

Where, ATRI is the amplitude of vTRI. The STATCOM rms current IS can be given by (22).

𝑉𝐴.𝐶 −𝑉1 ∠𝛽
𝐼𝑆 = 𝑅 (22)
𝑆𝑇1 +𝑗𝜔𝐿𝑆𝑇1 +𝑅𝑆𝑇2 +𝑗𝜔𝐿𝑆𝑇2

If the reactances of the STATCOM reactors are very much greater than their ohmic resistances, then
(22) can be approximated to:

𝑉 −𝑉 ∠𝛽
𝐼𝑆 = 𝑗𝜔𝐿 𝐴.𝐶 +𝑗𝜔𝐿
1
(23)
𝑆𝑇1 𝑆𝑇2

Balancing of four wire loads using linearized H-bridge static synchronous … (Abdulkareem Mokif Obais)
466  ISSN: 2089-4864

if β is controlled in the range of ±0.1rad, then vac and v1 are approximately in phase and IS is purely reactive.
Negative values of β make V1 greater than VAC and IS will be capacitive, while small positive values of β
make V1 smaller than VAC and subsequently, IS will be inductive.

Figure 3. The STATCOM triggering mechanism

2.2. Design of the 380 V M-STATCOM

The proposed system is required to balance the phase currents at the secondary side of an 11 kV/
380 V power transformer having an apparent power rating of 100 kVA in a 380 V, 50 Hz, 4-wire system. At
the secondary side, the peak value of the phase rated current is 214 A. The consumer power factor is assumed
to be 0.8 lagging as an average value. In this work, the delta-connected compensator is designed to balance
the load active currents when one phase current is zero and the other two phases are running at their rated
currents with unity power factor. According to (11), the active current I of the AC source is 142.67 A (peak
value). If phase C of the load carries the zero current, then according to (12)-(14) the compensating
susceptances are calculated as: BS1AB=0, BS1BC=0.265 Ʊ, and BS1CA=-0.265 Ʊ. In this work, the delta-
connected compensator is built of three identical 380 V, 50 Hz modified STATCOMs. According to the
calculated susceptances, the 380 V modified STATCOM should be designed such that it responds equally to
both capacitive and inductive current demands. The maximum capacitive current is BS1BC×VAC =0.265 Ʊ×537
V=142.67 A (peak value). The maximum inductive current is BS1CA×VCA=-0.265 Ʊ×537 V=142.67 A=-
142.67 A (peak value).
Figure 4 shows the PSpice design of the 380 V modified STATCOM. The controller of the
modulating signal is a built-in library in PSpice [24]. It is denoted by the part “M-STATCOM VMOD
controller”, which is excited by three analog signals. These signals are k4BS, k3VL, and kSiS. The line-to-line
voltage VL is stepped down to 5 V (peak value) to form k3VL, which represents the modulating signal vMOD.
The signal k4BS is proportional to the required 380 V STATCOM susceptance. The susceptance current iS is
detected by the current transformer (CT) and converted to the analog voltage kSiS, which has a maximum
amplitude of 10 V. The signal voltage k4BS governs the STATCOM current iS via shifting vMOD by small
angle β proportional to the required compensating susceptance BS. The generated vMOD is compared with vTRI
in the PSpice part “M-STATCOM TRIGGERING CCT” to produce the triggering signal VZ1 and -vMOD is
compared with vTRI to produce VZ2. The triangular voltage vTRI has an amplitude of 5 V and a carrier
frequency of 2.5 kHz.

Int J Reconfigurable & Embedded Syst, Vol. 12, No. 3, November 2023: 462-477
Int J Reconfigurable & Embedded Syst ISSN: 2089-4864  467

U1
k4BS K2BS
+VAC
k3VL K3VAC VMOD VMOD

kSiS KSIS

+15V -15V R1 R2 M-STATCOM VMOD CONTROLLER

532k 5.1k
U2 VZ1
V1 V2 VMOD VMOD VZ1
15V 15V R3 +15V VZ2
5k R4 VZ2
5k VZ3
0 0 8 U3A VZ3
0 3 V+
0 + VTRI VTRI VZ4 VZ4
1
OUT k3VL
M-STATCOM TRIGGERING CCT
-VAC 2
- 4
U4
k4BS V-
AD648A
VTRI E1 E1
VZ1 VZ1
VTRI V1 = -5V E2
V2 = 5V R5 R6 R7 -15V E2
TD = 0 532k 5.1k 10k E3
K4BS TR = 199.5us E3
VZ2 VZ2
3 TF = 199.5us E4
PW = 1us R8 E4
PER = 400us 5k G1
0 0 G1
VZ3 VZ3
0 G2 G2

G3 G3
VZ4 VZ4
G4 G4

M-STATCOM DRIVING CCT

380V 50Hz M-statcom controlling and driving circuit

CM300DY-24H CM300DY-24H
G1 G3
1

1
RCT
0.22 Z1 Z3
kSiS
3

3
CF
iS CT
0 E1
1000uF 2
E3

LST1 RST1 LST2 RST2 LF

1 2 1 2 CDC 2.5mH
1000uF
TN33_20_11_2P90 1.25mH 0.05 1.25mH 0.05
G4 1 G2
RF
1

1
0.05
+VAC Z4 Z2
RSH
3

3
1
VAC VOFF = 0 E4 E2
VAMPL = 537V
FREQ = 50Hz CSH CM300DY-24H CM300DY-24H
AC = 0 20uF

-VAC

380V 50Hz M-statcom power circuit

Figure 4. The 380 V, 50 Hz M-STATCOM

2.3. Design of the 220 V M-STATCOM

The circuit design of the 220 V, 50Hz M-STATCOM is shown in Figure 5. It is similar to the
380 V, 50 Hz M-STATCOM. It is operated by the phase voltage. The capacitive and inductive ratings for this
STATCOM can be calculated by considering an unbalance case occuring during the open circuit of one phase
of a load carrying the rated current with 0.8 lagging power factor. Assumining that phase A is open circuited,
then the real or active current components of phases B and C are 214×0.8=171.2 A (peak value). Note that in
this unbalance case, the power factor angles of phases B and C are φLB=-370 and φLC=-370, respectively. Their
inductive reactive currents are 214×sinφLB =-0.6×214= -128.4 A (peak value) and 214×sinφLC =-0.6×214= -
128.4 A (peak value). According to these calculated active and reactive current components and (15)-(17),
the calculated susceptances of the star-connected static compensator are BS2A=0, BS2B=0.73 Ʊ, and BS2C=-
0.07945 Ʊ. The maximum capacitive current expected to be provided by the 220 V STATCOM is VB×BS2B
=311 V×0.73 Ʊ=227 A (peak value).

Balancing of four wire loads using linearized H-bridge static synchronous … (Abdulkareem Mokif Obais)
468  ISSN: 2089-4864

U1
k5BS K2BS
+VAC
k*3VP K3VAC VMOD VMOD

kSiS KSIS

+15V -15V R1 R2 M-STATCOM VMOD CONTROLLER

306k 5.1k
U2 VZ1
V1 V2 VMOD VMOD VZ1
15V 15V R3 +15V VZ2
5k R4 VZ2
5k VZ3
0 0 8 U3A VZ3
0 3 V+
0 + VTRI VTRI VZ4 VZ4
1
OUT k*3VP
M-STATCOM TRIGGERING CCT
-VAC 2
- 4
U4
k5BS V-
AD648A
VTRI E1 E1
VZ1 VZ1
V1 = -5V E2
V2 = 5V R5 R6 R7 -15V E2
TD = 0 306k 5.1k 10k E3
K5BS TR = 199.5us E3
VTRI VZ2 VZ2
3 TF = 199.5us E4
PW = 1us R8 E4
PER = 400us 5k G1
0 0 G1
VZ3 VZ3
0 G2 G2

G3 G3
VZ4 VZ4
G4 G4

M-STATCOM DRIVING CCT

220V 50Hz M-statcom controlling and driving circuit

CM300DY-24H CM300DY-24H
G1 G3
1

1
RCT
0.22 Z1 Z3
kSiS
3

3
CF
iS CT
0 E1
1000uF 2
E3

LST1 RST1 LST2 RST2 LF

1 2 1 2 CDC 2.5mH
1000uF
TN33_20_11_2P90 1.25mH 0.05 1.25mH 0.05
G4 1 G2
RF
1

1
0.05
+VAC Z4 Z2
RSH
3

1
VAC VOFF = 0 E4 E2
VAMPL = 311V
FREQ = 50Hz CSH CM300DY-24H CM300DY-24H
AC = 0 20uF

-VAC

220V 50Hz M-statcom power circuit

Figure 5. The 220 V, 50 Hz M-STATCOM

2.4. The PSpice design of the proposed load current balancing system
Figure 6 shows the circuit diagram of the proposed load current balancing system for a three-phase
grounded load in 380 V, 50 Hz distribution network. The AC voltages detection circuit and current
transformer used in this system have the same PSpice implementation of those shown in Figures 4 and 5,
except that the resistance values of the AC voltages detection circuit in this system are chosen such that k*3
and k3 are 0.016 and 0.0093, respectively. The delta-connected static compensator is built of three identical
380 V M-STATCOMs. Each STATCOM is capable of supplying a linear reactive cuurent controlled in both
capacitive and inductive modes of operation. The maximum rating of each STATCOM is about ±150 A
(peak value). The star-connected static compensator is built of three identical 220 V M-STATCOMs. Each
STATCOM is capable of supplying a linear reactive cuurent controlled in both capacitive and inductive
modes of operation. The maximum capacitive current rating of each STATCOM is 227 A (peak value).

Int J Reconfigurable & Embedded Syst, Vol. 12, No. 3, November 2023: 462-477
Int J Reconfigurable & Embedded Syst ISSN: 2089-4864  469

iA VA
iLA
U17
VA R1
1 2
IN OUT

K1I
DAMPING = 0
DELAY = 0
FREQ_HZ = 50Hz
PP_AMPLITUDE = 622V
OFFSET = 0
0.001

iB VB
iLB k1iLA
CURRENT TRANSFORMER (LV)
LA

2.77mH
RA
1.16

PHASE = 0 U18
VB R2
1 2
IN OUT

K1I
DAMPING = 0
DELAY = 0
FREQ_HZ = 50Hz
PP_AMPLITUDE = 622V
OFFSET = 0
0.001

iC VC
iLC k1iLB
CURRENT TRANSFORMER (LV)
LB

2.77mH
RB
1.16

PHASE = -120 U19

VC R3
1 2
IN OUT

K1I
DAMPING = 0 0.001 LC RC
DELAY = 0
FREQ_HZ = 50Hz 2.77mH 1.16
k1iLC
PP_AMPLITUDE = 622V
OFFSET = 0 CURRENT TRANSFORMER (LV)
PHASE = -240
N

Power system voltage Three-phase load with detection cct.

CM300DY -24H CM300DY -24H CM300DY -24H CM300DY -24H

G3AB G1AB kSiSAB kSiSA G1A G3A
Z3AB Z1AB Z1A Z3A

iS1 A iS 2 A
1

1
RCTAB RCTA
0.22 0.22
3

3
CFAB 0 CTAB CTA 0 CFA
E3AB E1AB E1A E3A
2 1000uF 1000uF 2

LFAB RST2AB LST2AB RST1AB LST1AB R4 R5 LST1A RST1A LST2A RST2A LFA
2.5mH CDCAB 2 1 2 1 1 2 1 2 CDCA 2.5mH
1000uF 1000uF
0.05 1.25mH 0.05 1.25mH TN33_20_11_2P90 0.001 0.001 TN33_20_11_2P90 1.25mH 0.05 1.25mH 0.05
G2AB 1 G4AB RSHAB G4A 1 G2A
Z2AB Z4AB 1 RSHA Z4A Z2A
1

1
RFAB 1 RFA
0.05 0.05
CSHAB
3

3
20uF CSHA
E2AB E4AB 20uF E4A E2A
CM300DY -24H CM300DY -24H CM300DY -24H CM300DY -24H

CM300DY -24H CM300DY -24H CM300DY -24H CM300DY -24H

G3BC G1BC kSiSBC kSiSB G1B G3B

Z3BC Z1BC

iS1B iS 2 B Z1B Z3B

1

1
RCTBC RCTB
0.22 0.22
3

3
CFBC 0 CTBC CTB 0 CFB
E3BC E1BC E1B E3B
2 1000uF 1000uF 2

LFBC RST2BC LST2BC RST1BC LST1BC R6 R7 LST1B RST1B LST2B RST2B LFB
2.5mH CDCBC 2 1 2 1 1 2 1 2 CDCB 2.5mH
1000uF 1000uF
0.05 1.25mH 0.05 1.25mH TN33_20_11_2P90 0.001 0.001 TN33_20_11_2P90 1.25mH 0.05 1.25mH 0.05

G2BC 1 G4BC RSHBC G4B 1 G2B

Z2BC Z4BC 1 RSHB Z4B Z2B
1

1
RFBC 1 RFB
0.05 0.05
CSHBC
3

3
20uF CSHB
E2BC E4BC 20uF E4B E2B
CM300DY -24H CM300DY -24H CM300DY -24H CM300DY -24H

CM300DY -24H CM300DY -24H CM300DY -24H CM300DY -24H

G3CA G1CA kSiSCA kSiSC G1C G3C
Z3CA Z1CA

iS1C iS 2 C Z1C Z3C

1

1
RCTCA RCTC
0.22 0.22
3

3
CFCA 0 CTCA CTC 0 CFC
E3CA E1CA E1C E3C
2 1000uF 1000uF 2

LFCA RST2CA LST2CA RST1CA LST1CA R8 R9 LST1C RST1C LST2C RST2C LFC
2.5mH CDCCA 2 1 2 1 1 2 1 2 CDCC 2.5mH
1000uF 1000uF
0.05 1.25mH 0.05 1.25mH TN33_20_11_2P90 0.001 0.001 TN33_20_11_2P90 1.25mH 0.05 1.25mH 0.05
G2CA 1 G4CA RSHCA G4C 1 G2C
Z2CA Z4CA 1 RSHC Z4C Z2C
1

1
RFCA 1 RFC
0.05 0.05
CSHCA
3

3
20uF CSHC
E2CA E4CA 20uF E4C E2C
CM300DY -24H CM300DY -24H CM300DY -24H CM300DY -24H

Delta-connected M-statcoms Star-connected M-statcoms

VTRI
U21 U24
U29 E1AB VTR V1 = -5V U32 E1A
k4BSAB K2BS E1 V2 = 5V k5BSA K2BS E1
VZ1AB VZ1 VZ1A VZ1
VMODAB E2AB TD = 0 VMODA E2A
k3VAB K3VAC VMOD E2 TR = 199.5us k*3VA K3VAC VMOD E2

E3AB TF = 199.5us E3A

kSiSAB KSIS E3 PW = 1us kSiSA KSIS E3
VZ2AB VZ2 VZ2A VZ2
E4AB PER = 400us E4A
M-STATCOM VMOD CONTROLLER E4 0 M-STATCOM VMOD CONTROLLER E4

G1 G1AB G1 G1A
VMODAB VMOD
U28
VZ1 VZ1AB VZ3AB VZ3
G2 G2AB
Triangular voltage gen. VMODA VMOD
U37
VZ1 VZ1A VZ3A VZ3
G2 G2A
VZ2 VZ2AB VZ2 VZ2A
G3 G3AB G3 G3A
VZ3 VZ3AB VZ4AB VZ4 VZ3 VZ3A VZ4A VZ4
G4 G4AB G4 G4A
VZ4AB U42 VZ4A
VTRI VTRI VZ4 VTRI VTRI VZ4
VA VA K3VAB k3VAB
M-STATCOM DRIVING CCT M-STATCOM DRIVING CCT
M-STATCOM TRIGGERING CCT k3VBC M-STATCOM TRIGGERING CCT
K3VBC
U22 k3VCA U25
U30 K3VCA U33
k4BSBC K2BS E1 E1BC VB VB k5BSB K2BS E1 E1B
VZ1BC VZ1 K*3VA k*3VA VZ1B VZ1
k3VBC K3VAC VMOD VMODBC E2 E2BC k*3VB K3VAC VMOD VMODB E2 E2B
K*3VB k*3VB
kSiSBC KSIS E3 E3BC kSiSB KSIS E3 E3B
VZ2BC VZ2 VC VC K*3VC k*3VC VZ2B VZ2
E4 E4BC E4 E4B
M-STATCOM VMOD CONTROLLER M-STATCOM VMOD CONTROLLER
G1BC AC VOLTAGES DETECTION CCT G1B
U35 G1 U38 G1
VMODBC VMOD VZ1 VZ1BC VZ3BC VZ3 VMODB VMOD VZ1 VZ1B VZ3B VZ3
G2 G2BC G2 G2B
VZ2 VZ2BC
G3 G3BC
AC voltages detection cct. VZ2 VZ2B
G3 G3B
VZ3 VZ3BC VZ4BC VZ4 VZ3 VZ3B VZ4B VZ4
G4 G4BC G4 G4B
VTRI VTRI VZ4 VZ4BC VTRI VTRI VZ4 VZ4B
M-STATCOM DRIVING CCT U44 M-STATCOM DRIVING CCT
M-STATCOM TRIGGERING CCT k4BSAB M-STATCOM TRIGGERING CCT
k1iLA K1ILA K4BSAB
U23 U26
U31 k1iLB K1ILB U34
k4BSCA K2BS E1 E1CA K4BSBC k4BSBC k5BSC K2BS E1 E1C
VZ1CA VZ1 k1iLC K1ILC VZ1C VZ1
k3VCA K3VAC VMOD VMODCA E2 E2CA k*3VC K3VAC VMOD VMODC E2 E2C
k3VAB K3VAB K4BSCA k4BSCA
kSiSCA KSIS E3 E3CA kSiSC KSIS E3 E3C
VZ2CA VZ2 k3VBC K3VBC VZ2C VZ2
E4 E4CA K5BSA k5BSA E4 E4C
M-STATCOM VMOD CONTROLLER M-STATCOM VMOD CONTROLLER
k3VCA K3VCA
G1 G1CA G1 G1C
U36 VZ1CA VZ3CA k5BSB U39 VZ1C VZ3C
VMODCA VMOD VZ1 VZ3 k*3VA K*3VA K5BSB VMODC VMOD VZ1 VZ3
G2 G2CA G2 G2C
VZ2 VZ2CA k*3VB K*3VB VZ2 VZ2C
G3 G3CA K5BSC k5BSC G3 G3C
VZ3 VZ3CA VZ4CA VZ4 k*3VC K*3VC VZ3 VZ3C VZ4C VZ4
G4 G4CA G4 G4C
VTRI VTRI VZ4 VZ4CA VTRI VTRI VZ4 VZ4C
COMPUTATION CCT
M-STATCOM DRIVING CCT M-STATCOM DRIVING CCT
M-STATCOM TRIGGERING CCT M-STATCOM TRIGGERING CCT

Delta-connected M-statcoms controlling and driving cct. Computation circuit Star-connected M-statcoms controlling and driving cct.

Figure 6. Circuit design of the proposed load current balancing system

The computation circuit of this system is shown in Figure 7. In this circuit, the load current signals
are sampled at the positive peaks and negative slope zero-crossing points of their corresponding phase
voltages to obtain the active and reactive components of load phase currents, respectively. The delta-
connected compensator susceptances are computed using (12)-(14), while the star-connected compensator
susceptances are computed by using (15)-(17).

Balancing of four wire loads using linearized H-bridge static synchronous … (Abdulkareem Mokif Obais)
470  ISSN: 2089-4864

+15V

5
+5V
R2 1 +15V +15V +15V

V+
k1iLA

7
5k + k5BSA
U2

5
3 R4 D1 S1 LM675 U1 4 R1 R3

-
+
V+
k*3VA + OUT 1 1 1
1k BAW62 Sbreak 10.2k 3.9k

V+

V+

V+
+
-
max998/mxm 6 C1 2 + + +
+5V R5 OUT U6A C2 D3
0 - 3 U3 4 R7 0 U4 4 R8 0 U5 4
500nF
2k 2 1uF BAW62 V- 0 LM675 OUT 15k LM675 OUT 5k LM675 OUT
- 4 D2 R6 1 2 2 2 2
V- BAW62 5k
0 -15V - 3 - 3 - 3
R9 0 V- V- V-
0.001 -5V 74ACT04 R11 D4 R12 R13 R14 R15
R10 0 0 33 BAW62 10.2k 3.9k -15V 10k 10k -15V -15V
V1 5k
5V
R16
0 0 0 5k
0
Zero-crossing detector (1) Sample and hold circuit (1) Summing amolifier (1)

+15V

5
+5V
R18 1 +15V +15V +15V

V+
k1iLB
7

5k + k5BSB
U8

5
3 R20 D5 S2 LM675 U7 4 R17 R19

-
+
V+

k*3VB + OUT 1 1 1
1k BAW62 Sbreak 10.2k 3.9k

V+

V+

V+
+
-
max998/mxm 6 C3 2 + + +
-5V R21 OUT U6B C4 D7
0 - 3 U9 4 R23 0 U10 4 R24 0 U11 4
500nF
2k 2 1uF BAW62 V- 0 LM675 OUT 15k LM675 OUT 5k LM675 OUT
- 4 D6 R22 3 4 2 2 2
V- BAW62 5k
0 -15V - 3 - 3 - 3
R25 0 V- V- V-
0.001 -5V 74ACT04 R26 D8 R27 R28 R29 R30
R31 0 0 33 BAW62 10.2k 3.9k -15V 10k 10k -15V -15V
V2 5k
5V
R32
0 0 0 5k
0
Zero-crossing detector (2) Sample and hold circuit (2) Summing amolifier (2)

+15V

5
+5V
R34 1 +15V +15V +15V

V+
k1iLC
7

5k + k5BSC
U13

5
3 R36 D9 S3 LM675 U12 4 R33 R35
-
+
V+

k*3VC + OUT 1 1 1
1k BAW62 Sbreak 10.2k 3.9k

V+

V+

V+
+
-
max998/mxm 6 C5 2 + + +
R37 OUT U6C C6 D11
0 - 3 U14 4 R39 0 U15 4 R40 0 U16 4
500nF
2k 2 1uF BAW62 V- 0 LM675 OUT 15k LM675 OUT 5k LM675 OUT
- 4 D10 R38 5 6 2 2 2
V- BAW62 5k
0 -15V - 3 - 3 - 3
0 V- V- V-
-5V 74ACT04 R41 D12 R42 R43 R45 R46
R44 0 0 33 BAW62 10.2k 3.9k -15V 10k 10k -15V -15V
5k

R47
0 0 0 5k

Zero-crossing detector (3) Sample and hold circuit (3) Summing amolifier (3)

+15V R48 +15V

5k
5

5
+5V +15V
R49 1 1
V+

V+
k1iLA
7

5
5k + R50 +
U19
3 R52 D13 S4 LM675 U17 4 5k 1 R53 0 U18 4
-
+
V+

V+
+ OUT + OUT k4BSAB
1k BAW62 Sbreak 10k LM675
+
-

R51 max998/mxm 6 C7 2 U20 4 2

U21 2k OUT C8 D15
0 - 3 0 LM675 OUT - 3 +15V
500nF V- V-
DELAY 2 1uF BAW62 2
- 4 D14 R54 - 3 R57
DELAY = 5ms 0 V- 0 -15V V- -15V
BAW62 5k 4.5k
R55 R59 R60 R58
5k -5V R56 D16 5k 5k -15V 0.001
0 0 33 BAW62
V3
k*3VA 0 15V
0 0
0
Time delayer and zero-detector (1) Sample and hold circuit (4) Difference amplifier (1)

+15V R61 +15V

5k
5

5
+5V +15V
R62 1 1
V+

V+
k1iLB
7

5k + R63 +
U24
3 R65 D17 S5 LM675 U22 4 5k 1 R66 0 U23 4
-
+
V+

V+

+ OUT + OUT k4BSBC

1k BAW62 Sbreak 10k LM675
+
-

R64 max998/mxm 6 C9 2 U25 4 2

U26 2k OUT C10 D19
0 - 3 0 LM675 OUT - 3 -15V
500nF V- V-
DELAY 2 1uF BAW62 2
- 4 D18 R67 - 3 R70
DELAY = 5ms 0 V- 0 -15V V- -15V
BAW62 5k 4.5k
R68 R72 R73 R71
5k -5V R69 D20 5k 5k -15V 0.001
0 0 33 BAW62

k*3VB 0 V4
15V
0 0
0
Time delayer and zero-detector (2) Sample and hold circuit (5) Difference amplifier (2)

+15V R74 +15V

5k
5

+5V +15V
R76 1 1
V+

V+

k1iLC
7

5k + R75 +
U29
3 R78 D21 S6 LM675 U27 4 5k 1 R79 0 U28 4
-
+
V+

V+

+ OUT + OUT k4BSCA

1k BAW62 Sbreak 10k LM675
+
-

R77 max998/mxm 6 C11 2 U30 4 2

U31 2k OUT C12 D23
0 - 3 0 LM675 OUT - 3
500nF V- V-
DELAY 2 1uF BAW62 2
- 4 D22 R80 - 3 R82
DELAY = 5ms 0 V- 0 -15V V- -15V
BAW62 5k 4.5k
R81 R83 R84
5k -5V R85 D24 5k 5k -15V
0 0 33 BAW62

k*3VC 0
0 0

Figure 7. Computation circuit of the load current balancing system

3. RESULTS AND DISCUSSION

The circuits of Figures 4-6 were tested on PSpice to investigate their performances at different
loading conditions. The targeted parameters are STATCOM currents, load phase currents, static
compensators currents, and AC source phase currents. Different unbalance cases are treated by the proposed
balancing system.

3.1. Performance results of 380V M-STATCOM

The 380 V, 50 Hz M-STATCOM shown in Figure 4 was tested on PSpice. The above STATCOM
was tested on PSpice for the investigation of harmonic contents, control continuity, and linearity. The
parameters measured through PSpice tests were the STATCOM current iS, the DC capacitor voltage VDC, and
the AC voltage vL. The basic controlling signal of the compensator is k4BS. Figure 8 shows responses to
maximum demands. Figure 8(a) shows vL, iS, and VDC of the 380 V M-STATCOM during its response to its

Int J Reconfigurable & Embedded Syst, Vol. 12, No. 3, November 2023: 462-477
Int J Reconfigurable & Embedded Syst ISSN: 2089-4864  471

maximum inductive reactive current demand, whereas Figure 8(b) shows vL, iS, and VDC of this STATCOM
during its response to maximum capacitive reactive current demand. These responses corresponded to k4BS of
±6.6 V. 6.6 V corresponds to a capacitive reactive current demand of 150 A (peak value), whereas -6.6V
corresponds to an inductive current demand of -150 A (peak value). The figure states that the response settled
within 5 cycles of the power system fundamental voltage without any harmonic association.
The potency of the M-STATCOM controller is realized during it response to sudden change in
reactive current demand from maximum inductive to maximum capacitive. Figure 9 shows the performance
of the 380 V M-STATCOM during a sudden change in reactive current demand from maximum inductive to
maximum capacitive. The change from inductive to capacitive reactive current demand had occurred at t=200
ms and the STATCOM changed the nature of its current from inductive to capacitive within a time less than
20 ms. It acquired it steady state current within 40 ms since the instant of reactive current demand change.

(a)

(b)

Figure 8. The AC voltage vL, the current iS, and the capacitor DC voltage VDC of the 380V M-STATCOM
during response to maximum (a) inductive reactive current demand and (b) capacitive reactive current
demand

Figure 9. Performance of the 380V M-STATCOM during sudden change in reactive current demand from
maximum inductive to maximum capacitive
Balancing of four wire loads using linearized H-bridge static synchronous … (Abdulkareem Mokif Obais)
472  ISSN: 2089-4864

Figure 10 shows the current of the 380 V M-STATCOM against reactive current demand. The
linearity the M-STATCOM as a compensating susceptance is verified by the graph of this figure. The graph
is obtained by plotting the actual STATCOM reactive current against current demand.

Figure 10. The 380 V M-STATCOM current against reactive current demand

3.2. Performance results of 220 V M-STATCOM

The circuit diagram of 220 V M-STATCOM shown in Figure 5 was tested on PSpice. The AC
voltage used during PSpice tests was a zero-phase sinusoidal voltage having a frequency of 50 Hz and
amplitude of 311 V (corresponding to an rms value of 220 V). The basic controlling signal of this
STATCOM is k5BS. The linearity of this STATCOM is shown in Figure 11. Overall, Figure 11 verifies the
linearity and continuous control of the 220 V M-STATCOM as a compensating susceptance in capacitive and
inductive modes of operation.

Figure 11. 220 V M-STATCOM current against reactive current demand

3.3. Performance results of the proposed load current balancing system

This system shown in Figure 6 was investigated under different unbalance conditions. The basic
parameters measured were the AC source voltages vA, vB, and vC; the AC source currents iA, iB, and iC; the
load currents iLA, iLB, and iLC; first compensator currents iS1A, iS1B, and iS1C; second compensator currents iS2A,
iS2B, and iS2C. Figure 12 shows the treatment of a load unbalance resulted from the disconnection of one phase
of a balanced three-phase rated load at 0.8 lagging power factor.

Int J Reconfigurable & Embedded Syst, Vol. 12, No. 3, November 2023: 462-477
Int J Reconfigurable & Embedded Syst ISSN: 2089-4864  473

450V
vA vB vC

0V

-450V
240ms 250ms 260ms 270ms 280ms 290ms 300ms 310ms 320ms
V(VA:PVS) V(VB:PVS) V(VC:PVS)
Time
300A
iLB iLC

iLA
0A

-300A
240ms 250ms 260ms 270ms 280ms 290ms 300ms 310ms 320ms
I(LA) I(LB) I(LC)
Time
300A
iS1 A iS1C i
S 1B

0A

-300A
240ms 250ms 260ms 270ms 280ms 290ms 300ms 310ms 320ms
I(R4) I(R6) I(R8)
Time
300A
iS 2 B

iS 2 A iS 2 C
0A

-300A
240ms 250ms 260ms 270ms 280ms 290ms 300ms 310ms 320ms
I(R5) I(R7) I(R9)
Time
300A
iA iB iC

0A

-300A
240ms 250ms 260ms 270ms 280ms 290ms 300ms 310ms 320ms
I(R1) I(R2) I(R3)
Time

Figure 12. Load balancing system treatment to a load unbalance resulted from the disconnection of one phase
of a balanced three-phase rated load at 0.8 lagging power factor

The treatment of the above unbalance condition had resulted in balanced real currents drawn from
the AC source (power transformer). Figure 13 shows the treatment of a load unbalance in which one of the
phase currents of an unbalanced three-phase load was exceeding the power transformer rated current. The

Balancing of four wire loads using linearized H-bridge static synchronous … (Abdulkareem Mokif Obais)
474  ISSN: 2089-4864

treatment of this load unbalance had resulted in driving the phase currents of the power transformer below
their rating values as balanced real currents associated with significant reductions in their magnitudes.

450V
vA vB vC

0V

-450V
200ms 210ms 220ms 230ms 240ms 250ms 260ms
V(VA:PVS) V(VB:PVS) V(VC:PVS)
Time
300A
iLA iLB
iLC

0A

-300A
200ms 210ms 220ms 230ms 240ms 250ms 260ms
I(LA) I(LB) I(LC)
Time
300A

iS1B iS1 A iS1C

0A

-300A
200ms 210ms 220ms 230ms 240ms 250ms 260ms
I(R4) I(R6) I(R8)
Time
300A
iS 2 A
iS 2 C
iS 2 B
0A

-300A
200ms 210ms 220ms 230ms 240ms 250ms 260ms
I(R5) I(R7) I(R9)
Time
300A
iA iB iC

0A

-300A
200ms 210ms 220ms 230ms 240ms 250ms 260ms
I(R1) I(R2) I(R3)
Time

Figure 13. Load balancing system treatment to a load unbalance in which one phase current was exceeding
the power transformer rating

Int J Reconfigurable & Embedded Syst, Vol. 12, No. 3, November 2023: 462-477
Int J Reconfigurable & Embedded Syst ISSN: 2089-4864  475

Figure 14 shows the treatment a load unbalance in which all the phase currents of an unbalanced
three-phase load were exceeding the power transformer current rating. The treatment had driven all the phase
currents drawn from the power transformer below their rated values as balanced real currents. This load
unbalance was due a somewhat significant phase unbalance.

450V
vA vB vC

0V

-450V
240ms 250ms 260ms 270ms 280ms 290ms 300ms 310ms 320ms
V(VA:PVS) V(VB:PVS) V(VC:PVS)
Time
400A
iLA iLB i
LC

0A

-400A
240ms 250ms 260ms 270ms 280ms 290ms 300ms 310ms 320ms
I(LA) I(LB) I(LC)
Time
400A

iS1B iS1C iS1 A

0A

-400A
240ms 250ms 260ms 270ms 280ms 290ms 300ms 310ms 320ms
I(R4) I(R6) I(R8)
Time
400A
iS 2 A iS 2 C iS 2 B

0A

-400A
240ms 250ms 260ms 270ms 280ms 290ms 300ms 310ms 320ms
I(R5) I(R7) I(R9)
Time
400A
iA iB iC

0A

-400A
240ms 250ms 260ms 270ms 280ms 290ms 300ms 310ms 320ms
I(R1) I(R2) I(R3)
Time

Figure 14. Load balancing system treatment to a load unbalance in which all the phase currents were
exceeding the power transformer rating

Balancing of four wire loads using linearized H-bridge static synchronous … (Abdulkareem Mokif Obais)
476  ISSN: 2089-4864

4. CONCLUSION
In this work, a load balancing system is designed to balance the phase currents of a three-phase, 380
V, 50 Hz, 100 kVA power transformer in 4-wire distribution network using six identical linearized H-bridge
STATCOMs. These STATCOMs are exploited as continuously and linearly controlled compensating
susceptances in both capacitive and inductive modes. They are controlled in such a manner that they never
lose synchronization with grid. The performance results of the 220 V and 380 V M-STATCOMs have
revealed the potency of their linearities and control continuities. Each M-STATCOM approximately sticks to
steady-state reactive current demand within a period of less 5 cycle of the power system network
fundamental. In addition, it satisfies the reactive current demand despite the AC voltage status (below or
above its rated value). The steady-state portion of the STATCOM reactive current exhibits pure sinusoidal
envelope, which certifies the the absence of harmonic’s association. The proposed load balancing system had
reflected high flexibility during managing different load unbalances. It can involve any load unbalance within
or below the power transformer current rating which was designed for compensating its phase currents. In
addition, the system showed efficient performance during treating unbalance cases beyond the power
transformer current rating. It showed excellent performance in comparison with other four-wire load
compensation systems.

REFERENCES
[1] A. Luo, Z. Shuai, W. Zhu, and Z. J. Shen, “Combined system for harmonic suppression and reactive power compensation,” IEEE
Transactions on Industrial Electronics, vol. 56, no. 2, pp. 418–428, Feb. 2009, doi: 10.1109/TIE.2008.2008357.
[2] B. Singh, P. Jayaprakash, T. R. Somayajulu, and D. P. Kothari, “Reduced rating VSC with a zig-zag transformer for current
compensation in a three-phase four-wire distribution system,” IEEE Transactions on Power Delivery, vol. 24, no. 1, pp. 249–259,
Jan. 2009, doi: 10.1109/TPWRD.2008.2005398.
[3] B. Singh and P. Venkateswarlu, “A simplified control algorithm for three-phase, four-wire unified power quality conditioner,”
Journal of Power Electronics, vol. 10, no. 1, pp. 91–96, Jan. 2010, doi: 10.6113/JPE.2010.10.1.091.
[4] A. Hamadi, S. Rahmani, and K. Al-Haddad, “A hybrid passive filter configuration for VAR control and harmonic compensation,”
IEEE Transactions on Industrial Electronics, vol. 57, no. 7, pp. 2419–2434, Jul. 2010, doi: 10.1109/TIE.2009.2035460.
[5] Y. Xu, L. M. Tolbert, J. D. Kueck, and D. T. Rizy, “Voltage and current unbalance compensation using a static var compensator,”
IET Power Electronics, vol. 3, no. 6, pp. 977–988, 2010, doi: 10.1049/iet-pel.2008.0094.
[6] A. M. Obais and J. Pasupuleti, “Design of a continuously controlled linear static Var compensator for load balancing and power
factor correction purposes,” International Review on Modelling and Simulations, vol. 4, no. 2, pp. 803–812, 2011.
[7] W. N. Chang and K. D. Yeh, “Real-Time load balancing and power factor correction of three-phase, four-wire unbalanced
systems with dstatcom,” Journal of Marine Science and Technology (Taiwan), vol. 22, no. 5, pp. 598–605, 2014, doi:
10.6119/JMST-013-0926-1.
[8] J. C. Wu, H. L. Jou, H. H. Hsaio, and S. T. Xiao, “A new hybrid power conditioner for suppressing harmonics and neutral-line
current in three-phase four-wire distribution power systems,” IEEE Transactions on Power Delivery, vol. 29, no. 4, pp. 1525–
1532, 2014, doi: 10.1109/TPWRD.2014.2322615.
[9] L. S. Czarnecki and P. M. Haley, “Unbalanced power in four-wire systems and its reactive compensation,” IEEE Transactions on
Power Delivery, vol. 30, no. 1, pp. 53–63, Feb. 2015, doi: 10.1109/TPWRD.2014.2314599.
[10] A. Hintz, U. R. Prasanna, and K. Rajashekara, “Comparative study of the three-phase grid-connected inverter sharing unbalanced
three-phase and/or single-phase systems,” IEEE Transactions on Industry Applications, vol. 52, no. 6, pp. 5156–5164, Nov. 2016,
doi: 10.1109/TIA.2016.2593680.
[11] C. Cai, P. An, Y. Guo, and F. Meng, “Three-phase four-wire inverter topology with neutral point voltage stable module for
unbalanced load inhibition,” Journal of Power Electronics, vol. 18, no. 5, pp. 1315–1324, 2018, doi:
10.6113/JPE.2018.18.5.1315.
[12] Y. Hoon and M. A. M. Radzi, “PLL-less three-phase four-wire SAPF with STF-dq0 technique for harmonics mitigation under
distorted supply voltage and unbalanced load conditions,” Energies, vol. 11, no. 8, p. 2143, Aug. 2018, doi: 10.3390/en11082143.
[13] X. Zhao, C. Zhang, X. Chai, J. Zhang, F. Liu, and Z. Zhang, “Balance control of grid currents for UPQC under unbalanced loads
based on matching-ratio compensation algorithm,” Journal of Modern Power Systems and Clean Energy, vol. 6, no. 6, pp. 1319–
1331, Nov. 2018, doi: 10.1007/s40565-018-0383-7.
[14] H. Yoon, D. Yoon, D. Choi, and Y. Cho, “Three-phase current balancing strategy with distributed static series compensators,”
Journal of Power Electronics, vol. 19, no. 3, pp. 803–814, 2019, doi: 10.6113/JPE.2019.19.3.803.
[15] L. S. Czarnecki, “CPC – based reactive balancing of linear loads in four-wire supply systems with nonsinusoidal voltage,”
Przeglad Elektrotechniczny, vol. 95, no. 4, pp. 3–10, 2019, doi: 10.15199/48.2019.04.01.
[16] G. Bao and S. Ke, “Load transfer device for solving a three-phase unbalance problem under a low-voltage distribution network,”
Energies, vol. 12, no. 15, p. 2842, Jul. 2019, doi: 10.3390/en12152842.
[17] Z. Sołjan, G. Hołdyński, and M. Zajkowski, “Balancing reactive compensation at three-phase four-wire systems with a sinusoidal
and asymmetrical voltage source,” Bulletin of the Polish Academy of Sciences: Technical Sciences, vol. 68, no. 1, pp. 71–79,
2020, doi: 10.24425/bpasts.2020.131831.
[18] R. Montoya-Mira, P. A. Blasco, J. M. Diez, R. Montoya, and M. J. Reig, “Unbalanced and reactive currents compensation in
three-phase four-wire sinusoidal power systems,” Applied Sciences (Switzerland), vol. 10, no. 5, p. 1764, Mar. 2020, doi:
10.3390/app10051764.
[19] K. Ma, L. Fang, and W. Kong, “Review of distribution network phase unbalance: Scale, causes, consequences, solutions, and
future research directions,” CSEE Journal of Power and Energy Systems, vol. 6, no. 3, pp. 479–488, 2020, doi:
10.17775/CSEEJPES.2019.03280.
[20] Z. Zhang, “Design of alternating current voltage–regulating circuit based on thyristor: comparison of single phase and three
phase,” Measurement and Control (United Kingdom), vol. 53, no. 5–6, pp. 884–891, May 2020, doi:
10.1177/0020294020909123.

Int J Reconfigurable & Embedded Syst, Vol. 12, No. 3, November 2023: 462-477
Int J Reconfigurable & Embedded Syst ISSN: 2089-4864  477

[21] A. A. Goudah, D. H. Schramm, M. El-Habrouk, and Y. G. Dessouky, “Smart electric grids three-phase automatic load balancing
applications using genetic algorithms,” Renewable Energy and Sustainable Development, vol. 6, no. 1, p. 18, Jun. 2020, doi:
10.21622/resd.2020.06.1.018.
[22] C. Li et al., “Unbalanced current analysis of three-phase AC-DC converter with power factor correction function based on
integrated transformer,” IET Power Electronics, vol. 13, no. 12, pp. 2598–2606, 2020, doi: 10.1049/iet-pel.2019.1415.
[23] P. A. Blasco, R. Montoya-Mira, J. M. Diez, and R. Montoya, “An alternate representation of the vector of apparent power and
unbalanced power in three-phase electrical systems,” Applied Sciences (Switzerland), vol. 10, no. 11, p. 3756, May 2020, doi:
10.3390/app10113756.
[24] F. A. Abdulmunem and A. M. Obais, “Design of a continuously and linearly controlled VSI-based STATCOM for load current
balancing purposes,” International Journal of Power Electronics and Drive Systems (IJPEDS), vol. 12, no. 1, p. 183, Mar. 2021,
doi: 10.11591/ijpeds.v12.i1.pp183-198.
[25] R. K. Singh and M. N Ansari, “Application of D-STATCOM for harmonic reduction using power balance theory,” Turkish
Journal of Computer and Mathematics Education (TURCOMAT), vol. 12, no. 6, pp. 2496–2503, Apr. 2021, doi:
10.17762/turcomat.v12i6.5694.
[26] A. M. Obais and A. A. Mukheef, “Load current balancing for 4-wire systems using harmonic treated TCR based SVCs,”
International Journal of Power Electronics and Drive Systems (IJPEDS), vol. 13, no. 3, pp. 1922–1950, Sep. 2022, doi:
10.11591/ijpeds.v13.i3.pp1922-1950.

BIOGRAPHIES OF AUTHORS

Abdulkareem Mokif Obais was born in Iraq in 1960. He received his B.Sc. and
M.Sc. degrees in Electrical Engineering from the University of Baghdad, Baghdad, Iraq, in
1982 and 1987, respectively. He received his Ph.D. degree in Electrical Engineering from
Universiti Tenaga Nasional, Kajang, Malaysia in 2013. He is interested in electronic circuit’s
design and power electronics. He had supervised and examined a number of postgraduate
students. He had published many papers in Iraqi academic and international journals. Dr. Obais
was promoted to Professor at University of Babylon in April 2008. He can be contacted at
email: karimobais@yahoo.com and eng.abdul.kareem@uobabylon.edu.iq.

Ali Abdulkareem Mukheef was born in Iraq in 1995. He received his B.Sc. and
M.Sc. degrees from University of Babylon, Iraq in 2016 and 2020, respectively. He is one of
the Academic Staff of Almustaqbal University College, Babylon, Iraq. Presently, he is a Ph.D.
student at University of Babylon, Babylon, Iraq. He can be contacted at email:
ali.abdulkreem@mustaqbal-college.edu.iq.

Balancing of four wire loads using linearized H-bridge static synchronous … (Abdulkareem Mokif Obais)