Pel Inverter Op-Amf 2302

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TLV2302, TLV2304

FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS


AND OPEN DRAIN COMPARATORS
SLOS343 – DECEMBER 2000

D Micro-Power Operation . . . 1.4 µA


D Input Common-Mode Range Exceeds the –
Rails . . . –0.1 V to VCC + 5 V
+
D Supply Voltage Range . . . 2.5 V to 16 V
D Rail-to-Rail Input/Output (Amplifier)
D Reverse Battery Protection Up to 18 V SUPPLY CURRENT

D Gain Bandwidth Product . . . 5.5 kHz


vs
SUPPLY VOLTAGE
(Amplifier) 2.5

D Open-Drain CMOS Output Stage 2.25

I CC – Supply Current – µ A
(Comparator) 2

D Specified Temperature Range


1.75

1.5
– TA = –40°C to 125°C . . . Industrial Grade
D
1.25
Ultrasmall Packaging
1 Op Amp
– 8-Pin MSOP (TLV2302) 0.75
VI = VCC/2

D Universal Op-Amp EVM (See the SLOU060 0.5


Comparator
VID = –1 V
Rp = 1MΩ (pullup to VCC)
for More Information) 0.25 TA = 25°C

0
0 2 4 6 8 10 12 14 16
VCC – Supply Voltage – V

The TLV230x combines sub-micropower operational amplifier and comparator into a single package that
produces excellent micropower signal conditioning with only 1.4 µA of supply current. This combination gives
the designer more board space and reduces part counts in systems that require an operational amplifier and
comparator. The low supply current makes it an ideal choice for battery-powered portable applications where
quiescent current is the primary concern. Reverse battery protection guards the amplifier from an over-current
condition due to improper battery installation. For harsh environments, the inputs can be taken 5 V above the
positive supply rail without damage to the device.
The TLV230x’s low supply current is coupled with extremely low input bias currents enabling them to be used
with mega-ohm resistors making them ideal for portable, long active life, applications. DC accuracy is ensured
with a low typical offset voltage as low as 390 µV, CMRR of 90 dB and minimum open loop gain of 130 V/mV
at 2.7 V.
The maximum recommended supply voltage is as high as 16 V and ensured operation down to 2.5 V, with
electrical characteristics specified at 2.7 V, 5 V, and 15 V. The 2.5-V operation makes it compatible with Li-Ion
battery-powered systems and many micropower microcontrollers available today including TI’s MSP430.
All members are available in PDIP and SOIC with the duals (one op-amp and one comparator) in the small
MSOP package, and the quads (two operational amplifiers and two comparators) in the TSSOP package.
A SELECTION OF OUTPUT COMPARATORS†
VCC VIO ICC/Ch GBW SR tPLH tPHL tf RAIL-TO- OUTPUT
DEVICE
(V) (µV) (µA) (kHz) (V/µs) (µs) (µs) (µs) RAIL STAGE
TLV230x 2.5 – 16 390 1.4‡ 5.5 0.0025 55 30 5 I/O OD
TLV270x 2.5 – 16 390 1.4‡ 5.5 0.0025 55 30 5 I/O PP
TLV240x 2.5 – 16 390 880 5.5 0.0025 — — — I/O —
TLV224x 2.5 – 12 600 1 5.5 0.002 — — — I/O —
TLV340x 2.5 – 16 250 0.47 — — 55 30 5 I OD
TLV370x 2.5 – 16 250 0.47 — — 55 30 5 I PP
† All specifications are typical values measured at 5 V.
‡ ICC is specified as one op-amp and one comparator.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Copyright  2000, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
SLOS343 – DECEMBER 2000

TLV2302 AVAILABLE OPTIONS


PACKAGED DEVICES
VIOmax MSOP
TA SMALL OUTLINE† PLASTIC DIP
AT 25°C MSOP†
(D) SYMBOLS (P)
(DGK)
- 40°C to 125°C 4000 µV TLV2302ID TLV2302IDGK xxTIAQG TLV2302IP
† This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g.,
TLV2302IDR).

TLV2304 AVAILABLE OPTIONS


PACKAGED DEVICES
VIOmax
TA SMALL OUTLINE† TSSOP PLASTIC DIP
AT 25°C
(D) (PW) (N)
– 40°C to 125°C 4000 µV TLV2304ID TLV2304IPW TLV2304IN
† This package is available taped and reeled. To order this packaging option, add an R suffix to the part
number (e.g., TLV2304IDR).

TLV230x PACKAGE PINOUTS


TLV2304
D, N, OR PW PACKAGE
(TOP VIEW)
TLV2302
D, DGK, OR P PACKAGE
(TOP VIEW) C1OUT 1 14 A2OUT
C1IN – 2 13 A2IN –
AOUT 1 8 VCC
C1IN+ 3 12 A2IN+
AIN – 2 7 COUT 4 11
VCC GND
AIN + 3 6 CIN – 5 10
C2IN+ A1IN+
GND 4 5 CIN+ 6 9
C2IN – A1IN –
C2OUT 7 8 A1OUT

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
SLOS343 – DECEMBER 2000

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 V
Differential input voltage, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC
Input voltage range, VI (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VCC + 5 V
Input current range, II (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA
Output current range, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA: I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C
Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to GND
2. Input voltage range is limited to 20 V max or VCC + 5 V, whichever is smaller.

DISSIPATION RATING TABLE


ΘJC ΘJA TA ≤ 25°C TA = 125°C
PACKAGE
(°C/W) (°C/W) POWER RATING POWER RATING
D (8) 38.3 176 710 mW 142 mW
D (14) 26.9 122.3 1022 mW 204.4 mW
DGK (8) 54.2 259.9 481 mW 96.2 mW
N (14) 32 78 1600 mW 320.5 mW
P (8) 41 104 1200 mW 240.4 mW
PW (14) 29.3 173.6 720 mW 144 mW

recommended operating conditions


MIN MAX UNIT
Single supply 2.5 16
Supply voltage
voltage, VCC V
Split supply ±1.25 ±8
Common-mode input voltage range, VICR Amplifier and comparator –0.1 VCC+5 V
Operating free-air temperature, TA – 40 125 °C

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
SLOS343 – DECEMBER 2000

electrical characteristics at recommended operating conditions, VCC = 2.7, 5 V, and 15 V (unless


otherwise noted)
amplifier dc performance
PARAMETER TEST CONDITIONS TA† MIN TYP MAX UNIT

VO = VCC/2 V, 25°C 390 4000


VIO Input offset voltage µV
VIC = VCC/2 V, Full range 6000
αVIO Offset voltage draft RS = 50 Ω 25°C 3 µV/°C
25°C 55 73
VCC = 2
2.7
7V
Full range 52
VIC = 0 to VCC, 25°C 60 80
CMRR Common-mode
Common mode rejection ratio VCC = 5 V dB
RS = 50 Ω Full range 55
25°C 66 90
VCC = 15 V
Full range 60
25°C 130 400
VCC = 2 7V
2.7 V, VO(
O(pp)) = 1 5V
1.5 V, RL = 500 kΩ
Full range 30
Large-signal
g g differential voltage
g 25°C 300 1000
AVD VCC = 5 V
V, VO(
O(pp)) = 3 V
V, RL = 500 kΩ V/mV
amplification Full range 100
25°C 400 1400
VCC = 15 V
V, VO(
O(pp)) = 8 V
V, RL = 500 kΩ
Full range 120
25°C 90 120
VCC = 2
2.7
7 to 5 V
Power supply
y rejection
j ratio VIC = VCC/2 V,, No load Full range 85
PSRR dB
(∆VCC/∆VIO) 25°C 94 120
VCC = 5 to 15 V
Full range 90
† Full range is –40°C to 125°C.

amplifier and comparator input characteristics


PARAMETER TEST CONDITIONS TA† MIN TYP MAX UNIT
25°C 25 250
IIO Input offset current 0 to 70°C 300 pA
VO = VCC/2 V,
V
VIC = VCC/2 V,, Full range 500
Rp = 1 MΩ (pullup to VCC), 25°C 100 500
RS = 50 Ω
IIB Input bias current 0 to 70°C 550 pA
Full range 1000
ri(d) Differential input resistance 25°C 300 MΩ
Common-mode input
Ci(c) f = 100 kHz 25°C 3 pF
capacitance
† Full range is –40°C to 125°C.

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
SLOS343 – DECEMBER 2000

electrical characteristics at recommended operating conditions, VCC = 2.7, 5 V, and 15 V (unless


otherwise noted) (continued)
amplifier output characteristics
PARAMETER TEST CONDITIONS TA† MIN TYP MAX UNIT
25°C 2.55 2.65
VCC = 2
2.7
7V
Full range 2.5
VIC = VCC/2,, 25°C 4.85 4.95
VOH High level output voltage
High-level VCC = 5 V V
IOH = –50 µA Full range 4.8
25°C 14.85 14.95
VCC = 15 V
Full range 14.8
25°C 180 260
VOL Low level output voltage
Low-level /2 IOL = 50 µA
VIC = VCC/2, mV
Full range 300
IO Output current VO = 0.5 V from rail 25°C ±200 µA
† Full range is –40°C to 125°C.

amplifier dynamic performance


PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT
UGBW Unity gain bandwidth RL = 500 kΩ, CL = 100 pF 25°C 5.5 kHz
SR Slew rate at unity gain VO(pp) = 0.8 V, RL = 500 kΩ, CL = 100 pF 25°C 2.5 V/ms
φM Phase margin 60°
RL = 500 kΩ
kΩ, CL = 100 pF 25°C
Gain margin 15 dB
VCC = 2.7 or 5 V,
V(STEP)PP = 1 V, CL = 100 pF, 0.1% 1.84
AV = –1, RL = 100 kΩ
ts Settling time 25°C ms
VCC = 15 V, 0.1% 6.1
V(STEP)PP = 1 V,V CL = 100 pF
F,
AV = –1, RL = 100 kΩ 0.01% 32

Equivalent input
in ut noise f = 0.1 to 10 Hz 5.3 µVpp
Vn 25°C
voltage f = 100 Hz 500 nV/√Hz
Equivalent input noise
In current f = 100 Hz 25°C 8 fA/√Hz

supply current
PARAMETER TEST CONDITIONS TA† MIN TYP MAX UNIT
VCC = 2.7 V or 5 V 25°C 1.4
Supply
S l currentt ((one op-amp and
d one Rp = N
No pullup,
ll
ICC 25°C 1.4 1.7 µA
com arator)
comparator) Out ut state high
Output VCC = 15 V
Full range 2.3
Reverse supply current VCC = –18 V, VI = 0 V, VO = open 25°C 50 nA
† Full range is –40°C to 125°C.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
SLOS343 – DECEMBER 2000

electrical characteristics at recommended operating conditions, VCC = 2.7, 5 V, and 15 V (unless


otherwise noted) (continued)
comparator dc performance
PARAMETER TEST CONDITIONS† TA† MIN TYP MAX UNIT
25°C 250 5000
VIO Input offset voltage VIC= VCC/2,
/2 RS = 50 Ω,
Ω µV
Full range 7000
Rp = 1 MΩ (pullup
( ullu to VCC)
αVIO Offset voltage drift 25°C 3 µV/°C
25°C 55 72
VCC = 2 7V
2.7
Full range 50
VIC= 0 to VCC, 25°C 60 76
CMRR Common mode rejection ratio
Common-mode VCC = 5 V dB
RS = 50 Ω Full range 55
25°C 65 88
VCC = 15 V
Full range 60
Large-signal differential voltage
AVD Rp = 1 MΩ (pullup to VCC) 25°C 1000 V/mV
amplification
25°C 75 100
VCC = 2
2.7
7 to 5 V
Power supply
y rejection
j ratio VIC = VCC/2 V, Full range 70
PSRR dB
(∆VCC/∆VIO) No load 25°C 85 105
VCC = 5 to 15 V
Full range 80
† Full range is –40°C to 125°C.

comparator output characteristics


PARAMETER TEST CONDITIONS† TA† MIN TYP MAX UNIT
High-impedance output leakage
IOZ VIC = VCC/2, VO = VCC, VID = 1 V 25°C 50 pA
current
25°C 80 200
VOL Low level output voltage
Low-level VIC = VCC/2,
/2 IOL = 50 µA
µA, VID = –1
1V mV
Full range 300
† Full range is –40°C to 125°C.

switching characteristics at recommended operating conditions, VCC = 2.7 V, 5 V, 15 V (unless


otherwise noted)
PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT
Overdrive = 2 mV 175
Propagation
P ti ddelay
l titime,
t((PLH)) Overdrive = 10 mV 25°C 55
low-to-high-level out
output
ut kHz
f = 10 kHz,
VSTEP = 1 V,, Overdrive = 50 mV 25
µs
CL = 10 pF, Overdrive = 2 mV 300
Propagation
P ti ddelay
l titime, Rp = 1 MΩ (pullup
( ll to
t VCC)
t((PHL)) Overdrive = 10 mV 25°C 60
high-to-low-level out ut
output
Overdrive = 50 mV 30
tf Fall time CL = 10 pF 25°C 5 µs
NOTE: The response time specified is the interval between the input step function and the instant when the output crosses 1.4 V.

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
SLOS343 – DECEMBER 2000

TYPICAL CHARACTERISTICS

Table of Graphs
FIGURE
VIO Input offset voltage vs Common-mode input voltage 1, 2
vs Free-air temperature 3, 5, 7
IIB Input bias current
vs Common-mode input voltage 4, 6
vs Free-air temperature 3, 5, 7
IIO Input offset current
vs Common-mode input voltage 4, 6
vs Supply voltage 8
ICC Supply current
vs Free-air temperature 9
Amplifier
CMRR Common-mode rejection ratio vs Frequency 10
VOH High-level output voltage vs High-level output current 11, 13
VOL Low-level output voltage vs Low-level output current 12, 14
VO(PP) Output voltage, peak-to-peak vs Frequency 15
PSRR Power supply rejection ratio vs Frequency 16
Voltage noise over a 10 Second Period 17
φm Phase margin vs Capacitive load 18
AVD Differential voltage gain vs Frequency 19
Phase vs Frequency 19
Gain bandwidth product vs Supply voltage 20
SR Slew rate vs Free-air temperature 21
Large signal follower pulse response 22
Small signal follower pulse response 23
Large signal inverting pulse response 24
Small signal inverting pulse response 25
Comparator
VOL Low-level output voltage vs Low-level output current 26, 27
Open collector leakage current vs Free-air temperature 28
Output fall time vs Supply voltage 29
Low-to-high level output response for various input overdrives 30, 31
High-to-low level output response for various input overdrives 32, 33

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
SLOS343 – DECEMBER 2000

AMPLIFIER AND COMPARATOR TYPICAL CHARACTERISTICS


INPUT OFFSET VOLTAGE INPUT OFFSET VOLTAGE
vs vs INPUT BIAS / OFFSET CURRENT
COMMON-MODE INPUT COMMON-MODE INPUT vs
VOLTAGE VOLTAGE FREE-AIR TEMPERATURE
1400 100 600

I IB / I IO – Input Bias / Offset Current – pA


VCC = 2.7 V VCC = 2.7 V
1200 500
TA = 25°C
V IO – Input Offset Voltage – µV

VIC = 1.35 V

V IO – Input Offset Voltage – µV


0
1000 400

800 300
–100

600 200

–200 100
400
IIO
200 0
–300 IIB
0 VCC = 5 V –100
TA = 25 °C
–200 –400 –200
–0.20
–0.1 0.20 0.60 1.00 1.40 1.80 2.20 2.60 2.9 –0.2
–0.1 0.4 1.0 1.6 2.2 2.8 3.4 4.0 4.6 5.2 –40 –25 –10 5 20 35 50 65 80 95 110 125
VICR – Common-Mode Input Voltage – V VICR – Common-Mode Input Voltage – V TA – Free-Air Temperature – °C
Figure 1 Figure 2 Figure 3
INPUT BIAS/OFFSET CURRENT INPUT BIAS/OFFSET CURRENT
vs INPUT BIAS/OFFSET CURRENT vs
COMMON-MODE INPUT vs COMMON-MODE INPUT
VOLTAGE FREE-AIR TEMPERATURE VOLTAGE
400 600 200
I IB / I IO – Input Bias / Offset Current – pA

I IB / I IO – Input Bias / Offset Current – pA

I IB / I IO – Input Bias / Offset Current – pA


350 VCC = 2.7 V VCC = 5 V VCC = 5 V
500 150
300 TA = 25 °C VIC = 2.5 V TA = 25 °C

250 400
100
200 300
50
150 IIO
200
100
0
50 IIO 100
IIO –50
0 0
IIB
–50 IIB
IIB –100 –100
–100
–150 –200 –150
–0.2
–0.1 0.2 0.6 1.0 1.4 1.8 2.2 2.6 2.9 –40 –25 –10 5 20 35 50 65 80 95 110 125 –0.2 0.4 1.0 1.6 2.2 2.8 3.4 4.0 4.6 5.2
VICR – Common Mode Input Voltage – V TA – Free-Air Temperature – °C VICR – Common Mode Input Voltage – V
Figure 4 Figure 5 Figure 6

INPUT BIAS/OFFSET CURRENT SUPPLY CURRENT SUPPLY CURRENT


vs vs vs
FREE-AIR TEMPERATURE SUPPLY VOLTAGE FREE-AIR TEMPERATURE
1200 2
I IB / I IO – Input Bias/Offset Current – pA

2.5
VCC = 15 V TA = 25°C
2.25 TA = 125°C
1000 1.75
I CC – Supply Current – µ A
I CC – Supply Current – µ A

2
800 TA = 70°C 1.5
1.75
1.25
600 IIB 1.5 VCC = 2.7, 5, & 15 V
Op Amp
1.25 1
VI = VCC/2
400 TA = 0°C AV = 1
1 0.75
TA = –40°C Comparator
200 0.75
0.5 VID = –1 V
IIO 0.5 Op Amp, VI = VCC/2 Rp = 1MΩ (pullup to VCC)
0 Comparator, VID = –1 V
0.25 0.25
Rp = 1MΩ (pullup to VCC)
–200 0 0
–40 –25 –10 5 20 35 50 65 80 95 110 125 0 2 4 6 8 10 12 14 16 –40 –25 –10 5 20 35 50 65 80 95 110 125
TA – Free-Air Temperature – °C VCC – Supply Voltage – V TA – Free-Air Temperature – °C
Figure 7 Figure 8 Figure 9

8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
SLOS343 – DECEMBER 2000

AMPLIFIER TYPICAL CHARACTERISTICS

COMMON-MODE REJECTION RATIO HIGH-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE


vs vs vs
FREQUENCY HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT CURRENT
2.7 1.50
CMRR – Common-Mode Rejection Ratio – dB

120
VCC = 2.7 V

VOL – Low-Level Output Voltage – V


V OH – High-Level Output Voltage – V
VCC=2.7, 5, 15 V VCC = 2.7 V
100 1.25 TA =25 °C
RF=100 kΩ 2.4
TA = 0 °C
RI=1 kΩ TA = –40°C
80 TA = –40°C 1.00
2.1

60 TA = –0°C 0.75
TA = 25 °C TA = 70 °C
1.8
TA = 70 °C TA = 125 °C
40 0.50
TA = 125 °C

1.5
20 0.25

0 1.2 0
1 10 100 1k 10k 0 50 100 150 200 0 50 100 150 200
f – Frequency – Hz IOH – High-Level Output Current – µA IOL – Low-Level Output Current – µA
Figure 10 Figure 11 Figure 12

OUTPUT VOLTAGE
HIGH-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE PEAK-TO-PEAK
vs vs vs
HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT CURRENT FREQUENCY
5.0 1.50 16

V O(PP) – Output Voltage Peak-to-Peak – V


VOL – Low-Level Output Voltage – V

VCC = 5 V
V OH – High-Level Output Voltage – V

VCC = 5 V 14 VCC = 15 V
TA = –40°C 1.25
4.5 TA = 0 °C 12
TA = –40°C
1.00 10

8
4.0 TA = –0°C 0.75
TA = 25 °C TA = 25 °C
6
TA = 70 °C TA = 70 °C
TA = 125 °C RL = 100 kΩ
TA = 125 °C 0.50 4 VCC = 5 V
CL = 100 pF
3.5 TA = 25°C
2
0.25 VCC = 2.7 V
0

3.0 0 –2
0 50 100 150 200 0 50 100 150 200 10 100 1k
IOH – High-Level Output Current – µA IOL – Low-Level Output Current – µA f – Frequency – Hz
Figure 13 Figure 14 Figure 15

POWER SUPPLY REJECTION RATIO PHASE MARGIN


vs VOLTAGE NOISE vs
FREQUENCY OVER A 10 SECOND PERIOD CAPACITIVE LOAD
120
PSRR – Power Supply Rejection Ratio – dB

80
VCC = 2.7, 5, & 15 V 4 VCC = 5 V
110
TA = 25°C f = 0.1 Hz to 10 Hz 70
3
Input Referred Voltage Noise – µV

TA = 25°C
100
60
2
Phase Margin – °

90
50
1
80
40
0
70
30
–1
60 VCC = 2.7, 5, & 15 V
20 RL= 500 kΩ
–2
50 TA = 25°C
10
–3
40
0
10 100 1k 10k –4
0 1 2 3 4 5 6 7 8 9 10 10 100 1k 10k
f – Frequency – Hz
t – Time – s CL – Capacitive Load – pF
Figure 16
Figure 17 Figure 18

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
SLOS343 – DECEMBER 2000

AMPLIFIER TYPICAL CHARACTERISTICS


DIFFERENTIAL VOLTAGE GAIN AND PHASE
GAIN BANDWIDTH PRODUCT SLEW RATE
vs vs vs
FREQUENCY SUPPLY VOLTAGE FREE-AIR TEMPERATURE
60 135 7 3.5
TA = 25°C

GBWP –Gain Bandwidth Product – kHz


AVD – Differential Voltage Gain – dB

50 RL = 100 kΩ
6 3.0
CL = 100 pF SR+

SR – Slew Rate – V/ ms
40 90 f = 1kHz
5 VCC = 5, 15 V
2.5
30

Phase – °
VCC = 2.7 V
4 2.0
20 45
3 1.5
10

2 VCC = 2.7, 5, 15 V
0 0 1.0 SR–
VCC=2.7, 5, 15 V
RL=500 kΩ
–10 CL=100 pF 1 0.5
TA=25°C
–20 –45 0
10 100 1k 10k 0
2.5 4.0 5.5 7.0 8.5 10.0 11.5 13.0 14.5 16.0 –40 –25 –10 5 20 35 50 65 80 95 110 125
f – Frequency – Hz
VCC – Supply Voltage –V TA – Free-Air Temperature – °C
Figure 19
Figure 20 Figure 21

LARGE SIGNAL FOLLOWER SMALL SIGNAL FOLLOWER


PULSE RESPONSE PULSE RESPONSE
8 4 180 300
VCC = 5 V 160 VIN
7 3 150
AV = 1
VIN RL = 100 kΩ 140
V – Output Voltage – mV

6 0
2

V IN – Input Voltage – mV
CL = 100 pF VCC = 2.7, 5,
– Input Voltage – V
V – Output Voltage – V

120 –150
5 TA = 25°C 1 & 15 V
100 AV = 1
4 0
80 RL = 100 kΩ
3 –1 CL = 100 pF
60 VO TA = 25°C
2 VO 40
IN

O
O

1
V

20
0 0

–1 –20
–1 0 1 2 3 4 5 6 –50 0 50 100 150 200 250 300 350 400 450 500
t – Time – ms t – Time – µs
Figure 22 Figure 23

LARGE SIGNAL INVERTING SMALL SIGNAL INVERTING


PULSE RESPONSE PULSE RESPONSE
2.5 4 200 200
2.0 3 VIN
1.5 VIN 150 100
2
V – Output Voltage – mV

1.0
V – Output Voltage – V

– Input Voltage – mV

1 VCC = 2.7, 5,
100
– Input Voltage – V

0
0.5 0 & 15 V
VCC = 5 V
0.0 AV = –1 –1 50 AV = –1
–100
RL = 100 kΩ RL = 100 kΩ
–0.5
CL = 100 pF CL = 100 pF
–1.0 0
TA = 25°C TA = 25°C
–1.5
–50
IN
O

IN

–2.0
V

VO
V

–2.5 VO –100
–3.0
–3.5 –150
–1 0 1 2 3 4 5 6 7 –200 0 200 400 600 800 1000 1200
t – Time – ms t – Time – ms
Figure 24 Figure 25

10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
SLOS343 – DECEMBER 2000

COMPARATOR TYPICAL CHARACTERISTICS

LOW-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE


vs vs
LOW-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT CURRENT
2.7 5
VCC = 2.7 V VCC = 5 V
VID = –1 V VID = –1 V
VOL – Low-Level Output Voltage – V

VOL – Low-Level Output Voltage – V


2.4 4.5
TA = 125°C 4
2.1 TA = 125°C
TA = 70°C 3.5
1.8
TA = 70°C
TA = 25°C 3
1.5
2.5
1.2
2
TA = 0°C TA = 25°C
0.9
1.5 TA = 0°C
0.6 TA = –40°C 1
TA = –40°C
0.3 0.5
0.0 0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8
IOL – Low-Level Output Current – mA IOL – Low-Level Output Current – mA

Figure 26 Figure 27

OPEN COLLECTOR LEAKAGE CURRENT OUTPUT FALL TIME


vs vs
FREE-AIR TEMPERATURE SUPPLY VOLTAGE
I OZ – Open Collector Leakage Current – pA

2400 8
2200 VID = 1 V
2000 7

t f – Output Fall Time – µ s


1800
6
1600 CL = 50 pF
1400 VCC = 15 V 5
CL = 10 pF
1200
4
1000 VCC = 2.7 V, 5 V
800 3
600 VID= 1 V to –1 V
2 Rp = 1 MΩ (pullup to VCC)
400 Input Fall Time = 500 ns
200 TA = 25°C
1
0
–200 0
–40 –25 –10 5 20 35 50 65 80 95 110 125 2 3 4 5 6 7 8 9 10 11 12 13 14 15
TA – Free-Air Temperature – °C VCC – Supply Voltage – V

Figure 28 Figure 29

LOW-TO-HIGH LEVEL OUTPUT LOW-TO-HIGH LEVEL OUTPUT


RESPONSE FOR VARIOUS RESPONSE FOR VARIOUS
INPUT OVERDRIVES INPUT OVERDRIVES
V O – Output Voltage – V

5
3
V O – Output Voltage – V

2.5 4

2 3
50 mV
1.5 2 50 mV 10 mV
2 mV
1 10 mV 2 mV 1
0.5
0
Input Voltage – V
V ID – Differential

0 VCC = 5 V
Input Voltage – V

VCC = 2.7 V 0.1


V ID – Differential

CL = 10 pF
CL = 10 pF 0.1
RP = 1 MΩ (Pullup to VCC) 0.05
RP = 1 MΩ (Pullup to VCC) 0.05 TA = 25°C
TA = 25°C 0
0

0 50 100 150 200 250 300


0 50 100 150 200 250 300
t – Time – µs
t – Time – µs

Figure 30 Figure 31

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
SLOS343 – DECEMBER 2000

COMPARATOR TYPICAL CHARACTERISTICS

HIGH-TO-LOW LEVEL OUTPUT HIGH-TO-LOW LEVEL OUTPUT


RESPONSE FOR VARIOUS RESPONSE FOR VARIOUS
INPUT OVERDRIVES INPUT OVERDRIVES

V O – Output Voltage – V
3 6
V O – Output Voltage – V

2.5 5

2 4
50 mV
50 mV 3
1.5 10 mV
10 mV 2
1 2 mV
2 mV 1
0.5
0
0

Input Voltage – V
Input Voltage – V

V ID – Differential
V ID – Differential
–1
VCC = 2.7 V VCC = 5 V
CL = 10 pF 0.1 CL = 10 pF 0.1
Rp = 1 MΩ (pullup to VCC) 0.05 Rp = 1 MΩ (pullup to VCC)
TA = 25°C TA = 25°C 0.05
0 0

0 50 100 150 200 250 300 350 400 0 50 100 150 200 250 300 350 400
t – Time – µs t – Time – µs

Figure 32 Figure 33

APPLICATION INFORMATION

reverse battery protection


The TLV2302/4 is protected against reverse battery voltage up to 18 V. When subjected to reverse battery
condition, the supply current is typically less than 100 nA at 25°C (inputs grounded and outputs open). This
current is determined by the leakage of six Schottky diodes and will therefore increase as the ambient
temperature increases.
When subjected to reverse battery conditions and negative voltages applied to the inputs or outputs, the input
ESD structure will turn on—this current should be limited to less than 10 mA. If the inputs or outputs are referred
to ground, rather than midrail, no extra precautions need be taken.
common-mode input range
The TLV2302/4 has rail-rail input and outputs. For common-mode inputs from –0.1 V to VCC – 0.8 V a PNP
differential pair will provide the gain.
For inputs between VCC – 0.8 V and VCC, two NPN emitter followers buffering a second PNP differential pair
provide the gain. This special combination of NPN/PNP differential pair enables the inputs to be taken 5 V above
the rails; because as the inputs go above VCC, the NPNs switch from functioning as transistors to functioning
as diodes. This will lead to an increase in input bias current. The second PNP differential pair continues to
function normally as the inputs exceed VCC.
The TLV2302/4 has a negative common-input range that exceeds ground by 100 mV. If the inputs are taken
much below this, reduced open loop gain will be observed with the ultimate possibility of phase inversion.

12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
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APPLICATION INFORMATION

offset voltage
The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times
the corresponding gains. The following schematic and formula can be used to calculate the output offset
voltage.
RF

ǒ ǒ ǓǓ ǒ ǒ ǓǓ
IIB–
RG

VI
+ –
VO V
OO
+ VIO 1 ) R
R
F " IIB) RS 1 ) R
R
F " IIB– RF
+ G G
RS

IIB+

Figure 34. Output Offset Voltage Model

general configurations
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often
required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier
(see Figure 35).

+ 2pR1C1

ǒ Ǔǒ
RG RF 1
f
–3dB

VI

+
VO
V
V
O
I
+ 1 ) RRF
G
1 ) sR1C1
1 Ǔ
R1
C1

Figure 35. Single-Pole Low-Pass Filter

If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this
task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth.
Failure to do this can result in phase shift of the amplifier.
C1
R1 = R2 = R
C1 = C2 = C
Q = Peaking Factor
(Butterworth Q = 0.707)
VI +
R1 R2 _ f
–3dB
+ 2p1RC
C2
RF
RG =
1
RG
RF
( 2–
Q )

Figure 36. 2-Pole Low-Pass Sallen-Key Filter

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
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APPLICATION INFORMATION

circuit layout considerations


To achieve the levels of high performance of the TLV230x, follow proper printed-circuit board design techniques.
A general set of guidelines is given in the following.
D Ground planes—It is highly recommended that a ground plane be used on the board to provide all
components with a low inductive ground connection. However, in the areas of the amplifier inputs and
output, the ground plane can be removed to minimize the stray capacitance.
D Proper power supply decoupling—Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic
capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers
depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal
of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply
terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less
effective. The designer should strive for distances of less than 0.1 inches between the device power
terminals and the ceramic capacitors.
D Sockets—Sockets can be used but are not recommended. The additional lead inductance in the socket pins
will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board
is the best implementation.
D Short trace runs/compact part placements—Optimum high performance is achieved when stray series
inductance has been minimized. To realize this, the circuit layout should be made as compact as possible,
thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of
the amplifier. Its length should be kept as short as possible. This will help to minimize stray capacitance at
the input of the amplifier.
D Surface-mount passive components—Using surface-mount passive components is recommended for high
performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of
surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small
size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray
inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be
kept as short as possible.

14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
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APPLICATION INFORMATION
general power dissipation considerations

ǒ Ǔ
For a given θJA, the maximum power dissipation is shown in Figure 37 and is calculated by the following formula:

P
D
+ T –T
MAX A
q JA
Where:
PD = Maximum power dissipation of TLV230x IC (watts)
TMAX = Absolute maximum junction temperature (150°C)
TA = Free-ambient air temperature (°C)
θJA = θJC + θCA
θJC = Thermal coefficient from junction to case
θCA = Thermal coefficient from case to ambient air (°C/W)

MAXIMUM POWER DISSIPATION


vs
FREE-AIR TEMPERATURE
2
PDIP Package TJ = 150°C
Low-K Test PCB
1.75
θJA = 104°C/W
Maximum Power Dissipation – W

1.5 MSOP Package


Low-K Test PCB
SOIC Package θJA = 260°C/W
1.25 Low-K Test PCB
θJA = 176°C/W
1

0.75

0.5

0.25

0
–55 –40 –25 –10 5 20 35 50 65 80 95 110 125
TA – Free-Air Temperature – °C

NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB.

Figure 37. Maximum Power Dissipation vs Free-Air Temperature

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
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APPLICATION INFORMATION
amplifier macromodel information
Macromodel information provided was derived using Microsim Parts  Release 8, the model generation
software used with Microsim PSpice . The Boyle macromodel (see Note 2) and subcircuit in Figure 38 are
generated using the TLV230x typical electrical and operating characteristics at TA = 25°C. Using this
information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most
cases):
D Maximum positive output voltage swing D Unity-gain frequency
D Maximum negative output voltage swing D Common-mode rejection ratio
D Slew rate D Phase margin
D Quiescent power dissipation D DC output resistance
D Input bias current D AC output resistance
D Open-loop voltage amplification D Short-circuit output current limit
NOTE 3: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal
of Solid-State Circuits, SC-9, 353 (1974).
3 99
VCC+
+
ree cee egnd fb ro2
rp rc1 rc2

c1
7
11 12 +
1 c2
IN+ + r2 vlim
9 6

vc
2 + 8
IN– q1 q2 –
vb ga
53 – gcm ioff ro1
dp 13 14

re1 re2 VOUT


dlp dln 5
10 91 90 92

iee dc + + –
vlp hlim vln
VCC– – – +
4 – + 54
ve de
.subckt 230X_5V–X 1 2 3 4 5 rc1 3 11 978.81E3
* rc2 3 12 978.81E3
c1 11 12 9.8944E–12 re1 13 10 30.364E3
c2 6 7 30.000E–12 re2 14 10 30.364E3
cee 10 99 8.8738E–12 ree 10 99 3.6670E9
dc 5 53 dy ro1 8 5 10
de 54 5 dy ro2 7 99 10
dlp 90 91 dx rp 3 4 1.4183E6
dln 92 90 dx vb 9 0 dc 0
dp 4 3 dx vc 3 53 dc .88315
egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 ve 54 4 dc .88315
fb 7 99 poly(5) vb vc ve vlp vln 0 61.404E6 –1E3 1E3 61E6 –61E6 vlim 7 8 dc 0
ga 6 0 11 12 1.0216E–6 vlp 91 0 dc 540
gcm 0 6 10 99 10.216E–12 vln 0 92 dc 540
iee 10 4 dc 54.540E–9 .model dx D(Is=800.00E–18)
ioff 0 6 dc 5e–12 .model dy D(Is=800.00E–18 Rs=1m Cjo=10p)
hlim 90 0 vlim 1K .model qx1 NPN(Is=800.00E–18 Bf=27.270E21)
q1 11 2 13 qx1 .model qx2 NPN(Is=800.0000E–18 Bf=27.270E21)
q2 12 1 14 qx2 .ends
r2 6 9 100.00E3

Figure 38. Boyle Macromodels and Subcircuit

PSpice and Parts are trademarks of MicroSim Corporation.

16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
SLOS343 – DECEMBER 2000

MECHANICAL DATA
D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN

0.050 (1,27)

0.020 (0,51)
0.010 (0,25) M
0.014 (0,35)
14 8

0.008 (0,20) NOM


0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane

0.010 (0,25)
1 7
0°– 8°
0.044 (1,12)
A 0.016 (0,40)

Seating Plane

0.010 (0,25) 0.004 (0,10)


0.069 (1,75) MAX
0.004 (0,10)

PINS **
8 14 16
DIM

0.197 0.344 0.394


A MAX
(5,00) (8,75) (10,00)

0.189 0.337 0.386


A MIN
(4,80) (8,55) (9,80)
4040047 / D 10/96

NOTES: A. All linear dimensions are in inches (millimeters).


B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
SLOS343 – DECEMBER 2000

MECHANICAL INFORMATION
DGK (R-PDSO-G8) PLASTIC SMALL-OUTLINE PACKAGE

0,38
0,65 0,25 M
0,25
8 5

0,15 NOM
3,05 4,98
2,95 4,78

Gage Plane

0,25

1 4 0°– 6°
0,69
3,05 0,41
2,95

Seating Plane

0,15
1,07 MAX 0,10
0,05

4073329/B 04/98

NOTES: A. All linear dimensions are in millimeters.


B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC MO-187

18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
SLOS343 – DECEMBER 2000

MECHANICAL INFORMATION
N (R-PDIP-T**) PLASTIC DUAL-IN-LINE PACKAGE
16 PINS SHOWN

PINS **
14 16 18 20
DIM

0.775 0.775 0.920 0.975


A A MAX
(19,69) (19,69) (23,37) (24,77)

16 9 0.745 0.745 0.850 0.940


A MIN
(18,92) (18,92) (21,59) (23,88)

0.260 (6,60)
0.240 (6,10)

1 8
0.070 (1,78) MAX

0.325 (8,26)
0.035 (0,89) MAX 0.020 (0,51) MIN
0.300 (7,62)

0.015 (0,38)

0.200 (5,08) MAX Gauge Plane

Seating Plane

0.125 (3,18) MIN 0.010 (0,25) NOM

0.100 (2,54) 0.430 (10,92) MAX


0.021 (0,53)
0.010 (0,25) M
0.015 (0,38)

14/18 PIN ONLY

4040049/D 02/00

NOTES: A. All linear dimensions are in inches (millimeters).


B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001 (20-pin package is shorter than MS-001).

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 19


TLV2302, TLV2304
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AND OPEN DRAIN COMPARATORS
SLOS343 – DECEMBER 2000

MECHANICAL INFORMATION
P (R-PDIP-T8) PLASTIC DUAL-IN-LINE PACKAGE

0.400 (10,60)
0.355 (9,02)

8 5

0.260 (6,60)
0.240 (6,10)

1 4

0.070 (1,78) MAX

0.310 (7,87)
0.020 (0,51) MIN
0.290 (7,37)

0.200 (5,08) MAX

Seating Plane

0.125 (3,18) MIN

0.100 (2,54) 0°– 15°

0.021 (0,53)
0.010 (0,25) M
0.015 (0,38) 0.010 (0,25) NOM

4040082 / B 03/95

NOTES: A. All linear dimensions are in inches (millimeters).


B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001

20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TLV2302, TLV2304
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS
AND OPEN DRAIN COMPARATORS
SLOS343 – DECEMBER 2000

MECHANICAL INFORMATION
PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN

0,30
0,65 0,10 M
0,19
14 8

0,15 NOM
4,50 6,60
4,30 6,20

Gage Plane

0,25
1 7
0°– 8°
A 0,75
0,50

Seating Plane

1,20 MAX 0,15 0,10


0,05

PINS **
8 14 16 20 24 28
DIM

A MAX 3,10 5,10 5,10 6,60 7,90 9,80

A MIN 2,90 4,90 4,90 6,40 7,70 9,60

4040064/F 01/97

NOTES: A. All linear dimensions are in millimeters.


B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 21


PACKAGE OPTION ADDENDUM
www.ti.com 7-May-2007

PACKAGING INFORMATION

Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
TLV2302ID ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2302IDG4 ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2302IDGK ACTIVE MSOP DGK 8 80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2302IDGKG4 ACTIVE MSOP DGK 8 80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2302IDGKR ACTIVE MSOP DGK 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2302IDGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2302IDR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2302IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2302IP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLV2302IPE4 ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLV2304ID ACTIVE SOIC D 14 50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2304IDG4 ACTIVE SOIC D 14 50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2304IDR ACTIVE SOIC D 14 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2304IDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2304IN ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLV2304INE4 ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLV2304IPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2304IPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 7-May-2007

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.

Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 19-Mar-2008

TAPE AND REEL INFORMATION

*All dimensions are nominal


Device Package Package Pins SPQ Reel Reel A0 (mm) B0 (mm) K0 (mm) P1 W Pin1
Type Drawing Diameter Width (mm) (mm) Quadrant
(mm) W1 (mm)
TLV2302IDGKR MSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TLV2302IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV2304IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLV2304IPWR TSSOP PW 14 2000 330.0 12.4 7.0 5.6 1.6 8.0 12.0 Q1

Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 19-Mar-2008

*All dimensions are nominal


Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TLV2302IDGKR MSOP DGK 8 2500 358.0 335.0 35.0
TLV2302IDR SOIC D 8 2500 340.5 338.1 20.6
TLV2304IDR SOIC D 14 2500 333.2 345.9 28.6
TLV2304IPWR TSSOP PW 14 2000 346.0 346.0 29.0

Pack Materials-Page 2
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